| /freebsd/sys/crypto/openssl/aarch64/ |
| H A D | vpsm4_ex-armv8.S | 1 /* Do not modify. This file is auto-generated from vpsm4_ex-armv8.pl. */ 2 // Copyright 2022-2025 The OpenSSL Project Authors. All Rights Reserved. 18 .arch armv8-a+crypto 47 .size _vpsm4_ex_consts,.-_vpsm4_ex_consts 73 movi v0.16b,#64 74 cbnz w2,1f 76 1: 77 mov w7,v5.s[1] 86 tbl v0.16b, {v4.16b}, v26.16b 87 ushr v2.16b, v0.16b, 4 [all …]
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| H A D | ghashv8-armx.S | 1 /* Do not modify. This file is auto-generated from ghashv8-armx.pl. */ 5 .arch armv8-a+crypto 17 dup v17.4s,v17.s[1] 22 shl v3.2d,v3.2d,#1 25 orr v3.16b,v3.16b,v18.16b //H<<<=1 30 ext v16.16b,v20.16b,v20.16b,#8 //Karatsuba pre-processing 31 pmull v0.1q,v20.1d,v20.1d 33 pmull2 v2.1q,v20.2d,v20.2d 34 pmull v1.1q,v16.1d,v16.1d 36 ext v17.16b,v0.16b,v2.16b,#8 //Karatsuba post-processing [all …]
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| H A D | vpsm4-armv8.S | 1 /* Do not modify. This file is auto-generated from vpsm4-armv8.pl. */ 2 // Copyright 2020-2025 The OpenSSL Project Authors. All Rights Reserved. 18 .arch armv8-a 58 .size _vpsm4_consts,.-_vpsm4_consts 86 movi v0.16b,#64 87 cbnz w2,1f 89 1: 90 mov w7,v5.s[1] 100 sub v4.16b,v4.16b,v0.16b 102 sub v4.16b,v4.16b,v0.16b [all …]
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| H A D | aesv8-armx.S | 1 /* Do not modify. This file is auto-generated from aesv8-armx.pl. */ 5 .arch armv8-a+crypto 11 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat 20 // Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later. 21 stp x29,x30,[sp,#-16]! 23 mov x3,#-1 28 mov x3,#-2 40 eor v0.16b,v0.16b,v0.16b 52 ext v5.16b,v0.16b,v3.16b,#12 54 aese v6.16b,v0.16b [all …]
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| H A D | aes-gcm-armv8_64.S | 1 /* Do not modify. This file is auto-generated from aes-gcm-armv8_64.pl. */ 5 .arch armv8-a+crypto 13 stp x19, x20, [sp, #-112]! 41 sub x5, x5, #1 //byte_len - 1 48 fmov d1, x10 //CTR block 1 51 add w12, w12, #1 //increment rev_ctr32 55 rev w9, w12 //CTR block 1 56 add w12, w12, #1 //CTR block 1 59 orr x9, x11, x9, lsl #32 //CTR block 1 60 …ld1 { v0.16b}, [x16] //special case vector load initial counter so we … [all …]
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| H A D | vpaes-armv8.S | 1 /* Do not modify. This file is auto-generated from vpaes-armv8.pl. */ 94 .size _vpaes_consts,.-_vpaes_consts 102 // Fills register %r10 -> .aes_consts (so you can -fPIC) 103 // and %xmm9-%xmm15 as specified below. 115 .size _vpaes_encrypt_preheat,.-_vpaes_encrypt_preheat 120 // AES-encrypt %xmm0. 124 // %xmm9-%xmm15 as in _vpaes_preheat 128 // Clobbers %xmm1-%xmm5, %r9, %r10, %r11, %rax 129 // Preserves %xmm6 - %xmm8 so you get some local vectors 142 ushr v0.16b, v7.16b, #4 // vpsrlb $4, %xmm0, %xmm0 [all …]
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| H A D | bsaes-armv8.S | 1 /* Do not modify. This file is auto-generated from bsaes-armv8.pl. */ 2 // Copyright 2021-2025 The OpenSSL Project Authors. All Rights Reserved. 15 // This implementation is a translation of bsaes-armv7 for AArch64. 20 // A lot of hand-scheduling has been performed. Consequently, this code 37 // x9 -> key (previously expanded using _bsaes_key_convert) 39 // v0-v7 input data 41 // x9-x11 corrupted 42 // other general-purpose registers preserved 43 // v0-v7 output data 44 // v11-v15 preserved [all …]
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| /freebsd/contrib/file/tests/ |
| H A D | Makefile.am | 3 test_CPPFLAGS = -I$(top_builddir)/src 6 android-vdex-1.result \ 7 android-vdex-1.testfile \ 8 android-vdex-2.result \ 9 android-vdex-2.testfile \ 26 CVE-2014-1943.result \ 27 CVE-2014-1943.testfile \ 28 dsd64-dff.result \ 29 dsd64-dff.testfile \ 30 dsd64-dsf.result \ [all …]
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| /freebsd/contrib/xz/src/liblzma/check/ |
| H A D | crc_x86_clmul.h | 1 // SPDX-License-Identifier: 0BSD 8 /// The CRC32 and CRC64 implementations use 32/64-bit x86 SSSE3, SSE4.1, and 15 /// (The link was checked on 2024-06-11.) 47 // EDG-based compilers (Intel's classic compiler and compiler for E2K) can 49 // The new Clang-based ICX needs the attribute. 54 __attribute__((__target__("ssse3,sse4.1,pclmul"))) 61 // but MSVC needs _mm_cvtsi64_si128 on x86-64. 91 // *Unaligned* 128-bit load 109 // Shift the 128-bit value left by "amount" bytes (not bits). 114 return _mm_shuffle_epi8(v, my_load128((vmasks + 32 - amount))); in shift_left() [all …]
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| /freebsd/crypto/openssl/crypto/aes/asm/ |
| H A D | vpaes-ppc.pl | 2 # Copyright 2013-2020 The OpenSSL Project Authors. All Rights Reserved. 11 ## Constant-time SSSE3 AES core implementation. 21 # 128-bit key. 23 # aes-ppc.pl this 32 # it in-line. Secondly it, being transliterated from 33 # vpaes-x86_64.pl, relies on "nested inversion" better suited 60 $FRAME=6*$SIZE_T+13*16; # 13*16 is for v20-v31 offload 62 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 63 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or 64 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or [all …]
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| H A D | vpaes-armv8.pl | 2 # Copyright 2015-2025 The OpenSSL Project Authors. All Rights Reserved. 11 ## Constant-time SSSE3 AES core implementation. 24 # SoC based on Cortex-A53 that doesn't have crypto extensions. 26 # CBC enc ECB enc/dec(*) [bit-sliced enc/dec] 27 # Cortex-A53 21.5 18.1/20.6 [17.5/19.8 ] 28 # Cortex-A57 36.0(**) 20.4/24.9(**) [14.4/16.6 ] 29 # X-Gene 45.9(**) 45.8/57.7(**) [33.1/37.6(**) ] 37 # (**) these results are worse than scalar compiler-generated 38 # code, but it's constant-time and therefore preferred; 46 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; [all …]
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| H A D | bsaes-armv8.pl | 2 # Copyright 2020-2025 The OpenSSL Project Authors. All Rights Reserved. 15 $0 =~ m/(.*[\/\\])[^\/\\]+$/; my $dir=$1; 16 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or 17 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate ) or 18 die "can't locate arm-xlate.pl"; 35 // Copyright 2021-2025 The OpenSSL Project Authors. All Rights Reserved. 48 // This implementation is a translation of bsaes-armv7 for AArch64. 53 // A lot of hand-scheduling has been performed. Consequently, this code 70 // x9 -> key (previously expanded using _bsaes_key_convert) 72 // v0-v7 input data [all …]
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| /freebsd/contrib/bearssl/src/rsa/ |
| H A D | rsa_i15_privexp.c | 33 * We want to invert e modulo phi = (p-1)(q-1). This first in br_rsa_i15_compute_privexp() 39 * modulo phi, but this would involve assembling three modulus-wide in br_rsa_i15_compute_privexp() 40 * values (phi/4, 1 and e) and calling moddiv, that requires in br_rsa_i15_compute_privexp() 42 * slightly more than 3 kB of stack space for RSA-4096. This in br_rsa_i15_compute_privexp() 47 * - We compute phi = k*e + r (Euclidean division of phi by e). in br_rsa_i15_compute_privexp() 50 * enforce non-ridiculously-small factors. in br_rsa_i15_compute_privexp() 52 * - We find small u, v such that u*e - v*r = 1 (using a in br_rsa_i15_compute_privexp() 56 * - Solution is: d = u + v*k in br_rsa_i15_compute_privexp() 58 * the above implies d < r + e*((phi-r)/e) = phi in br_rsa_i15_compute_privexp() 65 uint32_t r, a, b, u0, v0, u1, v1, he, hr; in br_rsa_i15_compute_privexp() local [all …]
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| H A D | rsa_i31_privexp.c | 33 * We want to invert e modulo phi = (p-1)(q-1). This first in br_rsa_i31_compute_privexp() 39 * modulo phi, but this would involve assembling three modulus-wide in br_rsa_i31_compute_privexp() 40 * values (phi/4, 1 and e) and calling moddiv, that requires in br_rsa_i31_compute_privexp() 42 * slightly more than 3 kB of stack space for RSA-4096. This in br_rsa_i31_compute_privexp() 47 * - We compute phi = k*e + r (Euclidean division of phi by e). in br_rsa_i31_compute_privexp() 50 * enforce non-ridiculously-small factors. in br_rsa_i31_compute_privexp() 52 * - We find small u, v such that u*e - v*r = 1 (using a in br_rsa_i31_compute_privexp() 56 * - Solution is: d = u + v*k in br_rsa_i31_compute_privexp() 58 * the above implies d < r + e*((phi-r)/e) = phi in br_rsa_i31_compute_privexp() 65 uint32_t r, a, b, u0, v0, u1, v1, he, hr; in br_rsa_i31_compute_privexp() local [all …]
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| /freebsd/lib/libc/aarch64/string/ |
| H A D | strncmp.S | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 21 subs x2, x2, #1 24 mov x13, #-1 // save constants for later 50 cmeq v5.16b, v0.16b, #0 66 tbl v0.16b, {v0.16b}, v4.16b 68 b 1f 72 1: 79 b 1f 86 1: [all …]
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| H A D | strcmp.S | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 21 mov x13, #-1 44 cmeq v5.16b, v0.16b, #0 60 tbl v0.16b, {v0.16b}, v4.16b 62 b 1f 66 1: 73 b 1f 80 1: 82 cmeq v2.16b, v0.16b, #0 // NUL byte present? [all …]
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| /freebsd/crypto/openssl/crypto/des/ |
| H A D | cfb64ede.c | 2 * Copyright 1995-2020 The OpenSSL Project Authors. All Rights Reserved. 29 register DES_LONG v0, v1; in DES_ede3_cfb64_encrypt() local 37 while (l--) { in DES_ede3_cfb64_encrypt() 39 c2l(iv, v0); in DES_ede3_cfb64_encrypt() 42 ti[0] = v0; in DES_ede3_cfb64_encrypt() 43 ti[1] = v1; in DES_ede3_cfb64_encrypt() 45 v0 = ti[0]; in DES_ede3_cfb64_encrypt() 46 v1 = ti[1]; in DES_ede3_cfb64_encrypt() 49 l2c(v0, iv); in DES_ede3_cfb64_encrypt() 56 n = (n + 1) & 0x07; in DES_ede3_cfb64_encrypt() [all …]
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| H A D | cfb64enc.c | 2 * Copyright 1995-2020 The OpenSSL Project Authors. All Rights Reserved. 28 register DES_LONG v0, v1; in DES_cfb64_encrypt() local 36 while (l--) { in DES_cfb64_encrypt() 38 c2l(iv, v0); in DES_cfb64_encrypt() 39 ti[0] = v0; in DES_cfb64_encrypt() 41 ti[1] = v1; in DES_cfb64_encrypt() 44 v0 = ti[0]; in DES_cfb64_encrypt() 45 l2c(v0, iv); in DES_cfb64_encrypt() 46 v0 = ti[1]; in DES_cfb64_encrypt() 47 l2c(v0, iv); in DES_cfb64_encrypt() [all …]
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| H A D | cfb_enc.c | 2 * Copyright 1995-2022 The OpenSSL Project Authors. All Rights Reserved. 27 * Until Aug 1 2003 this function did not correctly implement CFB-r, so it 34 register DES_LONG d0, d1, v0, v1; in DES_cfb_encrypt() local 48 /* but 16-bit platforms... */ in DES_cfb_encrypt() 55 c2l(iv, v0); in DES_cfb_encrypt() 59 l -= n; in DES_cfb_encrypt() 60 ti[0] = v0; in DES_cfb_encrypt() 61 ti[1] = v1; in DES_cfb_encrypt() 66 d1 ^= ti[1]; in DES_cfb_encrypt() 70 * 30-08-94 - eay - changed because l>>32 and l<<32 are bad under in DES_cfb_encrypt() [all …]
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| /freebsd/crypto/openssl/crypto/modes/asm/ |
| H A D | ghash-riscv64-zvkb-zvbc.pl | 2 # This file is dual-licensed, meaning that you can use it under your 19 # 1. Redistributions of source code must retain the above copyright 37 # - RV64I 38 # - RISC-V Vector ('V') with VLEN >= 128 39 # - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb') 40 # - RISC-V Vector Carryless Multiplication extension ('Zvbc') 64 # input: H: 128-bit H - secret parameter E(K, 0^128) 69 my ($V0,$V1,$V2,$V3,$V4,$V5,$V6) = ("v0","v1","v2","v3","v4","v5","v6"); 79 li $TMP0, -8 90 @{[vsll_vi $V1, $V1, 1]} # vsll.vi v1, v1, 1 [all …]
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| /freebsd/lib/libc/quad/ |
| H A D | muldi3.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 14 * 1. Redistributions of source code must retain the above copyright 48 * v = 2^n v1 * v0 52 * uv = 2^2n u1 v1 + 2^n u1 v0 + 2^n v1 u0 + u0 v0 53 * = 2^2n u1 v1 + 2^n (u1 v0 + v1 u0) + u0 v0 56 * and add 2^n u0 v0 to the last term and subtract it from the middle. 60 * (2^n) (u1 v0 - u1 v1 + u0 v1 - u0 v0) + 61 * (2^n + 1) (u0 v0) [all …]
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| /freebsd/sys/libkern/arm/ |
| H A D | muldi3.c | 3 /*- 4 * SPDX-License-Identifier: BSD-3-Clause 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 16 * 1. Redistributions of source code must retain the above copyright 50 * v = 2^n v1 * v0 54 * uv = 2^2n u1 v1 + 2^n u1 v0 + 2^n v1 u0 + u0 v0 55 * = 2^2n u1 v1 + 2^n (u1 v0 + v1 u0) + u0 v0 58 * and add 2^n u0 v0 to the last term and subtract it from the middle. 62 * (2^n) (u1 v0 - u1 v1 + u0 v1 - u0 v0) + 63 * (2^n + 1) (u0 v0) [all …]
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| /freebsd/contrib/libucl/klib/ |
| H A D | kvec.h | 39 return 1; 44 2008-09-22 (0.1.0): 55 #define kv_roundup32(x) (--(x), (x)|=(x)>>1, (x)|=(x)>>2, (x)|=(x)>>4, (x)|=(x)>>8, (x)|=(x)>>16, +… 61 #define kv_pop(v) ((v).a[--(v).n]) 77 size_t _ts = ((v).m > 1 ? (v).m * kv_grow_factor : 2); \ 87 #define kv_copy_safe(type, v1, v0, el) do { \ argument 88 if ((v1).m < (v0).n) kv_resize_safe(type, v1, (v0).n, el); \ 89 (v1).n = (v0).n; \ 90 memcpy((v1).a, (v0).a, sizeof(type) * (v0).n); \ 104 memmove((v).a + 1, (v).a, sizeof(type) * (v).n); \ [all …]
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| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | velintrin_approx.h | 1 /*===---- velintrin_approx.h - VEL intrinsics helper for VE ----------------=== 5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 *===-----------------------------------------------------------------------=== 12 static inline __vr _vel_approx_vfdivs_vvvl(__vr v0, __vr v1, int l) { in _vel_approx_vfdivs_vvvl() argument 19 v2 = _vel_vfmuls_vvvl(v0, v3, l); in _vel_approx_vfdivs_vvvl() 20 v4 = _vel_vfnmsbs_vvvvl(v0, v2, v1, l); in _vel_approx_vfdivs_vvvl() 22 v0 = _vel_vfnmsbs_vvvvl(v0, v2, v1, l); in _vel_approx_vfdivs_vvvl() 23 v0 = _vel_vfmads_vvvvl(v2, v3, v0, l); in _vel_approx_vfdivs_vvvl() 24 return v0; in _vel_approx_vfdivs_vvvl() 27 static inline __vr _vel_approx_pvfdiv_vvvl(__vr v0, __vr v1, int l) { in _vel_approx_pvfdiv_vvvl() argument [all …]
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| /freebsd/sys/contrib/openzfs/module/icp/asm-aarch64/blake3/ |
| H A D | b3_aarch64_sse2.S | 1 // SPDX-License-Identifier: CDDL-1.0 10 * or https://opensource.org/licenses/CDDL-1.0. 24 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3 25 * Copyright (c) 2019-2022 Samuel Neves and Matthew Krupcale 26 * Copyright (c) 2022-2023 Tino Reichardt <milky-zfs@mcmilk.de> 28 * This is converted assembly: SSE2 -> ARMv8-A 29 * Used tools: SIMDe https://github.com/simd-everywhere/simde 32 * see: https://github.com/mcmilk/BLAKE3-tests/blob/master/contrib/simde.sh 69 .cfi_offset w19, -16 70 .cfi_offset w30, -24 [all …]
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