| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | dma.txt | 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
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| /freebsd/contrib/wpa/src/ap/ |
| H A D | dfs.c | 2 * DFS - Dynamic Frequency Selection
3 * Copyright (c) 2002-2013, Jouni Malinen <j@w1.fi>
4 * Copyright (c) 2013-2017, Qualcomm Atheros, Inc.
25 DFS_AVAILABLE, /* non-radar or radar-available */
26 DFS_NO_CAC_YET, /* radar-not-yet-available */
38 return (iface->drv_flags2 & WPA_DRIVER_FLAGS2_RADAR_BACKGROUND) && in dfs_use_radar_background()
39 iface->conf->enable_background_radar; in dfs_use_radar_background()
45 int n_chans = 1; in dfs_get_used_n_chans()
49 if (iface->conf->ieee80211n && iface->conf->secondary_channel) in dfs_get_used_n_chans()
52 if (iface->conf->ieee80211ac || iface->conf->ieee80211ax) { in dfs_get_used_n_chans()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
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| H A D | adi,ad7173.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
16 can be used in high precision, low noise single channel applications
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
[all …]
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| H A D | qcom,pm8018-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
19 - qcom,pm8018-adc
20 - qcom,pm8038-adc
21 - qcom,pm8058-adc
22 - qcom,pm8921-adc
25 maxItems: 1
[all …]
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| /freebsd/contrib/wpa/src/drivers/ |
| H A D | driver_macsec_qca.c | 3 * Copyright (c) 2005-2009, Jouni Malinen <j@w1.fi>
5 * Copyright (c) 2013-2014, Qualcomm Atheros, Inc.
55 #pragma pack(push, 1)
91 wpa_printf(MSG_INFO, "%s: secy_id=%d", __func__, drv->secy_id); in __macsec_drv_init()
94 ret = nss_macsec_secy_en_set(drv->secy_id, true); in __macsec_drv_init()
98 ret = nss_macsec_secy_sc_sa_mapping_mode_set(drv->secy_id, in __macsec_drv_init()
105 rx_ctl_filt.bypass = 1; in __macsec_drv_init()
109 ret = nss_macsec_secy_rx_ctl_filt_set(drv->secy_id, 0, &rx_ctl_filt); in __macsec_drv_init()
114 tx_ctl_filt.bypass = 1; in __macsec_drv_init()
118 ret = nss_macsec_secy_tx_ctl_filt_set(drv->secy_id, 0, &tx_ctl_filt); in __macsec_drv_init()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | fsl,elo-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
13 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
19 - enum:
20 - fsl,mpc8313-dma
21 - fsl,mpc8315-dma
22 - fsl,mpc8323-dma
[all …]
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| H A D | fsl,eloplus-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
13 This is a 4-channel DMA controller with extended addresses and chaining,
20 - items:
21 - enum:
22 - fsl,mpc8540-dma
23 - fsl,mpc8541-dma
[all …]
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| H A D | fsl,elo3-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
19 const: fsl,elo3-dma
23 - description:
24 DMA General Status Registers starting from DGSR0, for channel 1~4
25 - description:
26 DMA General Status Registers starting from DGSR1, for channel 5~8
[all …]
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| H A D | cirrus,ep9301-dma-m2p.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
11 - Nikita Shubin <nikita.shubin@maquefel.me>
14 - $ref: dma-controller.yaml#
19 - const: cirrus,ep9301-dma-m2p
20 - items:
21 - enum:
[all …]
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| H A D | stericsson,dma40.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsso
[all...] |
| /freebsd/contrib/wpa/src/common/ |
| H A D | hw_features_common.c | 3 * Copyright (c) 2002-2013, Jouni Malinen <j@w1.fi>
30 for (i = 0; i < mode->num_channels; i++) { in hw_get_channel_chan()
31 struct hostapd_channel_data *ch = &mode->channels[i]; in hw_get_channel_chan()
32 if (ch->chan == chan) { in hw_get_channel_chan()
34 *freq = ch->freq; in hw_get_channel_chan()
48 for (i = 0; i < mode->num_channels; i++) { in hw_mode_get_channel()
49 struct hostapd_channel_data *ch = &mode->channels[i]; in hw_mode_get_channel()
51 if (ch->freq == freq) { in hw_mode_get_channel()
53 *chan = ch->chan; in hw_mode_get_channel()
78 if (curr_mode->mode != mode) in hw_get_channel_freq()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/dac/ |
| H A D | adi,ad5770r.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandru Tachici <alexandru.tachici@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD5770R.pdf
21 - adi,ad5770r
24 maxItems: 1
26 avdd-supply:
31 iovdd-supply:
35 vref-supply:
[all …]
|
| H A D | ad5755.txt | 1 * Analog Devices AD5755 IIO Multi-Channel DAC Linux Driver
4 - compatible: Has to contain one of the following:
6 adi,ad5755-1
11 - reg: spi chip select number for the device
12 - spi-cpha or spi-cpol: is the only modes that is supported
15 - spi-max-frequency: Definition as per
16 Documentation/devicetree/bindings/spi/spi-bus.txt
19 See include/dt-bindings/iio/ad5755.h
20 - adi,ext-dc-dc-compenstation-resistor: boolean set if the hardware have an
23 - adi,dc-dc-phase:
[all …]
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| /freebsd/sys/contrib/openzfs/man/man5/ |
| H A D | vdev_id.conf.5 | 1 .\" SPDX-License-Identifier: CDDL-1.0
35 .Bl -tag -width "-h"
42 A defined alias takes precedence over a topology-derived name, but the
50 .Pa /dev/disk/by-vdev .
57 .It Sy channel [ Ns Ar pci_slot ] Ar port Ar name
58 Maps a physical path to a channel name (typically representing a single
63 .Pa /dev/by-enclosure
75 .Pa /dev/by-enclosure/ Ns Ao Ar prefix Ac Ns - Ns Ao Ar channel Ac Ns Aq Ar num
80 .It Sy slot Ar prefix Ar new Op Ar channel
84 .Ar channel
[all …]
|
| /freebsd/crypto/openssh/ |
| H A D | nchan.c | 8 * 1. Redistributions of source code must retain the above copyright
35 #include "openbsd-compat/sys-queue.h"
45 * SSH Protocol 1.5 aka New Channel Protocol
52 * 1.3: strict request-ack-protocol:
53 * CLOSE ->
54 * <- CLOSE_CONFIRM
57 * IEOF ->
58 * <- OCLOSE
59 * <- IEOF
60 * OCLOSE ->
[all …]
|
| H A D | channels.h | 20 * 1. Redistributions of source code must retain the above copyright
41 /* Definitions for channel types. */
42 #define SSH_CHANNEL_X11_LISTENER 1 /* Listening for inet X11 conn. */
45 #define SSH_CHANNEL_OPEN 4 /* normal open two-way channel */
50 #define SSH_CHANNEL_RPORT_LISTENER 11 /* Listening to a R-style port */
58 #define SSH_CHANNEL_RUNIX_LISTENER 19 /* Listening to a R-style domain socket. */
59 #define SSH_CHANNEL_MUX_PROXY 20 /* proxy channel for mux-client */
64 #define CHANNEL_CANCEL_PORT_STATIC -1
67 #define CHANNEL_NONBLOCK_LEAVE 0 /* don't modify non-blocking state */
68 #define CHANNEL_NONBLOCK_SET 1 /* set non-blocking state */
[all …]
|
| /freebsd/lib/libpmc/ |
| H A D | pmc.corei7uc.3 | 6 .\" 1. Redistributions of source code must retain the above copyright
44 .Bl -tag -width "Li PMC_CLASS_UCP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
86 .Bl -tag -width indent
92 Configure the PMC to count the number of de-asserted to asserted
107 .Bl -tag -width indent
197 Cycles GQ Core 1 and 3 input data port is busy importing data from processor
[all …]
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| H A D | pmc.westmereuc.3 | 6 .\" 1. Redistributions of source code must retain the above copyright
44 .Bl -tag -width "Li PMC_CLASS_UCP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
67 Not all CPUs in this family implement fixed-function counters.
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Bl -tag -width indent
93 Configure the PMC to count the number of de-asserted to asserted
108 .Bl -tag -width indent
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
26 maxItems: 1
29 maxItems: 1
31 "#address-cells":
[all …]
|
| H A D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jef
[all...] |
| /freebsd/sys/dev/pwm/ |
| H A D | pwm_backlight.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
9 * 1. Redistributions of source code must retain the above copyright
63 pwm_channel_t channel; member
78 { "pwm-backlight", 1 },
86 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in pwm_backlight_probe()
103 rv = pwm_get_by_ofw_propidx(dev, node, "pwms", 0, &sc->channel); in pwm_backlight_attach()
105 device_printf(dev, "Cannot map pwm channel %d\n", rv); in pwm_backlight_attach()
109 if (regulator_get_by_ofw_property(dev, 0, "power-supply", in pwm_backlight_attach()
110 &sc->power_supply) != 0) { in pwm_backlight_attach()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | mxs-lradc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/mxs-lradc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale MXS Low-Resolution ADC (LRADC)
10 - Dario Binacchi <dario.binacchi@amarulasolutions.com>
13 The LRADC provides 16 physical channels of 12-bit resolution for
14 analog-to-digital conversion and includes an integrated 4-wire/5-wire
20 - enum:
21 - fsl,imx23-lradc
[all …]
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| /freebsd/sys/arm/freescale/vybrid/ |
| H A D | vf_edma.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
10 * 1. Redistributions of source code must retain the above copyright
40 #define CERR_CAEI (1 << 6) /* Clear All Error Indicators */
42 #define CINT_CAIR (1 << 6) /* Clear All Interrupt Requests */
47 #define DMA_DCHPRI3 0x100 /* Channel n Priority */
48 #define DMA_DCHPRI2 0x101 /* Channel n Priority */
49 #define DMA_DCHPRI1 0x102 /* Channel n Priority */
50 #define DMA_DCHPRI0 0x103 /* Channel n Priority */
51 #define DMA_DCHPRI7 0x104 /* Channel n Priority */
[all …]
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| /freebsd/crypto/openssl/crypto/ |
| H A D | trace.c | 2 * Copyright 2019-2023 The OpenSSL Project Authors. All Rights Reserved.
29 /*-
30 * INTERNAL TRACE CHANNEL IMPLEMENTATION
33 * BIO sink object, also called the trace channel. Instead of a BIO object,
35 * internal trace channel is attached, which simply calls the registered
41 static long trace_ctrl(BIO *channel, int cmd, long argl, void *argp);
65 static int trace_write(BIO *channel, in trace_write() argument
68 struct trace_data_st *ctx = BIO_get_data(channel); in trace_write()
69 size_t cnt = ctx->callback(buf, num, ctx->category, OSSL_TRACE_CTRL_WRITE, in trace_write()
70 ctx->data); in trace_write()
[all …]
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