xref: /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/dma.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* Freescale DMA Controllers
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel Vadot** Freescale Elo DMA Controller
4*c66ec88fSEmmanuel Vadot   This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
5*c66ec88fSEmmanuel Vadot   series chips such as mpc8315, mpc8349, mpc8379 etc.
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel VadotRequired properties:
8*c66ec88fSEmmanuel Vadot
9*c66ec88fSEmmanuel Vadot- compatible        : must include "fsl,elo-dma"
10*c66ec88fSEmmanuel Vadot- reg               : DMA General Status Register, i.e. DGSR which contains
11*c66ec88fSEmmanuel Vadot                      status for all the 4 DMA channels
12*c66ec88fSEmmanuel Vadot- ranges            : describes the mapping between the address space of the
13*c66ec88fSEmmanuel Vadot                      DMA channels and the address space of the DMA controller
14*c66ec88fSEmmanuel Vadot- cell-index        : controller index.  0 for controller @ 0x8100
15*c66ec88fSEmmanuel Vadot- interrupts        : interrupt specifier for DMA IRQ
16*c66ec88fSEmmanuel Vadot
17*c66ec88fSEmmanuel Vadot- DMA channel nodes:
18*c66ec88fSEmmanuel Vadot        - compatible        : must include "fsl,elo-dma-channel"
19*c66ec88fSEmmanuel Vadot                              However, see note below.
20*c66ec88fSEmmanuel Vadot        - reg               : DMA channel specific registers
21*c66ec88fSEmmanuel Vadot        - cell-index        : DMA channel index starts at 0.
22*c66ec88fSEmmanuel Vadot
23*c66ec88fSEmmanuel VadotOptional properties:
24*c66ec88fSEmmanuel Vadot        - interrupts        : interrupt specifier for DMA channel IRQ
25*c66ec88fSEmmanuel Vadot                              (on 83xx this is expected to be identical to
26*c66ec88fSEmmanuel Vadot                              the interrupts property of the parent node)
27*c66ec88fSEmmanuel Vadot
28*c66ec88fSEmmanuel VadotExample:
29*c66ec88fSEmmanuel Vadot	dma@82a8 {
30*c66ec88fSEmmanuel Vadot		#address-cells = <1>;
31*c66ec88fSEmmanuel Vadot		#size-cells = <1>;
32*c66ec88fSEmmanuel Vadot		compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
33*c66ec88fSEmmanuel Vadot		reg = <0x82a8 4>;
34*c66ec88fSEmmanuel Vadot		ranges = <0 0x8100 0x1a4>;
35*c66ec88fSEmmanuel Vadot		interrupt-parent = <&ipic>;
36*c66ec88fSEmmanuel Vadot		interrupts = <71 8>;
37*c66ec88fSEmmanuel Vadot		cell-index = <0>;
38*c66ec88fSEmmanuel Vadot		dma-channel@0 {
39*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
40*c66ec88fSEmmanuel Vadot			cell-index = <0>;
41*c66ec88fSEmmanuel Vadot			reg = <0 0x80>;
42*c66ec88fSEmmanuel Vadot			interrupt-parent = <&ipic>;
43*c66ec88fSEmmanuel Vadot			interrupts = <71 8>;
44*c66ec88fSEmmanuel Vadot		};
45*c66ec88fSEmmanuel Vadot		dma-channel@80 {
46*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
47*c66ec88fSEmmanuel Vadot			cell-index = <1>;
48*c66ec88fSEmmanuel Vadot			reg = <0x80 0x80>;
49*c66ec88fSEmmanuel Vadot			interrupt-parent = <&ipic>;
50*c66ec88fSEmmanuel Vadot			interrupts = <71 8>;
51*c66ec88fSEmmanuel Vadot		};
52*c66ec88fSEmmanuel Vadot		dma-channel@100 {
53*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
54*c66ec88fSEmmanuel Vadot			cell-index = <2>;
55*c66ec88fSEmmanuel Vadot			reg = <0x100 0x80>;
56*c66ec88fSEmmanuel Vadot			interrupt-parent = <&ipic>;
57*c66ec88fSEmmanuel Vadot			interrupts = <71 8>;
58*c66ec88fSEmmanuel Vadot		};
59*c66ec88fSEmmanuel Vadot		dma-channel@180 {
60*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
61*c66ec88fSEmmanuel Vadot			cell-index = <3>;
62*c66ec88fSEmmanuel Vadot			reg = <0x180 0x80>;
63*c66ec88fSEmmanuel Vadot			interrupt-parent = <&ipic>;
64*c66ec88fSEmmanuel Vadot			interrupts = <71 8>;
65*c66ec88fSEmmanuel Vadot		};
66*c66ec88fSEmmanuel Vadot	};
67*c66ec88fSEmmanuel Vadot
68*c66ec88fSEmmanuel Vadot** Freescale EloPlus DMA Controller
69*c66ec88fSEmmanuel Vadot   This is a 4-channel DMA controller with extended addresses and chaining,
70*c66ec88fSEmmanuel Vadot   mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
71*c66ec88fSEmmanuel Vadot   mpc8540, mpc8641 p4080, bsc9131 etc.
72*c66ec88fSEmmanuel Vadot
73*c66ec88fSEmmanuel VadotRequired properties:
74*c66ec88fSEmmanuel Vadot
75*c66ec88fSEmmanuel Vadot- compatible        : must include "fsl,eloplus-dma"
76*c66ec88fSEmmanuel Vadot- reg               : DMA General Status Register, i.e. DGSR which contains
77*c66ec88fSEmmanuel Vadot                      status for all the 4 DMA channels
78*c66ec88fSEmmanuel Vadot- cell-index        : controller index.  0 for controller @ 0x21000,
79*c66ec88fSEmmanuel Vadot                                         1 for controller @ 0xc000
80*c66ec88fSEmmanuel Vadot- ranges            : describes the mapping between the address space of the
81*c66ec88fSEmmanuel Vadot                      DMA channels and the address space of the DMA controller
82*c66ec88fSEmmanuel Vadot
83*c66ec88fSEmmanuel Vadot- DMA channel nodes:
84*c66ec88fSEmmanuel Vadot        - compatible        : must include "fsl,eloplus-dma-channel"
85*c66ec88fSEmmanuel Vadot                              However, see note below.
86*c66ec88fSEmmanuel Vadot        - cell-index        : DMA channel index starts at 0.
87*c66ec88fSEmmanuel Vadot        - reg               : DMA channel specific registers
88*c66ec88fSEmmanuel Vadot        - interrupts        : interrupt specifier for DMA channel IRQ
89*c66ec88fSEmmanuel Vadot
90*c66ec88fSEmmanuel VadotExample:
91*c66ec88fSEmmanuel Vadot	dma@21300 {
92*c66ec88fSEmmanuel Vadot		#address-cells = <1>;
93*c66ec88fSEmmanuel Vadot		#size-cells = <1>;
94*c66ec88fSEmmanuel Vadot		compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
95*c66ec88fSEmmanuel Vadot		reg = <0x21300 4>;
96*c66ec88fSEmmanuel Vadot		ranges = <0 0x21100 0x200>;
97*c66ec88fSEmmanuel Vadot		cell-index = <0>;
98*c66ec88fSEmmanuel Vadot		dma-channel@0 {
99*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
100*c66ec88fSEmmanuel Vadot			reg = <0 0x80>;
101*c66ec88fSEmmanuel Vadot			cell-index = <0>;
102*c66ec88fSEmmanuel Vadot			interrupt-parent = <&mpic>;
103*c66ec88fSEmmanuel Vadot			interrupts = <20 2>;
104*c66ec88fSEmmanuel Vadot		};
105*c66ec88fSEmmanuel Vadot		dma-channel@80 {
106*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
107*c66ec88fSEmmanuel Vadot			reg = <0x80 0x80>;
108*c66ec88fSEmmanuel Vadot			cell-index = <1>;
109*c66ec88fSEmmanuel Vadot			interrupt-parent = <&mpic>;
110*c66ec88fSEmmanuel Vadot			interrupts = <21 2>;
111*c66ec88fSEmmanuel Vadot		};
112*c66ec88fSEmmanuel Vadot		dma-channel@100 {
113*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
114*c66ec88fSEmmanuel Vadot			reg = <0x100 0x80>;
115*c66ec88fSEmmanuel Vadot			cell-index = <2>;
116*c66ec88fSEmmanuel Vadot			interrupt-parent = <&mpic>;
117*c66ec88fSEmmanuel Vadot			interrupts = <22 2>;
118*c66ec88fSEmmanuel Vadot		};
119*c66ec88fSEmmanuel Vadot		dma-channel@180 {
120*c66ec88fSEmmanuel Vadot			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
121*c66ec88fSEmmanuel Vadot			reg = <0x180 0x80>;
122*c66ec88fSEmmanuel Vadot			cell-index = <3>;
123*c66ec88fSEmmanuel Vadot			interrupt-parent = <&mpic>;
124*c66ec88fSEmmanuel Vadot			interrupts = <23 2>;
125*c66ec88fSEmmanuel Vadot		};
126*c66ec88fSEmmanuel Vadot	};
127*c66ec88fSEmmanuel Vadot
128*c66ec88fSEmmanuel Vadot** Freescale Elo3 DMA Controller
129*c66ec88fSEmmanuel Vadot   DMA controller which has same function as EloPlus except that Elo3 has 8
130*c66ec88fSEmmanuel Vadot   channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
131*c66ec88fSEmmanuel Vadot   series chips, such as t1040, t4240, b4860.
132*c66ec88fSEmmanuel Vadot
133*c66ec88fSEmmanuel VadotRequired properties:
134*c66ec88fSEmmanuel Vadot
135*c66ec88fSEmmanuel Vadot- compatible        : must include "fsl,elo3-dma"
136*c66ec88fSEmmanuel Vadot- reg               : contains two entries for DMA General Status Registers,
137*c66ec88fSEmmanuel Vadot                      i.e. DGSR0 which includes status for channel 1~4, and
138*c66ec88fSEmmanuel Vadot                      DGSR1 for channel 5~8
139*c66ec88fSEmmanuel Vadot- ranges            : describes the mapping between the address space of the
140*c66ec88fSEmmanuel Vadot                      DMA channels and the address space of the DMA controller
141*c66ec88fSEmmanuel Vadot
142*c66ec88fSEmmanuel Vadot- DMA channel nodes:
143*c66ec88fSEmmanuel Vadot        - compatible        : must include "fsl,eloplus-dma-channel"
144*c66ec88fSEmmanuel Vadot        - reg               : DMA channel specific registers
145*c66ec88fSEmmanuel Vadot        - interrupts        : interrupt specifier for DMA channel IRQ
146*c66ec88fSEmmanuel Vadot
147*c66ec88fSEmmanuel VadotExample:
148*c66ec88fSEmmanuel Vadotdma@100300 {
149*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
150*c66ec88fSEmmanuel Vadot	#size-cells = <1>;
151*c66ec88fSEmmanuel Vadot	compatible = "fsl,elo3-dma";
152*c66ec88fSEmmanuel Vadot	reg = <0x100300 0x4>,
153*c66ec88fSEmmanuel Vadot	      <0x100600 0x4>;
154*c66ec88fSEmmanuel Vadot	ranges = <0x0 0x100100 0x500>;
155*c66ec88fSEmmanuel Vadot	dma-channel@0 {
156*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
157*c66ec88fSEmmanuel Vadot		reg = <0x0 0x80>;
158*c66ec88fSEmmanuel Vadot		interrupts = <28 2 0 0>;
159*c66ec88fSEmmanuel Vadot	};
160*c66ec88fSEmmanuel Vadot	dma-channel@80 {
161*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
162*c66ec88fSEmmanuel Vadot		reg = <0x80 0x80>;
163*c66ec88fSEmmanuel Vadot		interrupts = <29 2 0 0>;
164*c66ec88fSEmmanuel Vadot	};
165*c66ec88fSEmmanuel Vadot	dma-channel@100 {
166*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
167*c66ec88fSEmmanuel Vadot		reg = <0x100 0x80>;
168*c66ec88fSEmmanuel Vadot		interrupts = <30 2 0 0>;
169*c66ec88fSEmmanuel Vadot	};
170*c66ec88fSEmmanuel Vadot	dma-channel@180 {
171*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
172*c66ec88fSEmmanuel Vadot		reg = <0x180 0x80>;
173*c66ec88fSEmmanuel Vadot		interrupts = <31 2 0 0>;
174*c66ec88fSEmmanuel Vadot	};
175*c66ec88fSEmmanuel Vadot	dma-channel@300 {
176*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
177*c66ec88fSEmmanuel Vadot		reg = <0x300 0x80>;
178*c66ec88fSEmmanuel Vadot		interrupts = <76 2 0 0>;
179*c66ec88fSEmmanuel Vadot	};
180*c66ec88fSEmmanuel Vadot	dma-channel@380 {
181*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
182*c66ec88fSEmmanuel Vadot		reg = <0x380 0x80>;
183*c66ec88fSEmmanuel Vadot		interrupts = <77 2 0 0>;
184*c66ec88fSEmmanuel Vadot	};
185*c66ec88fSEmmanuel Vadot	dma-channel@400 {
186*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
187*c66ec88fSEmmanuel Vadot		reg = <0x400 0x80>;
188*c66ec88fSEmmanuel Vadot		interrupts = <78 2 0 0>;
189*c66ec88fSEmmanuel Vadot	};
190*c66ec88fSEmmanuel Vadot	dma-channel@480 {
191*c66ec88fSEmmanuel Vadot		compatible = "fsl,eloplus-dma-channel";
192*c66ec88fSEmmanuel Vadot		reg = <0x480 0x80>;
193*c66ec88fSEmmanuel Vadot		interrupts = <79 2 0 0>;
194*c66ec88fSEmmanuel Vadot	};
195*c66ec88fSEmmanuel Vadot};
196*c66ec88fSEmmanuel Vadot
197*c66ec88fSEmmanuel VadotNote on DMA channel compatible properties: The compatible property must say
198*c66ec88fSEmmanuel Vadot"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
199*c66ec88fSEmmanuel Vadotdriver (fsldma).  Any DMA channel used by fsldma cannot be used by another
200*c66ec88fSEmmanuel VadotDMA driver, such as the SSI sound drivers for the MPC8610.  Therefore, any DMA
201*c66ec88fSEmmanuel Vadotchannel that should be used for another driver should not use
202*c66ec88fSEmmanuel Vadot"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel".  For the SSI drivers, for
203*c66ec88fSEmmanuel Vadotexample, the compatible property should be "fsl,ssi-dma-channel".  See ssi.txt
204*c66ec88fSEmmanuel Vadotfor more information.
205