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Searched +full:0 +full:xffe10000 (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml39 enum: [0, 1, 2]
44 clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
47 If set to 1 then lockstep mode and if 0 then split mode.
50 0: split mode
56 enum: [0, 1]
59 0: split mode
63 "^r(.*)@[0-9a-f]+$":
162 "^r52f@[0-9a-f]+$":
206 "^r5f@[0-9a-f]+$":
241 enum: [0]
[all …]
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7343.c24 DEFINE_RES_MEM(0xffe00000, 0x100),
25 DEFINE_RES_IRQ(evt2irq(0xc00)),
30 .id = 0,
44 DEFINE_RES_MEM(0xffe10000, 0x100),
45 DEFINE_RES_IRQ(evt2irq(0xc20)),
64 DEFINE_RES_MEM(0xffe20000, 0x100),
65 DEFINE_RES_IRQ(evt2irq(0xc40)),
84 DEFINE_RES_MEM(0xffe30000, 0x100),
85 DEFINE_RES_IRQ(evt2irq(0xc60)),
99 [0] = {
[all …]
H A Dsetup-sh7763.c26 DEFINE_RES_MEM(0xffe00000, 0x100),
27 DEFINE_RES_IRQ(evt2irq(0x700)),
32 .id = 0,
47 DEFINE_RES_MEM(0xffe08000, 0x100),
48 DEFINE_RES_IRQ(evt2irq(0xb80)),
68 DEFINE_RES_MEM(0xffe10000, 0x100),
69 DEFINE_RES_IRQ(evt2irq(0xf00)),
83 [0] = {
84 .start = 0xffe80000,
85 .end = 0xffe80000 + 0x58 - 1,
[all …]
H A Dsetup-sh7780.c25 DEFINE_RES_MEM(0xffe00000, 0x100),
26 DEFINE_RES_IRQ(evt2irq(0x700)),
31 .id = 0,
46 DEFINE_RES_MEM(0xffe10000, 0x100),
47 DEFINE_RES_IRQ(evt2irq(0xb80)),
65 DEFINE_RES_MEM(0xffd80000, 0x30),
66 DEFINE_RES_IRQ(evt2irq(0x580)),
67 DEFINE_RES_IRQ(evt2irq(0x5a0)),
68 DEFINE_RES_IRQ(evt2irq(0x5c0)),
73 .id = 0,
[all …]
H A Dsetup-sh7723.c33 DEFINE_RES_MEM(0xffe00000, 0x100),
34 DEFINE_RES_IRQ(evt2irq(0xc00)),
39 .id = 0,
54 DEFINE_RES_MEM(0xffe10000, 0x100),
55 DEFINE_RES_IRQ(evt2irq(0xc20)),
75 DEFINE_RES_MEM(0xffe20000, 0x100),
76 DEFINE_RES_IRQ(evt2irq(0xc40)),
95 DEFINE_RES_MEM(0xa4e30000, 0x100),
96 DEFINE_RES_IRQ(evt2irq(0x900)),
115 DEFINE_RES_MEM(0xa4e40000, 0x100),
[all …]
H A Dsetup-sh7722.c30 .addr = 0xffe0000c,
32 .mid_rid = 0x21,
35 .addr = 0xffe00014,
37 .mid_rid = 0x22,
40 .addr = 0xffe1000c,
42 .mid_rid = 0x25,
45 .addr = 0xffe10014,
47 .mid_rid = 0x26,
50 .addr = 0xffe2000c,
52 .mid_rid = 0x29,
[all …]
H A Dsetup-sh7724.c37 .addr = 0xffe0000c,
39 .mid_rid = 0x21,
42 .addr = 0xffe00014,
44 .mid_rid = 0x22,
47 .addr = 0xffe1000c,
49 .mid_rid = 0x25,
52 .addr = 0xffe10014,
54 .mid_rid = 0x26,
57 .addr = 0xffe2000c,
59 .mid_rid = 0x29,
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi30 bootscr-address = /bits/ 64 <0x20000000>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
43 reg = <0x0>;
52 reg = <0x1>;
62 reg = <0x2>;
72 reg = <0x3>;
87 CPU_SLEEP_0: cpu-sleep-0 {
89 arm,psci-suspend-param = <0x40000000>;
130 reg = <0x0 0x3ed00000 0x0 0x40000>;
[all …]