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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dbsc9131rdb.dts20 ranges = <0x0 0x0 0x0 0xff800000 0x00004000>;
21 reg = <0x0 0xff71e000 0x0 0x2000>;
25 ranges = <0x0 0x0 0xff700000 0x100000>;
H A Dbsc9132qds.dts20 ranges = <0x0 0x0 0x0 0x88000000 0x08000000
21 0x1 0x0 0x0 0xff800000 0x00010000>;
22 reg = <0x0 0xff71e000 0x0 0x2000>;
26 ranges = <0x0 0x0 0xff700000 0x100000>;
30 reg = <0 0xff70a000 0 0x1000>;
31 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000
32 0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>;
33 pcie@0 {
34 ranges = <0x2000000 0x0 0x90000000
35 0x2000000 0x0 0x90000000
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dsocfpga-dwmac.txt39 reg = <0x00000001 0x00000240 0x00000008>,
40 <0x00000001 0x00000200 0x00000040>;
48 altr,sysmgr-syscon = <&sysmgr 0x60 0>;
49 reg = <0xff700000 0x2000>;
50 interrupts = <0 115 4>;
H A Daltr,socfpga-stmmac.yaml84 description: Skew control of RX data 0 pad
137 "^mdio[0-9]$":
162 altr,sysmgr-syscon = <&sysmgr 0x60 0>;
163 reg = <0xff700000 0x2000>;
/freebsd/sys/arm/rockchip/
H A Drk32xx_mp.c51 #define IMEM_PHYSBASE 0xFF700000
52 #define IMEM_SIZE 0x00018000
54 #define PMU_PHYSBASE 0xFF730000
55 #define PMU_SIZE 0x00010000
56 #define PMU_PWRDN_CON 0x08
66 if (mp_ncpus != 0) in rk32xx_mp_setmaxid()
85 rv = bus_space_map(fdtbus_bs_tag, IMEM_PHYSBASE, IMEM_SIZE, 0, &imem); in rk32xx_mp_start_pmu()
86 if (rv != 0) in rk32xx_mp_start_pmu()
88 rv = bus_space_map(fdtbus_bs_tag, PMU_PHYSBASE, PMU_SIZE, 0, &pmu); in rk32xx_mp_start_pmu()
89 if (rv != 0) in rk32xx_mp_start_pmu()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288.dtsi62 #size-cells = <0>;
69 reg = <0x500>;
79 reg = <0x501>;
89 reg = <0x502>;
99 reg = <0x503>;
108 cpu_opp_table: opp-table-0 {
169 * The rk3288 cannot use the memory area above 0xfe000000
179 reg = <0x0 0xfe000000 0x0 0x1000000>;
187 #clock-cells = <0>;
203 reg = <0x0 0xff810000 0x0 0x20>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed00
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3528.dtsi31 #size-cells = <0>;
50 cpu0: cpu@0 {
52 reg = <0x0>;
60 reg = <0x1>;
68 reg = <0x2>;
76 reg = <0x3>;
86 arm,smc-id = <0x82000010>;
89 #size-cells = <0>;
92 reg = <0x14>;
137 reg = <0x0 0xff610000 0x0 0x200>;
[all …]
H A Drk3562.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0x0 0x0>;
64 reg = <0x0 0x1>;
76 reg = <0x0 0x2>;
88 reg = <0x0 0x3>;
103 arm,psci-suspend-param = <0x0010000>;
147 opp-supported-hw = <0xf9 0xffff>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8550.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
67 #size-cells = <0>;
69 cpu0: cpu@0 {
72 reg = <0 0>;
73 clocks = <&cpufreq_hw 0>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0 0x100>;
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]