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/linux/Documentation/devicetree/bindings/mailbox/
H A Dxlnx,zynqmp-ipi-mailbox.yaml48 - "smc" : SMC #0, following the SMCCC
49 - "hvc" : HVC #0, following the SMCCC
80 '^mailbox@[0-9a-f]+$':
107 It contains tx(0) or rx(1) channel IPI id number.
190 #address-cells = <0x2>;
191 #size-cells = <0x2>;
195 xlnx,ipi-id = <0>;
202 reg = <0x0 0xff9905c0 0x0 0x20>,
203 <0x0 0xff9905e0 0x0 0x20>,
204 <0x0 0xff990e80 0x0 0x20>,
[all …]
/linux/arch/arc/boot/dts/
H A Dabilis_tb10x.dtsi18 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
44 ranges = <0xfe000000 0xfe000000 0x02000000
45 0x000f0000 0x000f0000 0x00010000>;
50 #clock-cells = <0>;
55 #clock-cells = <0>;
61 #clock-cells = <0>;
69 reg = <0xff10601c 0x4>;
79 reg = <0xfe002000 0x20>;
[all …]
/linux/sound/soc/intel/atom/sst/
H A Dsst_acpi.c38 #define SST_BYT_IRAM_PHY_START 0xff2c0000
39 #define SST_BYT_IRAM_PHY_END 0xff2d4000
40 #define SST_BYT_DRAM_PHY_START 0xff300000
41 #define SST_BYT_DRAM_PHY_END 0xff320000
42 #define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */
43 #define SST_BYT_IMR_VIRT_END 0xc01fffff
44 #define SST_BYT_SHIM_PHY_ADDR 0xff340000
45 #define SST_BYT_MBOX_PHY_ADDR 0xff344000
46 #define SST_BYT_DMA0_PHY_ADDR 0xff298000
47 #define SST_BYT_DMA1_PHY_ADDR 0xff29c000
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.yaml588 reg = <0x1b500000 0x1000>,
589 <0x1b502000 0x80>,
590 <0x1b600000 0x100>,
591 <0x0ff00000 0x100000>;
594 linux,pci-domain = <0>;
595 bus-range = <0x00 0xff>;
599 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
600 <0x82000000 0 0 0x08000000 0 0x07e00000>;
604 interrupt-map-mask = <0 0 0 0x7>;
605 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux/sound/soc/rockchip/
H A Drockchip_i2s_tdm.c29 #define TRCM_TXRX 0
103 * Returns success (0) or negative errno.
107 int ret = 0; in i2s_tdm_prepare_enable_mclk()
116 return 0; in i2s_tdm_prepare_enable_mclk()
133 return 0; in i2s_tdm_runtime_suspend()
156 return 0; in i2s_tdm_runtime_resume()
173 * when clk_trcm > 0.
214 unsigned int xfer_mask = 0; in rockchip_snd_xfer_clear()
215 unsigned int xfer_val = 0; in rockchip_snd_xfer_clear()
281 /* only used when clk_trcm > 0 */
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0 0x0>;
50 i-cache-size = <0x8000>;
53 d-cache-size = <0x8000>;
62 reg = <0x0 0x1>;
69 i-cache-size = <0x8000>;
72 d-cache-size = <0x8000>;
81 reg = <0x0 0x2>;
88 i-cache-size = <0x8000>;
[all …]
H A Dpx30.dtsi39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
68 reg = <0x0 0x2>;
80 reg = <0x0 0x3>;
95 arm,psci-suspend-param = <0x0010000>;
104 arm,psci-suspend-param = <0x1010000>;
112 cpu0_opp_table: opp-table-0 {
163 #clock-cells = <0>;
[all …]