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/linux/Documentation/devicetree/bindings/mmc/
H A Darasan,sdhci.yaml137 enum: [0, 1]
158 enum: [0, 1, 2]
159 default: 0
185 reg = <0xe0100000 0x1000>;
189 interrupts = <0 24 4>;
195 reg = <0xe2800000 0x1000>;
199 interrupts = <0 24 4>;
210 reg = <0xfe330000 0x10000>;
220 #clock-cells = <0>;
227 interrupts = <0 48 4>;
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi30 bootscr-address = /bits/ 64 <0x20000000>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
43 reg = <0x0>;
52 reg = <0x1>;
62 reg = <0x2>;
72 reg = <0x3>;
87 CPU_SLEEP_0: cpu-sleep-0 {
89 arm,psci-suspend-param = <0x40000000>;
130 reg = <0x0 0x3ed00000 0x0 0x40000>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi43 #address-cells = <0x2>;
44 #size-cells = <0x0>;
78 cpu_l0: cpu@0 {
81 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
97 reg = <0x0 0x2>;
105 reg = <0x0 0x3>;
113 reg = <0x0 0x100>;
121 reg = <0x0 0x101>;
129 reg = <0x0 0x102>;
[all …]
H A Drk3308.dtsi44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
72 reg = <0x0 0x2>;
82 reg = <0x0 0x3>;
95 arm,psci-suspend-param = <0x0010000>;
109 cpu0_opp_table: opp-table-0 {
149 #clock-cells = <0>;
167 #clock-cells = <0>;
[all …]
H A Drk3328.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0 0x0>;
50 i-cache-size = <0x8000>;
53 d-cache-size = <0x8000>;
62 reg = <0x0 0x1>;
69 i-cache-size = <0x8000>;
72 d-cache-size = <0x8000>;
81 reg = <0x0 0x2>;
88 i-cache-size = <0x8000>;
[all …]
H A Dpx30.dtsi39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
68 reg = <0x0 0x2>;
80 reg = <0x0 0x3>;
95 arm,psci-suspend-param = <0x0010000>;
104 arm,psci-suspend-param = <0x1010000>;
112 cpu0_opp_table: opp-table-0 {
163 #clock-cells = <0>;
[all …]
H A Drk3399-base.dtsi51 #size-cells = <0>;
79 cpu_l0: cpu@0 {
82 reg = <0x0 0x0>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
101 reg = <0x0 0x1>;
108 i-cache-size = <0x8000>;
111 d-cache-size = <0x8000>;
120 reg = <0x0 0x2>;
127 i-cache-size = <0x8000>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi62 #size-cells = <0>;
69 reg = <0x500>;
80 reg = <0x501>;
91 reg = <0x502>;
102 reg = <0x503>;
112 cpu_opp_table: opp-table-0 {
172 * The rk3288 cannot use the memory area above 0xfe000000
182 reg = <0x0 0xfe000000 0x0 0x1000000>;
190 #clock-cells = <0>;
206 reg = <0x0 0xff810000 0x0 0x20>;
[all …]