/linux/arch/parisc/kernel/ |
H A D | perf_images.h | 27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000, 28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380, 29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc, 30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000, 31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00, 32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff, 33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000, 34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff, 35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff, 36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000, [all …]
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/linux/arch/mips/boot/dts/loongson/ |
H A D | rs780e-pch.dtsi | 8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 9 0 0x40000000 0 0x40000000 0 0x40000000 10 0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>; 18 reg = <0 0x1a000000 0 0x02000000>; 20 ranges = <0x01000000 0 0x00004000 0 0x18004000 0 0x0000c000>, 21 <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>; 28 ranges = <1 0 0 0x18000000 0x4000>; 32 reg = <1 0x70 0x8>; 39 reg = <1 0x800 0x100>;
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/linux/arch/powerpc/boot/dts/ |
H A D | kuroboxHD.dts | 37 #size-cells = <0>; 41 reg = <0x0>; 44 bus-frequency = <0>; /* Fixed by bootloader */ 46 i-cache-size = <0x4000>; 47 d-cache-size = <0x4000>; 53 reg = <0x0 0x4000000>; 61 store-gathering = <0>; /* 0 == off, !0 == on */ 62 reg = <0x80000000 0x100000>; 63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ 64 0xfc000000 0xfc000000 0x100000 /* EUMB */ [all …]
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H A D | kuroboxHG.dts | 37 #size-cells = <0>; 41 reg = <0x0>; 44 bus-frequency = <0>; /* Fixed by bootloader */ 46 i-cache-size = <0x4000>; 47 d-cache-size = <0x4000>; 53 reg = <0x0 0x8000000>; 61 store-gathering = <0>; /* 0 == off, !0 == on */ 62 reg = <0x80000000 0x100000>; 63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ 64 0xfc000000 0xfc000000 0x100000 /* EUMB */ [all …]
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/linux/arch/arm/mach-pxa/ |
H A D | pxa-regs.h | 14 #define UNCACHED_PHYS_0 0xfe000000 15 #define UNCACHED_PHYS_0_SIZE 0x00100000 20 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff 21 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff 22 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff 23 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff 24 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff 25 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff 26 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff 31 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) [all …]
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/linux/arch/arm/mach-footbridge/include/mach/ |
H A D | hardware.h | 13 * 0xff800000 0x40000000 1MB X-Bus 14 * 0xff000000 0x7c000000 1MB PCI I/O space 15 * 0xfe000000 0x42000000 1MB CSR 16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported) 17 * 0xfc000000 0x79000000 1MB PCI IACK/special space 18 * 0xfb000000 0x7a000000 16MB PCI Config type 1 19 * 0xfa000000 0x7b000000 16MB PCI Config type 0 20 * 0xf9000000 0x50000000 1MB Cache flush 21 * 0xf0000000 0x80000000 16MB ISA memory 24 #define XBUS_SIZE 0x00100000 [all …]
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/linux/net/netfilter/ipset/ |
H A D | pfxlen.c | 12 E(0x00000000, 0x00000000, 0x00000000, 0x00000000), \ 13 E(0x80000000, 0x00000000, 0x00000000, 0x00000000), \ 14 E(0xC0000000, 0x00000000, 0x00000000, 0x00000000), \ 15 E(0xE0000000, 0x00000000, 0x00000000, 0x00000000), \ 16 E(0xF0000000, 0x00000000, 0x00000000, 0x00000000), \ 17 E(0xF8000000, 0x00000000, 0x00000000, 0x00000000), \ 18 E(0xFC000000, 0x00000000, 0x00000000, 0x00000000), \ 19 E(0xFE000000, 0x00000000, 0x00000000, 0x00000000), \ 20 E(0xFF000000, 0x00000000, 0x00000000, 0x00000000), \ 21 E(0xFF800000, 0x00000000, 0x00000000, 0x00000000), \ [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | amlogic-a4-common.dtsi | 27 #clock-cells = <0>; 38 reg = <0x0 0xfff01000 0 0x1000>, 39 <0x0 0xfff02000 0 0x2000>, 40 <0x0 0xfff04000 0 0x2000>, 41 <0x0 0xfff06000 0 0x2000>; 43 #address-cells = <0>; 50 reg = <0x0 0xfe000000 0x0 0x480000>; 53 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 57 reg = <0x0 0x2100 0x0 0x10>; 64 reg = <0x0 0x7a000 0x0 0x18>; [all …]
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H A D | amlogic-s6.dtsi | 13 #size-cells = <0>; 15 cpu0: cpu@0 { 18 reg = <0x0 0x0>; 25 reg = <0x0 0x100>; 32 reg = <0x0 0x200>; 39 reg = <0x0 0x300>; 61 #clock-cells = <0>; 73 #address-cells = <0>; 75 reg = <0x0 0xff200000 0 0x10000>, 76 <0x0 0xff240000 0 0x80000>; [all …]
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H A D | amlogic-s7d.dtsi | 14 #size-cells = <0>; 16 cpu0: cpu@0 { 19 reg = <0x0 0x0>; 26 reg = <0x0 0x100>; 33 reg = <0x0 0x200>; 40 reg = <0x0 0x300>; 63 #clock-cells = <0>; 75 #address-cells = <0>; 77 reg = <0x0 0xfff01000 0 0x1000>, 78 <0x0 0xfff02000 0 0x0100>; [all …]
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/linux/arch/arc/boot/dts/ |
H A D | abilis_tb10x.dtsi | 18 #size-cells = <0>; 19 cpu@0 { 22 reg = <0>; 44 ranges = <0xfe000000 0xfe000000 0x02000000 45 0x000f0000 0x000f0000 0x00010000>; 50 #clock-cells = <0>; 55 #clock-cells = <0>; 61 #clock-cells = <0>; 69 reg = <0xff10601c 0x4>; 79 reg = <0xfe002000 0x20>; [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | rcar-gen4-pci-host.yaml | 98 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 99 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 100 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 101 <0 0xfe000000 0 0x400000>; 117 bus-range = <0x00 0xff>; 119 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 120 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 121 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 123 interrupt-map-mask = <0 0 0 7>; 124 interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | cyrus_p5020.dts | 30 size = <0 0x1000000>; 31 alignment = <0 0x1000000>; 34 size = <0 0x400000>; 35 alignment = <0 0x400000>; 38 size = <0 0x2000000>; 39 alignment = <0 0x2000000>; 44 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 48 ranges = <0x0 0xf 0xf4000000 0x200000>; 52 ranges = <0x0 0xf 0xf4200000 0x200000>; 56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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H A D | oca4080.dts | 58 size = <0 0x1000000>; 59 alignment = <0 0x1000000>; 62 size = <0 0x400000>; 63 alignment = <0 0x400000>; 66 size = <0 0x2000000>; 67 alignment = <0 0x2000000>; 72 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 76 ranges = <0x0 0xf 0xf4000000 0x200000>; 80 ranges = <0x0 0xf 0xf4200000 0x200000>; 84 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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H A D | kmcoge4.dts | 30 size = <0 0x1000000>; 31 alignment = <0 0x1000000>; 34 size = <0 0x400000>; 35 alignment = <0 0x400000>; 38 size = <0 0x2000000>; 39 alignment = <0 0x2000000>; 44 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 48 ranges = <0x0 0xf 0xf4000000 0x200000>; 52 ranges = <0x0 0xf 0xf4200000 0x200000>; 56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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H A D | t208xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t1023rdb.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 1 0 0xf 0xff800000 0x00010000>; 70 nor@0,0 { [all …]
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H A D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
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H A D | t104xd4rdb.dtsi | 42 size = <0 0x1000000>; 43 alignment = <0 0x1000000>; 46 size = <0 0x400000>; 47 alignment = <0 0x400000>; 50 size = <0 0x2000000>; 51 alignment = <0 0x2000000>; 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t104xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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/linux/arch/powerpc/platforms/embedded6xx/ |
H A D | mpc10x.h | 24 * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff 25 * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff 26 * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000 29 * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff 30 * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff 31 * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000 40 #define MPC10X_BRIDGE_8240 ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA) 41 #define MPC10X_BRIDGE_107 ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA) 42 #define MPC10X_BRIDGE_8245 ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA) 49 #define MPC10X_MAPA_CNFG_ADDR 0x80000cf8 [all …]
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/linux/arch/arm/boot/dts/amazon/ |
H A D | alpine.dtsi | 37 reg = <0 0 0 0>; 43 #size-cells = <0>; 46 cpu@0 { 49 reg = <0>; 97 #size-cells = <0>; 98 #address-cells = <0>; 100 reg = <0x0 0xfb001000 0x0 0x1000>, 101 <0x0 0xfb002000 0x0 0x2000>, 102 <0x0 0xfb004000 0x0 0x2000>, 103 <0x0 0xfb006000 0x0 0x2000>; [all …]
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/linux/arch/arm/include/debug/ |
H A D | vf.S | 6 #define VF_UART0_BASE_ADDR 0x40027000 7 #define VF_UART1_BASE_ADDR 0x40028000 8 #define VF_UART2_BASE_ADDR 0x40029000 9 #define VF_UART3_BASE_ADDR 0x4002a000 14 #define VF_UART_VIRTUAL_BASE 0xfe000000 18 and \rv, \rp, #0xffffff @ offset within 16MB section 23 strb \rd, [\rx, #0x7] @ Data Register 27 1001: ldrb \rd, [\rx, #0x4] @ Status Register 1
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/linux/arch/xtensa/variants/dc232b/include/variant/ |
H A D | core.h | 21 * configured, and a value of 0 otherwise. These macros are always defined. 29 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ 43 #define XCHAL_HAVE_MUL32_HIGH 0 /* MULUH/MULSH instructions */ 47 #define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */ 49 #define XCHAL_HAVE_WIDE_BRANCHES 0 /* B*.W18 or B*.W15 instr's */ 50 #define XCHAL_HAVE_PREDICTED_BRANCHES 0 /* B[EQ/EQZ/NE/NEZ]T instr's */ 53 /*#define XCHAL_HAVE_POPC 0*/ /* POPC instruction */ 54 /*#define XCHAL_HAVE_CRC 0*/ /* CRC instruction */ 57 #define XCHAL_HAVE_SPECULATION 0 /* speculation */ 60 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ [all …]
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/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/ |
H A D | core.h | 20 * configured, and a value of 0 otherwise. These macros are always defined. 28 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ 42 #define XCHAL_HAVE_MUL32_HIGH 0 /* MULUH/MULSH instructions */ 43 #define XCHAL_HAVE_DIV32 0 /* QUOS/QUOU/REMS/REMU instructions */ 46 #define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */ 48 #define XCHAL_HAVE_WIDE_BRANCHES 0 /* B*.W18 or B*.W15 instr's */ 49 #define XCHAL_HAVE_PREDICTED_BRANCHES 0 /* B[EQ/EQZ/NE/NEZ]T instr's */ 52 /*#define XCHAL_HAVE_POPC 0*/ /* POPC instruction */ 53 /*#define XCHAL_HAVE_CRC 0*/ /* CRC instruction */ 56 #define XCHAL_HAVE_SPECULATION 0 /* speculation */ [all …]
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