Searched +full:0 +full:xfc4cb000 (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/spmi/ |
| H A D | qcom,spmi-pmic-arb.txt | 29 - #size-cells : must be set to 0 30 - qcom,ee : indicates the active Execution Environment identifier (0-5) 31 - qcom,channel : which of the PMIC Arb provided channels to use for accesses (0-5) 39 cell 1: slave ID for the requested interrupt (0-15) 40 cell 2: peripheral ID for requested interrupt (0-255) 41 cell 3: the requested peripheral interrupt (0-7) 50 reg = <0xfc4cf000 0x1000>, 51 <0xfc4cb000 0x1000>, 52 <0xfc4ca000 0x1000>; 55 interrupts = <0 190 0>; [all …]
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| H A D | qcom,spmi-pmic-arb.yaml | 66 cell 1: slave ID for the requested interrupt (0-15) 67 cell 2: peripheral ID for requested interrupt (0-255) 68 cell 3: the requested peripheral interrupt (0-7) 76 minimum: 0 83 minimum: 0 90 minimum: 0 94 Supported values, 0 = primary bus, 1 = secondary bus 110 reg = <0xfc4cf000 0x1000>, 111 <0xfc4cb000 0x1000>, 112 <0xfc4ca000 0x1000>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/qcom/ |
| H A D | qcom-apq8084.dtsi | 21 reg = <0xfa00000 0x200000>; 28 #size-cells = <0>; 30 cpu@0 { 33 reg = <0>; 94 reg = <0x0 0x0>; 189 interrupts = <GIC_PPI 7 0xf04>; 195 #clock-cells = <0>; 201 #clock-cells = <0>; 208 interrupts = <GIC_PPI 2 0xf08>, 209 <GIC_PPI 3 0xf08>, [all …]
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| H A D | qcom-msm8226.dtsi | 28 #clock-cells = <0>; 34 #clock-cells = <0>; 41 #size-cells = <0>; 43 cpu0: cpu@0 { 47 reg = <0>; 110 memory@0 { 112 reg = <0x0 0x0>; 161 mboxes = <&apcs 0>; 213 reg = <0x3000000 0x100000>; 218 reg = <0x08000000 0x5100000>; [all …]
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| H A D | qcom-msm8974.dtsi | 23 #clock-cells = <0>; 29 #clock-cells = <0>; 36 #size-cells = <0>; 39 cpu0: cpu@0 { 43 reg = <0>; 109 memory@0 { 111 reg = <0x0 0x0>; 136 mboxes = <&apcs 0>; 159 reg = <0x08000000 0x5100000>; 164 reg = <0x0d100000 0x100000>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | msm8994.dtsi | 29 #clock-cells = <0>; 36 #clock-cells = <0>; 44 #size-cells = <0>; 46 cpu0: cpu@0 { 49 reg = <0x0 0x0>; 62 reg = <0x0 0x1>; 70 reg = <0x0 0x2>; 78 reg = <0x0 0x3>; 86 reg = <0x0 0x100>; 99 reg = <0x0 0x101>; [all …]
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