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/linux/drivers/gpu/drm/panel/
H A Dpanel-raydium-rm67191.c25 #define COL_FMT_16BPP 0x55
26 #define COL_FMT_18BPP 0x66
27 #define COL_FMT_24BPP 0x77
30 #define WRMAUCCTR 0xFE
43 {0xFE, 0x0B},
44 {0x28, 0x40},
45 {0x29, 0x4F},
46 {0xFE, 0x0E},
47 {0x4B, 0x00},
48 {0x4C, 0x0F},
[all …]
H A Dpanel-jdi-fhd-r63452.c33 gpiod_set_value_cansleep(ctx->reset_gpio, 0); in jdi_fhd_r63452_reset()
37 gpiod_set_value_cansleep(ctx->reset_gpio, 0); in jdi_fhd_r63452_reset()
48 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); in jdi_fhd_r63452_on()
49 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x01); in jdi_fhd_r63452_on()
50 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xec, in jdi_fhd_r63452_on()
51 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b, in jdi_fhd_r63452_on()
52 0x13, 0x15, 0x68, 0x0b, 0xb5); in jdi_fhd_r63452_on()
53 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x03); in jdi_fhd_r63452_on()
57 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_ADDRESS_MODE, 0x00); in jdi_fhd_r63452_on()
59 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0x77); in jdi_fhd_r63452_on()
[all …]
H A Dpanel-novatek-nt36672e.c47 #define NT36672E_DCS_SWITCH_PAGE 0xff
54 mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); in nt36672e_enable_reload_cmds()
64 nt36672e_switch_page(ctx, 0x10); in nt36672e_1080x2408_60hz_init()
66 mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00); in nt36672e_1080x2408_60hz_init()
67 mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00); in nt36672e_1080x2408_60hz_init()
68 mipi_dsi_dcs_write_seq_multi(ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0xaa, 0x02, in nt36672e_1080x2408_60hz_init()
69 0x0e, 0x00, 0x2b, 0x00, 0x07, 0x0d, 0xb7, 0x0c, 0xb7); in nt36672e_1080x2408_60hz_init()
70 mipi_dsi_dcs_write_seq_multi(ctx, 0xc2, 0x1b, 0xa0); in nt36672e_1080x2408_60hz_init()
72 nt36672e_switch_page(ctx, 0x20); in nt36672e_1080x2408_60hz_init()
74 mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x66); in nt36672e_1080x2408_60hz_init()
[all …]
/linux/drivers/ata/pata_parport/
H A Dfit3.c23 #define j44(a, b) (((a >> 3) & 0x0f) | ((b << 1) & 0xf0))
26 #define r7() (in_p(7) & 0xff)
29 * cont = 0 - access the IDE register file
38 case 0: in fit3_write_regr()
40 w2(0xc); w0(regr); w2(0x8); w2(0xc); in fit3_write_regr()
41 w0(val); w2(0xd); in fit3_write_regr()
42 w0(0); w2(0xc); in fit3_write_regr()
45 w2(0xc); w0(regr); w2(0x8); w2(0xc); in fit3_write_regr()
46 w4(val); w4(0); in fit3_write_regr()
47 w2(0xc); in fit3_write_regr()
[all …]
/linux/lib/crypto/
H A Daesgcm.c43 * Returns: 0 on success, or -EINVAL if @keysize or @authsize contain values
60 return 0; in aesgcm_expandkey()
67 while (len > 0) { in aesgcm_ghash()
114 while (len > 0) { in aesgcm_crypt()
217 "\xab\x6e\x47\xd4\x2c\xec\x13\xbd"
326 "\xec\x1a\x50\x22\x70\xe3\xcc\x6c";
376 "\x3f\xec\x1d\x25\x3c\x51\xd2\x03"
383 "\x77\xec\xfd\x5c\xa6\xe8\x7b\x08"
398 "\x82\xd9\xec\xa2\x87\x68\x55\xf9"
422 "\x0e\xec\x4e\x55\x1a\x03\x6a\xe5"
[all …]
H A Dchacha20poly1305-selftest.c31 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
32 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
33 0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
34 0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
35 0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
36 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
37 0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
38 0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
39 0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
40 0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
[all …]
H A Dblake2s-selftest.c28 * for (i = 0; i < len; i++) {
29 * if (i && (i % 12) == 0)
31 * printf("0x%02x, ", vec[i]);
43 * key[0] = key[1] = 1;
47 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
52 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
62 * return 0;
66 { 0xa1, },
67 { 0x7c, 0x89, },
68 { 0x74, 0x0e, 0xd4, },
[all …]
/linux/drivers/isdn/mISDN/
H A Ddsp_tones.c45 0x80, 0xab, 0x81, 0x6d, 0xfd, 0xdd, 0x5d, 0x9d,
46 0x4d, 0xd1, 0x89, 0x88, 0xd0, 0x4c, 0x9c, 0x5c,
47 0xdc, 0xfc, 0x6c,
48 0x80, 0xab, 0x81, 0x6d, 0xfd, 0xdd, 0x5d, 0x9d,
49 0x4d, 0xd1, 0x89, 0x88, 0xd0, 0x4c, 0x9c, 0x5c,
50 0xdc, 0xfc, 0x6c,
51 0x80, 0xab, 0x81, 0x6d, 0xfd, 0xdd, 0x5d, 0x9d,
52 0x4d, 0xd1, 0x89, 0x88, 0xd0, 0x4c, 0x9c, 0x5c,
53 0xdc, 0xfc, 0x6c,
54 0x80, 0xab, 0x81, 0x6d, 0xfd, 0xdd, 0x5d, 0x9d,
[all …]
/linux/drivers/clk/renesas/
H A Dr9a06g032-clocks.c28 #define R9A06G032_SYSCTRL_USB 0x00
30 #define R9A06G032_SYSCTRL_DMAMUX 0xA0
36 * @bit: which bit (0 to 31) in the register
45 * This allows encoding an offset up to 0x1FFC (8188) bytes.
88 K_GATE = 0, /* gate which enable/disable */
103 * Root clock uses ID of ~0 (PARENT_ID);
115 * @dual.group: UART group, 0=UART0/1/2, 1=UART3/4/5/6/7
131 uint32_t source:8; /* source index + 1 (0 == none) */
220 #define R9A06G032_CLKOUT 0
265 D_DIV(CLKOUT_D1OR2, "clkout_d1or2", CLKOUT, 0, 1, 2),
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-femac.txt32 reg = <0x10090000 0x1000>,<0x10091300 0x200>;
35 resets = <&crg 0xec 0>,<&crg 0xec 3>;
/linux/drivers/media/usb/gspca/
H A Dtopro.c22 0xff, 0xd8, /* jpeg */
25 0xff, 0xdb, 0x00, 0x84, /* DQT */
26 0,
28 0x10, 0x0b, 0x0c, 0x0e, 0x0c, 0x0a, 0x10, 0x0e,
29 0x0d, 0x0e, 0x12, 0x11, 0x10, 0x13, 0x18, 0x28,
30 0x1a, 0x18, 0x16, 0x16, 0x18, 0x31, 0x23, 0x25,
31 0x1d, 0x28, 0x3a, 0x33, 0x3d, 0x3c, 0x39, 0x33,
32 0x38, 0x37, 0x40, 0x48, 0x5c, 0x4e, 0x40, 0x44,
33 0x57, 0x45, 0x37, 0x38, 0x50, 0x6d, 0x51, 0x57,
34 0x5f, 0x62, 0x67, 0x68, 0x67, 0x3e, 0x4d, 0x71,
[all …]
/linux/fs/nls/
H A Dnls_cp950.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x3000,0xFF0C,0x3001,0x3002,0xFF0E,0x2027,0xFF1B,0xFF1A,/* 0x40-0x47 */
26 0xFF1F,0xFF01,0xFE30,0x2026,0x2025,0xFE50,0xFE51,0xFE52,/* 0x48-0x4F */
[all …]
H A Dnls_cp936.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x4E02,0x4E04,0x4E05,0x4E06,0x4E0F,0x4E12,0x4E17,0x4E1F,/* 0x40-0x47 */
26 0x4E20,0x4E21,0x4E23,0x4E26,0x4E29,0x4E2E,0x4E2F,0x4E31,/* 0x48-0x4F */
[all …]
H A Dnls_cp949.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x0000,0xAC02,0xAC03,0xAC05,0xAC06,0xAC0B,0xAC0C,0xAC0D,/* 0x40-0x47 */
26 0xAC0E,0xAC0F,0xAC18,0xAC1E,0xAC1F,0xAC21,0xAC22,0xAC23,/* 0x48-0x4F */
[all …]
/linux/crypto/
H A Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
113 return 0; in dh_is_pubkey_valid()
126 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
134 val = mpi_alloc(0); in dh_is_pubkey_valid()
[all …]
/linux/lib/
H A Dcrc7.c18 0x00, 0x12, 0x24, 0x36, 0x48, 0x5a, 0x6c, 0x7e,
19 0x90, 0x82, 0xb4, 0xa6, 0xd8, 0xca, 0xfc, 0xee,
20 0x32, 0x20, 0x16, 0x04, 0x7a, 0x68, 0x5e, 0x4c,
21 0xa2, 0xb0, 0x86, 0x94, 0xea, 0xf8, 0xce, 0xdc,
22 0x64, 0x76, 0x40, 0x52, 0x2c, 0x3e, 0x08, 0x1a,
23 0xf4, 0xe6, 0xd0, 0xc2, 0xbc, 0xae, 0x98, 0x8a,
24 0x56, 0x44, 0x72, 0x60, 0x1e, 0x0c, 0x3a, 0x28,
25 0xc6, 0xd4, 0xe2, 0xf0, 0x8e, 0x9c, 0xaa, 0xb8,
26 0xc8, 0xda, 0xec, 0xfe, 0x80, 0x92, 0xa4, 0xb6,
27 0x58, 0x4a, 0x7c, 0x6e, 0x10, 0x02, 0x34, 0x26,
[all …]
H A Dcrc32test.c15 * There are various incantations of crc32(). Some use a seed of 0 or ~0.
16 * Some xor at the end with ~0. The generic crc32() function takes
19 * drivers/net/smc9194.c uses seed ~0, doesn't xor with ~0.
20 * fs/jffs2 uses seed 0, doesn't xor with ~0.
21 * fs/partitions/efi.c uses seed ~0, xor's with ~0.
36 0x5b, 0x85, 0x21, 0xcb, 0x09, 0x68, 0x7d, 0x30,
37 0xc7, 0x69, 0xd7, 0x30, 0x92, 0xde, 0x59, 0xe4,
38 0xc9, 0x6e, 0x8b, 0xdb, 0x98, 0x6b, 0xaa, 0x60,
39 0xa8, 0xb5, 0xbc, 0x6c, 0xa9, 0xb1, 0x5b, 0x2c,
40 0xea, 0xb4, 0x92, 0x6a, 0x3f, 0x79, 0x91, 0xe4,
[all …]
/linux/fs/xfs/
H A Dxfs_dahash_test.c20 0x5b, 0x85, 0x21, 0xcb, 0x09, 0x68, 0x7d, 0x30,
21 0xc7, 0x69, 0xd7, 0x30, 0x92, 0xde, 0x59, 0xe4,
22 0xc9, 0x6e, 0x8b, 0xdb, 0x98, 0x6b, 0xaa, 0x60,
23 0xa8, 0xb5, 0xbc, 0x6c, 0xa9, 0xb1, 0x5b, 0x2c,
24 0xea, 0xb4, 0x92, 0x6a, 0x3f, 0x79, 0x91, 0xe4,
25 0xe9, 0x70, 0x51, 0x8c, 0x7f, 0x95, 0x6f, 0x1a,
26 0x56, 0xa1, 0x5c, 0x27, 0x03, 0x67, 0x9f, 0x3a,
27 0xe2, 0x31, 0x11, 0x29, 0x6b, 0x98, 0xfc, 0xc4,
28 0x53, 0x24, 0xc5, 0x8b, 0xce, 0x47, 0xb2, 0xb9,
29 0x32, 0xcb, 0xc1, 0xd0, 0x03, 0x57, 0x4e, 0xd4,
[all …]
/linux/drivers/staging/sm750fb/
H A Dsm750_hw.c32 ret = 0; in hw_sm750_map()
68 sm750_dev->vidmem_start = pci_resource_start(pdev, 0); in hw_sm750_map()
99 if (parm->chip_clk == 0) in hw_sm750_inithw()
104 if (parm->mem_clk == 0) in hw_sm750_inithw()
106 if (parm->master_clk == 0) in hw_sm750_inithw()
111 if (sm750_dev->devid == 0x718) { in hw_sm750_inithw()
157 sm750_sw_i2c_init(0, 1); in hw_sm750_inithw()
163 if (sm750_sw_i2c_read_reg(0xec, 0x4a) == 0x95) { in hw_sm750_inithw()
169 sm750_sw_i2c_write_reg(0xec, 0x1d, 0x16); in hw_sm750_inithw()
170 sm750_sw_i2c_write_reg(0xec, 0x21, 0x9); in hw_sm750_inithw()
[all …]
/linux/drivers/pinctrl/nuvoton/
H A Dpinctrl-ma35d1.c21 MA35_PIN(0, PA0, 0x80, 0x0,
22 MA35_MUX(0x0, "GPA0"),
23 MA35_MUX(0x2, "UART1_nCTS"),
24 MA35_MUX(0x3, "UART16_RXD"),
25 MA35_MUX(0x6, "NAND_DATA0"),
26 MA35_MUX(0x7, "EBI_AD0"),
27 MA35_MUX(0x9, "EBI_ADR0")),
28 MA35_PIN(1, PA1, 0x80, 0x4,
29 MA35_MUX(0x0, "GPA1"),
30 MA35_MUX(0x2, "UART1_nRTS"),
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-qserdes-ln-shrd-v6.h9 #define QSERDES_V6_LN_SHRD_RXCLK_DIV2_CTRL 0xa0
10 #define QSERDES_V6_LN_SHRD_RX_Q_EN_RATES 0xb0
11 #define QSERDES_V6_LN_SHRD_DFE_DAC_ENABLE1 0xb4
12 #define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH1 0xc4
13 #define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH2 0xc8
14 #define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B0 0xd4
15 #define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B1 0xd8
16 #define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B2 0xdc
17 #define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B3 0xe0
18 #define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B4 0xe4
[all …]
/linux/sound/pci/ctxfi/
H A Dcthw20k1.c47 #define SRCCTL_STATE 0x00000007
48 #define SRCCTL_BM 0x00000008
49 #define SRCCTL_RSR 0x00000030
50 #define SRCCTL_SF 0x000001C0
51 #define SRCCTL_WR 0x00000200
52 #define SRCCTL_PM 0x00000400
53 #define SRCCTL_ROM 0x00001800
54 #define SRCCTL_VO 0x00002000
55 #define SRCCTL_ST 0x00004000
56 #define SRCCTL_IE 0x00008000
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/
H A Ddpu.json4 "EventCode": "0xE9",
10 "EventCode": "0xEA",
16 "EventCode": "0xEB",
22 "EventCode": "0xEC",
28 "EventCode": "0xED",
/linux/drivers/media/pci/mantis/
H A Dmantis_uart.h12 #define MANTIS_UART_CTL 0xe0
16 #define MANTIS_UART_RXD 0xe8
17 #define MANTIS_UART_BAUD 0xec
19 #define MANTIS_UART_STAT 0xf0
25 #define MANTIS_UART_RXTHRESH_INT (1 << 0)
28 MANTIS_BAUD_9600 = 0,
36 MANTIS_PARITY_NONE = 0,
/linux/drivers/clk/meson/
H A Da1-peripherals.h16 #define SYS_OSCIN_CTRL 0x0
17 #define RTC_BY_OSCIN_CTRL0 0x4
18 #define RTC_BY_OSCIN_CTRL1 0x8
19 #define RTC_CTRL 0xc
20 #define SYS_CLK_CTRL0 0x10
21 #define SYS_CLK_EN0 0x1c
22 #define SYS_CLK_EN1 0x20
23 #define AXI_CLK_EN 0x24
24 #define DSPA_CLK_EN 0x28
25 #define DSPB_CLK_EN 0x2c
[all …]

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