/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | mpc8548cds_32b.dts | 16 reg = <0 0 0x0 0x8000000>; // 128M at 0x0 20 reg = <0 0xe0005000 0 0x1000>; 22 ranges = <0x0 0x0 0x0 0xff000000 0x01000000 23 0x1 0x0 0x0 0xf8004000 0x00001000>; 28 ranges = <0 0x0 0xe0000000 0x100000>; 32 reg = <0 0xe0008000 0 0x1000>; 33 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 34 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>; 39 reg = <0 0xe0009000 0 0x1000>; 40 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 [all …]
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H A D | mpc8548cds_36b.dts | 16 reg = <0 0 0x0 0x8000000>; // 128M at 0x0 20 reg = <0xf 0xe0005000 0 0x1000>; 22 ranges = <0x0 0x0 0xf 0xff000000 0x01000000 23 0x1 0x0 0xf 0xf8004000 0x00001000>; 28 ranges = <0 0xf 0xe0000000 0x100000>; 32 reg = <0xf 0xe0008000 0 0x1000>; 33 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000 34 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>; 39 reg = <0xf 0xe0009000 0 0x1000>; 40 ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000 [all …]
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H A D | mpc8544ds.dts | 16 reg = <0 0 0 0>; // Filled by U-Boot 20 reg = <0 0xe0005000 0 0x1000>; 22 ranges = <0x0 0x0 0x0 0xff800000 0x800000>; 26 ranges = <0x0 0x0 0xe0000000 0x100000>; 30 reg = <0 0xe0008000 0 0x1000>; 31 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 32 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>; 34 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 37 /* IDSEL 0x11 J17 Slot 1 */ 38 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 [all …]
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H A D | mpc8568mds.dts | 22 reg = <0x0 0x0 0x0 0x0>; 26 reg = <0x0 0xe0005000 0x0 0x1000>; 27 ranges = <0x0 0x0 0xfe000000 0x02000000 28 0x1 0x0 0xf8000000 0x00008000 29 0x2 0x0 0xf0000000 0x04000000 30 0x4 0x0 0xf8008000 0x00008000 31 0x5 0x0 0xf8010000 0x00008000>; 33 nor@0,0 { 37 reg = <0x0 0x0 0x02000000>; 42 bcsr@1,0 { [all …]
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H A D | mpc8540ads.dts | 29 #size-cells = <0>; 31 PowerPC,8540@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; // 33 MHz, from uboot 39 bus-frequency = <0>; // 166 MHz 40 clock-frequency = <0>; // 825 MHz, from uboot 47 reg = <0x0 0x8000000>; // 128M at 0x0 55 ranges = <0x0 0xe0000000 0x100000>; [all …]
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H A D | mpc8541cds.dts | 29 #size-cells = <0>; 31 PowerPC,8541@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; // 33 MHz, from uboot 39 bus-frequency = <0>; // 166 MHz 40 clock-frequency = <0>; // 825 MHz, from uboot 47 reg = <0x0 0x8000000>; // 128M at 0x0 55 ranges = <0x0 0xe0000000 0x100000>; [all …]
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H A D | mpc8555cds.dts | 29 #size-cells = <0>; 31 PowerPC,8555@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; // 33 MHz, from uboot 39 bus-frequency = <0>; // 166 MHz 40 clock-frequency = <0>; // 825 MHz, from uboot 47 reg = <0x0 0x8000000>; // 128M at 0x0 55 ranges = <0x0 0xe0000000 0x100000>; [all …]
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H A D | mpc8560ads.dts | 30 #size-cells = <0>; 32 PowerPC,8560@0 { 34 reg = <0x0>; 37 d-cache-size = <0x8000>; // L1, 32K 38 i-cache-size = <0x8000>; // L1, 32K 47 reg = <0x0 0x10000000>; 55 ranges = <0x0 0xe0000000 0x100000>; 58 ecm-law@0 { 60 reg = <0x0 0x1000>; 66 reg = <0x1000 0x1000>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/can/ |
H A D | xilinx_can.txt | 34 reg = <0xe0008000 0x1000>; 35 interrupts = <0 28 4>; 37 tx-fifo-depth = <0x40>; 38 rx-fifo-depth = <0x40>; 43 clocks = <&clkc 0>, <&clkc 1>; 45 reg = <0x40000000 0x10000>; 47 interrupts = <0 59 1>; 48 tx-fifo-depth = <0x40>; 49 rx-fifo-depth = <0x40>; 54 clocks = <&clkc 0>, <&clkc 1>; [all …]
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H A D | xilinx,can.yaml | 125 reg = <0xe0008000 0x1000>; 130 tx-fifo-depth = <0x40>; 131 rx-fifo-depth = <0x40>; 137 reg = <0x40000000 0x10000>; 138 clocks = <&clkc 0>, <&clkc 1>; 142 tx-fifo-depth = <0x40>; 143 rx-fifo-depth = <0x40>; 150 reg = <0x40000000 0x2000>; 151 clocks = <&clkc 0>, <&clkc 1>; 155 tx-mailbox-count = <0x20>; [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | sbc8548-post.dtsi | 15 ranges = <0x00000000 0xe0000000 0x00100000>; 16 bus-frequency = <0>; 19 ecm-law@0 { 21 reg = <0x0 0x1000>; 27 reg = <0x1000 0x1000>; 34 reg = <0x2000 0x1000>; 36 interrupts = <0x12 0x2>; 41 reg = <0x20000 0x1000>; 42 cache-line-size = <0x20>; // 32 bytes 43 cache-size = <0x80000>; // L2, 512K [all …]
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H A D | socrates.dts | 27 #size-cells = <0>; 29 PowerPC,8544@0 { 31 reg = <0>; 34 d-cache-size = <0x8000>; // L1, 32K 35 i-cache-size = <0x8000>; // L1, 32K 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 45 reg = <0x00000000 0x00000000>; // Filled in by U-Boot 53 ranges = <0x00000000 0xe0000000 0x00100000>; [all …]
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H A D | tqm8540.dts | 29 #size-cells = <0>; 31 PowerPC,8540@0 { 33 reg = <0>; 38 timebase-frequency = <0>; 39 bus-frequency = <0>; 40 clock-frequency = <0>; 47 reg = <0x00000000 0x10000000>; 54 ranges = <0x0 0xe0000000 0x100000>; 55 bus-frequency = <0>; 58 ecm-law@0 { [all …]
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H A D | tqm8541.dts | 28 #size-cells = <0>; 30 PowerPC,8541@0 { 32 reg = <0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 46 reg = <0x00000000 0x10000000>; 53 ranges = <0x0 0xe0000000 0x100000>; 54 bus-frequency = <0>; 57 ecm-law@0 { [all …]
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H A D | tqm8555.dts | 28 #size-cells = <0>; 30 PowerPC,8555@0 { 32 reg = <0>; 37 timebase-frequency = <0>; 38 bus-frequency = <0>; 39 clock-frequency = <0>; 46 reg = <0x00000000 0x10000000>; 53 ranges = <0x0 0xe0000000 0x100000>; 54 bus-frequency = <0>; 57 ecm-law@0 { [all …]
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H A D | tqm8560.dts | 30 #size-cells = <0>; 32 PowerPC,8560@0 { 34 reg = <0>; 39 timebase-frequency = <0>; 40 bus-frequency = <0>; 41 clock-frequency = <0>; 48 reg = <0x00000000 0x10000000>; 55 ranges = <0x0 0xe0000000 0x100000>; 56 bus-frequency = <0>; 59 ecm-law@0 { [all …]
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H A D | stxssa8555.dts | 30 #size-cells = <0>; 32 PowerPC,8555@0 { 34 reg = <0x0>; 37 d-cache-size = <0x8000>; // L1, 32K 38 i-cache-size = <0x8000>; // L1, 32K 39 timebase-frequency = <0>; // 33 MHz, from uboot 40 bus-frequency = <0>; // 166 MHz 41 clock-frequency = <0>; // 825 MHz, from uboot 48 reg = <0x00000000 0x10000000>; 56 ranges = <0x0 0xe0000000 0x100000>; [all …]
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H A D | mpc8610_hpcd.dts | 26 #size-cells = <0>; 28 PowerPC,8610@0 { 30 reg = <0>; 35 sleep = <&pmc 0x00008000 0 // core 36 &pmc 0x00004000 0>; // timebase 37 timebase-frequency = <0>; // From uboot 38 bus-frequency = <0>; // From uboot 39 clock-frequency = <0>; // From uboot 45 reg = <0x00000000 0x20000000>; // 512M at 0x0 52 reg = <0xe0005000 0x1000>; [all …]
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H A D | tqm8548.dts | 31 #size-cells = <0>; 33 PowerPC,8548@0 { 35 reg = <0>; 38 d-cache-size = <0x8000>; // L1, 32K 39 i-cache-size = <0x8000>; // L1, 32K 46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot 53 ranges = <0x0 0xe0000000 0x100000>; 54 bus-frequency = <0>; 57 ecm-law@0 { 59 reg = <0x0 0x1000>; [all …]
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/freebsd/sys/dts/powerpc/ |
H A D | mpc8555cds.dts | 80 #size-cells = <0>; 82 PowerPC,8555@0 { 84 reg = <0x0>; 87 d-cache-size = <0x8000>; // L1, 32K 88 i-cache-size = <0x8000>; // L1, 32K 89 timebase-frequency = <0>; // 33 MHz, from uboot 90 bus-frequency = <0>; // 166 MHz 91 clock-frequency = <0>; // 825 MHz, from uboot 98 reg = <0x0 0x10000000>; // 256M at 0x0 105 reg = <0xe0005000 0x1000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/xilinx/ |
H A D | zynq-7000.dtsi | 13 #size-cells = <0>; 15 cpu0: cpu@0 { 18 reg = <0>; 47 interrupts = <0 5 4>, <0 6 4>; 49 reg = <0xf8891000 0x1000>, 50 <0xf8893000 0x1000>; 69 #size-cells = <0>; 72 port@0 { 73 reg = <0>; 104 reg = <0xf8007100 0x20>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | sama7g5.dtsi | 31 #size-cells = <0>; 33 cpu0: cpu@0 { 36 reg = <0x0>; 88 hysteresis = <0>; 94 hysteresis = <0>; 100 hysteresis = <0>; 122 #clock-cells = <0>; 127 #clock-cells = <0>; 132 #clock-cells = <0>; 151 reg = <0x100000 0x20000>; [all …]
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