1*c66ec88fSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*c66ec88fSEmmanuel Vadot/* 3*c66ec88fSEmmanuel Vadot * MPC8548 CDS Device Tree Source (32-bit address map) 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc. 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot/include/ "mpc8548si-pre.dtsi" 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot/ { 11*c66ec88fSEmmanuel Vadot model = "MPC8548CDS"; 12*c66ec88fSEmmanuel Vadot compatible = "MPC8548CDS", "MPC85xxCDS"; 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot memory { 15*c66ec88fSEmmanuel Vadot device_type = "memory"; 16*c66ec88fSEmmanuel Vadot reg = <0 0 0x0 0x8000000>; // 128M at 0x0 17*c66ec88fSEmmanuel Vadot }; 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot board_lbc: lbc: localbus@e0005000 { 20*c66ec88fSEmmanuel Vadot reg = <0 0xe0005000 0 0x1000>; 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot ranges = <0x0 0x0 0x0 0xff000000 0x01000000 23*c66ec88fSEmmanuel Vadot 0x1 0x0 0x0 0xf8004000 0x00001000>; 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot }; 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot board_soc: soc: soc8548@e0000000 { 28*c66ec88fSEmmanuel Vadot ranges = <0 0x0 0xe0000000 0x100000>; 29*c66ec88fSEmmanuel Vadot }; 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadot board_pci0: pci0: pci@e0008000 { 32*c66ec88fSEmmanuel Vadot reg = <0 0xe0008000 0 0x1000>; 33*c66ec88fSEmmanuel Vadot ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 34*c66ec88fSEmmanuel Vadot 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>; 35*c66ec88fSEmmanuel Vadot clock-frequency = <66666666>; 36*c66ec88fSEmmanuel Vadot }; 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel Vadot pci1: pci@e0009000 { 39*c66ec88fSEmmanuel Vadot reg = <0 0xe0009000 0 0x1000>; 40*c66ec88fSEmmanuel Vadot ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 41*c66ec88fSEmmanuel Vadot 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>; 42*c66ec88fSEmmanuel Vadot clock-frequency = <66666666>; 43*c66ec88fSEmmanuel Vadot interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 44*c66ec88fSEmmanuel Vadot interrupt-map = < 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot /* IDSEL 0x15 */ 47*c66ec88fSEmmanuel Vadot 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 48*c66ec88fSEmmanuel Vadot 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 49*c66ec88fSEmmanuel Vadot 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 50*c66ec88fSEmmanuel Vadot 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; 51*c66ec88fSEmmanuel Vadot }; 52*c66ec88fSEmmanuel Vadot 53*c66ec88fSEmmanuel Vadot pci2: pcie@e000a000 { 54*c66ec88fSEmmanuel Vadot reg = <0 0xe000a000 0 0x1000>; 55*c66ec88fSEmmanuel Vadot ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 56*c66ec88fSEmmanuel Vadot 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>; 57*c66ec88fSEmmanuel Vadot pcie@0 { 58*c66ec88fSEmmanuel Vadot ranges = <0x2000000 0x0 0xa0000000 59*c66ec88fSEmmanuel Vadot 0x2000000 0x0 0xa0000000 60*c66ec88fSEmmanuel Vadot 0x0 0x20000000 61*c66ec88fSEmmanuel Vadot 62*c66ec88fSEmmanuel Vadot 0x1000000 0x0 0x0 63*c66ec88fSEmmanuel Vadot 0x1000000 0x0 0x0 64*c66ec88fSEmmanuel Vadot 0x0 0x100000>; 65*c66ec88fSEmmanuel Vadot }; 66*c66ec88fSEmmanuel Vadot }; 67*c66ec88fSEmmanuel Vadot 68*c66ec88fSEmmanuel Vadot rio: rapidio@e00c0000 { 69*c66ec88fSEmmanuel Vadot reg = <0x0 0xe00c0000 0x0 0x20000>; 70*c66ec88fSEmmanuel Vadot port1 { 71*c66ec88fSEmmanuel Vadot ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; 72*c66ec88fSEmmanuel Vadot }; 73*c66ec88fSEmmanuel Vadot }; 74*c66ec88fSEmmanuel Vadot}; 75*c66ec88fSEmmanuel Vadot 76*c66ec88fSEmmanuel Vadot/* 77*c66ec88fSEmmanuel Vadot * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings 78*c66ec88fSEmmanuel Vadot * for interrupt-map & interrupt-map-mask. 79*c66ec88fSEmmanuel Vadot */ 80*c66ec88fSEmmanuel Vadot 81*c66ec88fSEmmanuel Vadot/include/ "mpc8548si-post.dtsi" 82*c66ec88fSEmmanuel Vadot/include/ "mpc8548cds.dtsi" 83