/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchLASXInstrFormats.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 13 // xd/rd/cd - destination register operand. 20 // <opcode | I13 | xd> 25 bits<5> xd; 27 let Inst{31-0} = op; 29 let Inst{4-0} = xd; 33 // <opcode | xj | xd> 38 bits<5> xd; 40 let Inst{31-0} = op; 42 let Inst{4-0} = xd; [all …]
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H A D | LoongArchLASXInstrInfo.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 51 : Fmt1RI13_XI<op, (outs LASX256:$xd), (ins ImmOpnd:$imm13), "$xd, $imm13">; 54 : Fmt2R_XX<op, (outs LASX256:$xd), (ins LASX256:$xj), "$xd, $xj">; 57 : Fmt2R_XR<op, (outs LASX256:$xd), (ins GPR:$rj), "$xd, $rj">; 63 : Fmt2RI1_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm1), 64 "$xd, $xj, $imm1">; 67 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2), 68 "$xd, $xj, $imm2">; 75 : Fmt2RI3_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm3), 76 "$xd, $xj, $imm3">; [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | X86DisassemblerDecoderCommon.h | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 58 ATTR_NONE = 0x00, 59 ATTR_64BIT = 0x1 << 0, 60 ATTR_XS = 0x1 << 1, 61 ATTR_XD = 0x1 << 2, 62 ATTR_REXW = 0x1 << 3, 63 ATTR_OPSIZE = 0x1 << 4, 64 ATTR_ADSIZE = 0x1 << 5, 65 ATTR_VEX = 0x1 << 6, 66 ATTR_VEXL = 0x1 << 7, [all …]
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/freebsd/sys/netipsec/ |
H A D | xform_ipcomp.c | 88 CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(ipcomp_enable), 0, ""); 116 return (0); in ipcomp_encapcheck() 176 memset(&csp, 0, sizeof(csp)); in ipcomp_init() 200 struct xform_data *xd; in ipcomp_input() local 242 xd = malloc(sizeof(*xd), M_IPCOMP, M_NOWAIT | M_ZERO); in ipcomp_input() 243 if (xd == NULL) { in ipcomp_input() 259 crp->crp_opaque = xd; in ipcomp_input() 262 xd->sav = sav; in ipcomp_input() 263 xd->protoff = protoff; in ipcomp_input() 264 xd->skip = skip; in ipcomp_input() [all …]
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H A D | xform_ah.c | 104 CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(ah_enable), 0, ""); 106 CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(ah_cleartos), 0, ""); 124 return 0; in xform_ah_authsize() 197 if (((sav->flags&SADB_X_EXT_OLD) == 0) ^ (sav->replay != NULL)) { in ah_init0() 210 if (keylen > thash->keysize && thash->keysize != 0) { in ah_init0() 228 return 0; in ah_init0() 240 memset(&csp, 0, sizeof(csp)); in ah_init() 297 ip->ip_tos = 0; in ah_massage_headers() 298 ip->ip_ttl = 0; in ah_massage_headers() 299 ip->ip_sum = 0; in ah_massage_headers() [all …]
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H A D | xform_esp.c | 96 CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(esp_enable), 0, ""); 98 CTLFLAG_VNET | CTLFLAG_RW, &VNET_NAME(esp_ctr_compatibility), 0, 185 memset(&csp, 0, sizeof(csp)); in esp_init() 190 if (sav->alg_auth != 0) { in esp_init() 234 } else if (sav->alg_auth != 0) { in esp_init() 273 struct xform_data *xd; in esp_input() local 327 if ((plen & (espx->blocksize - 1)) || (plen <= 0)) { in esp_input() 340 if (esph != NULL && sav->replay != NULL && sav->replay->wsize != 0) { in esp_input() 341 if (ipsec_chkreplay(ntohl(esp->esp_seq), &seqh, sav) == 0) { in esp_input() 368 xd = malloc(sizeof(*xd), M_ESP, M_NOWAIT | M_ZERO); in esp_input() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8ulp-pinfunc.h | 13 #define MX8ULP_PAD_PTD0__PTD0 0x0000 0x0000 0x1 0x0 14 #define MX8ULP_PAD_PTD0__I2S6_RX_BCLK 0x0000 0x0B44 0x7 0x1 15 #define MX8ULP_PAD_PTD0__SDHC0_RESET_B 0x0000 0x0000 0x8 0x0 16 #define MX8ULP_PAD_PTD0__FLEXSPI2_B_DQS 0x0000 0x0974 0x9 0x1 17 #define MX8ULP_PAD_PTD0__CLKOUT2 0x0000 0x0000 0xa 0x0 18 #define MX8ULP_PAD_PTD0__EPDC0_SDCLK_B 0x0000 0x0000 0xb 0x0 19 #define MX8ULP_PAD_PTD0__LP_APD_DBG_MUX_0 0x0000 0x0000 0xc 0x0 20 #define MX8ULP_PAD_PTD0__CLKOUT1 0x0000 0x0000 0xd 0x0 21 #define MX8ULP_PAD_PTD0__DEBUG_MUX0_0 0x0000 0x0000 0xe 0x0 22 #define MX8ULP_PAD_PTD0__DEBUG_MUX1_0 0x0000 0x0000 0xf 0x0 [all …]
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/freebsd/crypto/openssl/crypto/sha/ |
H A D | sha_local.h | 29 } while (0) 48 #define INIT_DATA_h0 0x67452301UL 49 #define INIT_DATA_h1 0xefcdab89UL 50 #define INIT_DATA_h2 0x98badcfeUL 51 #define INIT_DATA_h3 0x10325476UL 52 #define INIT_DATA_h4 0xc3d2e1f0UL 56 memset(c, 0, sizeof(*c)); in HASH_INIT() 65 #define K_00_19 0x5a827999UL 66 #define K_20_39 0x6ed9eba1UL 67 #define K_40_59 0x8f1bbcdcUL [all …]
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/freebsd/contrib/arm-optimized-routines/math/ |
H A D | exp2f.c | 41 double_t kd, xd, z, r, r2, y, s; in exp2f() local 43 xd = (double_t) x; in exp2f() 44 abstop = top12 (x) & 0x7ff; in exp2f() 53 return __math_oflowf (0); in exp2f() 55 return __math_uflowf (0); in exp2f() 58 return __math_may_uflowf (0); in exp2f() 63 kd = eval_as_double (xd + SHIFT); in exp2f() 66 r = xd - kd; in exp2f() 72 z = C[0] * r + C[1]; in exp2f() 87 TEST_INTERVAL (exp2f, 0, 0xffff0000, 10000) [all …]
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H A D | powf.c | 26 #define OFF 0x3f330000 43 top = tmp & 0xff800000; in log2_inline() 56 y = A[0] * r + A[1]; in log2_inline() 72 (in case of fast toint intrinsics) or not. The unscaled xd must be 75 exp2_inline (double_t xd, uint32_t sign_bias) in exp2_inline() argument 84 kd = roundtoint (xd); /* k */ in exp2_inline() 85 ki = converttoint (xd); in exp2_inline() 90 kd = eval_as_double (xd + SHIFT); in exp2_inline() 94 r = xd - kd; in exp2_inline() 101 z = C[0] * r + C[1]; in exp2_inline() [all …]
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H A D | expf.c | 41 double_t kd, xd, z, r, r2, y, s; in expf() local 43 xd = (double_t) x; in expf() 44 abstop = top12 (x) & 0x7ff; in expf() 52 if (x > 0x1.62e42ep6f) /* x > log(0x1p128) ~= 88.72 */ in expf() 53 return __math_oflowf (0); in expf() 54 if (x < -0x1.9fe368p6f) /* x < log(0x1p-150) ~= -103.97 */ in expf() 55 return __math_uflowf (0); in expf() 57 if (x < -0x1.9d1d9ep6f) /* x < log(0x1p-149) ~= -103.28 */ in expf() 58 return __math_may_uflowf (0); in expf() 63 z = InvLn2N * xd; in expf() [all …]
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/freebsd/crypto/openssl/crypto/chacha/asm/ |
H A D | chacha-x86.pl | 39 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 45 &asm_init($ARGV[0],$ARGV[$#ARGV] eq "386"); 47 $xmm=$ymm=0; 52 =~ /GNU assembler version ([2-9]\.[0-9]+)/ && 55 $ymm=1 if ($xmm && !$ymm && $ARGV[0] eq "win32n" && 56 `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/ && 59 $ymm=1 if ($xmm && !$ymm && $ARGV[0] eq "win32" && 60 `ml 2>&1` =~ /Version ([0-9]+)\./ && 64 `$ENV{CC} -v 2>&1` =~ /((?:clang|LLVM) version|based on LLVM) ([0-9]+\.[0-9]+)/ && 79 # 0 4 8 12 < even round [all …]
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H A D | chacha-armv4.pl | 39 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef; 40 $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef; 43 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 61 my @x=map("r$_",(0..7,"x","x","x","x",12,"x",14,"x")); 70 my ($xc,$xc_) = (@t[0..1]); 71 my ($xd,$xd_) = $odd ? (@t[2],@x[$d1]) : (@x[$d0],@t[2]); 79 # 0 4 8 12 < even round 83 # 0 5 10 15 < odd round 88 # 'a', 'b' are permanently allocated in registers, @x[0..7], 100 "&mov ($xd,$xd,'ror#16')", [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | nvm_cfg.h | 43 #define NVM_CFG_version 0x83306 54 #define NVM_CFG_MAC_ADDRESS_HI_MASK 0x0000FFFF 55 #define NVM_CFG_MAC_ADDRESS_HI_OFFSET 0 64 u32 generic_cont0; /* 0x0 */ 65 #define NVM_CFG1_GLOB_BOARD_SWAP_MASK 0x0000000F 66 #define NVM_CFG1_GLOB_BOARD_SWAP_OFFSET 0 67 #define NVM_CFG1_GLOB_BOARD_SWAP_NONE 0x0 68 #define NVM_CFG1_GLOB_BOARD_SWAP_PATH 0x1 69 #define NVM_CFG1_GLOB_BOARD_SWAP_PORT 0x2 70 #define NVM_CFG1_GLOB_BOARD_SWAP_BOTH 0x3 [all …]
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/freebsd/crypto/heimdal/lib/wind/ |
H A D | bidi_table.c | 9 {0x5be, 1}, 10 {0x5c0, 1}, 11 {0x5c3, 1}, 12 {0x5d0, 0x1b}, 13 {0x5f0, 0x5}, 14 {0x61b, 1}, 15 {0x61f, 1}, 16 {0x621, 0x1a}, 17 {0x640, 0xb}, 18 {0x66d, 0x3}, [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedPredNeoverse.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 16 // Check for LSL shift == 0 33 MCReturnStatement<CheckSameRegOperand<0, 1>>>>; 60 // MOV Wd, #0 61 // MOV Xd, #0 64 CheckImmOperand<1, 0>, 65 CheckImmOperand<2, 0>]>, 67 // MOV Xd, XZR 69 // MOV Xd, Xn 72 CheckImmOperand<3, 0>]>]>, [all …]
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/freebsd/lib/msun/tests/ |
H A D | trig_test.c | 62 ATF_CHECK(feclearexcept(FE_ALL_EXCEPT) == 0); \ 66 } while (0) 72 } while (0) 77 } while (0) 89 /* Values at 0 should be exact. */ in ATF_TC_BODY() 90 testall(tan, 0.0, 0.0, ALL_STD_EXCEPT, 0); in ATF_TC_BODY() 91 testall(tan, -0.0, -0.0, ALL_STD_EXCEPT, 0); in ATF_TC_BODY() 92 testall(cos, 0.0, 1.0, ALL_STD_EXCEPT, 0); in ATF_TC_BODY() 93 testall(cos, -0.0, 1.0, ALL_STD_EXCEPT, 0); in ATF_TC_BODY() 94 testall(sin, 0.0, 0.0, ALL_STD_EXCEPT, 0); in ATF_TC_BODY() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrSNP.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 18 // F3 0F 01 FF 20 def PSMASH: I<0x01, MRM_FF, (outs), (ins), "psmash", []>, TB, XS, 23 // F2 0F 01 FF 25 def PVALIDATE64: I<0x01, MRM_FF, (outs), (ins), "pvalidate",[]>, 26 TB, XD, Requires<[In64BitMode]>; 29 def PVALIDATE32: I<0x01, MRM_FF, (outs), (ins), "pvalidate",[]>, 30 TB, XD, Requires<[Not64BitMode]>; 32 // F2 0F 01 FE 34 def RMPUPDATE: I<0x0 [all...] |
H A D | X86InstrExtension.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 13 let hasSideEffects = 0 in { 15 def CBW : I<0x98, RawFrm, (outs), (ins), 18 def CWDE : I<0x98, RawFrm, (outs), (ins), 21 def CDQE : RI<0x98, RawFrm, (outs), (ins), 27 def CWD : I<0x99, RawFrm, (outs), (ins), 30 def CDQ : I<0x99, RawFrm, (outs), (ins), 33 def CQO : RI<0x99, RawFrm, (outs), (ins), 38 let hasSideEffects = 0 in { 39 def MOVSX16rr8 : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src), [all …]
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | X86RecognizableInstr.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 86 uint8_t mask = 0x01; in byteFromBitsInit() 88 uint8_t ret = 0; in byteFromBitsInit() 90 for (index = 0; index < width; index++) { in byteFromBitsInit() 157 for (unsigned i = 0, e = Predicates.size(); i != e; ++i) { in RecognizableInstr() 216 else if (OpPrefix == X86Local::XD) in insnContext() 230 else if (OpPrefix == X86Local::XD) in insnContext() 244 else if (OpPrefix == X86Local::XD) in insnContext() 256 else if (OpPrefix == X86Local::XD) in insnContext() 272 else if (OpPrefix == X86Local::XD) in insnContext() [all …]
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/freebsd/contrib/ncurses/progs/ |
H A D | tparm_type.c | 50 #define XD(code, onlyname) TD(code, onlyname, onlyname, onlyname) in tparm_type() macro 63 XD(Str, "Cs"), in tparm_type() 64 XD(Str_Str, "Ms"), in tparm_type() 70 for (n = 0; n < SIZEOF(table); n++) { in tparm_type() 84 case 0: in guess_tparm_type() 86 if (!p_is_s[0]) in guess_tparm_type() 88 if (p_is_s[0]) in guess_tparm_type() 92 if (!p_is_s[0] && !p_is_s[1]) in guess_tparm_type() 94 if (!p_is_s[0] && p_is_s[1]) in guess_tparm_type() 96 if (p_is_s[0] && p_is_s[1]) in guess_tparm_type() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | pm8010.dtsi | 19 hysteresis = <0>; 25 hysteresis = <0>; 39 hysteresis = <0>; 45 hysteresis = <0>; 57 reg = <0xc SPMI_USID>; 59 #size-cells = <0>; 63 reg = <0x2400>; 64 interrupts = <0xc 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; 65 #thermal-sensor-cells = <0>; 71 reg = <0xd SPMI_USID>; [all …]
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/freebsd/contrib/netbsd-tests/lib/libc/arch/x86_64/ |
H A D | exec_prot_support.c | 40 * When the NX/XD flag is present, the protection should be enabled. 45 if (system("cpuctl identify 0 | grep -q NOX") == 0 || in exec_prot_support() 46 system("cpuctl identify 0 | grep -q XD") == 0) in exec_prot_support()
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/freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/ |
H A D | uncore-power.json | 4 "Counter": "0,1,2,3", 11 "Counter": "0,1,2,3", 12 "EventCode": "0xb", 21 "Counter": "0,1,2,3", 22 "EventCode": "0xc", 31 "Counter": "0,1,2,3", 32 "EventCode": "0xd", 41 "Counter": "0,1,2,3", 42 "EventCode": "0xe", 51 "Counter": "0,1,2,3", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/ |
H A D | uncore-power.json | 4 "Counter": "0,1,2,3", 11 "Counter": "0,1,2,3", 12 "EventCode": "0xb", 21 "Counter": "0,1,2,3", 22 "EventCode": "0xc", 31 "Counter": "0,1,2,3", 32 "EventCode": "0xd", 41 "Counter": "0,1,2,3", 42 "EventCode": "0xe", 51 "Counter": "0,1,2,3", [all …]
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