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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull-tarragon-common.dtsi23 reg = <0x80000000 0x20000000>;
28 pinctrl-0 = <&pinctrl_emmc_rst>;
54 pinctrl-0 = <&pinctrl_status_leds>;
80 pinctrl-0 = <&pinctrl_adc_motor
93 #size-cells = <0>;
95 pinctrl-0 = <&pinctrl_ecspi2>;
104 #size-cells = <0>;
106 pinctrl-0 = <&pinctrl_ecspi4>;
113 pinctrl-0 = <&pinctrl_enet1
124 #size-cells = <0>;
[all …]
H A Dimx6ul-var-som.dtsi21 reg = <0x80000000 0x20000000>;
31 states = <1300000 0x1
32 1400000 0x0>;
37 #clock-cells = <0>;
54 pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_gpio>, <&pinctrl_enet1_mdio>;
61 #size-cells = <0>;
68 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
78 pinctrl-0 = <&pinctrl_hog>;
82 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
83 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
[all …]
H A Dimx6ul-imx6ull-opos6uldev.dtsi12 pwms = <&pwm3 0 191000 0>;
13 brightness-levels = <0 4 8 16 32 64 128 255>;
22 pinctrl-0 = <&pinctrl_gpio_keys>;
38 pinctrl-0 = <&pinctrl_led>;
47 pinctrl-0 = <&pinctrl_w1>;
76 pinctrl-0 = <&pinctrl_usbotg1_vbus>;
87 pinctrl-0 = <&pinctrl_usbotg2_vbus>;
100 pinctrl-0 = <&pinctrl_flexcan1>;
107 pinctrl-0 = <&pinctrl_flexcan2>;
114 pinctrl-0 = <&pinctrl_ecspi4>;
[all …]
/linux/drivers/net/wan/
H A Dwanxlfw.inc_shipped2 0x60,0x00,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0xB9,0x40,0x00,0x00,0x00,0x00,0x00,
4 0x10,0x14,0x42,0x80,0x4A,0xB0,0x09,0xB0,0x00,0x00,0x10,0x04,0x67,0x00,0x00,0x0E,
5 0x06,0xB0,0x40,0x00,0x00,0x00,0x09,0xB0,0x00,0x00,0x10,0x04,0x58,0x80,0x0C,0x80,
6 0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0xDE,0x21,0xFC,0x00,0x00,0x16,0xBC,0x00,0x6C,
7 0x21,0xFC,0x00,0x00,0x17,0x5E,0x01,0x00,0x21,0xFC,0x00,0x00,0x16,0xDE,0x01,0x78,
8 0x21,0xFC,0x00,0x00,0x16,0xFE,0x01,0x74,0x21,0xFC,0x00,0x00,0x17,0x1E,0x01,0x70,
9 0x21,0xFC,0x00,0x00,0x17,0x3E,0x01,0x6C,0x21,0xFC,0x00,0x00,0x18,0x4C,0x02,0x00,
10 0x23,0xFC,0x78,0x00,0x00,0x00,0xFF,0xFC,0x15,0x48,0x33,0xFC,0x04,0x80,0xFF,0xFC,
11 0x10,0x26,0x33,0xFC,0x01,0x10,0xFF,0xFC,0x10,0x2A,0x23,0xFC,0x00,0xD4,0x9F,0x40,
[all …]
/linux/lib/crypto/s390/
H A Dchacha-s390.S20 .long 0x61707865,0x3320646e,0x79622d32,0x6b206574 # endian-neutral
21 .long 1,0,0,0
22 .long 2,0,0,0
23 .long 3,0,0,0
24 .long 0x03020100,0x07060504,0x0b0a0908,0x0f0e0d0c # byte swap
26 .long 0,1,2,3
27 .long 0x61707865,0x61707865,0x61707865,0x61707865 # smashed sigma
28 .long 0x3320646e,0x3320646e,0x3320646e,0x3320646e
29 .long 0x79622d32,0x79622d32,0x79622d32,0x79622d32
30 .long 0x6b206574,0x6b206574,0x6b206574,0x6b206574
[all …]
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-r.c44 .reg = 0x00,
49 0),
53 static CLK_FIXED_FACTOR_HW(ahb0_clk, "ahb0", &ar100_clk.common.hw, 1, 1, 0);
55 static SUNXI_CCU_M(apb0_clk, "apb0", "ahb0", 0x0c, 0, 2, 0);
64 apb0_gate_parent, 0x28, BIT(0), 0);
66 apb0_gate_parent, 0x28, BIT(1), 0);
68 apb0_gate_parent, 0x28, BIT(2), 0);
70 apb0_gate_parent, 0x28, BIT(3), 0);
72 apb0_gate_parent, 0x28, BIT(4), 0);
74 apb0_gate_parent, 0x28, BIT(6), 0);
[all …]
/linux/drivers/gpu/drm/panel/
H A Dpanel-boe-himax8279d.c59 gpiod_set_value(pinfo->enable_gpio, 0); in disable_gpios()
60 gpiod_set_value(pinfo->pp33_gpio, 0); in disable_gpios()
61 gpiod_set_value(pinfo->pp18_gpio, 0); in disable_gpios()
67 unsigned int i = 0; in send_mipi_cmds()
70 for (i = 0; i < pinfo->desc->on_cmds_num; i++) { in send_mipi_cmds()
74 if (err < 0) in send_mipi_cmds()
78 return 0; in send_mipi_cmds()
87 if (err < 0) { in boe_panel_disable()
92 return 0; in boe_panel_disable()
101 if (err < 0) in boe_panel_unprepare()
[all …]
H A Dpanel-boe-tv101wum-nl6.c57 #define NT36523_DCS_SWITCH_PAGE 0xff
64 mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); in nt36523_enable_reload_cmds()
71 nt36523_switch_page(&ctx, 0x20); in boe_tv110c9m_init()
73 mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0xd9); in boe_tv110c9m_init()
74 mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x78); in boe_tv110c9m_init()
75 mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x5a); in boe_tv110c9m_init()
76 mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x63); in boe_tv110c9m_init()
77 mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x91); in boe_tv110c9m_init()
78 mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x73); in boe_tv110c9m_init()
79 mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0xe6); in boe_tv110c9m_init()
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8135.c17 #define DRV_BASE1 0x500
18 #define DRV_BASE2 0x510
19 #define PUPD_BASE1 0x400
20 #define PUPD_BASE2 0x450
21 #define R0_BASE1 0x4d0
22 #define R1_BASE1 0x200
23 #define R1_BASE2 0x250
49 MTK_DRV_GRP(2, 16, 0, 2, 2),
53 MTK_DRV_GRP(2, 8, 0, 1, 2),
55 MTK_DRV_GRP(4, 32, 0, 2, 4)
[all …]
/linux/drivers/media/usb/gspca/m5602/
H A Dm5602_ov7660.c23 {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02},
24 {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0},
25 {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00},
26 {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0},
27 {BRIDGE, M5602_XB_ADC_CTRL, 0xc0},
28 {BRIDGE, M5602_XB_SENSOR_TYPE, 0x0d},
29 {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00},
30 {BRIDGE, M5602_XB_GPIO_DIR, 0x03},
31 {BRIDGE, M5602_XB_GPIO_DIR, 0x03},
32 {BRIDGE, M5602_XB_ADC_CTRL, 0xc0},
[all …]
H A Dm5602_s5k4aa.c20 {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02, 0x00},
21 {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0, 0x00},
22 {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00, 0x00},
23 {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0, 0x00},
24 {BRIDGE, M5602_XB_ADC_CTRL, 0xc0, 0x00},
25 {BRIDGE, M5602_XB_SENSOR_TYPE, 0x0d, 0x00},
26 {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00, 0x00},
28 {BRIDGE, M5602_XB_GPIO_DIR, 0x1d, 0x00},
29 {BRIDGE, M5602_XB_GPIO_DAT, 0x08, 0x00},
30 {BRIDGE, M5602_XB_SEN_CLK_DIV, 0xb0, 0x00},
[all …]
H A Dm5602_s5k83a.c36 .priv = 0
41 {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02, 0x00},
42 {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0, 0x00},
43 {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00, 0x00},
44 {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0, 0x00},
45 {BRIDGE, M5602_XB_ADC_CTRL, 0xc0, 0x00},
46 {BRIDGE, M5602_XB_SENSOR_TYPE, 0x0d, 0x00},
47 {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00, 0x00},
49 {BRIDGE, M5602_XB_SIG_INI, 0x00, 0x00},
50 {BRIDGE, M5602_XB_GPIO_DIR, 0x1d, 0x00},
[all …]
H A Dm5602_po1030.c23 {BRIDGE, M5602_XB_MCU_CLK_DIV, 0x02},
24 {BRIDGE, M5602_XB_MCU_CLK_CTRL, 0xb0},
25 {BRIDGE, M5602_XB_SEN_CLK_DIV, 0x00},
26 {BRIDGE, M5602_XB_SEN_CLK_CTRL, 0xb0},
27 {BRIDGE, M5602_XB_ADC_CTRL, 0xc0},
28 {BRIDGE, M5602_XB_SENSOR_CTRL, 0x00},
29 {BRIDGE, M5602_XB_SENSOR_TYPE, 0x0c},
30 {BRIDGE, M5602_XB_ADC_CTRL, 0xc0},
31 {BRIDGE, M5602_XB_GPIO_DIR, 0x05},
32 {BRIDGE, M5602_XB_GPIO_DAT, 0x04},
[all …]
/linux/crypto/
H A Dtestmgr.h34 * @ksize: Length of @key in bytes (0 if no key)
101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
275 "\xEB\x07\xDD\xDC\x01\x83\xA4\xD0\xAC\x9B\x54\xB0\x51\xF2\xB1\x3E"
284 "\x00\xB0\x6C\x4F\xDA\xBB\x63\x01\x19\x8D\x26\x5B\xDB\xAE\x94\x23"
323 "\xD6\xB0\xE2\x62\x8F\x74\x26\xC2\x0C\xD3\x9A\x17\x47\xE6\x8E\xAB"
430 "\xD6\xB0\xE2\x62\x8F\x74\x26\xC2\x0C\xD3\x9A\x17\x47\xE6\x8E\xAB"
532 "\x7C\x32\x68\xAD\xB0\xC6\x94\x81\x41\x75\xDC\x06\x78\x0A\xB4\xCF"
575 "\x5C\x40\xB2\x0E\xA7\xFD\xC6\xED\x45\x8E\xD9\x7C\xB0\xB2\x68\xC6"
602 "\xBF\x7A\x30\x1B\x39\x60\xA3\x21\x53\xFB\xB0\xDC\x0F\x7C\x2C\xFB"
608 "\xF4\xAA\x67\x3C\x48\x37\xBD\x9A\x3C\xFE\xA5\x9A\xB0\xD1\x6B\x85"
[all …]
H A Dhkdf.c41 * Returns 0 on success with the pseudorandom key stored in @prk,
71 * Returns 0 on success with output keying material stored in @okm,
90 for (i = 0; i < okmlen; i += hashlen) { in hkdf_expand()
122 err = 0; in hkdf_expand()
166 "\x2d\x2d\x0a\x90\xcf\x1a\x5a\x4c\x5d\xb0\x2d\x56\xec\xc4\xc5\xbf"
183 .info = "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7\xb8\xb9\xba\xbb\xbc\xbd\xbe\xbf"
205 .salt_size = 0,
207 .info_size = 0,
224 "\xb1\x68\x21\x99\xc8\xbc\x3a\x00\xda\x0c\xab\x47\xb7\xb0\x0f\xdf",
227 "\xd1\x4a\x7e\xe8\x3a\xa0\x57\xa9\x3d\x59\xb0\xa1\x31\x7f\xf0\x9d"
[all …]
/linux/drivers/clk/socfpga/
H A Dclk-s10.c183 { STRATIX10_BOOT_CLK, "boot_clk", boot_mux, ARRAY_SIZE(boot_mux), 0,
184 0x0},
186 0, 0x74},
188 0, 0xe4},
192 { STRATIX10_MAIN_MPU_BASE_CLK, "main_mpu_base_clk", "main_pll", NULL, 1, 0, 0x84},
193 { STRATIX10_MAIN_NOC_BASE_CLK, "main_noc_base_clk", "main_pll", NULL, 1, 0, 0x88},
194 { STRATIX10_PERI_MPU_BASE_CLK, "peri_mpu_base_clk", "periph_pll", NULL, 1, 0,
195 0xF4},
196 { STRATIX10_PERI_NOC_BASE_CLK, "peri_noc_base_clk", "periph_pll", NULL, 1, 0,
197 0xF8},
[all …]
/linux/drivers/media/i2c/cx25840/
H A Dcx25840-vbi.c25 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4, in decode_vps()
26 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0, in decode_vps()
27 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96, in decode_vps()
28 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2, in decode_vps()
29 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94, in decode_vps()
30 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0, in decode_vps()
31 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4, in decode_vps()
32 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0, in decode_vps()
33 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5, in decode_vps()
34 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1, in decode_vps()
[all …]
/linux/drivers/clk/hisilicon/
H A Dcrg-hi3798cv200.c45 { HISTB_OSC_CLK, "clk_osc", NULL, 0, 24000000, },
46 { HISTB_APB_CLK, "clk_apb", NULL, 0, 100000000, },
47 { HISTB_AHB_CLK, "clk_ahb", NULL, 0, 200000000, },
48 { HI3798CV200_FIXED_12M, "12m", NULL, 0, 12000000, },
49 { HI3798CV200_FIXED_24M, "24m", NULL, 0, 24000000, },
50 { HI3798CV200_FIXED_25M, "25m", NULL, 0, 25000000, },
51 { HI3798CV200_FIXED_48M, "48m", NULL, 0, 48000000, },
52 { HI3798CV200_FIXED_50M, "50m", NULL, 0, 50000000, },
53 { HI3798CV200_FIXED_60M, "60m", NULL, 0, 60000000, },
54 { HI3798CV200_FIXED_75M, "75m", NULL, 0, 75000000, },
[all …]
/linux/Documentation/fault-injection/
H A Dnvme-fault-injection.rst33 name fault_inject, interval 1, probability 100, space 0, times 1
34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2
39 dump_stack+0x5c/0x7d
40 should_fail+0x148/0x170
41 nvme_should_fail+0x2f/0x50 [nvme_core]
42 nvme_process_cq+0xe7/0x1d0 [nvme]
43 nvme_irq+0x1e/0x40 [nvme]
44 __handle_irq_event_percpu+0x3a/0x190
45 handle_irq_event_percpu+0x30/0x70
46 handle_irq_event+0x36/0x60
[all …]
/linux/include/media/i2c/
H A Dtvaudio.h16 #define I2C_ADDR_TDA8425 0x82
17 #define I2C_ADDR_TDA9840 0x84
18 #define I2C_ADDR_TDA9874 0xb0 /* also used by 9875 */
19 #define I2C_ADDR_TDA9875 0xb0
20 #define I2C_ADDR_TDA8425 0x82
21 #define I2C_ADDR_TDA9840 0x84 /* also used by TA8874Z */
22 #define I2C_ADDR_TDA985x_L 0xb4 /* also used by 9873 */
23 #define I2C_ADDR_TDA985x_H 0xb
[all...]
/linux/drivers/media/dvb-frontends/
H A Dm88rs2000.c45 } while (0)
47 #define deb_info(args...) dprintk(0x01, args)
58 .flags = 0, in m88rs2000_writereg()
66 deb_info("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n", in m88rs2000_writereg()
69 return (ret != 1) ? -EREMOTEIO : 0; in m88rs2000_writereg()
76 u8 b1[] = { 0 }; in m88rs2000_readreg()
81 .flags = 0, in m88rs2000_readreg()
95 deb_info("%s: readreg error (reg == 0x%02x, ret == %i)\n", in m88rs2000_readreg()
98 return b1[0]; in m88rs2000_readreg()
106 /* Must not be 0x00 or 0xff */ in m88rs2000_get_mclk()
[all …]
/linux/Documentation/RCU/
H A Dlockdep-splat.rst30 rcu_scheduler_active = 1, debug_locks = 0
32 #0: (&shost->scan_mutex){+.+.}, at: [<ffffffff8145efca>]
33 scsi_scan_host_selected+0x5a/0x150
35 elevator_exit+0x22/0x60
37 cfq_exit_queue+0x43/0x190
40 Pid: 1552, comm: scsi_scan_6 Not tainted 3.0.0-rc5 #17
42 [<ffffffff810abb9b>] lockdep_rcu_dereference+0xbb/0xc0
43 [<ffffffff812b6139>] __cfq_exit_single_io_context+0xe9/0x120
44 [<ffffffff812b626c>] cfq_exit_queue+0x7c/0x190
45 [<ffffffff812a5046>] elevator_exit+0x36/0x60
[all …]
/linux/fs/nls/
H A Dnls_cp950.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x3000,0xFF0C,0x3001,0x3002,0xFF0E,0x2027,0xFF1B,0xFF1A,/* 0x40-0x47 */
26 0xFF1F,0xFF01,0xFE30,0x2026,0x2025,0xFE50,0xFE51,0xFE52,/* 0x48-0x4F */
[all …]
H A Dnls_cp936.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x4E02,0x4E04,0x4E05,0x4E06,0x4E0F,0x4E12,0x4E17,0x4E1F,/* 0x40-0x47 */
26 0x4E20,0x4E21,0x4E23,0x4E26,0x4E29,0x4E2E,0x4E2F,0x4E31,/* 0x48-0x4F */
[all …]
/linux/include/dt-bindings/clock/
H A Dam3.h8 #define AM3_CLKCTRL_OFFSET 0x0
12 #define AM3_L4LS_CLKCTRL_OFFSET 0x38
14 #define AM3_L4LS_UART6_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x38)
15 #define AM3_L4LS_MMC1_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x3c)
16 #define AM3_L4LS_ELM_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x40)
17 #define AM3_L4LS_I2C3_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x44)
18 #define AM3_L4LS_I2C2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x48)
19 #define AM3_L4LS_SPI0_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x4c)
20 #define AM3_L4LS_SPI1_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x50)
21 #define AM3_L4LS_L4_LS_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x60)
[all …]

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