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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,pil-info.yaml34 reg = <0x146bf000 0x1000>;
39 ranges = <0 0x146bf000 0x1000>;
43 reg = <0x94c 0xc8>;
/linux/include/dt-bindings/pinctrl/
H A Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx35-pinfunc.h13 #define MX35_PAD_CAPTURE__GPT_CAPIN1 0x004 0x328 0x000 0x0 0x0
14 #define MX35_PAD_CAPTURE__GPT_CMPOUT2 0x004 0x328 0x000 0x1 0x0
15 #define MX35_PAD_CAPTURE__CSPI2_SS1 0x004 0x328 0x7f4 0x2 0x0
16 #define MX35_PAD_CAPTURE__EPIT1_EPITO 0x004 0x328 0x000 0x3 0x0
17 #define MX35_PAD_CAPTURE__CCM_CLK32K 0x004 0x328 0x7d0 0x4 0x0
18 #define MX35_PAD_CAPTURE__GPIO1_4 0x004 0x328 0x850 0x5 0x0
19 #define MX35_PAD_COMPARE__GPT_CMPOUT1 0x008 0x32c 0x000 0x0 0x0
20 #define MX35_PAD_COMPARE__GPT_CAPIN2 0x008 0x32c 0x000 0x1 0x0
21 #define MX35_PAD_COMPARE__GPT_CMPOUT3 0x008 0x32c 0x000 0x2 0x0
22 #define MX35_PAD_COMPARE__EPIT2_EPITO 0x008 0x32c 0x000 0x3 0x0
[all …]
H A Dimx51-pinfunc.h13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0
14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0
15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0
16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0
17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0
18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0
19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0
20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0
21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0
22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0
[all …]
H A Dimx6q-pinfunc.h13 #define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
15 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0
16 #define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0
17 #define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0
18 #define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0
20 #define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
21 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0
22 #define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0
[all …]
/linux/drivers/net/wireless/mediatek/mt7601u/
H A Dmcu.c20 #define MCU_FW_URB_MAX_PAYLOAD 0x3800
45 u32 i, csum = 0; in trace_mt_mcu_msg_send_cs()
47 for (i = 0; i < skb->len / 4; i++) in trace_mt_mcu_msg_send_cs()
98 return 0; in mt7601u_mcu_wait_resp()
117 u8 seq = 0; in mt7601u_mcu_msg_send()
121 return 0; in mt7601u_mcu_msg_send()
128 seq = ++dev->mcu.msg_seq & 0xf; in mt7601u_mcu_msg_send()
178 return 0; in mt7601u_mcu_tssi_read_kick()
189 return 0; in mt7601u_mcu_tssi_read_kick()
218 return 0; in mt7601u_write_reg_pairs()
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam437x-gp-evm.dts57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
H A Dam335x-guardian.dts22 cpu@0 {
29 reg = <0x80000000 0x10000000>; /* 256 MB */
34 pinctrl-0 = <&guardian_button_pins>;
54 pinctrl-0 = <&guardian_led_pins>;
73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
87 hsync-active = <0>;
88 vsync-active = <0>;
93 ac-bias-intrpt = <0>;
97 fdd = <0x80>;
98 sync-edge = <0>;
[all …]
/linux/drivers/memory/tegra/
H A Dtegra210-emc.h21 #define EMC_INTSTATUS 0x0
23 #define EMC_DBG 0x8
26 #define EMC_CFG 0xc
31 #define EMC_PIN 0x24
32 #define EMC_PIN_PIN_CKE BIT(0)
35 #define EMC_TIMING_CONTROL 0x28
36 #define EMC_RC 0x2c
37 #define EMC_RFC 0x30
38 #define EMC_RAS 0x34
39 #define EMC_RP 0x38
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
25 reg = <0 0>;
33 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0>;
115 reg = <0x8fcad000 0x40000>;
120 reg = <0x8fcfd000 0x1000>;
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02220385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8703b_tables.c9 { 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200, },
10 { 0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200, },
11 { 0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636, },
12 { 0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234, },
13 { 0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434, },
14 { 0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830, },
19 /* Regd: FCC -> 0, ETSI -> 2, MKK -> 1
20 * Band: 2.4G -> 0, 5G -> 1
21 * Bandwidth (bw): 20M -> 0, 40M -> 1, 80M -> 2, 160M -> 3
22 * Rate Section (rs): CCK -> 0, OFDM -> 1, HT -> 2, VHT -> 3
[all …]
H A Drtw8723d_table.c10 0x020, 0x00000013,
11 0x02F, 0x00000010,
12 0x077, 0x00000007,
13 0x421, 0x0000000F,
14 0x428, 0x0000000A,
15 0x429, 0x00000010,
16 0x430, 0x00000000,
17 0x431, 0x00000000,
18 0x432, 0x00000000,
19 0x433, 0x00000001,
[all …]
/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A D8710b.c18 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00},
19 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04},
20 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04},
21 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D},
22 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00},
23 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0},
24 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00},
25 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0},
26 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x66},
27 {0x461, 0x66}, {0x4C8, 0xFF}, {0x4C9, 0x08}, {0x4CC, 0xFF},
[all …]
H A D8188f.c18 {0x024, 0xDF}, {0x025, 0x07}, {0x02B, 0x1C}, {0x283, 0x20},
19 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00},
20 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04},
21 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04},
22 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D},
23 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00},
24 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0},
25 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00},
26 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0},
27 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x44},
[all …]
H A D8192e.c20 {0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7},
21 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x00},
22 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
23 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
24 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
25 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
26 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
27 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
28 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
29 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66},
[all …]
/linux/drivers/clk/renesas/
H A Drenesas-cpg-mssr.c40 #define WARN_DEBUG(x) do { } while (0)
56 0x030, 0x038, 0x040, 0x048, 0x04C, 0x03C, 0x1C0, 0x1C4,
57 0x9A0, 0x9A4, 0x9A8, 0x9AC,
61 0x2E00, 0x2E04, 0x2E08, 0x2E0C, 0x2E10, 0x2E14, 0x2E18, 0x2E1C,
62 0x2E20, 0x2E24, 0x2E28, 0x2E2C, 0x2E30, 0x2E34, 0x2E38, 0x2E3C,
63 0x2E40, 0x2E44, 0x2E48, 0x2E4C, 0x2E50, 0x2E54, 0x2E58, 0x2E5C,
64 0x2E60, 0x2E64, 0x2E68, 0x2E6C, 0x2E70, 0x2E74,
72 0x130, 0x134, 0x138, 0x13C, 0x140, 0x144, 0x148, 0x14C,
73 0x990, 0x994, 0x998, 0x99C,
77 0x2D00, 0x2D04, 0x2D08, 0x2D0C, 0x2D10, 0x2D14, 0x2D18, 0x2D1C,
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dqdu1000.dtsi28 #clock-cells = <0>;
34 #clock-cells = <0>;
40 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0x0 0x0>;
46 clocks = <&cpufreq_hw 0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
68 reg = <0x0 0x100>;
69 clocks = <&cpufreq_hw 0>;
73 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dmsm8976.dtsi27 #clock-cells = <0>;
33 #size-cells = <0>;
35 cpu0: cpu@0 {
38 reg = <0x0>;
49 reg = <0x1>;
60 reg = <0x2>;
71 reg = <0x3>;
82 reg = <0x100>;
93 reg = <0x101>;
104 reg = <0x102>;
[all …]
H A Dsdm630.dtsi36 #clock-cells = <0>;
43 #clock-cells = <0>;
51 #size-cells = <0>;
56 reg = <0x0 0x100>;
76 reg = <0x0 0x101>;
91 reg = <0x0 0x102>;
106 reg = <0x0 0x103>;
118 cpu4: cpu@0 {
121 reg = <0x0 0x0>;
141 reg = <0x0 0x1>;
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dregs.h2 #define A_SG_CONTROL 0x0
25 #define M_USERSPACESIZE 0x1f
29 #define M_HOSTPAGESIZE 0x7
37 #define M_PKTSHIFT 0x7
52 #define S_GLOBALENABLE 0
68 #define A_SG_KDOORBELL 0x4
74 #define S_EGRCNTX 0
75 #define M_EGRCNTX 0xffff
78 #define A_SG_GTS 0x8
81 #define M_RSPQ 0x7
[all …]
/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra210.c22 #define TEGRA_PIN_PEX_L0_RST_N_PA0 _GPIO(0)
182 #define TEGRA_PIN_CORE_PWR_REQ _PIN(0)
1266 #define DRV_PINGROUP_REG_A 0x8d4 /* bank 0 */
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
1290 .mux_bit = 0, \
1306 .drv_bank = 0, \
1335 .drv_bank = 0, \
1354 …PINGROUP(sdmmc1_clk_pm0, SDMMC1, RSVD1, RSVD2, RSVD3, 0x3000, Y, Y, N, N,…
1355 …PINGROUP(sdmmc1_cmd_pm1, SDMMC1, SPI3, RSVD2, RSVD3, 0x3004, Y, Y, N, N,…
1356 …PINGROUP(sdmmc1_dat3_pm2, SDMMC1, SPI3, RSVD2, RSVD3, 0x3008, Y, Y, N, N,…
[all …]
/linux/include/linux/mfd/madera/
H A Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/linux/drivers/mfd/
H A Dcs47l15-tables.c19 { 0x8C, 0x5555 },
20 { 0x8C, 0xAAAA },
21 { 0x314, 0x0080 },
22 { 0x4A8, 0x6023 },
23 { 0x4A9, 0x6023 },
24 { 0x4D4, 0x0008 },
25 { 0x4CF, 0x0F00 },
26 { 0x4D7, 0x1B2B },
27 { 0x8C, 0xCCCC },
28 { 0x8C, 0x3333 },
[all …]
H A Dcs47l35-tables.c18 { 0x460, 0x0c40 },
19 { 0x461, 0xcd1a },
20 { 0x462, 0x0c40 },
21 { 0x463, 0xb53b },
22 { 0x464, 0x0c40 },
23 { 0x465, 0x7503 },
24 { 0x466, 0x0c40 },
25 { 0x467, 0x4a41 },
26 { 0x468, 0x0041 },
27 { 0x469, 0x3491 },
[all …]

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