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/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8167.c18 /* 0E4E8SR 4/8/12/16 */
20 /* 0E2E4SR 2/4/6/8 */
23 MTK_DRV_GRP(2, 16, 0, 2, 2)
27 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
28 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
33 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
34 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
[all …]
H A Dpinctrl-mt8516.c18 /* 0E4E8SR 4/8/12/16 */
20 /* 0E2E4SR 2/4/6/8 */
23 MTK_DRV_GRP(2, 16, 0, 2, 2)
27 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
28 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
33 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
34 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
[all …]
H A Dpinctrl-mt8173.c18 #define DRV_BASE 0xb00
21 MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */
22 MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */
23 MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */
24 MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */
25 MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */
26 MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */
28 MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */
29 MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */
30 MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */
[all …]
H A Dpinctrl-mt8127.c19 /* 0E4E8SR 4/8/12/16 */
21 /* 0E2E4SR 2/4/6/8 */
24 MTK_DRV_GRP(2, 16, 0, 2, 2)
28 MTK_PIN_DRV_GRP(0, 0xb00, 0, 1),
29 MTK_PIN_DRV_GRP(1, 0xb00, 0, 1),
30 MTK_PIN_DRV_GRP(2, 0xb00, 0, 1),
31 MTK_PIN_DRV_GRP(3, 0xb00, 0, 1),
32 MTK_PIN_DRV_GRP(4, 0xb00, 0, 1),
33 MTK_PIN_DRV_GRP(5, 0xb00, 0, 1),
34 MTK_PIN_DRV_GRP(6, 0xb00, 0, 1),
[all …]
H A Dpinctrl-mt6795.c11 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
12 _x_bits, 15, 0)
15 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
16 _x_bits, 16, 0)
19 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
23 PIN_FIELD16(0, 196, 0x0, 0x10, 0, 1),
27 PIN_FIELD16(0, 196, 0x100, 0x10, 0, 1),
31 PIN_FIELD16(0, 196, 0x200, 0x10, 0, 1),
35 PIN_FIELD16(0, 196, 0x400, 0x10, 0, 1),
39 PIN_FIELD16(0, 196, 0x500, 0x10, 0, 1),
[all …]
/linux/drivers/media/i2c/cx25840/
H A Dcx25840-audio.c39 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in cx25840_set_audclk_freq()
40 * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10 in cx25840_set_audclk_freq()
42 cx25840_write4(client, 0x108, 0x1006040f); in cx25840_set_audclk_freq()
45 * VID_PLL Fraction (register 0x10c) = 0x2be2fe in cx25840_set_audclk_freq()
46 * 28636360 * 0xf.15f17f0/4 = 108 MHz in cx25840_set_audclk_freq()
51 * AUX_PLL Fraction = 0x1bb39ee in cx25840_set_audclk_freq()
52 * 28636363 * 0x6.dd9cf70/0x10 = 32000 * 384 in cx25840_set_audclk_freq()
57 cx25840_write4(client, 0x110, 0x01bb39ee); in cx25840_set_audclk_freq()
61 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider in cx25840_set_audclk_freq()
63 cx25840_write(client, 0x127, 0x50); in cx25840_set_audclk_freq()
[all …]
/linux/arch/arm64/include/asm/
H A Dbrk-imm.h11 * 0x004: for installing kprobes
12 * 0x005: for installing uprobes
13 * 0x006: for kprobe software single-step
14 * 0x007: for kretprobe return
15 * Allowed values for kgdb are 0x400 - 0x7ff
16 * 0x100: for triggering a fault on purpose (reserved)
17 * 0x400: for dynamic BRK instruction
18 * 0x401: for compile time BRK instruction
19 * 0x800: kernel-mode BUG() and WARN() traps
20 * 0x9xx: tag-based KASAN trap (allowed values 0x900 - 0x9ff)
[all …]
/linux/drivers/media/pci/cx18/
H A Dcx18-av-audio.c60 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in set_audclk_freq()
61 * AUX_PLL Integer = 0x0d, AUX PLL Post Divider = 0x20 in set_audclk_freq()
63 cx18_av_write4(cx, 0x108, 0x200d040f); in set_audclk_freq()
65 /* VID_PLL Fraction = 0x2be2fe */ in set_audclk_freq()
66 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
67 cx18_av_write4(cx, 0x10c, 0x002be2fe); in set_audclk_freq()
69 /* AUX_PLL Fraction = 0x176740c */ in set_audclk_freq()
70 /* xtal * 0xd.bb3a060/0x20 = 32000 * 384: 393 MHz p-pd*/ in set_audclk_freq()
71 cx18_av_write4(cx, 0x110, 0x0176740c); in set_audclk_freq()
74 /* 0x1.f77f = (4 * xtal/8*2/455) / 32000 */ in set_audclk_freq()
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dnxp,ptn3460.yaml25 0 1024x768 NXP Generic
28 3 1600x900 Samsung LTM200KT
31 6 1600x900 ChiMei M215HGE
32 enum: [0, 1, 2, 3, 4, 5, 6]
46 port@0:
57 - port@0
76 #size-cells = <0>;
80 reg = <0x20>;
87 #size-cells = <0>;
89 port@0 {
[all …]
/linux/drivers/staging/rtl8723bs/include/
H A DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
50 /* 3. Page8(0x800) */
52 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */
54 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */
55 #define rFPGA0_XA_HSSIParameter2 0x824
56 #define rFPGA0_XB_HSSIParameter1 0x828
57 #define rFPGA0_XB_HSSIParameter2 0x82c
58 #define rTxAGC_B_Rate18_06 0x830
[all …]
/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.h20 #define EXYNOS_PIN_CON_FUNC_EINT 0xf
23 #define EXYNOS_GPIO_ECON_OFFSET 0x700
24 #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
25 #define EXYNOS_GPIO_EMASK_OFFSET 0x900
26 #define EXYNOS_GPIO_EPEND_OFFSET 0xA00
27 #define EXYNOS_WKUP_ECON_OFFSET 0xE00
28 #define EXYNOS_WKUP_EMASK_OFFSET 0xF00
29 #define EXYNOS_WKUP_EPEND_OFFSET 0xF40
30 #define EXYNOS7_WKUP_ECON_OFFSET 0x700
31 #define EXYNOS7_WKUP_EMASK_OFFSET 0x900
[all …]
/linux/drivers/bus/
H A Domap_l3_noc.h16 #define CUSTOM_ERROR 0x2
17 #define STANDARD_ERROR 0x0
18 #define INBAND_ERROR 0x0
19 #define L3_APPLICATION_ERROR 0x0
20 #define L3_DEBUG_ERROR 0x1
23 #define L3_TARG_STDERRLOG_MAIN 0x48
24 #define L3_TARG_STDERRLOG_HDR 0x4c
25 #define L3_TARG_STDERRLOG_MSTADDR 0x50
26 #define L3_TARG_STDERRLOG_INFO 0x58
27 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
[all …]
/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7710.c19 UNUSED = 0,
33 INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),
34 INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),
35 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
36 INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
37 INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920),
38 INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960),
39 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
41 INTC_VECT(IPSEC, 0xbe0),
43 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
[all …]
H A Dsetup-sh7705.c20 UNUSED = 0,
36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
40 INTC_VECT(SCIF0, 0x8e0),
41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
42 INTC_VECT(SCIF2, 0x960),
43 INTC_VECT(ADC_ADI, 0x980),
44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
[all …]
H A Dsetup-sh770x.c24 UNUSED = 0,
36 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
37 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
38 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
39 INTC_VECT(RTC, 0x4c0),
40 INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
41 INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
42 INTC_VECT(WDT, 0x560),
43 INTC_VECT(REF, 0x580),
44 INTC_VECT(REF, 0x5a0),
[all …]
/linux/arch/arm/mach-s3c/
H A Dregs-sys-s3c64xx.h16 #define S3C64XX_AHB_CON0 S3C_SYSREG(0x100)
17 #define S3C64XX_AHB_CON1 S3C_SYSREG(0x104)
18 #define S3C64XX_AHB_CON2 S3C_SYSREG(0x108)
20 #define S3C64XX_SDMA_SEL S3C_SYSREG(0x110)
22 #define S3C64XX_OTHERS S3C_SYSREG(0x900)
/linux/Documentation/devicetree/bindings/crypto/
H A Dbrcm,spu-crypto.txt20 reg = <0 0x612d0000 0 0x900>;
21 mboxes = <&pdc0 0>;
/linux/tools/perf/arch/powerpc/util/
H A Dbook3s_hv_exits.h10 {0x0, "RETURN_TO_HOST"}, \
11 {0x100, "SYSTEM_RESET"}, \
12 {0x200, "MACHINE_CHECK"}, \
13 {0x300, "DATA_STORAGE"}, \
14 {0x380, "DATA_SEGMENT"}, \
15 {0x400, "INST_STORAGE"}, \
16 {0x480, "INST_SEGMENT"}, \
17 {0x500, "EXTERNAL"}, \
18 {0x502, "EXTERNAL_HV"}, \
19 {0x600, "ALIGNMENT"}, \
[all …]
/linux/arch/powerpc/kvm/
H A Dtrace_book3s.h10 {0x100, "SYSTEM_RESET"}, \
11 {0x200, "MACHINE_CHECK"}, \
12 {0x300, "DATA_STORAGE"}, \
13 {0x380, "DATA_SEGMENT"}, \
14 {0x400, "INST_STORAGE"}, \
15 {0x480, "INST_SEGMENT"}, \
16 {0x500, "EXTERNAL"}, \
17 {0x502, "EXTERNAL_HV"}, \
18 {0x600, "ALIGNMENT"}, \
19 {0x700, "PROGRAM"}, \
[all …]
/linux/arch/openrisc/mm/
H A Dinit.c43 unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 }; in zone_sizes_init()
105 for (j = 0; p < e && j < PTRS_PER_PTE; in map_ram()
119 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__, in map_ram()
132 for (i = 0; i < PTRS_PER_PGD; i++) in paging_init()
133 swapper_pg_dir[i] = __pgd(0); in paging_init()
155 unsigned long *dtlb_vector = __va(0x900); in paging_init()
156 unsigned long *itlb_vector = __va(0xa00); in paging_init()
179 mtspr(SPR_ICBIR, 0x900); in paging_init()
180 mtspr(SPR_ICBIR, 0xa00); in paging_init()
200 memset((void *)empty_zero_page, 0, PAGE_SIZE); in mem_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,flexspi-clock.yaml29 const: 0
50 reg = <0x900 0x4>;
51 #clock-cells = <0>;
/linux/Documentation/devicetree/bindings/extcon/
H A Dqcom,pm8941-misc.yaml52 #size-cells = <0>;
58 reg = <0x900>;
59 interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>;
/linux/Documentation/devicetree/bindings/i2c/
H A Dmediatek,mt7621-i2c.yaml50 reg = <0x900 0x100>;
57 #size-cells = <0>;
60 pinctrl-0 = <&i2c_pins>;
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_pixpll.c21 /* Byte 0 ~ Byte 3 */
22 unsigned div_out : 7; /* 6 : 0 Output clock divider */
68 {108000, 1600, 900, 60, 15, 81, 5}, /* 1600x900@60Hz */
73 {106500, 1440, 900, 60, 19, 81, 4}, /* 1440x900@60Hz */
74 {88750, 1440, 900, 60, 16, 71, 5}, /* 1440x900@60Hz */
147 * Return 0 if success, return -1 if not found.
157 for (i = 0; i < num; ++i) { in lsdc_pixpll_find()
165 return 0; in lsdc_pixpll_find()
189 * Return 0 if a set of parameter is found, otherwise return the error
204 return 0; in lsdc_pixel_pll_compute()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgp104.c29 .bundle_size = 0x3000,
30 .bundle_min_gpm_fifo_depth = 0x180,
31 .bundle_token_limit = 0x900,
33 .pagepool_size = 0x20000,
37 .attrib_nr_max = 0x4b0,
38 .attrib_nr = 0x320,
39 .alpha_nr_max = 0xc00,
40 .alpha_nr = 0x800,
41 .gfxp_nr = 0xba8,

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