| /linux/drivers/staging/rtl8723bs/include/ |
| H A D | hal_com_phycfg.h | 10 #define PathA 0x0 /* Useless */ 11 #define PathB 0x1 12 #define PathC 0x2 13 #define PathD 0x3 16 CCK = 0, 21 #define MAX_POWER_INDEX 0x3F 24 TXPWR_LMT_FCC = 0, 34 /* 0x870~0x877[8 bytes] */ 37 /* 0x860~0x86f [16 bytes] */ 40 /* 0x860~0x86f [16 bytes] */ [all …]
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| H A D | Hal8192CPhyReg.h | 41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */ 43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */ 44 /* 3. RF register 0x00-2E */ 50 /* 3. Page8(0x800) */ 52 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */ 54 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ 55 #define rFPGA0_XA_HSSIParameter2 0x824 56 #define rFPGA0_XB_HSSIParameter1 0x828 57 #define rFPGA0_XB_HSSIParameter2 0x82c 58 #define rTxAGC_B_Rate18_06 0x830 [all …]
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| /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/ |
| H A D | i2c.txt | 9 (typically 0x8afc 0x2). 30 reg = <0x860 0x20 0x3c80 0x30>; 33 fsl,cpm-command = <0x10>; 35 #size-cells = <0>; 39 reg = <0x68>;
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| /linux/drivers/staging/rtl8723bs/hal/ |
| H A D | odm_reg.h | 16 #define ODM_BB_RESET 0x002 17 #define ODM_DUMMY 0x4fe 18 #define RF_T_METER_OLD 0x24 19 #define RF_T_METER_NEW 0x42 21 #define ODM_EDCA_VO_PARAM 0x500 22 #define ODM_EDCA_VI_PARAM 0x504 23 #define ODM_EDCA_BE_PARAM 0x508 24 #define ODM_EDCA_BK_PARAM 0x50C 25 #define ODM_TXPAUSE 0x522 28 #define ODM_FPGA_PHY0_PAGE8 0x800 [all …]
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| H A D | odm_RegDefine11N.h | 13 #define ODM_REG_RF_MODE_11N 0x00 14 #define ODM_REG_RF_0B_11N 0x0B 15 #define ODM_REG_CHNBW_11N 0x18 16 #define ODM_REG_T_METER_11N 0x24 17 #define ODM_REG_RF_25_11N 0x25 18 #define ODM_REG_RF_26_11N 0x26 19 #define ODM_REG_RF_27_11N 0x27 20 #define ODM_REG_RF_2B_11N 0x2B 21 #define ODM_REG_RF_2C_11N 0x2C 22 #define ODM_REG_RXRF_A3_11N 0x3C [all …]
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| /linux/drivers/clk/sophgo/ |
| H A D | clk-cv1800.h | 14 #define REG_PLL_G2_CTRL 0x800 15 #define REG_PLL_G2_STATUS 0x804 16 #define REG_MIPIMPLL_CSR 0x808 17 #define REG_A0PLL_CSR 0x80C 18 #define REG_DISPPLL_CSR 0x810 19 #define REG_CAM0PLL_CSR 0x814 20 #define REG_CAM1PLL_CSR 0x818 21 #define REG_PLL_G2_SSC_SYN_CTRL 0x840 22 #define REG_A0PLL_SSC_SYN_CTRL 0x850 23 #define REG_A0PLL_SSC_SYN_SET 0x854 [all …]
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | qcom,qcm2290-venus.yaml | 76 reg = <0x5a00000 0xf0000>; 104 iommus = <&apps_smmu 0x860 0x0>, 105 <&apps_smmu 0x880 0x0>;
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| /linux/include/dt-bindings/pinctrl/ |
| H A D | am33xx.h | 18 #define SLEWCTRL_FAST 0 30 #define PIN_OUTPUT_PULLDOWN 0 43 #define AM335X_PIN_OFFSET_MIN 0x0800U 45 #define AM335X_PIN_GPMC_AD0 0x800 46 #define AM335X_PIN_GPMC_AD1 0x804 47 #define AM335X_PIN_GPMC_AD2 0x808 48 #define AM335X_PIN_GPMC_AD3 0x80c 49 #define AM335X_PIN_GPMC_AD4 0x810 50 #define AM335X_PIN_GPMC_AD5 0x814 51 #define AM335X_PIN_GPMC_AD6 0x818 [all …]
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | rv740d.h | 26 #define CG_SPLL_FUNC_CNTL 0x600 27 #define SPLL_RESET (1 << 0) 31 #define SPLL_REF_DIV_MASK (0x3f << 4) 33 #define SPLL_PDIV_A_MASK (0x7f << 20) 34 #define CG_SPLL_FUNC_CNTL_2 0x604 35 #define SCLK_MUX_SEL(x) ((x) << 0) 36 #define SCLK_MUX_SEL_MASK (0x1ff << 0) 37 #define CG_SPLL_FUNC_CNTL_3 0x608 38 #define SPLL_FB_DIV(x) ((x) << 0) 39 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) [all …]
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| /linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
| H A D | dm.h | 11 #define MF_USC_LSC 0 14 #define MAIN_ANT 0 17 #define AUX_ANT_CG_TRX 0 18 #define MAIN_ANT_CGCS_RX 0 22 #define DM_REG_RF_MODE_11N 0x00 23 #define DM_REG_RF_0B_11N 0x0B 24 #define DM_REG_CHNBW_11N 0x18 25 #define DM_REG_T_METER_11N 0x24 26 #define DM_REG_RF_25_11N 0x25 27 #define DM_REG_RF_26_11N 0x26 [all …]
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| /linux/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/ |
| H A D | dm.h | 7 #define MAIN_ANT 0 10 #define AUX_ANT_CG_TRX 0 11 #define MAIN_ANT_CGCS_RX 0 15 #define DM_REG_RF_MODE_11N 0x00 16 #define DM_REG_RF_0B_11N 0x0B 17 #define DM_REG_CHNBW_11N 0x18 18 #define DM_REG_T_METER_11N 0x24 19 #define DM_REG_RF_25_11N 0x25 20 #define DM_REG_RF_26_11N 0x26 21 #define DM_REG_RF_27_11N 0x27 [all …]
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| /linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/ |
| H A D | dm.h | 7 #define MAIN_ANT 0 10 #define AUX_ANT_CG_TRX 0 11 #define MAIN_ANT_CGCS_RX 0 17 #define DM_REG_RF_MODE_11N 0x00 18 #define DM_REG_RF_0B_11N 0x0B 19 #define DM_REG_CHNBW_11N 0x18 20 #define DM_REG_T_METER_11N 0x24 21 #define DM_REG_RF_25_11N 0x25 22 #define DM_REG_RF_26_11N 0x26 23 #define DM_REG_RF_27_11N 0x27 [all …]
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| /linux/arch/sh/kernel/cpu/sh3/ |
| H A D | setup-sh7710.c | 19 UNUSED = 0, 33 INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820), 34 INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860), 35 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), 36 INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0), 37 INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920), 38 INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960), 39 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0), 41 INTC_VECT(IPSEC, 0xbe0), 43 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20), [all …]
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| H A D | setup-sh7705.c | 20 UNUSED = 0, 36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), 37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820), 38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860), 39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), 40 INTC_VECT(SCIF0, 0x8e0), 41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920), 42 INTC_VECT(SCIF2, 0x960), 43 INTC_VECT(ADC_ADI, 0x980), 44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40), [all …]
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| H A D | setup-sh770x.c | 24 UNUSED = 0, 36 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 37 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460), 38 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), 39 INTC_VECT(RTC, 0x4c0), 40 INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500), 41 INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540), 42 INTC_VECT(WDT, 0x560), 43 INTC_VECT(REF, 0x580), 44 INTC_VECT(REF, 0x5a0), [all …]
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| H A D | setup-sh7720.c | 26 [0] = { 27 .start = 0xa413fec0, 28 .end = 0xa413fec0 + 0x28 - 1, 33 .start = evt2irq(0x480), 59 DEFINE_RES_MEM(0xa4430000, 0x100), 60 DEFINE_RES_IRQ(evt2irq(0xc00)), 65 .id = 0, 80 DEFINE_RES_MEM(0xa4438000, 0x100), 81 DEFINE_RES_IRQ(evt2irq(0xc20)), 95 [0] = { [all …]
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| /linux/arch/powerpc/boot/dts/ |
| H A D | mpc866ads.dts | 19 #size-cells = <0>; 21 PowerPC,866@0 { 23 reg = <0x0>; 26 d-cache-size = <0x2000>; // L1, 8K 27 i-cache-size = <0x4000>; // L1, 16K 28 timebase-frequency = <0>; 29 bus-frequency = <0>; 30 clock-frequency = <0>; 38 reg = <0x0 0x800000>; 45 reg = <0xff000100 0x40>; [all …]
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| H A D | mpc885ads.dts | 19 #size-cells = <0>; 21 PowerPC,885@0 { 23 reg = <0x0>; 28 timebase-frequency = <0>; 29 bus-frequency = <0>; 30 clock-frequency = <0>; 38 reg = <0x0 0x0>; 45 reg = <0xff000100 0x40>; 48 0x0 0x0 0xfe000000 0x800000 49 0x1 0x0 0xff080000 0x8000 [all …]
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| /linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | setup-sh7734.c | 32 DEFINE_RES_MEM(0xffe40000, 0x100), 33 DEFINE_RES_IRQ(evt2irq(0x8c0)), 38 .id = 0, 53 DEFINE_RES_MEM(0xffe41000, 0x100), 54 DEFINE_RES_IRQ(evt2irq(0x8e0)), 74 DEFINE_RES_MEM(0xffe42000, 0x100), 75 DEFINE_RES_IRQ(evt2irq(0x900)), 95 DEFINE_RES_MEM(0xffe43000, 0x100), 96 DEFINE_RES_IRQ(evt2irq(0x920)), 116 DEFINE_RES_MEM(0xffe44000, 0x100), [all …]
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| H A D | setup-sh7722.c | 30 .addr = 0xffe0000c, 32 .mid_rid = 0x21, 35 .addr = 0xffe00014, 37 .mid_rid = 0x22, 40 .addr = 0xffe1000c, 42 .mid_rid = 0x25, 45 .addr = 0xffe10014, 47 .mid_rid = 0x26, 50 .addr = 0xffe2000c, 52 .mid_rid = 0x29, [all …]
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| H A D | setup-sh7786.c | 35 DEFINE_RES_MEM(0xffea0000, 0x100), 36 DEFINE_RES_IRQ(evt2irq(0x700)), 37 DEFINE_RES_IRQ(evt2irq(0x720)), 38 DEFINE_RES_IRQ(evt2irq(0x760)), 39 DEFINE_RES_IRQ(evt2irq(0x740)), 44 .id = 0, 62 DEFINE_RES_MEM(0xffeb0000, 0x100), 63 DEFINE_RES_IRQ(evt2irq(0x780)), 67 DEFINE_RES_MEM(0xffeb0000, 0x100), 69 DEFINE_RES_IRQ(0), [all …]
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| /linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
| H A D | dm.h | 7 #define MAIN_ANT 0 10 #define AUX_ANT_CG_TRX 0 11 #define MAIN_ANT_CGCS_RX 0 17 #define DM_REG_RF_MODE_11N 0x00 18 #define DM_REG_RF_0B_11N 0x0B 19 #define DM_REG_CHNBW_11N 0x18 20 #define DM_REG_T_METER_11N 0x24 21 #define DM_REG_RF_25_11N 0x25 22 #define DM_REG_RF_26_11N 0x26 23 #define DM_REG_RF_27_11N 0x27 [all …]
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| /linux/drivers/phy/ralink/ |
| H A D | phy-ralink-usb.c | 22 #define RT_SYSC_REG_SYSCFG1 0x014 23 #define RT_SYSC_REG_CLKCFG1 0x030 24 #define RT_SYSC_REG_USB_PHY_CFG 0x05c 26 #define OFS_U2_PHY_AC0 0x800 27 #define OFS_U2_PHY_AC1 0x804 28 #define OFS_U2_PHY_AC2 0x808 29 #define OFS_U2_PHY_ACR0 0x810 30 #define OFS_U2_PHY_ACR1 0x814 31 #define OFS_U2_PHY_ACR2 0x818 32 #define OFS_U2_PHY_ACR3 0x81C [all …]
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| /linux/drivers/gpu/drm/sun4i/ |
| H A D | sun4i_backend.h | 20 #define SUN4I_BACKEND_MODCTL_REG 0x800 24 #define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20) 34 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0) 36 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804 39 #define SUN4I_BACKEND_DISSIZE_REG 0x808 40 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \ 41 (((w) - 1) & 0xffff)) 43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l))) 44 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \ 45 (((w) - 1) & 0x1fff)) [all …]
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| /linux/arch/sh/kernel/cpu/sh4/ |
| H A D | setup-sh7760.c | 17 UNUSED = 0, 44 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620), 45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660), 46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0), 47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0), 48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0), 49 INTC_VECT(DMAC, 0x6c0), 50 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820), 51 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860), 52 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920), [all …]
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