Searched +full:0 +full:x841 (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/media/ |
H A D | qcom,sm8250-camss.yaml | 113 port@0: 308 reg = <0 0xac6a000 0 0x2000>, 309 <0 0xac6c000 0 0x2000>, 310 <0 0xac6e000 0 0x1000>, 311 <0 0xac70000 0 0x1000>, 312 <0 0xac72000 0 0x1000>, 313 <0 0xac74000 0 0x1000>, 314 <0 0xacb4000 0 0xd000>, 315 <0 0xacc3000 0 0xd000>, 316 <0 0xacd9000 0 0x2200>, [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
H A D | gmc_7_0_d.h | 27 #define mmMC_CONFIG 0x800 28 #define mmMC_ARB_AGE_CNTL 0x9bf 29 #define mmMC_ARB_RET_CREDITS2 0x9c0 30 #define mmMC_ARB_FED_CNTL 0x9c1 31 #define mmMC_ARB_GECC2_STATUS 0x9c2 32 #define mmMC_ARB_GECC2_MISC 0x9c3 33 #define mmMC_ARB_GECC2_DEBUG 0x9c4 34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5 35 #define mmMC_ARB_GECC2 0x9c9 36 #define mmMC_ARB_GECC2_CLI 0x9ca [all …]
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H A D | gmc_8_2_d.h | 27 #define mmMC_CONFIG 0x800 28 #define mmMC_ARB_ATOMIC 0x9be 29 #define mmMC_ARB_AGE_CNTL 0x9bf 30 #define mmMC_ARB_RET_CREDITS2 0x9c0 31 #define mmMC_ARB_FED_CNTL 0x9c1 32 #define mmMC_ARB_GECC2_STATUS 0x9c2 33 #define mmMC_ARB_GECC2_MISC 0x9c3 34 #define mmMC_ARB_GECC2_DEBUG 0x9c4 35 #define mmMC_ARB_GECC2_DEBUG2 0x9c5 36 #define mmMC_ARB_PERF_CID 0x9c6 [all …]
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H A D | gmc_7_1_d.h | 27 #define mmMC_CONFIG 0x800 28 #define mmMC_ARB_AGE_CNTL 0x9bf 29 #define mmMC_ARB_RET_CREDITS2 0x9c0 30 #define mmMC_ARB_FED_CNTL 0x9c1 31 #define mmMC_ARB_GECC2_STATUS 0x9c2 32 #define mmMC_ARB_GECC2_MISC 0x9c3 33 #define mmMC_ARB_GECC2_DEBUG 0x9c4 34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5 35 #define mmMC_ARB_PERF_CID 0x9c6 36 #define mmMC_ARB_GECC2 0x9c9 [all …]
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H A D | gmc_8_1_d.h | 27 #define mmMC_CONFIG 0x800 28 #define mmMC_ARB_ATOMIC 0x9be 29 #define mmMC_ARB_AGE_CNTL 0x9bf 30 #define mmMC_ARB_RET_CREDITS2 0x9c0 31 #define mmMC_ARB_FED_CNTL 0x9c1 32 #define mmMC_ARB_GECC2_STATUS 0x9c2 33 #define mmMC_ARB_GECC2_MISC 0x9c3 34 #define mmMC_ARB_GECC2_DEBUG 0x9c4 35 #define mmMC_ARB_GECC2_DEBUG2 0x9c5 36 #define mmMC_ARB_PERF_CID 0x9c6 [all …]
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/linux/drivers/net/wireless/broadcom/b43/ |
H A D | phy_ht.c | 22 HT_RSSI_W1 = 0, 42 b43_radio_write(dev, 0x16, e->radio_syn16); in b43_radio_2059_channel_setup() 43 b43_radio_write(dev, 0x17, e->radio_syn17); in b43_radio_2059_channel_setup() 44 b43_radio_write(dev, 0x22, e->radio_syn22); in b43_radio_2059_channel_setup() 45 b43_radio_write(dev, 0x25, e->radio_syn25); in b43_radio_2059_channel_setup() 46 b43_radio_write(dev, 0x27, e->radio_syn27); in b43_radio_2059_channel_setup() 47 b43_radio_write(dev, 0x28, e->radio_syn28); in b43_radio_2059_channel_setup() 48 b43_radio_write(dev, 0x29, e->radio_syn29); in b43_radio_2059_channel_setup() 49 b43_radio_write(dev, 0x2c, e->radio_syn2c); in b43_radio_2059_channel_setup() 50 b43_radio_write(dev, 0x2d, e->radio_syn2d); in b43_radio_2059_channel_setup() [all …]
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/linux/drivers/media/i2c/ |
H A D | rj54n1cb0c.c | 24 #define RJ54N1_DEV_CODE 0x0400 25 #define RJ54N1_DEV_CODE2 0x0401 26 #define RJ54N1_OUT_SEL 0x0403 27 #define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404 28 #define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405 29 #define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406 30 #define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407 31 #define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408 32 #define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409 33 #define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 cpu0: cpu@0 { 99 reg = <0x0 0x0>; 100 clocks = <&cpufreq_hw 0>; 107 qcom,freq-domain = <&cpufreq_hw 0>; 109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 115 cache-size = <0x20000>; 121 cache-size = <0x400000>; [all …]
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