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/linux/arch/arm/mach-omap2/
H A Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
H A Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
H A Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dsata-uctl.txt30 reg = <0x11800 0x6c000000 0x0 0x100>;
38 reg = <0x16c00 0x00000000 0x0 0x200>;
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi.yaml51 <bank-number> 0 <address of the bank> <size>
58 "^.*@[0-4],[a-f0-9]+$":
82 reg = <0x58002000 0x1000>;
86 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
87 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
88 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
89 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
90 <4 0 0x80000000 0x10000000>; /* NAND */
92 psram@0,0 {
94 reg = <0 0x00000000 0x100000>;
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip07.dtsi23 #size-cells = <0>;
270 reg = <0x10000>;
273 numa-node-id = <0>;
279 reg = <0x10001>;
282 numa-node-id = <0>;
288 reg = <0x10002>;
291 numa-node-id = <0>;
297 reg = <0x10003>;
300 numa-node-id = <0>;
306 reg = <0x10100>;
[all …]
/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852b_table.c10 {0x704, 0x601E0100},
11 {0x4000, 0x00000000},
12 {0x4004, 0xCA014000},
13 {0x4008, 0xC751D4F0},
14 {0x400C, 0x44511475},
15 {0x4010, 0x00000000},
16 {0x4014, 0x00000000},
17 {0x4018, 0x4F4C084B},
18 {0x401C, 0x084A4E52},
19 {0x4020, 0x4D504E4B},
[all …]
H A Drtw8852a_table.c10 {0xF0FF0001, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03500FF, 0x00000002},
13 {0xF03200FF, 0x00000003},
14 {0xF03400FF, 0x00000004},
15 {0xF03600FF, 0x00000005},
16 {0x704, 0x601E0100},
17 {0x714, 0x00000000},
18 {0x718, 0x13332333},
19 {0x714, 0x00010000},
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]