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/linux/arch/arm/boot/dts/aspeed/
H A Dopenbmc-flash-layout.dtsi8 u-boot@0 {
9 reg = <0x0 0x60000>;
14 reg = <0x60000 0x20000>;
19 reg = <0x80000 0x440000>;
24 reg = <0x4c0000 0x1740000>;
29 reg = <0x1c00000 0x400000>;
H A Dfacebook-bmc-flash-layout.dtsi9 u-boot@0 {
10 reg = <0x0 0x60000>;
15 reg = <0x60000 0x20000>;
20 reg = <0x80000 0x1b80000>;
29 reg = <0x1c00000 0x400000>;
38 flash0@0 {
39 reg = <0x0 0x2000000>;
H A Daspeed-bmc-opp-mowgli.dts18 reg = <0x80000000 0x20000000>;
28 reg = <0x98000000 0x04000000>; /* 64M */
32 size = <0x01000000>;
33 alignment = <0x01000000>;
39 size = <0x02000000>;
40 alignment = <0x01000000>;
69 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
70 linux,code = <ASPEED_GPIO(Z, 0)>;
121 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
139 gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
[all …]
H A Daspeed-bmc-opp-witherspoon.dts17 reg = <0x80000000 0x20000000>;
27 reg = <0x98000000 0x04000000>; /* 64M */
33 reg = <0x9f000000 0x01000000>; /* 16M */
37 size = <0x01000000>;
38 alignment = <0x01000000>;
44 size = <0x02000000>; /* 32MM */
45 alignment = <0x01000000>;
74 gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
75 linux,code = <ASPEED_GPIO(N, 0)>;
119 gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
[all …]
H A Daspeed-bmc-opp-swift.dts17 reg = <0x80000000 0x20000000>;
27 reg = <0x98000000 0x04000000>; /* 64M */
31 size = <0x01000000>;
32 alignment = <0x01000000>;
61 gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
62 linux,code = <ASPEED_GPIO(N, 0)>;
73 gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
74 linux,code = <ASPEED_GPIO(I, 0)>;
148 gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
190 gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-linkstation.dtsi61 m25p40@0 {
65 reg = <0>;
67 mode = <0>;
69 partition@0 {
70 reg = <0x0 0x60000>;
76 reg = <0x60000 0x10000>;
82 reg = <0x70000 0x10000>;
91 pinctrl-0 = <&pmx_button_function &pmx_power_switch
115 pinctrl-0 = <&pmx_led_function_red &pmx_led_alarm
128 #size-cells = <0>;
[all …]
H A Dkirkwood-lsxl.dtsi80 m25p40@0 {
84 reg = <0>;
86 mode = <0>;
88 partition@0 {
89 reg = <0x0 0x60000>;
95 reg = <0x60000 0x10000>;
101 reg = <0x70000 0x10000>;
110 pinctrl-0 = <&pmx_button_function &pmx_power_switch
135 pinctrl-0 = <&pmx_led_function_red &pmx_led_alarm
169 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629-rfb.dts41 reg = <0x40000000 0x10000000>;
65 pinctrl-0 = <&eth_pins>;
69 gmac0: mac@0 {
71 reg = <0>;
89 #size-cells = <0>;
91 phy0: ethernet-phy@0 {
92 reg = <0>;
99 pinctrl-0 = <&i2c_pins>;
105 pinctrl-0 = <&qspi_pins>;
108 flash@0 {
[all …]
/linux/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000/
H A Dnfp_xpb.h14 #define NFP_XPB_OVERLAY(island) (((island) & 0x3f) << 24)
16 #define NFP_XPB_ISLAND(island) (NFP_XPB_OVERLAY(island) + 0x60000)
18 #define NFP_XPB_ISLAND_of(offset) (((offset) >> 24) & 0x3F)
25 (((device) & 0x3f) << 16))
/linux/drivers/net/wireless/ath/ath10k/
H A Dahb.h34 #define ATH10K_GCC_REG_BASE 0x1800000
35 #define ATH10K_GCC_REG_SIZE 0x60000
37 #define ATH10K_TCSR_REG_BASE 0x1900000
38 #define ATH10K_TCSR_REG_SIZE 0x80000
40 #define ATH10K_AHB_GCC_FEPLL_PLL_DIV 0x2f020
41 #define ATH10K_AHB_WIFI_SCRATCH_5_REG 0x4f014
43 #define ATH10K_AHB_WLAN_CORE_ID_REG 0x82030
45 #define ATH10K_AHB_TCSR_WIFI0_GLB_CFG 0x49000
46 #define ATH10K_AHB_TCSR_WIFI1_GLB_CFG 0x49004
49 #define ATH10K_AHB_TCSR_WCSS0_HALTREQ 0x52000
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Didt,3243x-emac.yaml62 reg = <0x60000 0x10000>,
63 <0x40000 0x14>,
64 <0x40014 0x14>;
68 interrupts = <0>, <1>;
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-ipq4019.yaml48 reg = <0x1800000 0x60000>;
/linux/arch/arm/boot/dts/st/
H A Dspear600-evb.dts17 reg = <0 0x10000000>;
55 reg = <0xf8000000 0x800000>;
63 partition@0 {
65 reg = <0x0 0x10000>;
69 reg = <0x10000 0x50000>;
73 reg = <0x60000 0x10000>;
77 reg = <0x70000 0x10000>;
81 reg = <0x80000 0x310000>;
85 reg = <0x390000 0x0>;
/linux/arch/powerpc/boot/dts/
H A Dmpc8308rdb.dts26 #size-cells = <0>;
28 PowerPC,8308@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
43 reg = <0x00000000 0x08000000>; // 128MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
57 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
H A Dmpc8308_p1m.dts25 #size-cells = <0>;
27 PowerPC,8308@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; // from bootloader
42 reg = <0x00000000 0x08000000>; // 128MB at 0
49 reg = <0xe0005000 0x1000>;
50 interrupts = <77 0x8>;
53 ranges = <0x0 0x0 0xfc000000 0x04000000
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,vic.yaml45 represents single interrupt source, starting from source 0 at
75 reg = <0x60000 0x1000>;
77 valid-mask = <0xffffff7f>;
78 valid-wakeup-mask = <0x0000ff7f>;
/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-bman-portals.dtsi14 bman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
26 reg = <0x10000 0x4000>, <0x4010000 0x4000>;
32 reg = <0x20000 0x4000>, <0x4020000 0x4000>;
38 reg = <0x30000 0x4000>, <0x4030000 0x4000>;
44 reg = <0x40000 0x4000>, <0x4040000 0x4000>;
50 reg = <0x50000 0x4000>, <0x4050000 0x4000>;
56 reg = <0x60000 0x4000>, <0x4060000 0x4000>;
62 reg = <0x70000 0x4000>, <0x4070000 0x4000>;
68 reg = <0x80000 0x4000>, <0x4080000 0x4000>;
[all …]
H A Dqoriq-fman3-0.dtsi14 cell-index = <0>;
16 ranges = <0x0 0x0 0x1a00000 0xfe000>;
17 reg = <0x0 0x1a00000 0x0 0xfe000>;
20 clocks = <&clockgen QORIQ_CLK_FMAN 0>;
22 fsl,qman-channel-range = <0x800 0x10>;
26 muram@0 {
28 reg = <0x0 0x60000>;
32 cell-index = <0x2>;
34 reg = <0x82000 0x1000>;
38 cell-index = <0x3>;
[all …]
H A Dqoriq-qman-portals.dtsi14 qportal0: qman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
22 cell-index = <0>;
27 reg = <0x10000 0x4000>, <0x4010000 0x4000>;
34 reg = <0x20000 0x4000>, <0x4020000 0x4000>;
41 reg = <0x30000 0x4000>, <0x4030000 0x4000>;
48 reg = <0x40000 0x4000>, <0x4040000 0x4000>;
55 reg = <0x50000 0x4000>, <0x4050000 0x4000>;
62 reg = <0x60000 0x4000>, <0x4060000 0x4000>;
69 reg = <0x70000 0x4000>, <0x4070000 0x4000>;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dtny_a9260_common.dtsi14 reg = <0x20000000 0x4000000>;
30 timer@0 {
32 reg = <0>, <1>;
51 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
55 reg = <0x3 0x0 0x800000>;
68 at91bootstrap@0 {
70 reg = <0x0 0x20000>;
75 reg = <0x20000 0x40000>;
80 reg = <0x60000 0x20000>;
85 reg = <0x80000 0x20000>;
[all …]
H A Dtny_a9263.dts19 reg = <0x20000000 0x4000000>;
39 timer@0 {
41 reg = <0>, <1>;
61 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
65 reg = <0x3 0x0 0x800000>;
78 at91bootstrap@0 {
80 reg = <0x0 0x20000>;
85 reg = <0x20000 0x40000>;
90 reg = <0x60000 0x20000>;
95 reg = <0x80000 0x20000>;
[all …]
H A Dusb_a9260_common.dtsi26 timer@0 {
28 reg = <0>, <1>;
53 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
57 reg = <0x3 0x0 0x800000>;
70 at91bootstrap@0 {
72 reg = <0x0 0x20000>;
77 reg = <0x20000 0x40000>;
82 reg = <0x60000 0x20000>;
87 reg = <0x80000 0x20000>;
92 reg = <0xa0000 0x20000>;
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Db4860si-post.dtsi37 /* controller at 0x200000 */
64 dcsr-epu@0 {
79 reg = <0x13000 0x1000>;
96 reg = <0x108000 0x1000 0x109000 0x1000>;
101 reg = <0x110000 0x1000 0x111000 0x1000>;
106 reg = <0x118000 0x1000 0x119000 0x1000>;
113 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
114 interrupts = <133 2 0 0>;
118 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
119 interrupts = <135 2 0 0>;
[all …]
/linux/arch/parisc/boot/compressed/
H A Dvmlinux.lds.S10 OUTPUT_ARCH(hppa:hppa2.0w)
17 /* palo loads at 0x60000 */
18 /* loaded kernel will move to 0x10000 */
19 . = 0xe0000; /* should not overwrite palo code */
27 /* keep __gp below 0x1000000 */
88 .note 0 : { *(.note) }

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