Searched +full:0 +full:x586 (Results 1 – 3 of 3) sorted by relevance
160 reg = <0xfd45a000 0x6000>;167 iommus = <&apps_smmu 0x584 0x0011>,168 <&apps_smmu 0x586 0x0011>,169 <&apps_smmu 0x594 0x0011>,170 <&apps_smmu 0x596 0x0011>;
38 #define CR0_PE 0x00000001 /* Protected mode Enable */39 #define CR0_MP 0x00000002 /* "Math" (fpu) Present */40 #define CR0_EM 0x00000004 /* EMulate FPU instructions. (trap ESC only) */41 #define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */42 #define CR0_PG 0x80000000 /* PaGing enable */47 #define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */48 #define CR0_WP 0x00010000 /* Write Protect (honor page protect in50 #define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */51 #define CR0_NW 0x20000000 /* Not Write-through */52 #define CR0_CD 0x40000000 /* Cache Disable */[all …]
80 #clock-cells = <0>;88 #clock-cells = <0>;94 #size-cells = <0>;96 CPU0: cpu@0 {99 reg = <0x0 0x0>;100 clocks = <&cpufreq_hw 0>;107 qcom,freq-domain = <&cpufreq_hw 0>;109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,115 cache-size = <0x20000>;121 cache-size = <0x400000>;[all …]