Searched +full:0 +full:x580000 (Results 1 – 11 of 11) sorted by relevance
16 #size-cells = <0>;18 spi_nand: flash@0 {20 reg = <0>;30 partition@0 {32 reg = <0x0 0x100000>;38 reg = <0x100000 0x280000>;43 reg = <0x380000 0x200000>;49 reg = <0x580000 0x7a80000>;
91 reg = <0x580000 0x16080>;
30 reg = <0x580000 0x14000>;83 cpu@0 {
11 #define LSIO_PWM_0_LPCG 0x0000012 #define LSIO_PWM_1_LPCG 0x1000013 #define LSIO_PWM_2_LPCG 0x2000014 #define LSIO_PWM_3_LPCG 0x3000015 #define LSIO_PWM_4_LPCG 0x4000016 #define LSIO_PWM_5_LPCG 0x5000017 #define LSIO_PWM_6_LPCG 0x6000018 #define LSIO_PWM_7_LPCG 0x7000019 #define LSIO_GPIO_0_LPCG 0x8000020 #define LSIO_GPIO_1_LPCG 0x90000[all …]
22 #define mmDMA4_CORE_CFG_0 0x58000024 #define mmDMA4_CORE_CFG_1 0x58000426 #define mmDMA4_CORE_LBW_MAX_OUTSTAND 0x58000828 #define mmDMA4_CORE_SRC_BASE_LO 0x58001430 #define mmDMA4_CORE_SRC_BASE_HI 0x58001832 #define mmDMA4_CORE_DST_BASE_LO 0x58001C34 #define mmDMA4_CORE_DST_BASE_HI 0x58002036 #define mmDMA4_CORE_SRC_TSIZE_1 0x58002C38 #define mmDMA4_CORE_SRC_STRIDE_1 0x58003040 #define mmDMA4_CORE_SRC_TSIZE_2 0x580034[all …]
18 0.H----- USB HOST020 0.D-----037 const: 053 "^usb-phy@[0|1]$":64 const: 085 reg = <0x580000 0x2000>;88 #size-cells = <0>;90 cp0_utmi0: usb-phy@0 {91 reg = <0>;92 #phy-cells = <0>;[all …]
13 #define NIC_PF_CFG (0x0000)14 #define NIC_PF_STATUS (0x0010)15 #define NIC_PF_INTR_TIMER_CFG (0x0030)16 #define NIC_PF_BIST_STATUS (0x0040)17 #define NIC_PF_SOFT_RESET (0x0050)18 #define NIC_PF_TCP_TIMER (0x0060)19 #define NIC_PF_BP_CFG (0x0080)20 #define NIC_PF_RRM_CFG (0x0088)21 #define NIC_PF_CQM_CFG (0x00A0)22 #define NIC_PF_CNM_CF (0x00A8)[all …]
33 #size-cells = <0>;35 PowerPC,8560@0 {37 reg = <0>;40 d-cache-size = <0x8000>; /* L1, 32K */41 i-cache-size = <0x8000>; /* L1, 32K */42 timebase-frequency = <0>; /* From U-boot */43 bus-frequency = <0>; /* From U-boot */44 clock-frequency = <0>; /* From U-boot */51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */58 ranges = <0x00000000 0xfdf00000 0x00100000>;[all …]
55 led-0 {74 tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;194 reg = <0xc>;198 reg = <0xd>;202 reg = <0xe>;206 reg = <0xf>;210 reg = <0x1c>;214 reg = <0x1d>;218 reg = <0x1e>;222 reg = <0x1f>;[all …]
22 cpu@0 {29 reg = <0x80000000 0x10000000>; /* 256 MB */34 pinctrl-0 = <&guardian_button_pins>;54 pinctrl-0 = <&guardian_led_pins>;73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;87 hsync-active = <0>;88 vsync-active = <0>;93 ac-bias-intrpt = <0>;97 fdd = <0x80>;98 sync-edge = <0>;[all …]
14 reg = <0x00000000 0x04000000>,15 <0x08000000 0x04000000>;20 reg = <0x10210000 0x1000>;37 reg = <0x101e2000 0x1000>;46 reg = <0x101e3000 0x1000>;55 reg = <0x101e4000 0x80>;62 gpio-bank = <0>;63 gpio-ranges = <&pinctrl 0 0 32>;69 reg = <0x101e5000 0x80>;77 gpio-ranges = <&pinctrl 0 32 32>;[all …]