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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-nand.dtso16 #size-cells = <0>;
18 spi_nand: flash@0 {
20 reg = <0>;
30 partition@0 {
32 reg = <0x0 0x100000>;
38 reg = <0x100000 0x280000>;
43 reg = <0x380000 0x200000>;
49 reg = <0x580000 0x7a80000>;
H A Dmt7986a-acelink-ew-7886cax.dts23 reg = <0 0x40000000 0 0x20000000>;
40 led-0 {
82 #size-cells = <0>;
98 flash@0 {
100 reg = <0>;
112 partition@0 {
113 reg = <0x0 0x100000>;
119 reg = <0x100000 0x80000>;
125 reg = <0x180000 0x200000>;
134 eeprom: eeprom@0 {
[all …]
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,msm8953.yaml91 reg = <0x580000 0x16080>;
H A Dinterconnect.txt30 reg = <0x580000 0x14000>;
83 cpu@0 {
/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Ddma4_core_regs.h22 #define mmDMA4_CORE_CFG_0 0x580000
24 #define mmDMA4_CORE_CFG_1 0x580004
26 #define mmDMA4_CORE_LBW_MAX_OUTSTAND 0x580008
28 #define mmDMA4_CORE_SRC_BASE_LO 0x580014
30 #define mmDMA4_CORE_SRC_BASE_HI 0x580018
32 #define mmDMA4_CORE_DST_BASE_LO 0x58001C
34 #define mmDMA4_CORE_DST_BASE_HI 0x580020
36 #define mmDMA4_CORE_SRC_TSIZE_1 0x58002C
38 #define mmDMA4_CORE_SRC_STRIDE_1 0x580030
40 #define mmDMA4_CORE_SRC_TSIZE_2 0x580034
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dmarvell,armada-cp110-utmi-phy.yaml18 0.H----- USB HOST0
20 0.D-----0
37 const: 0
53 "^usb-phy@[0|1]$":
64 const: 0
85 reg = <0x580000 0x2000>;
88 #size-cells = <0>;
90 cp0_utmi0: usb-phy@0 {
91 reg = <0>;
92 #phy-cells = <0>;
[all …]
/linux/drivers/net/ethernet/cavium/thunder/
H A Dnic_reg.h13 #define NIC_PF_CFG (0x0000)
14 #define NIC_PF_STATUS (0x0010)
15 #define NIC_PF_INTR_TIMER_CFG (0x0030)
16 #define NIC_PF_BIST_STATUS (0x0040)
17 #define NIC_PF_SOFT_RESET (0x0050)
18 #define NIC_PF_TCP_TIMER (0x0060)
19 #define NIC_PF_BP_CFG (0x0080)
20 #define NIC_PF_RRM_CFG (0x0088)
21 #define NIC_PF_CQM_CFG (0x00A0)
22 #define NIC_PF_CNM_CF (0x00A8)
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-wedge400.dts62 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
75 #size-cells = <0>;
83 tpm@0 {
86 reg = <0>;
104 flash1@0 {
105 reg = <0x0 0x8000000>;
114 pinctrl-0 = <&pinctrl_txd2_default
121 pinctrl-0 = <&pinctrl_txd4_default
126 * I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC
145 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a-ten64.dts55 led-0 {
74 tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
178 reg = <0xc>;
182 reg = <0xd>;
186 reg = <0xe>;
190 reg = <0xf>;
194 reg = <0x1c>;
198 reg = <0x1d>;
202 reg = <0x1e>;
206 reg = <0x1f>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dksi8560.dts33 #size-cells = <0>;
35 PowerPC,8560@0 {
37 reg = <0>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
43 bus-frequency = <0>; /* From U-boot */
44 clock-frequency = <0>; /* From U-boot */
51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
58 ranges = <0x00000000 0xfdf00000 0x00100000>;
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-cp11x.dtsi29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
58 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60 CP11X_LABEL(ethernet): ethernet@0 {
62 #size-cells = <0>;
64 reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
74 CP11X_LABEL(eth0): ethernet-port@0 {
88 reg = <0>;
89 port-id = <0>; /* For backward compatibility. */
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-guardian.dts22 cpu@0 {
29 reg = <0x80000000 0x10000000>; /* 256 MB */
34 pinctrl-0 = <&guardian_button_pins>;
54 pinctrl-0 = <&guardian_led_pins>;
73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
87 hsync-active = <0>;
88 vsync-active = <0>;
93 ac-bias-intrpt = <0>;
97 fdd = <0x80>;
98 sync-edge = <0>;
[all …]
/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi14 reg = <0x00000000 0x04000000>,
15 <0x08000000 0x04000000>;
20 reg = <0x10210000 0x1000>;
37 reg = <0x101e2000 0x1000>;
46 reg = <0x101e3000 0x1000>;
55 reg = <0x101e4000 0x80>;
62 gpio-bank = <0>;
63 gpio-ranges = <&pinctrl 0 0 32>;
69 reg = <0x101e5000 0x80>;
77 gpio-ranges = <&pinctrl 0 32 32>;
[all …]
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-hdmi.c25 /* REG: 0x00 */
26 #define RK3228_PRE_PLL_REFCLK_SEL_PCLK BIT(0)
27 /* REG: 0x01 */
30 #define RK3228_BYPASS_PLLPD_EN BIT(0)
31 /* REG: 0x02 */
33 #define RK3228_PDATAEN_DISABLE BIT(0)
34 /* REG: 0x03 */
36 #define RK3228_AUTO_TERM_RES_CAL_SPEED_14_8(x) UPDATE(x, 6, 0)
37 /* REG: 0x04 */
38 #define RK3228_AUTO_TERM_RES_CAL_SPEED_7_0(x) UPDATE(x, 7, 0)
[all …]
/linux/drivers/phy/microchip/
H A Dsparx5_serdes.c31 #define SPX5_SERDES_QUIET_MODE_VAL 0x01ef4e0c
34 SPX5_SD10G28_CMU_MAIN = 0,
353 .cfg_en_adv = 0,
355 .cfg_en_dly = 0,
356 .cfg_tap_adv_3_0 = 0,
358 .cfg_tap_dly_4_0 = 0,
359 .cfg_eq_c_force_3_0 = 0xf,
368 .cfg_tap_adv_3_0 = 0,
370 .cfg_tap_dly_4_0 = 0x10,
371 .cfg_eq_c_force_3_0 = 0xf,
[all …]