/linux/Documentation/devicetree/bindings/cache/ |
H A D | qcom,llcc.yaml | 310 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, 311 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, 312 <0 0x01300000 0 0x50000>;
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/linux/drivers/clk/imx/ |
H A D | clk-imx8qxp-lpcg.h | 11 #define LSIO_PWM_0_LPCG 0x00000 12 #define LSIO_PWM_1_LPCG 0x10000 13 #define LSIO_PWM_2_LPCG 0x20000 14 #define LSIO_PWM_3_LPCG 0x30000 15 #define LSIO_PWM_4_LPCG 0x40000 16 #define LSIO_PWM_5_LPCG 0x50000 17 #define LSIO_PWM_6_LPCG 0x60000 18 #define LSIO_PWM_7_LPCG 0x70000 19 #define LSIO_GPIO_0_LPCG 0x80000 20 #define LSIO_GPIO_1_LPCG 0x90000 [all …]
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/linux/Documentation/devicetree/bindings/firmware/ |
H A D | nvidia,tegra186-bpmp.yaml | 148 reg = <0x03c00000 0xa0000>; 156 reg = <0x30000000 0x50000>; 159 ranges = <0x0 0x30000000 0x50000>; 162 reg = <0x4e000 0x1000>; 168 reg = <0x4f000 0x1000>; 192 #size-cells = <0>;
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc8280xp-el2.dtso | 23 iommu-map = <0 &pcie_smmu 0x20000 0x10000>; 27 iommu-map = <0 &pcie_smmu 0x30000 0x10000>; 31 iommu-map = <0 &pcie_smmu 0x40000 0x10000>; 35 iommu-map = <0 &pcie_smmu 0x50000 0x10000>; 39 iommu-map = <0 &pcie_smmu 0x60000 0x10000>;
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/linux/arch/arm/mach-orion5x/ |
H A D | orion5x.h | 36 #define ORION5X_REGS_PHYS_BASE 0xf1000000 37 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000) 40 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 41 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 44 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 45 #define ORION5X_PCI_IO_BUS_BASE 0x00010000 48 #define ORION5X_SRAM_PHYS_BASE (0xf2200000) 52 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 53 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) 56 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 [all …]
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/linux/drivers/crypto/ |
H A D | geode-aes.h | 9 #define AES_MODE_ECB 0 12 #define AES_DIR_DECRYPT 0 15 #define AES_FLAGS_HIDDENKEY (1 << 0) 19 #define AES_CTRLA_REG 0x0000 21 #define AES_CTRL_START 0x01 22 #define AES_CTRL_DECRYPT 0x00 23 #define AES_CTRL_ENCRYPT 0x02 24 #define AES_CTRL_WRKEY 0x04 25 #define AES_CTRL_DCA 0x08 26 #define AES_CTRL_SCA 0x10 [all …]
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/linux/arch/mips/boot/dts/ralink/ |
H A D | rt3052_eval.dts | 10 memory@0 { 12 reg = <0x0 0x2000000>; 21 reg = <0x1f000000 0x800000>; 28 partition@0 { 30 reg = <0x0 0x30000>; 35 reg = <0x30000 0x10000>; 40 reg = <0x40000 0x10000>; 45 reg = <0x50000 0x7b0000>;
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H A D | mt7621-gnubee-gb-pc1.dts | 13 memory@0 { 15 reg = <0x00000000 0x1c000000>, 16 <0x20000000 0x04000000>; 57 flash@0 { 61 reg = <0>; 65 partition@0 { 67 reg = <0x0 0x30000>; 73 reg = <0x30000 0x10000>; 79 reg = <0x40000 0x10000>; 85 reg = <0x50000 0x1fb0000>; [all …]
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H A D | mt7621-gnubee-gb-pc2.dts | 13 memory@0 { 15 reg = <0x00000000 0x1c000000>, 16 <0x20000000 0x04000000>; 77 flash@0 { 81 reg = <0>; 85 partition@0 { 87 reg = <0x0 0x30000>; 93 reg = <0x30000 0x10000>; 99 reg = <0x40000 0x10000>; 105 reg = <0x50000 0x1fb0000>; [all …]
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/linux/arch/arm/mach-mmp/ |
H A D | addr-map.h | 15 #define APB_PHYS_BASE 0xd4000000 16 #define APB_VIRT_BASE IOMEM(0xfe000000) 17 #define APB_PHYS_SIZE 0x00200000 19 #define AXI_PHYS_BASE 0xd4200000 20 #define AXI_VIRT_BASE IOMEM(0xfe200000) 21 #define AXI_PHYS_SIZE 0x00200000 23 #define PGU_PHYS_BASE 0xe0000000 24 #define PGU_VIRT_BASE IOMEM(0xfe400000) 25 #define PGU_PHYS_SIZE 0x00100000 27 /* Static Memory Controller - Chip Select 0 and 1 */ [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | amlogic,a4-spisg.yaml | 52 reg = <0x50000 0x38>; 58 #size-cells = <0>;
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/linux/arch/arm/boot/dts/st/ |
H A D | spear600-evb.dts | 17 reg = <0 0x10000000>; 55 reg = <0xf8000000 0x800000>; 63 partition@0 { 65 reg = <0x0 0x10000>; 69 reg = <0x10000 0x50000>; 73 reg = <0x60000 0x10000>; 77 reg = <0x70000 0x10000>; 81 reg = <0x80000 0x310000>; 85 reg = <0x390000 0x0>;
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H A D | spear310-evb.dts | 18 reg = <0 0x40000000>; 24 pinctrl-0 = <&state_default>; 102 reg = <0xf8000000 0x800000>; 105 partition@0 { 107 reg = <0x0 0x10000>; 111 reg = <0x10000 0x50000>; 115 reg = <0x60000 0x10000>; 119 reg = <0x70000 0x10000>; 123 reg = <0x80000 0x310000>; 127 reg = <0x390000 0x0>; [all …]
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H A D | spear320-evb.dts | 18 reg = <0 0x40000000>; 25 pinctrl-0 = <&state_default>; 103 reg = <0xf8000000 0x800000>; 106 partition@0 { 108 reg = <0x0 0x10000>; 112 reg = <0x10000 0x50000>; 116 reg = <0x60000 0x10000>; 120 reg = <0x70000 0x10000>; 124 reg = <0x80000 0x310000>; 128 reg = <0x390000 0x0>; [all …]
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H A D | spear300-evb.dts | 18 reg = <0 0x40000000>; 25 pinctrl-0 = <&state_default>; 77 cd-gpios = <&gpio1 0 0>; 88 reg = <0xf8000000 0x800000>; 91 partition@0 { 93 reg = <0x0 0x10000>; 97 reg = <0x10000 0x50000>; 101 reg = <0x60000 0x10000>; 105 reg = <0x70000 0x10000>; 109 reg = <0x80000 0x310000>; [all …]
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/linux/include/uapi/linux/genwqe/ |
H A D | genwqe_card.h | 36 #define GENWQE_TYPE_ALTERA_230 0x00 /* GenWQE4 Stratix-IV-230 */ 37 #define GENWQE_TYPE_ALTERA_530 0x01 /* GenWQE4 Stratix-IV-530 */ 38 #define GENWQE_TYPE_ALTERA_A4 0x02 /* GenWQE5 A4 Stratix-V-A4 */ 39 #define GENWQE_TYPE_ALTERA_A7 0x03 /* GenWQE5 A7 Stratix-V-A7 */ 43 #define GENWQE_SLU_OFFS GENWQE_UID_OFFS(0) 49 #define IO_EXTENDED_ERROR_POINTER 0x00000048 50 #define IO_ERROR_INJECT_SELECTOR 0x00000060 51 #define IO_EXTENDED_DIAG_SELECTOR 0x00000070 52 #define IO_EXTENDED_DIAG_READ_MBX 0x00000078 53 #define IO_EXTENDED_DIAG_MAP(ring) (0x00000500 | ((ring) << 3)) [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | qoriq-bman-portals.dtsi | 14 bman-portal@0 { 20 reg = <0x0 0x4000>, <0x4000000 0x4000>; 26 reg = <0x10000 0x4000>, <0x4010000 0x4000>; 32 reg = <0x20000 0x4000>, <0x4020000 0x4000>; 38 reg = <0x30000 0x4000>, <0x4030000 0x4000>; 44 reg = <0x40000 0x4000>, <0x4040000 0x4000>; 50 reg = <0x50000 0x4000>, <0x4050000 0x4000>; 56 reg = <0x60000 0x4000>, <0x4060000 0x4000>; 62 reg = <0x70000 0x4000>, <0x4070000 0x4000>; 68 reg = <0x80000 0x4000>, <0x4080000 0x4000>; [all …]
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H A D | qoriq-qman-portals.dtsi | 14 qportal0: qman-portal@0 { 20 reg = <0x0 0x4000>, <0x4000000 0x4000>; 22 cell-index = <0>; 27 reg = <0x10000 0x4000>, <0x4010000 0x4000>; 34 reg = <0x20000 0x4000>, <0x4020000 0x4000>; 41 reg = <0x30000 0x4000>, <0x4030000 0x4000>; 48 reg = <0x40000 0x4000>, <0x4040000 0x4000>; 55 reg = <0x50000 0x4000>, <0x4050000 0x4000>; 62 reg = <0x60000 0x4000>, <0x4060000 0x4000>; 69 reg = <0x70000 0x4000>, <0x4070000 0x4000>; [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | b4860si-post.dtsi | 37 /* controller at 0x200000 */ 64 dcsr-epu@0 { 79 reg = <0x13000 0x1000>; 96 reg = <0x108000 0x1000 0x109000 0x1000>; 101 reg = <0x110000 0x1000 0x111000 0x1000>; 106 reg = <0x118000 0x1000 0x119000 0x1000>; 113 reg = <0x38000 0x4000>, <0x100e000 0x1000>; 114 interrupts = <133 2 0 0>; 118 reg = <0x3c000 0x4000>, <0x100f000 0x1000>; 119 interrupts = <135 2 0 0>; [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | at91rm9200ek.dts | 19 reg = <0x20000000 0x4000000>; 35 timer@0 { 37 reg = <0>, <1>; 63 pinctrl-0 = 75 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>; 76 flash@0 { 79 reg = <0>; 99 reg = <0x10000000 0x800000>; 100 linux,mtd-name = "physmap-flash.0"; 105 barebox@0 { [all …]
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | ti,am62-usb.yaml | 62 "^usb@[0-9a-f]+$": 88 reg = <0x00 0x0f910000 0x00 0x800>, 89 <0x00 0x0f918000 0x00 0x400>; 92 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; 99 reg = <0x00 0x31100000 0x00 0x50000>; 100 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ 101 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
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/linux/Documentation/devicetree/bindings/access-controllers/ |
H A D | access-controllers.yaml | 66 reg = <0x50000 0x400>; 71 reg = <0x60000 0x10000>; 78 reg = <0x60100 0x400>;
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/linux/arch/arm/mach-mv78xx0/ |
H A D | mv78xx0.h | 17 * f0800000 PCIe #0 I/O space 29 * fee00000 f0800000 64K PCIe #0 I/O space 39 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 40 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 41 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000) 42 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 45 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) 48 #define MV78XX0_REGS_PHYS_BASE 0xf1000000 49 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000) 52 #define MV78XX0_SRAM_PHYS_BASE (0xf2200000) [all …]
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/linux/arch/arm/mach-dove/ |
H A D | dove.h | 14 * e0000000 @runtime 128M PCIe-0 Memory space 18 * f2000000 fee00000 1M PCIe-0 I/O space 22 #define DOVE_CESA_PHYS_BASE 0xc8000000 23 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000) 26 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000 29 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000 32 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000 35 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000 36 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000) 39 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000 [all …]
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/linux/drivers/soc/tegra/cbb/ |
H A D | tegra234-cbb.c | 8 * Error types supported by CBB2.0 are: 27 #define FABRIC_EN_CFG_INTERRUPT_ENABLE_0_0 0x0 28 #define FABRIC_EN_CFG_STATUS_0_0 0x40 29 #define FABRIC_EN_CFG_ADDR_INDEX_0_0 0x60 30 #define FABRIC_EN_CFG_ADDR_LOW_0 0x80 31 #define FABRIC_EN_CFG_ADDR_HI_0 0x84 33 #define FABRIC_EN_CFG_TARGET_NODE_ADDR_INDEX_0_0 0x100 34 #define FABRIC_EN_CFG_TARGET_NODE_ADDR_LOW_0 0x140 35 #define FABRIC_EN_CFG_TARGET_NODE_ADDR_HI_0 0x144 37 #define FABRIC_MN_INITIATOR_ERR_EN_0 0x200 [all …]
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