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Searched +full:0 +full:x4845b000 (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra72x.dtsi27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
29 reg = <0x5b000 0x4>,
30 <0x5b010 0x4>;
36 clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
40 ranges = <0x0 0x5b000 0x1000>;
42 cal: cal@0 {
44 reg = <0x0000 0x400>,
45 <0x0800 0x40>,
46 <0x0900 0x40>;
51 ti,camerrx-control = <&scm_conf 0xE94>;
[all …]
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dti,cal.yaml25 # for DRA72 controllers pre ES2.0
75 port@0:
78 description: 'CSI2 Port #0'
112 - port@0
129 reg = <0x4845B000 0x400>,
130 <0x4845B800 0x40>,
131 <0x4845B900 0x40>;
136 ti,camerrx-control = <&scm_conf 0xE94>;
140 #size-cells = <0>;
142 csi2_0: port@0 {
[all …]