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/linux/arch/arm/mach-omap2/
H A Dti81xx.h11 #define L4_SLOW_TI81XX_BASE 0x48000000
13 #define TI81XX_SCM_BASE 0x48140000
15 #define TI81XX_PRCM_BASE 0x48180000
19 * TI81XX register for checking device ID (it adds 0x204 to tap base while
20 * TI81XX DEVICE ID register is at offset 0x600 from control base).
23 TI81XX_CONTROL_DEVICE_ID - 0x204)
26 #define TI81XX_ARM_INTC_BASE 0x48200000
H A Domap44xx.h17 #define L4_44XX_BASE 0x4a000000
18 #define L4_WK_44XX_BASE 0x4a300000
19 #define L4_PER_44XX_BASE 0x48000000
20 #define L4_EMU_44XX_BASE 0x54000000
21 #define L3_44XX_BASE 0x44000000
22 #define OMAP44XX_EMIF1_BASE 0x4c000000
23 #define OMAP44XX_EMIF2_BASE 0x4d000000
24 #define OMAP44XX_DMM_BASE 0x4e000000
25 #define OMAP4430_32KSYNCT_BASE 0x4a304000
26 #define OMAP4430_CM1_BASE 0x4a004000
[all …]
H A Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dti,omap-intc-irq.yaml48 reg = <0x48200000 0x1000>;
/linux/arch/arm/mach-sa1100/
H A Djornada720.c43 #define TUCR_VAL 0x20000400
46 #define SA1111REGSTART 0x40000000
47 #define SA1111REGLEN 0x00002000
48 #define EPSONREGSTART 0x48000000
49 #define EPSONREGLEN 0x00100000
50 #define EPSONFBSTART 0x48200000
56 {0x0001,0x00}, // Miscellaneous Register
57 {0x01FC,0x00}, // Display Mode Register
58 {0x0004,0x00}, // General IO Pins Configuration Register 0
59 {0x0005,0x00}, // General IO Pins Configuration Register 1
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx.dtsi47 #size-cells = <0>;
48 cpu: cpu@0 {
52 reg = <0>;
87 opp-supported-hw = <0x06 0x0010>;
95 opp-supported-hw = <0x01 0x00FF>;
103 opp-supported-hw = <0x06 0x0020>;
111 opp-supported-hw = <0x01 0xFFFF>;
118 opp-supported-hw = <0x06 0x0040>;
125 opp-supported-hw = <0x01 0xFFFF>;
132 opp-supported-hw = <0x06 0x0080>;
[all …]
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]