| /linux/drivers/gpu/drm/radeon/ |
| H A D | sumo_dpm.h | 42 #define SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE (1 << 0)
138 #define SUMO_UTC_DFLT_00 0x48
139 #define SUMO_UTC_DFLT_01 0x44
140 #define SUMO_UTC_DFLT_02 0x44
141 #define SUMO_UTC_DFLT_03 0x44
142 #define SUMO_UTC_DFLT_04 0x44
143 #define SUMO_UTC_DFLT_05 0x44
144 #define SUMO_UTC_DFLT_06 0x44
145 #define SUMO_UTC_DFLT_07 0x44
146 #define SUMO_UTC_DFLT_08 0x44
[all …]
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| /linux/drivers/video/fbdev/sis/ |
| H A D | oem310.h | 55 0x00,0x00,0x00, /* 800x600 */
56 0x0b,0x0b,0x0b, /* 1024x768 */
57 0x08,0x08,0x08, /* 1280x1024 */
58 0x00,0x00,0x00, /* 640x480 (unknown) */
59 0x00,0x00,0x00, /* 1024x600 (unknown) */
60 0x00,0x00,0x00, /* 1152x864 (unknown) */
61 0x08,0x08,0x08, /* 1280x960 (guessed) */
62 0x00,0x00,0x00, /* 1152x768 (unknown) */
63 0x08,0x08,0x08, /* 1400x1050 */
64 0x08,0x08,0x08, /* 1280x768 (guessed) */
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/amdzen5/ |
| H A D | load-store.json | 4 "EventCode": "0x24",
6 "UMask": "0x02"
10 "EventCode": "0x25",
12 "UMask": "0x01"
16 "EventCode": "0x26",
21 "EventCode": "0x27",
26 "EventCode": "0x29",
28 "UMask": "0x01"
32 "EventCode": "0x29",
34 "UMask": "0x02"
[all …]
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| /linux/drivers/mfd/ |
| H A D | rt5120.c | 14 #define RT5120_REG_INTENABLE 0x1D
15 #define RT5120_REG_INTSTAT 0x1E
16 #define RT5120_REG_FZCMODE 0x44
18 #define RT5120_INT_HOTDIE 0
23 regmap_reg_range(0x03, 0x13),
24 regmap_reg_range(0x1c, 0x20),
25 regmap_reg_range(0x44, 0x44),
29 regmap_reg_range(0x06, 0x13),
30 regmap_reg_range(0x1c, 0x20),
31 regmap_reg_range(0x44, 0x44),
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/amdzen6/ |
| H A D | load-store.json | 4 "EventCode": "0x24",
6 "UMask": "0x02"
10 "EventCode": "0x25",
12 "UMask": "0x01"
16 "EventCode": "0x25",
18 "UMask": "0x1f"
22 "EventCode": "0x26",
27 "EventCode": "0x27",
32 "EventCode": "0x29",
34 "UMask": "0x01"
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/amdzen3/ |
| H A D | recommended.json | 11 "EventCode": "0x29",
13 "UMask": "0x07"
23 "EventCode": "0x60",
25 "UMask": "0x10"
29 "EventCode": "0x60",
31 "UMask": "0xe8"
47 "EventCode": "0x64",
49 "UMask": "0x01"
53 "EventCode": "0x64",
55 "UMask": "0x08"
[all …]
|
| H A D | memory.json | 4 "EventCode": "0x24",
7 "UMask": "0x02"
11 "EventCode": "0x25",
13 "UMask": "0x08"
17 "EventCode": "0x25",
19 "UMask": "0x04"
23 "EventCode": "0x25",
25 "UMask": "0x02"
29 "EventCode": "0x25",
31 "UMask": "0x01"
[all …]
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| /linux/net/mac80211/tests/ |
| H A D | util.c | 72 .mac_cap_info[0] =
85 .phy_cap_info[0] =
107 .rx_mcs_80 = cpu_to_le16(0xfffa),
108 .tx_mcs_80 = cpu_to_le16(0xfffa),
109 .rx_mcs_160 = cpu_to_le16(0xfffa),
110 .tx_mcs_160 = cpu_to_le16(0xfffa),
111 .rx_mcs_80p80 = cpu_to_le16(0xfffa),
112 .tx_mcs_80p80 = cpu_to_le16(0xfffa),
118 .mac_cap_info[0] =
122 .phy_cap_info[0] =
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/amdzen4/ |
| H A D | cache.json | 4 "EventCode": "0x41",
6 "UMask": "0x3f"
10 "EventCode": "0x41",
12 "UMask": "0x40"
16 "EventCode": "0x41",
18 "UMask": "0x7f"
22 "EventCode": "0x43",
24 "UMask": "0x01"
28 "EventCode": "0x43",
30 "UMask": "0x02"
[all …]
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| /linux/net/core/ |
| H A D | ptp_classifier.c | 16 * jneq #0x800, test_ipv6 ; ETH_P_IP ?
20 * jset #0x1fff, drop_ipv4 ; don't allow fragments
21 * ldxb 4*([14]&0xf) ; load IP header len
25 * and #0xf ; mask PTP_CLASS_VMASK
26 * or #0x10 ; PTP_CLASS_IPV4
28 * drop_ipv4: ret #0x0 ; PTP_CLASS_NONE
32 * jneq #0x86dd, test_8021q ; ETH_P_IPV6 ?
38 * and #0xf ; mask PTP_CLASS_VMASK
39 * or #0x20 ; PTP_CLASS_IPV6
41 * drop_ipv6: ret #0x0 ; PTP_CLASS_NONE
[all …]
|
| /linux/Documentation/hwmon/ |
| H A D | ltc4215.rst | 10 Addresses scanned: 0x44
33 Example: the following will load the driver for an LTC4215 at address 0x44
34 on I2C bus #0::
37 $ echo ltc4215 0x44 > /sys/bus/i2c/devices/i2c-0/new_device
|
| /linux/drivers/clk/socfpga/ |
| H A D | clk-agilex5.c | 215 .flags = 0,
216 .offset = 0x0,
223 .flags = 0,
224 .offset = 0x48,
231 .flags = 0,
232 .offset = 0x9C,
238 { AGILEX5_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0,
239 0x5C },
240 { AGILEX5_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0,
241 0x60 },
[all …]
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| /linux/net/wireless/tests/ |
| H A D | scan.c | 131 { .id = 0x1, .len = 0, },
132 { .id = WLAN_EID_EXTENSION, .len = 1, .eid = 0x10 },
137 { .id = 0x1, .len = 0, },
138 { .id = WLAN_EID_EXTENSION, .len = 1, .eid = 0x10 },
146 { .id = 0x1, .len = 0, },
147 { .id = WLAN_EID_EXTENSION, .len = 1, .eid = 0x10 },
150 { .id = 0x1, .len = 0, },
151 { .id = WLAN_EID_EXTENSION, .len = 1, .eid = 0x10 },
157 { .id = WLAN_EID_EXTENSION, .len = 0 },
160 { .id = WLAN_EID_EXTENSION, .len = 0 },
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/bonnell/ |
| H A D | cache.json | 4 "Counter": "0,1",
5 "EventCode": "0x40",
8 "UMask": "0xa3"
12 "Counter": "0,1",
13 "EventCode": "0x40",
16 "UMask": "0x83"
20 "Counter": "0,1",
21 "EventCode": "0x40",
24 "UMask": "0x10"
28 "Counter": "0,1",
[all …]
|
| /linux/sound/ppc/ |
| H A D | burgundy.h | 12 #define MASK_ADDR_BURGUNDY_INPBOOST (0x10 << 12)
13 #define MASK_ADDR_BURGUNDY_INPSEL21 (0x11 << 12)
14 #define MASK_ADDR_BURGUNDY_INPSEL3 (0x12 << 12)
16 #define MASK_ADDR_BURGUNDY_GAINCH1 (0x13 << 12)
17 #define MASK_ADDR_BURGUNDY_GAINCH2 (0x14 << 12)
18 #define MASK_ADDR_BURGUNDY_GAINCH3 (0x15 << 12)
19 #define MASK_ADDR_BURGUNDY_GAINCH4 (0x16 << 12)
21 #define MASK_ADDR_BURGUNDY_VOLCH1 (0x20 << 12)
22 #define MASK_ADDR_BURGUNDY_VOLCH2 (0x21 << 12)
23 #define MASK_ADDR_BURGUNDY_VOLCH3 (0x22 << 12)
[all …]
|
| /linux/drivers/ata/ |
| H A D | pata_hpt3x3.c | 43 pci_read_config_dword(pdev, 0x44, &r1); in hpt3x3_set_piomode()
44 pci_read_config_dword(pdev, 0x48, &r2); in hpt3x3_set_piomode()
48 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */ in hpt3x3_set_piomode()
50 pci_write_config_dword(pdev, 0x44, r1); in hpt3x3_set_piomode()
51 pci_write_config_dword(pdev, 0x48, r2); in hpt3x3_set_piomode()
63 * 0x44 : bit 0-2 master mode, 3-5 slave mode, etc
64 * 0x48 : bit 4/0 DMA/UDMA bit 5/1 for slave etc
72 int mode_num = adev->dma_mode & 0x0F; in hpt3x3_set_dmamode()
74 pci_read_config_dword(pdev, 0x44, &r1); in hpt3x3_set_dmamode()
75 pci_read_config_dword(pdev, 0x48, &r2); in hpt3x3_set_dmamode()
[all …]
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| /linux/drivers/gpu/drm/exynos/ |
| H A D | exynos_hdmi.c | 54 #define HDMI_MAPPED_BASE 0xffff0000
162 0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,
163 0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
164 0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
165 0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x80,
171 0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,
172 0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
173 0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
174 0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x80,
180 0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xef, 0x5B,
[all …]
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| /linux/lib/crypto/tests/ |
| H A D | blake2b-testvecs.h | 9 .data_len = 0,
11 0x78, 0x6a, 0x02, 0xf7, 0x42, 0x01, 0x59, 0x03,
12 0xc6, 0xc6, 0xfd, 0x85, 0x25, 0x52, 0xd2, 0x72,
13 0x91, 0x2f, 0x47, 0x40, 0xe1, 0x58, 0x47, 0x61,
14 0x8a, 0x86, 0xe2, 0x17, 0xf7, 0x1f, 0x54, 0x19,
15 0xd2, 0x5e, 0x10, 0x31, 0xaf, 0xee, 0x58, 0x53,
16 0x13, 0x89, 0x64, 0x44, 0x93, 0x4e, 0xb0, 0x4b,
17 0x90, 0x3a, 0x68, 0x5b, 0x14, 0x48, 0xb7, 0x55,
18 0xd5, 0x6f, 0x70, 0x1a, 0xfe, 0x9b, 0xe2, 0xce,
24 0x6f, 0x2e, 0xcc, 0x83, 0x53, 0xa3, 0x20, 0x16,
[all …]
|
| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | iqs62x.yaml | 64 #size-cells = <0>;
68 reg = <0x44>;
100 #size-cells = <0>;
104 reg = <0x44>;
113 linux,keycodes = <0>,
114 <0>,
115 <0>,
116 <0>,
117 <0>,
118 <0>,
[all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-data-modul-edm-sbc.dts | 28 reg = <0x0 0x40000000 0 0x40000000>;
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
37 enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
38 pwms = <&pwm1 0 5000000 0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
65 pinctrl-0 = <&pinctrl_panel_vcc_reg>;
69 gpio = <&gpio3 6 0>;
78 pinctrl-0 = <&pinctrl_usdhc2_vcc_reg>;
[all …]
|
| /linux/drivers/scsi/aic7xxx/ |
| H A D | aic79xx_seq.h_shipped | 9 0xff, 0x02, 0x06, 0x78,
10 0x00, 0xea, 0x6e, 0x59,
11 0x01, 0xea, 0x04, 0x30,
12 0xff, 0x04, 0x0c, 0x78,
13 0x19, 0xea, 0x6e, 0x59,
14 0x19, 0xea, 0x04, 0x00,
15 0x33, 0xea, 0x68, 0x59,
16 0x33, 0xea, 0x00, 0x00,
17 0x60, 0x3a, 0x3a, 0x68,
18 0x04, 0x4d, 0x35, 0x78,
[all …]
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| /linux/drivers/media/usb/gspca/ |
| H A D | conex.c | 53 .priv = 0},
69 usb_rcvctrlpipe(dev, 0), in reg_r()
70 0, in reg_r()
72 0, in reg_r()
76 index, gspca_dev->usb_buf[0]); in reg_r()
86 gspca_dev->usb_buf[0] = val; in reg_w_val()
88 usb_sndctrlpipe(dev, 0), in reg_w_val()
89 0, in reg_w_val()
91 0, in reg_w_val()
111 usb_sndctrlpipe(dev, 0), in reg_w()
[all …]
|
| H A D | pac7311.c | 14 * 0x08 Unknown compressor related, must always be 8 except when not
16 * 0x1b Auto white balance related, bit 0 is AWB enable (inverted)
18 * 0x78 Global control, bit 6 controls the LED (inverted)
19 * 0x80 Compression balance, interesting settings:
20 * 0x01 Use this to allow the camera to switch to higher compr.
22 * 0x1c From usb captures under Windows for 640x480
23 * 0x2a Values >= this switch the camera to a lower compression,
29 * 0x3f From usb captures under Windows for 320x240
30 * 0x69 From usb captures under Windows for 160x120
35 * 0x02 Clock divider 2-63, fps =~ 60 / val. Must be a multiple of 3 on
[all …]
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| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | test_tc_peer.c | 16 static const __u8 src_mac[] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
17 static const __u8 dst_mac[] = {0x00, 0x22, 0x33, 0x44, 0x55, 0x66};
28 return bpf_redirect_peer(IFINDEX_SRC, 0); in tc_dst()
34 return bpf_redirect_peer(IFINDEX_DST, 0); in tc_src()
40 return bpf_redirect(IFINDEX_SRC, 0); in tc_dst_l3()
48 if (bpf_skb_change_head(skb, ETH_HLEN, 0) != 0) in tc_src_l3()
51 if (bpf_skb_store_bytes(skb, 0, &src_mac, ETH_ALEN, 0) != 0) in tc_src_l3()
54 if (bpf_skb_store_bytes(skb, ETH_ALEN, &dst_mac, ETH_ALEN, 0) != 0) in tc_src_l3()
57 if (bpf_skb_store_bytes(skb, ETH_ALEN + ETH_ALEN, &proto, sizeof(__u16), 0) != 0) in tc_src_l3()
60 return bpf_redirect_peer(IFINDEX_DST, 0); in tc_src_l3()
|
| /linux/arch/arm/include/asm/hardware/ |
| H A D | ioc.h | 24 #define IOC_CONTROL (0x00)
25 #define IOC_KARTTX (0x04)
26 #define IOC_KARTRX (0x04)
28 #define IOC_IRQSTATA (0x10)
29 #define IOC_IRQREQA (0x14)
30 #define IOC_IRQCLRA (0x14)
31 #define IOC_IRQMASKA (0x18)
33 #define IOC_IRQSTATB (0x20)
34 #define IOC_IRQREQB (0x24)
35 #define IOC_IRQMASKB (0x28)
[all …]
|