/freebsd/sys/contrib/device-tree/Bindings/i2c/ |
H A D | xlnx,xps-iic-2.00.a.yaml | 56 reg = < 0x40800000 0x10000 >; 58 #size-cells = <0>;
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/freebsd/contrib/arm-optimized-routines/math/aarch64/experimental/ |
H A D | atanhf_3u1.c | 13 #define AbsMask 0x7fffffff 14 #define Half 0x3f000000 15 #define One 0x3f800000 16 #define Four 0x40800000 17 #define Ln2 0x1.62e43p-1f 18 /* asuint(0x1p-12), below which atanhf(x) rounds to x. */ 19 #define TinyBound 0x39800000 27 float p_12 = fmaf (m, C (1), C (0)); in eval_poly() 49 int k = (asuint (m) - 0x3f400000) & 0xff800000; in log1pf_inline() 53 float scale_back = (float) k * 0x1.0p-23f; in log1pf_inline() [all …]
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/freebsd/contrib/arm-optimized-routines/math/aarch64/sve/ |
H A D | sv_log1pf_inline.h | 12 #define SignExponentMask 0xff800000 24 .c0 = 0x1.5555aap-2f, .c1 = -0x1.000038p-2f, .c2 = 0x1.99675cp-3f, 25 .c3 = -0x1.54ef78p-3f, .c4 = 0x1.28a1f4p-3f, .c5 = -0x1.0da91p-3f, 26 .c6 = 0x1.abcb6p-4f, .c7 = -0x1.6f0d5ep-5f, .ln2 = 0x1.62e43p-1f, 27 .exp_bias = 0x1p-23f, .quarter = 0x1p-2f, .four = 0x40800000, 28 .three_quarters = 0x3f400000, 65 svfloat32_t p01 = svmla_lane_f32 (sv_f32 (d->c0), m_scale, c1357, 0); in sv_log1pf_inline() 80 return svmla_lane_f32 (p, scale_back, fconst, 0); in sv_log1pf_inline()
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/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/ |
H A D | v_log1pf_inline.h | 27 .c0 = 0x1.5555aap-2f, .c1 = V4 (-0x1.000038p-2f), \ 28 .c2 = V4 (0x1.99675cp-3f), .c3 = -0x1.54ef78p-3f, \ 29 .c4 = V4 (0x1.28a1f4p-3f), .c5 = -0x1.0da91p-3f, \ 30 .c6 = V4 (0x1.abcb6p-4f), .c7 = -0x1.6f0d5ep-5f, \ 31 .ln2 = V4 (0x1.62e43p-1f), .four = V4 (0x40800000), \ 32 .three_quarters = V4 (0x3f400000) \ 40 float32x4_t q = vfmaq_laneq_f32 (v_f32 (-0.5), m, c0357, 0); in eval_poly() 71 v_s32 (0xff800000)); in log1pf_inline() 88 float32x4_t scale_back = vmulq_f32 (vcvtq_f32_s32 (k), v_f32 (0x1.0p-23f)); in log1pf_inline()
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
H A D | ti,omap-remoteproc.yaml | 235 reg = <0x98000000 0x800000>; 244 ti,bootreg = <&scm_conf 0x304 0>; 250 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; 251 resets = <&prm_tesla 0>, <&prm_tesla 1>; 268 reg = <0 0x95800000 0 0x380000 [all...] |
/freebsd/lib/msun/src/ |
H A D | s_erff.c | 26 erx = 8.42697144e-01, /* 0x3f57bb00 */ 28 * In the domain [0, 2**-14], only the first term in the power series 32 efx = 1.28379166e-01, /* 0x3e0375d4 */ 33 efx8= 1.02703333e+00, /* 0x3f8375d4 */ 35 * Domain [0, 0.84375], range ~[-5.4419e-10, 5.5179e-10]: 38 pp0 = 1.28379166e-01, /* 0x3e0375d4 */ 39 pp1 = -3.36030394e-01, /* 0xbeac0c2d */ 40 pp2 = -1.86261395e-03, /* 0xbaf422f4 */ 41 qq1 = 3.12324315e-01, /* 0x3e9fe8f9 */ 42 qq2 = 2.16070414e-02, /* 0x3cb10140 */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx7ulp.dtsi | 38 #size-cells = <0>; 43 reg = <0xf00>; 51 reg = <0x40021000 0x1000>, 52 <0x40022000 0x1000>; 59 #clock-cells = <0>; 66 #clock-cells = <0>; 73 #clock-cells = <0>; 80 #clock-cells = <0>; [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3588-extra.dtsi | 12 reg = <0x0 0xfc400000 0x0 0x400000>; 13 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0>; 32 reg = <0x0 0xfd5b8000 0x0 0x10000>; 37 reg = <0x0 0xfd5c0000 0x0 0x100>; 42 reg = <0x0 0xfd5cc000 0x0 0x4000>; 47 reg = <0x0 0xfd5d4000 0x0 0x4000>; 53 reg = <0x4000 0x10>; 54 #clock-cells = <0>; 58 interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>; 64 #phy-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am65-mcu.dtsi | 13 ranges = <0x0 0x0 0x40f00000 0x20000>; 17 reg = <0x200 0x8>; 22 reg = <0x4040 0x4>; 30 reg = <0x0 0x40f04200 0x0 0x10>; 33 pinctrl-single,function-mask = <0x00000101>; 39 reg = <0x0 0x40f04280 0x0 0x8>; 42 pinctrl-single,function-mask = <0x00000003>; 47 reg = <0x00 0x40a00000 0x00 0x100>; 56 reg = <0x00 0x41c00000 0x00 0x80000>; 57 ranges = <0x0 0x00 0x41c00000 0x80000>; [all …]
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H A D | k3-j721e-mcu-wakeup.dtsi | 19 reg = <0x00 0x44083000 0x0 0x1000>; 41 ranges = <0x0 0x0 0x40f00000 0x20000>; 45 reg = <0x200 0x8>; 50 reg = <0x4040 0x4>; 59 ranges = <0x0 0x00 0x43000000 0x20000>; 63 reg = <0x14 0x4>; 69 /* Proxy 0 addressing */ 70 reg = <0x00 0x4301c000 0x00 0x178>; 73 pinctrl-single,function-mask = <0xffffffff>; 79 reg = <0x00 0x40f04200 0x00 0x28>; [all …]
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H A D | k3-j7200-mcu-wakeup.dtsi | 19 reg = <0x00 0x44083000 0x00 0x1000>; 40 reg = <0x00 0x40400000 0x00 0x400>; 53 reg = <0x00 0x40410000 0x00 0x400>; 57 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 308 0>; 66 reg = <0x00 0x40420000 0x00 0x400>; 79 reg = <0x00 0x40430000 0x00 0x400>; 83 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 309 0>; 92 reg = <0x00 0x40440000 0x00 0x400>; 105 reg = <0x00 0x40450000 0x00 0x400>; 109 assigned-clocks = <&k3_clks 75 1>, <&k3_clks 310 0>; [all …]
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H A D | k3-j784s4-mcu-wakeup.dtsi | 20 reg = <0x00 0x44083000 0x00 0x1000>; 46 ranges = <0x0 0x00 0x43000000 0x20000>; 51 reg = <0x14 0x4>; 59 reg = <0x00 0x43600000 0x00 0x10000>, 60 <0x00 0x44880000 0x00 0x20000>, 61 <0x00 0x44860000 0x00 0x20000>; 72 reg = <0x00 0x41c00000 0x00 0x100000>; 73 ranges = <0x00 0x00 0x41c00000 0x100000>; 80 /* Proxy 0 addressing */ 81 reg = <0x00 0x4301c000 0x00 0x034>; [all …]
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H A D | k3-j721s2-mcu-wakeup.dtsi | 19 reg = <0x00 0x44083000 0x00 0x1000>; 41 ranges = <0x0 0x00 0x43000000 0x20000>; 45 reg = <0x14 0x4>; 53 reg = <0x00 0x43600000 0x00 0x10000>, 54 <0x00 0x44880000 0x00 0x20000>, 55 <0x00 0x44860000 0x00 0x20000>; 66 reg = <0x00 0x41c00000 0x00 0x100000>; 67 ranges = <0x00 0x00 0x41c00000 0x100000>; 74 /* Proxy 0 addressing */ 75 reg = <0x00 0x4301c000 0x00 0x034>; [all …]
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/freebsd/contrib/gdtoa/ |
H A D | gdtoaimp.h | 80 * for 0 <= k <= 22). 148 * preceded by 0x or 0X) and spaces; if there is only one string 160 * by FREE_DTOA_LOCK(n) for n = 0 or 1. (The second lock, accessed 270 #define Scale_Bit 0x10 298 #define word1(x) (x)->L[0] 300 #define word0(x) (x)->L[0] 307 * #define Storeinc(a,b,c) (*a++ = b << 16 | c & 0xffff) 311 ((unsigned short *)a)[0] = (unsigned short)c, a++) 313 #define Storeinc(a,b,c) (((unsigned short *)a)[0] = (unsigned short)b, \ 326 #define Exp_msk1 0x100000 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | ste-nomadik-stn8815.dtsi | 14 reg = <0x00000000 0x04000000>, 15 <0x08000000 0x04000000>; 20 reg = <0x10210000 0x1000>; 37 reg = <0x101e2000 0x1000>; 46 reg = <0x101e3000 0x100 [all...] |
/freebsd/sys/dev/rl/ |
H A D | if_rlreg.h | 36 #define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 37 #define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 38 #define RL_IDR2 0x0002 39 #define RL_IDR3 0x0003 40 #define RL_IDR4 0x0004 41 #define RL_IDR5 0x0005 43 #define RL_MAR0 0x0008 /* Multicast hash table */ 44 #define RL_MAR1 0x0009 45 #define RL_MAR2 0x000A 46 #define RL_MAR3 0x000B [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | dra7.dtsi | 61 reg = <0x0 0x48211000 0x0 0x1000>, 62 <0x0 0x48212000 0x0 0x2000>, 63 <0x0 0x48214000 0x0 0x2000>, 64 <0x0 0x48216000 0x0 0x2000>; 73 reg = <0x0 0x48281000 0x0 0x1000>; 79 #size-cells = <0>; 81 cpu0: cpu@0 { 84 reg = <0>; 109 opp-supported-hw = <0xFF 0x01>; 119 opp-supported-hw = <0xFF 0x02>; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonDepMask.h | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 17 0xf0000000, 18 0xb0000000, 19 0x0fe03fe0, 20 0 }, 23 0xffc00000, 24 0x76000000, 25 0x00203fe0, 26 0 }, 29 0xff800000, [all …]
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/freebsd/contrib/arm-optimized-routines/math/test/rtest/ |
H A D | dotest.c | 21 #if MPFR_VERSION < MPFR_VERSION_NUM(4, 2, 0) 102 uint32 exp = (hl >> 52) & 0x7ff; in set_mpfr_d() 105 if (exp == 0x7ff) { in set_mpfr_d() 106 if (mantissa == 0) in set_mpfr_d() 110 } else if (exp == 0 && mantissa == 0) { in set_mpfr_d() 111 mpfr_set_ui(x, 0, GMP_RNDN); in set_mpfr_d() 112 mpfr_setsign(x, x, sign < 0, GMP_RNDN); in set_mpfr_d() 114 if (exp != 0) in set_mpfr_d() 118 mpfr_set_sj_2exp(x, mantissa * sign, (int)exp - 0x3ff - 52, GMP_RNDN); in set_mpfr_d() 123 uint32 exp = (f >> 23) & 0xff; in set_mpfr_f() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 66 return VersionMajor >= 11 ? 10 : 0; in getVmcntBitShiftLo() 76 return VersionMajor >= 11 ? 0 : 4; in getExpcntBitShift() 97 return (VersionMajor == 9 || VersionMajor == 10) ? 2 : 0; in getVmcntBitWidthHi() 102 return VersionMajor >= 12 ? 6 : 0; in getLoadcntBitWidth() 107 return VersionMajor >= 12 ? 6 : 0; in getSamplecntBitWidth() 112 return VersionMajor >= 12 ? 3 : 0; in getBvhcntBitWidth() 117 return VersionMajor >= 12 ? 6 : 0; in getDscntBitWidth() 121 unsigned getDscntBitShift(unsigned VersionMajor) { return 0; } in getDscntBitShift() 125 return VersionMajor >= 10 ? 6 : 0; in getStorecntBitWidth() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFoldOperands.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 143 char SIFoldOperands::ID = 0; 251 unsigned SrcIdx = ~0; in tryFoldImmWithOpSel() 254 SrcIdx = 0; in tryFoldImmWithOpSel() 268 Fold.ImmToFold >> (ModVal & SISrcMods::OP_SEL_0 ? 16 : 0)); in tryFoldImmWithOpSel() 270 Fold.ImmToFold >> (ModVal & SISrcMods::OP_SEL_1 ? 16 : 0)); in tryFoldImmWithOpSel() 294 if (static_cast<int16_t>(Lo) < 0) { in tryFoldImmWithOpSel() 338 bool Clamp = MI->getOperand(ClampIdx).getImm() != 0; in tryFoldImmWithOpSel() 385 MachineOperand &Dst0 = MI->getOperand(0); in updateOperand() 409 for (unsigned I = MI->getNumOperands() - 1; I > 0; --I) in updateOperand() [all …]
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/freebsd/sys/dev/ispfw/ |
H A D | asm_2400.h | 33 0x0401f1be, 0x00112000, 0x00100000, 0x0000c79b, 34 0x00000008, 0x00000007, 0x00000000, 0x00009496, 35 0x00000003, 0x00000000, 0x20434f50, 0x59524947, 36 0x48542032, 0x30313720, 0x514c4f47, 0x49432043, 37 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 38 0x32347878, 0x20466972, 0x6d776172, 0x65202020, 39 0x56657273, 0x696f6e20, 0x2020382e, 0x30372e30, 40 0x30202024, 0x00000000, 0x00000000, 0x00000000, 41 0x00000000, 0x00000000, 0x00000000, 0x00000000, 42 0x00000000, 0x00000000, 0x00000000, 0x00000000, [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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/freebsd/sys/contrib/dev/rtw88/ |
H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201F [all...] |
/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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