| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | wasp_reg_map.h | 20 volatile char pad__0[0x4000]; /* 0x0 - 0x4000 */
21 volatile u_int32_t HOST_INTF_RESET_CONTROL; /* 0x4000 - 0x4004 */
22 volatile u_int32_t HOST_INTF_PM_CTRL; /* 0x4004 - 0x4008 */
23 volatile u_int32_t HOST_INTF_TIMEOUT; /* 0x4008 - 0x400c */
24 volatile u_int32_t HOST_INTF_SREV; /* 0x400c - 0x4010 */
25 volatile u_int32_t HOST_INTF_INTR_SYNC_CAUSE; /* 0x4010 - 0x4014 */
26 volatile u_int32_t HOST_INTF_INTR_SYNC_ENABLE; /* 0x4014 - 0x4018 */
27 volatile u_int32_t HOST_INTF_INTR_ASYNC_MASK; /* 0x4018 - 0x401c */
28 volatile u_int32_t HOST_INTF_INTR_SYNC_MASK; /* 0x401c - 0x4020 */
29 volatile u_int32_t HOST_INTF_INTR_ASYNC_CAUSE; /* 0x4020 - 0x4024 */
[all …]
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| H A D | ar9300eep.h | 33 #define AR_EEPROM_EEPCAP_COMPRESS_DIS 0x0001
34 #define AR_EEPROM_EEPCAP_AES_DIS 0x0002
35 #define AR_EEPROM_EEPCAP_FASTFRAME_DIS 0x0004
36 #define AR_EEPROM_EEPCAP_BURST_DIS 0x0008
37 #define AR_EEPROM_EEPCAP_MAXQCU 0x01F0
39 #define AR_EEPROM_EEPCAP_HEAVY_CLIP_EN 0x0200
40 #define AR_EEPROM_EEPCAP_KC_ENTRIES 0xF000
51 _compress_none = 0,
64 calibration_data_none = 0,
79 // Yes, the first one is 2. Do not use 0 or 1.
[all …]
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| H A D | osprey_reg_map.h | 86 volatile char pad__0[0x8]; /* 0x0 - 0x8 */
87 volatile u_int32_t MAC_DMA_CR; /* 0x8 - 0xc */
88 volatile char pad__1[0x8]; /* 0xc - 0x14 */
89 volatile u_int32_t MAC_DMA_CFG; /* 0x14 - 0x18 */
90 volatile u_int32_t MAC_DMA_RXBUFPTR_THRESH; /* 0x18 - 0x1c */
91 volatile u_int32_t MAC_DMA_TXDPPTR_THRESH; /* 0x1c - 0x20 */
92 volatile u_int32_t MAC_DMA_MIRT; /* 0x20 - 0x24 */
93 volatile u_int32_t MAC_DMA_GLOBAL_IER; /* 0x24 - 0x28 */
94 volatile u_int32_t MAC_DMA_TIMT; /* 0x28 - 0x2c */
95 volatile u_int32_t MAC_DMA_RIMT; /* 0x2c - 0x30 */
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/apple/ |
| H A D | apple,pmgr.yaml | 20 pattern: "^power-management@[0-9a-f]+$"
42 "power-controller@[0-9a-f]+$":
64 reg = <0x2 0x3b700000 0x0 0x14000>;
68 reg = <0x1c0 8>;
69 #power-domain-cells = <0>;
70 #reset-cells = <0>;
77 reg = <0x220 8>;
78 #power-domain-cells = <0>;
79 #reset-cells = <0>;
86 reg = <0x270 8>;
[all …]
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| /freebsd/sys/dev/ntb/ntb_hw/ |
| H A D | ntb_hw_intel.h | 42 * Params: [in] P = Bit position of start of the bit field (lsb is 0).
51 #define NTB_LINK_STATUS_ACTIVE 0x2000
52 #define NTB_LINK_SPEED_MASK 0x000f
53 #define NTB_LINK_WIDTH_MASK 0x03f0
67 #define XEON_SPCICMD_OFFSET 0x0504
68 #define XEON_DEVCTRL_OFFSET 0x0598
69 #define XEON_DEVSTS_OFFSET 0x059a
70 #define XEON_LINK_STATUS_OFFSET 0x01a2
71 #define XEON_SLINK_STATUS_OFFSET 0x05a2
73 #define XEON_PBAR2LMT_OFFSET 0x0000
[all …]
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| /freebsd/sys/dev/cas/ |
| H A D | if_casreg.h | 42 #define CAS_CAW 0x0004 /* core arbitration weight */
43 #define CAS_INF_BURST 0x0008 /* infinite burst enable */
44 #define CAS_STATUS 0x000c /* interrupt status */
45 #define CAS_INTMASK 0x0010 /* interrupt mask */
46 #define CAS_CLEAR_ALIAS 0x0014 /* clear mask alias */
47 #define CAS_STATUS_ALIAS 0x001c /* interrupt status alias */
48 #define CAS_ERROR_STATUS 0x1000 /* PCI error status */
49 #define CAS_ERROR_MASK 0x1004 /* PCI error mask */
50 #define CAS_BIM_CONF 0x1008 /* BIM configuration */
51 #define CAS_BIM_DIAG 0x100c /* BIM diagnostic */
[all …]
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| /freebsd/sys/arm/broadcom/bcm2835/ |
| H A D | bcm2838_pci.c | 55 #define PCI_ID_VAL3 0x43c
56 #define CLASS_SHIFT 0x10
57 #define SUBCLASS_SHIFT 0x8
59 #define REG_CONTROLLER_HW_REV 0x406c
60 #define REG_BRIDGE_CTRL 0x9210
61 #define BRIDGE_DISABLE_FLAG 0x1
62 #define BRIDGE_RESET_FLAG 0x2
63 #define REG_PCIE_HARD_DEBUG 0x4204
64 #define REG_DMA_CONFIG 0x4008
65 #define REG_DMA_WINDOW_LOW 0x4034
[all …]
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| /freebsd/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416reg.h | 27 #define AR_MIRT 0x0020 /* interrupt rate threshold */
28 #define AR_TIMT 0x0028 /* Tx Interrupt mitigation threshold */
29 #define AR_RIMT 0x002C /* Rx Interrupt mitigation threshold */
30 #define AR_GTXTO 0x0064 /* global transmit timeout */
31 #define AR_GTTM 0x0068 /* global transmit timeout mode */
32 #define AR_CST 0x006C /* carrier sense timeout */
33 #define AR_MAC_LED 0x1f04 /* LED control */
34 #define AR_WA 0x4004 /* PCIE work-arounds */
35 #define AR_PCIE_PM_CTRL 0x4014
36 #define AR_AHB_MODE 0x4024 /* AHB mode for dma */
[all …]
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| /freebsd/sys/dev/smartpqi/ |
| H A D | smartpqi_defines.h | 44 #define PQI_STATUS_SUCCESS 0
47 #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE 0
65 #define INVALID_ELEM 0xffff
78 #define INT_MAX 0x7FFFFFFF
87 (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
125 #define false 0
134 #define INTR_TYPE_NONE 0x0
135 #define INTR_TYPE_FIXED 0x1
136 #define INTR_TYPE_MSI 0x2
137 #define INTR_TYPE_MSIX 0x4
[all …]
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| /freebsd/sys/dev/bxe/ |
| H A D | 57712_int_offsets.h | 31 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE
32 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE
33 { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE
34 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE
35 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE
36 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE
37 { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE
38 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE
39 { 0x3d, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID
40 …{ 0x3c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVEN…
[all …]
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| H A D | 57711_int_offsets.h | 31 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE
32 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE
33 { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE
34 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE
35 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE
36 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE
37 { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE
38 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE
39 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID
40 …{ 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVEN…
[all …]
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| /freebsd/share/i18n/csmapper/CNS/ |
| H A D | UCS@BMP%CNS11643-4.src | 5 SRC_ZONE 0x3401 - 0x9F9E
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x3401 = 0x2224
48 0x340C = 0x2157
49 0x3416 = 0x2336
50 0x341C = 0x2835
51 0x342C = 0x2337
52 0x342D = 0x2534
53 0x3430 = 0x2159
[all …]
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| H A D | CNS11643-4%UCS@BMP.src | 5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_INVALID 0xFFFE
13 # Unicode version: 5.0.0
47 0x2122 = 0x4E40
48 0x2123 = 0x4E41
49 0x2124 = 0x4E5A
50 0x2126 = 0x4E02
51 0x2127 = 0x4E29
52 0x212A = 0x5202
53 0x212B = 0x353E
[all …]
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| H A D | CNS11643-7%UCS@SIP.src | 5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
13 # Unicode version: 5.0.0
47 0x2121 = 0x0055
48 0x2122 = 0x0182
49 0x2123 = 0x0189
50 0x2124 = 0x0187
51 0x2125 = 0x03BE
52 0x2126 = 0x03BD
53 0x2127 = 0x03CA
[all …]
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| H A D | UCS@SIP%CNS11643-7.src | 5 SRC_ZONE 0x0055 - 0xFA1D
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x0055 = 0x2121
48 0x0109 = 0x3673
49 0x010A = 0x4627
50 0x010B = 0x4D3A
51 0x011D = 0x2C3C
52 0x0182 = 0x2122
53 0x0186 = 0x2679
[all …]
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| H A D | UCS@BMP%CNS11643-3.src | 5 SRC_ZONE 0x3421 - 0x9FA5
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x3421 = 0x343B
48 0x3424 = 0x396D
49 0x3428 = 0x2741
50 0x3429 = 0x286C
51 0x342B = 0x2323
52 0x342E = 0x4034
53 0x3431 = 0x2175
[all …]
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| H A D | CNS11643-3%UCS@BMP.src | 5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_INVALID 0xFFFE
13 # Unicode version: 5.0.0
47 0x2121 = 0x4E28
48 0x2122 = 0x4E36
49 0x2123 = 0x4E3F
50 0x2124 = 0x4E85
51 0x2125 = 0x4E05
52 0x2126 = 0x4E04
53 0x2127 = 0x5182
[all …]
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| H A D | UCS@SIP%CNS11643-6.src | 5 SRC_ZONE 0x0003 - 0xFA17
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x0003 = 0x212F
48 0x0004 = 0x212D
49 0x0005 = 0x212E
50 0x0007 = 0x2142
51 0x0008 = 0x2143
52 0x0012 = 0x222B
53 0x0018 = 0x2340
[all …]
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| H A D | CNS11643-6%UCS@SIP.src | 5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
13 # Unicode version: 5.0.0
47 0x2121 = 0xF802
48 0x2122 = 0x0062
49 0x2124 = 0x0088
50 0x2125 = 0x00D0
51 0x2126 = 0x00CF
52 0x2127 = 0x011E
53 0x2128 = 0x011F
[all …]
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| /freebsd/share/i18n/csmapper/KS/ |
| H A D | KSC5601HANGUL%UCS.src | 5 SRC_ZONE 0x24-0x48 / 0x21-0x7E / 8
7 DST_INVALID 0xFFFE
50 # egrep '^0x' < KSC5601.TXT | \
51 # egrep -v '^0x([8-9]...|A0..|..[4-9].|..A0)' | perl tab.pl
55 # $n=0;
60 # printf ("0x%04X 0x%04X %s\n",$k-0x8080, $u,join(' ',@rest));
65 # in hex as 0xXXXX
66 # Column #2 : the Unicode (in hex as 0xXXXX)
74 # To get EUC Korean(EUC-KR) code points, add 0x8080.
76 # first subtract 0x2020. Then
[all …]
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| H A D | UCS%KSC5601HANGUL.src | 5 SRC_ZONE 0x3131 - 0xD79D
7 DST_INVALID 0xFFFF
50 # egrep '^0x' < KSC5601.TXT | \
51 # egrep -v '^0x([8-9]...|A0..|..[4-9].|..A0)' | perl tab.pl
55 # $n=0;
60 # printf ("0x%04X 0x%04X %s\n",$k-0x8080, $u,join(' ',@rest));
65 # in hex as 0xXXXX
66 # Column #2 : the Unicode (in hex as 0xXXXX)
74 # To get EUC Korean(EUC-KR) code points, add 0x8080.
76 # first subtract 0x2020. Then
[all …]
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| /freebsd/share/i18n/csmapper/JIS/ |
| H A D | UCS%JISX0212@MS.src | 5 SRC_ZONE 0x0000 - 0xFFFF
7 DST_INVALID 0xFFFF
11 0x0000 - 0xFFFF = INVALID
15 0x00A1 = 0x2242
16 0x00A4 = 0x2270
17 0x00A9 = 0x226D
18 0x00AA = 0x226C
19 0x00AE = 0x226E
20 0x00AF = 0x2234
21 0x00B8 = 0x2231
[all …]
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| H A D | JISX0212@MS%UCS.src | 5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
14 0x222F = 0x02D8
15 0x2230 = 0x02C7
16 0x2231 = 0x00B8
17 0x2232 = 0x02D9
18 0x2233 = 0x02DD
19 0x2234 = 0x00AF
20 0x2235 = 0x02DB
21 0x2236 = 0x02DA
[all …]
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| H A D | JISX0212%UCS.src | 5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
57 # Column #1 is the JIS X 0212 code (in hex as 0xXXXX)
58 # Column #2 is the Unicode (in hex as 0xXXXX)
73 # To change hex to EUC form, add 0x8080
74 # To change hex to kuten form, first subtract 0x2020. Then
76 # the kuten form. For example, 0x2121 -> 0x0101 -> 0101;
77 # 0x6D63 -> 0x4D43 -> 7767
88 # into a single character at 0x2922:
94 # the lowercase forms of these two elements at 0x2942 and 0x2943.
[all …]
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| H A D | UCS%JISX0212.src | 5 SRC_ZONE 0x0000 - 0x9FFF
7 DST_INVALID 0xFFFF
57 # Column #1 is the JIS X 0212 code (in hex as 0xXXXX)
58 # Column #2 is the Unicode (in hex as 0xXXXX)
73 # To change hex to EUC form, add 0x8080
74 # To change hex to kuten form, first subtract 0x2020. Then
76 # the kuten form. For example, 0x2121 -> 0x0101 -> 0101;
77 # 0x6D63 -> 0x4D43 -> 7767
88 # into a single character at 0x2922:
94 # the lowercase forms of these two elements at 0x2942 and 0x2943.
[all …]
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