Searched +full:0 +full:x40300000 (Results 1 – 14 of 14) sorted by relevance
/linux/Documentation/devicetree/bindings/pci/ |
H A D | qcom,pcie-sa8775p.yaml | 91 reg = <0x0 0x01c00000 0x0 0x3000>, 92 <0x0 0x40000000 0x0 0xf20>, 93 <0x0 0x40000f20 0x0 0xa8>, 94 <0x0 0x40001000 0x0 0x4000>, 95 <0x0 0x40100000 0x0 0x100000>, 96 <0x0 0x01c03000 0x0 0x1000>; 98 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, 99 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 101 bus-range = <0x00 0xff>; 103 linux,pci-domain = <0>; [all …]
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H A D | qcom,pcie-sc7280.yaml | 95 reg = <0 0x01c08000 0 0x3000>, 96 <0 0x40000000 0 0xf1d>, 97 <0 0x40000f20 0 0xa8>, 98 <0 0x40001000 0 0x1000>, 99 <0 0x40100000 0 0x100000>; 101 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, 102 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 104 bus-range = <0x00 0xff>; 156 interrupt-map-mask = <0 0 0 0x7>; 157 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, [all …]
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H A D | rockchip-dw-pcie-ep.yaml | 63 reg = <0xa 0x40000000 0x0 0x00100000>, 64 <0xa 0x40100000 0x0 0x00100000>, 65 <0x0 0xfe150000 0x0 0x00010000>, 66 <0x9 0x00000000 0x0 0x40000000>, 67 <0xa 0x40300000 0x0 0x00100000>; 75 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>, 76 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>, 77 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>, 78 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>, 79 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>, [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sa8540p.dtsi | 184 linux,pci-domain = <0>; 201 reg = <0x0 0x01c10000 0x0 0x3000>, 202 <0x0 0x40000000 0x0 0xf1d>, 203 <0x0 0x40000f20 0x0 0xa8>, 204 <0x0 0x40001000 0x0 0x1000>, 205 <0x0 0x40100000 0x0 0x100000>; 208 ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, 209 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1d00000>; 216 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>, 217 <0 0 0 2 &intc 0 0 GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>, [all …]
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H A D | sa8540p-ride.dts | 34 regulators-0 { 163 pinctrl-0 = <ðernet0_default>; 170 #size-cells = <0>; 174 compatible = "ethernet-phy-id0141.0dd4"; 175 reg = <0x8>; 189 /* Set MODE[2:0] to RGMII_SGMII */ 190 <0x12 0x14 0xfff8 0x4>, 191 /* Soft reset required after changing MODE[2:0] */ 192 <0x12 0x14 0x7fff 0x8000>; 202 snps,map-to-dma-channel = <0x0>; [all …]
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H A D | sa8775p.dtsi | 30 #clock-cells = <0>; 35 #clock-cells = <0>; 41 #size-cells = <0>; 43 cpu0: cpu@0 { 46 reg = <0x0 0x0>; 50 qcom,freq-domain = <&cpufreq_hw 0>; 70 reg = <0x0 0x100>; 74 qcom,freq-domain = <&cpufreq_hw 0>; 89 reg = <0x0 0x200>; 93 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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/linux/arch/arm64/boot/dts/arm/ |
H A D | corstone1000-fvp.dts | 18 reg = <0x40100000 0x10000>; 34 reg = <0x40300000 0x1000>; 44 reg = <0x50000000 0x10000>;
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/linux/include/linux/platform_data/ |
H A D | sh_mmcif.h | 31 u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */ 36 #define MMCIF_CE_CMD_SET 0x00000000 37 #define MMCIF_CE_ARG 0x00000008 38 #define MMCIF_CE_ARG_CMD12 0x0000000C 39 #define MMCIF_CE_CMD_CTRL 0x00000010 40 #define MMCIF_CE_BLOCK_SET 0x00000014 41 #define MMCIF_CE_CLK_CTRL 0x00000018 42 #define MMCIF_CE_BUF_ACC 0x0000001C 43 #define MMCIF_CE_RESP3 0x00000020 44 #define MMCIF_CE_RESP2 0x00000024 [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3588-extra.dtsi | 12 reg = <0x0 0xfc400000 0x0 0x400000>; 13 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0>; 32 reg = <0x0 0xfd5b8000 0x0 0x10000>; 37 reg = <0x0 0xfd5c0000 0x0 0x100>; 42 reg = <0x0 0xfd5cc000 0x0 0x4000>; 47 reg = <0x0 0xfd5d4000 0x0 0x4000>; 53 reg = <0x4000 0x10>; 54 #clock-cells = <0>; 58 interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>; 64 #phy-cells = <0>; [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am65-mcu.dtsi | 13 ranges = <0x0 0x0 0x40f00000 0x20000>; 17 reg = <0x200 0x8>; 22 reg = <0x4040 0x4>; 30 reg = <0x0 0x40f04200 0x0 0x10>; 33 pinctrl-single,function-mask = <0x00000101>; 39 reg = <0x0 0x40f04280 0x0 0x8>; 42 pinctrl-single,function-mask = <0x00000003>; 47 reg = <0x00 0x40a00000 0x00 0x100>; 56 reg = <0x00 0x41c00000 0x00 0x80000>; 57 ranges = <0x0 0x00 0x41c00000 0x80000>; [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am33xx.dtsi | 47 #size-cells = <0>; 48 cpu@0 { 52 reg = <0>; 87 opp-supported-hw = <0x06 0x0010>; 95 opp-supported-hw = <0x01 0x00FF>; 103 opp-supported-hw = <0x06 0x0020>; 111 opp-supported-hw = <0x01 0xFFFF>; 118 opp-supported-hw = <0x06 0x0040>; 125 opp-supported-hw = <0x01 0xFFFF>; 132 opp-supported-hw = <0x06 0x0080>; [all …]
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H A D | omap5.dtsi | 45 #size-cells = <0>; 47 cpu0: cpu@0 { 50 reg = <0x0>; 69 reg = <0x1>; 115 reg = <0 0x40300000 0 0x20000>; /* 128k */ 122 reg = <0 0x48211000 0 0x1000>, 123 <0 0x48212000 0 0x2000>, 124 <0 0x48214000 0 0x2000>, 125 <0 0x48216000 0 0x2000>; 133 reg = <0 0x48281000 0 0x1000>; [all …]
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H A D | am4372.dtsi | 20 memory@0 { 22 reg = <0 0>; 42 #size-cells = <0>; 43 cpu: cpu@0 { 47 reg = <0>; 77 opp-supported-hw = <0xFF 0x01>; 85 opp-supported-hw = <0xFF 0x04>; 92 opp-supported-hw = <0xFF 0x08>; 99 opp-supported-hw = <0xFF 0x10>; 106 opp-supported-hw = <0xFF 0x20>; [all …]
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/linux/drivers/net/wireless/realtek/rtw88/ |
H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
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