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/linux/arch/m68k/fpsp040/
H A Dstan.S27 | k = N mod 2, so in particular, k = 0 or 1.
62 BOUNDS1: .long 0x3FD78000,0x4004BC7E
63 TWOBYPI: .long 0x3FE45F30,0x6DC9C883
65 TANQ4: .long 0x3EA0B759,0xF50F8688
66 TANP3: .long 0xBEF2BAA5,0xA8924F04
68 TANQ3: .long 0xBF346F59,0xB39BA65F,0x00000000,0x00000000
70 TANP2: .long 0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000
72 TANQ2: .long 0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000
74 TANP1: .long 0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000
76 TANQ1: .long 0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000
[all …]
H A Dssin.S30 | 1. If SIN is invoked, set AdjN := 0; otherwise, set AdjN := 1.
35 | k = N mod 4, so in particular, k = 0,1,2,or 3. Overwrite
60 | k = N mod 4, so in particular, k = 0,1,2,or 3.
95 BOUNDS1: .long 0x3FD78000,0x4004BC7E
96 TWOBYPI: .long 0x3FE45F30,0x6DC9C883
98 SINA7: .long 0xBD6AAA77,0xCCC994F5
99 SINA6: .long 0x3DE61209,0x7AAE8DA1
101 SINA5: .long 0xBE5AE645,0x2A118AE4
102 SINA4: .long 0x3EC71DE3,0xA5341531
104 SINA3: .long 0xBF2A01A0,0x1A018B59,0x00000000,0x00000000
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dnxp,lpc1850-dwmac.yaml73 reg = <0x40010000 0x2000>;
H A Dsnps,dwc-qos-ethernet.txt125 - #size-cells: Must be <0>.
143 interrupts = <0x0 0x1e 0x4>;
144 reg = <0x40010000 0x4000>;
153 snps,burst-map = <0x7>;
160 #address-cells = <0x1>;
161 #size-cells = <0x0>;
165 reg = <0x1>;
/linux/arch/arm/boot/dts/st/
H A Dspear310.dtsi15 ranges = <0x40000000 0x40000000 0x10000000
16 0xb0000000 0xb0000000 0x10000000
17 0xd0000000 0xd0000000 0x30000000>;
21 reg = <0xb4000000 0x1000>;
29 reg = <0x44000000 0x1000 /* FSMC Register */
30 0x40000000 0x0010 /* NAND Base DATA */
31 0x40020000 0x0010 /* NAND Base ADDR */
32 0x40010000 0x0010>; /* NAND Base CMD */
39 reg = <0xb4000000 0x1000>;
49 ranges = <0xb0000000 0xb0000000 0x10000000
[all …]
H A Dstm32f746.dtsi54 #clock-cells = <0>;
56 clock-frequency = <0>;
60 #clock-cells = <0>;
66 #clock-cells = <0>;
72 #clock-cells = <0>;
81 #size-cells = <0>;
83 reg = <0x40000000 0x400>;
84 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
103 #size-cells = <0>;
105 reg = <0x40000400 0x400>;
[all …]
H A Dstm32f429.dtsi58 #clock-cells = <0>;
60 clock-frequency = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
78 clock-frequency = <0>;
85 reg = <0x1fff7800 0x400>;
89 reg = <0x22c 0x2>;
92 reg = <0x22e 0x2>;
98 #size-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-zii-rdu2.dtsi22 #size-cells = <0>;
24 pinctrl-0 = <&pinctrl_mdio1>;
28 phy: ethernet-phy@0 {
29 pinctrl-0 = <&pinctrl_rmii_phy_irq>;
31 reg = <0>;
84 pinctrl-0 = <&pinctrl_reg_3p3v_sd>;
177 #size-cells = <0>;
180 pinctrl-0 = <&pinctrl_disp0>;
183 port@0 {
184 reg = <0>;
[all …]
H A Dimx6qp-prtwd3.dts21 reg = <0x10000000 0x20000000>;
26 reg = <0x80000000 0x20000000>;
31 #clock-cells = <0>;
37 #clock-cells = <0>;
43 #clock-cells = <0>;
49 #clock-cells = <0>;
56 pinctrl-0 = <&pinctrl_mdio>;
59 #size-cells = <0>;
65 reg = <0x3>;
73 micrel,led-mode = <0>;
[all …]
/linux/arch/arm/mach-lpc32xx/
H A Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]
/linux/arch/m68k/ifpsp060/
H A Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/linux/drivers/pci/hotplug/
H A Dibmphp_hpc.c28 static int to_debug = 0;
29 #define debug_polling(fmt, arg...) do { if (to_debug) debug(fmt, arg); } while (0)
43 #define WPG_I2CMBUFL_OFFSET 0x08 // I2C Message Buffer Low
44 #define WPG_I2CMOSUP_OFFSET 0x10 // I2C Master Operation Setup Reg
45 #define WPG_I2CMCNTL_OFFSET 0x20 // I2C Master Control Register
46 #define WPG_I2CPARM_OFFSET 0x40 // I2C Parameter Register
47 #define WPG_I2CSTAT_OFFSET 0x70 // I2C Status Register
52 #define WPG_I2C_AND 0x1000 // I2C AND operation
53 #define WPG_I2C_OR 0x2000 // I2C OR operation
58 #define WPG_READATADDR_MASK 0x00010000 // read,bytes,I2C shifted,index
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c38 #define MC_CG_ARB_FREQ_F0 0x0a
39 #define MC_CG_ARB_FREQ_F1 0x0b
40 #define MC_CG_ARB_FREQ_F2 0x0c
41 #define MC_CG_ARB_FREQ_F3 0x0d
43 #define MC_CG_SEQ_DRAMCONF_S0 0x05
44 #define MC_CG_SEQ_DRAMCONF_S1 0x06
45 #define MC_CG_SEQ_YCLK_SUSPEND 0x04
46 #define MC_CG_SEQ_YCLK_RESUME 0x0a
48 #define SMC_RAM_END 0x8000
58 0x000008f8, 0x00000010, 0xffffffff,
[all …]
H A Devergreen.c50 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
51 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
52 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
63 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_rreg()
74 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_wreg()
85 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_rreg()
96 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_wreg()
107 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_rreg()
118 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_wreg()
137 0x98fc,
[all …]
/linux/arch/m68k/ifpsp060/src/
H A Dfplsp.S37 short 0x0000
39 short 0x0000
41 short 0x0000
44 short 0x0000
46 short 0x0000
48 short 0x0000
51 short 0x0000
53 short 0x0000
55 short 0x0000
58 short 0x0000
[all …]
H A Dfpsp.S43 set _off_bsun, 0x00
44 set _off_snan, 0x04
45 set _off_operr, 0x08
46 set _off_ovfl, 0x0c
47 set _off_unfl, 0x10
48 set _off_dz, 0x14
49 set _off_inex, 0x18
50 set _off_fline, 0x1c
51 set _off_fpu_dis, 0x20
52 set _off_trap, 0x24
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]