Searched +full:0 +full:x33d00000 (Results 1 – 8 of 8) sorted by relevance
14 m ------>| | vint | bit | | 0 |.....|63| vint0 |21 | | vint | bit | | 0 |.....|63| vintx |58 reg = <0x0 0x33d00000 0x0 0x100000>;64 ti,sci-rm-range-vint = <0x0>;65 ti,sci-rm-range-global-event = <0x1>;
25 m ------>| | vint | bit | | 0 |.....|63| vint0 |32 | | vint | bit | | 0 |.....|63| vintx |63 const: 0110 reg = <0x0 0x33d00000 0x0 0x100000>;116 ti,interrupt-ranges = <0 0 256>;
10 #clock-cells = <0>;18 reg = <0x00 0x70000000 0x00 0x100000>;21 ranges = <0x00 0x00 0x70000000 0x100000>;23 atf-sram@0 {[all...]
12 reg = <0x0 0x70000000 0x0 0x200000>;15 ranges = <0x0 0x0 0x70000000 0x200000>;17 atf-sram@0 {18 reg = <0x[all...]
13 #clock-cells = <0>;15 clock-frequency = <0>;22 reg = <0x0 0x70000000 0x0 0x400000>;25 ranges = <0x0 0x0 0x70000000 0x40000[all...]
16 #clock-cells = <0>;26 reg = <0x00 0x70000000 0x00 0x800000>;29 ranges = <0x00 0x00 0x70000000 0x800000>;31 atf-sram@0 {[all...]
15 #clock-cells = <0>;17 clock-frequency = <0>;21 #clock-cells = <0>;23 clock-frequency = <0>;30 reg = <0x0 0x70000000 0x0 0x800000>;33 ranges = <0x0 0x[all...]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]