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Searched +full:0 +full:x33000000 (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/soc/ti/
H A Dk3-ringacc.yaml84 reg = <0x0 0x3c000000 0x0 0x400000>,
85 <0x0 0x38000000 0x0 0x400000>,
86 <0x0 0x31120000 0x0 0x100>,
87 <0x0 0x33000000 0x0 0x40000>,
88 <0x0 0x31080000 0x0 0x40000>;
91 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
/linux/drivers/media/platform/st/sti/bdisp/
H A Dbdisp-reg.h8 /* 0 - General */
87 #define BLT_CTL 0x0A00
88 #define BLT_ITS 0x0A04
89 #define BLT_STA1 0x0A08
90 #define BLT_AQ1_CTL 0x0A60
91 #define BLT_AQ1_IP 0x0A64
92 #define BLT_AQ1_LNA 0x0A68
93 #define BLT_AQ1_STA 0x0A6C
94 #define BLT_ITM0 0x0AD0
96 #define BLT_PLUGS1_OP2 0x0B04
[all …]
/linux/drivers/net/wireless/ath/ath5k/
H A Drfbuffer.h108 AR5K_RF_TURBO = 0,
165 #define AR5K_RF5111_RF_TURBO { 1, 3, 0 }
168 #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
169 #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
171 #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
172 #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
174 #define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
175 #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
181 #define AR5K_RF5111_GAIN_I { 6, 29, 0 }
182 #define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
[all …]
/linux/arch/arm64/include/asm/
H A Dinsn.h18 AARCH64_INSN_HINT_NOP = 0x0 << 5,
19 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
20 AARCH64_INSN_HINT_WFE = 0x2 << 5,
21 AARCH64_INSN_HINT_WFI = 0x3 << 5,
22 AARCH64_INSN_HINT_SEV = 0x4 << 5,
23 AARCH64_INSN_HINT_SEVL = 0x5 << 5,
25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphytbl_n.c11 0x08004a04,
12 0x00100000,
13 0x01000a05,
14 0x00100020,
15 0x09804506,
16 0x00100030,
17 0x09804507,
18 0x00100030,
19 0x00000000,
20 0x00000000,
[all …]
/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]