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Searched +full:0 +full:x32800000 (Results 1 – 14 of 14) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dti,secure-proxy.txt35 reg = <0x0 0x32c00000 0x0 0x100000>,
36 <0x0 0x32400000 0x0 0x100000>,
37 <0x0 0x32800000 0x0 0x100000>;
H A Dti,secure-proxy.yaml22 pattern: "^mailbox@[0-9a-f]+$"
45 pattern: "^rx_[0-9]{3}$"
74 reg = <0x32c00000 0x100000>,
75 <0x32400000 0x100000>,
76 <0x32800000 0x100000>;
/freebsd/lib/msun/src/
H A De_acosf.c20 one = 1.0000000000e+00, /* 0x3F800000 */
21 pi = 3.1415925026e+00, /* 0x40490fda */
22 pio2_hi = 1.5707962513e+00; /* 0x3fc90fda */
24 pio2_lo = 7.5497894159e-08; /* 0x33a22168 */
28 * 0x1p-12f <= x <= 0.5f. The maximum error satisfies log2(e) < -30.084.
31 pS0 = 1.66666672e-01f, /* 0x3e2aaaab */
32 pS1 = -1.19510300e-01f, /* 0xbdf4c1d1 */
33 pS2 = 5.47002675e-03f, /* 0x3bb33de9 */
34 qS1 = -1.16706085e+00f, /* 0xbf956240 */
35 qS2 = 2.90115148e-01f; /* 0x3e9489f9 */
[all …]
/freebsd/contrib/arm-optimized-routines/math/aarch64/experimental/
H A Dacosf_1u4.c13 #define AbsMask 0x7fffffff
14 #define Half 0x3f000000
15 #define One 0x3f800000
16 #define PiOver2f 0x1.921fb6p+0f
17 #define Pif 0x1.921fb6p+1f
18 #define Small 0x32800000 /* 2^-26. */
19 #define Small12 0x328
20 #define QNaN 0x7fc
36 acosf(0x1.ffbeccp-2) got 0x1.0c27f8p+0 want 0x1.0c27f6p+0.
42 where z = (1-x)/2, z is near 0 when x approaches 1, and P contributes to the
[all …]
H A Derfcf_1u7.c12 #define Shift 0x1p17f
13 #define OneThird 0x1.555556p-2f
14 #define TwoThird 0x1.555556p-1f
16 #define TwoOverFifteen 0x1.111112p-3f
17 #define TwoOverFive 0x1.99999ap-2f
18 #define Tenth 0x1.99999ap-4f
20 #define SignMask 0x7fffffff
34 Note that for x < 0, erfc(x) = 2.0 - erfc(-x).
37 erfcf(0x1.1dbf7ap+3) got 0x1.f51212p-120
38 want 0x1.f51216p-120. */
[all …]
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Dacosf.c19 [ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */
20 .poly = { V4 (0x1.55555ep-3), V4 (0x1.33261ap-4), V4 (0x1.70d7dcp-5),
21 V4 (0x1.b059dp-6), V4 (0x1.3af7d8p-5) },
22 .pi_over_2f = V4 (0x1.921fb6p+0f),
23 .pif = V4 (0x1.921fb6p+1f),
26 #define AbsMask 0x7fffffff
27 #define Half 0x3f000000
28 #define One 0x3f800000
29 #define Small 0x32800000 /* 2^-26. */
43 If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the following
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
H A Dk3-j7200-main.dtsi10 #clock-cells = <0>;
18 reg = <0x00 0x70000000 0x00 0x100000>;
21 ranges = <0x00 0x00 0x70000000 0x100000>;
23 atf-sram@0 {
24 reg = <0x00 0x20000>;
30 reg = <0x00 0x00100000 0x00 0x1c000>;
33 ranges = <0x00 0x00 0x00100000 0x1c000>;
37 reg = <0x4080 0x20>;
39 mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
40 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
[all …]
H A Dk3-j721s2-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x0 0x70000000 0x0 0x400000>;
25 ranges = <0x0 0x0 0x70000000 0x400000>;
27 atf-sram@0 {
28 reg = <0x0 0x20000>;
32 reg = <0x1f0000 0x10000>;
36 reg = <0x200000 0x200000>;
42 reg = <0x00 0x00104000 0x00 0x18000>;
45 ranges = <0x00 0x00 0x00104000 0x18000>;
[all …]
H A Dk3-j721e-main.dtsi15 #clock-cells = <0>;
17 clock-frequency = <0>;
21 #clock-cells = <0>;
23 clock-frequency = <0>;
30 reg = <0x0 0x70000000 0x0 0x800000>;
33 ranges = <0x0 0x0 0x70000000 0x800000>;
35 atf-sram@0 {
36 reg = <0x0 0x20000>;
42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
45 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
H A Dk3-j784s4-main.dtsi16 #clock-cells = <0>;
26 reg = <0x00 0x70000000 0x00 0x800000>;
29 ranges = <0x00 0x00 0x70000000 0x800000>;
31 atf-sram@0 {
32 reg = <0x00 0x20000>;
36 reg = <0x1f0000 0x10000>;
40 reg = <0x200000 0x200000>;
46 reg = <0x00 0x00100000 0x00 0x1c000>;
49 ranges = <0x00 0x00 0x00100000 0x1c000>;
53 reg = <0x4034 0x4>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLASXInstrInfo.td3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
206 let hasSideEffects = 0, Predicates = [HasExtLASX] in {
208 let mayLoad = 0, mayStore = 0 in {
209 def XVADD_B : LASX3R_XXX<0x740a0000>;
210 def XVADD_H : LASX3R_XXX<0x740a8000>;
211 def XVADD_W : LASX3R_XXX<0x740b0000>;
212 def XVADD_D : LASX3R_XXX<0x740b8000>;
213 def XVADD_Q : LASX3R_XXX<0x752d0000>;
215 def XVSUB_B : LASX3R_XXX<0x740c0000>;
216 def XVSUB_H : LASX3R_XXX<0x740c8000>;
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]