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/linux/drivers/gpu/drm/panel/
H A Dpanel-sony-tulip-truly-nt35521.c28 #define NT35521_DCS_SWITCH_PAGE 0xf0
32 0x55, 0xaa, 0x52, 0x08, (page))
46 gpiod_set_value_cansleep(ctx->reset_gpio, 0); in truly_nt35521_reset()
57 nt35521_switch_page(&dsi_ctx, 0x00); in truly_nt35521_on()
58 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0xaa, 0x55, 0xa5, 0x80); in truly_nt35521_on()
59 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6f, 0x11, 0x00); in truly_nt35521_on()
60 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf7, 0x20, 0x00); in truly_nt35521_on()
61 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6f, 0x01); in truly_nt35521_on()
62 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x21); in truly_nt35521_on()
63 mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01); in truly_nt35521_on()
[all …]
H A Dpanel-samsung-s6e8aa0.c34 #define PANELCTL_SS_1_800 (0 << 5)
41 #define PANELCTL_CLK1_000 (0 << 3)
43 #define PANELCTL_CLK2_CON_MASK (7 << 0)
44 #define PANELCTL_CLK2_000 (0 << 0)
45 #define PANELCTL_CLK2_001 (1 << 0)
48 #define PANELCTL_INT1_000 (0 << 3)
50 #define PANELCTL_INT2_CON_MASK (7 << 0)
51 #define PANELCTL_INT2_000 (0 << 0)
52 #define PANELCTL_INT2_001 (1 << 0)
55 #define PANELCTL_BICTL_000 (0 << 3)
[all …]
H A Dpanel-samsung-s6e63j0x03.c24 #define MCS_LEVEL2_KEY 0xf0
25 #define MCS_MTP_KEY 0xf1
26 #define MCS_MTP_SET3 0xd4
55 .flags = 0,
61 0x00, 0x00, 0x00, 0x7f, 0x7f, 0x7f, 0x52, 0x6b, 0x6f, 0x26,
62 0x28, 0x2d, 0x28, 0x26, 0x27, 0x33, 0x34, 0x32, 0x36, 0x36,
63 0x35, 0x00, 0xab, 0x00, 0xae, 0x00, 0xbf
67 0x00, 0x00, 0x00, 0x70, 0x7f, 0x7f, 0x4e, 0x64, 0x69, 0x26,
68 0x27, 0x2a, 0x28, 0x29, 0x27, 0x31, 0x32, 0x31, 0x35, 0x34,
69 0x35, 0x00, 0xc4, 0x00, 0xca, 0x00, 0xdc
[all …]
H A Dpanel-sitronix-st7703.c29 #define ST7703_CMD_ALL_PIXEL_OFF 0x22
30 #define ST7703_CMD_ALL_PIXEL_ON 0x23
31 #define ST7703_CMD_SETAPID 0xB1
32 #define ST7703_CMD_SETDISP 0xB2
33 #define ST7703_CMD_SETRGBIF 0xB3
34 #define ST7703_CMD_SETCYC 0xB4
35 #define ST7703_CMD_SETBGP 0xB5
36 #define ST7703_CMD_SETVCOM 0xB6
37 #define ST7703_CMD_SETOTP 0xB7
38 #define ST7703_CMD_SETPOWER_EXT 0xB8
[all …]
/linux/drivers/scsi/aic7xxx/
H A Daic7xxx_seq.h_shipped9 0xb2, 0x00, 0x00, 0x08,
10 0xf7, 0x11, 0x22, 0x08,
11 0x00, 0x65, 0xee, 0x59,
12 0xf7, 0x01, 0x02, 0x08,
13 0xff, 0x6a, 0x24, 0x08,
14 0x40, 0x00, 0x40, 0x68,
15 0x08, 0x1f, 0x3e, 0x10,
16 0x40, 0x00, 0x40, 0x68,
17 0xff, 0x40, 0x3c, 0x60,
18 0x08, 0x1f, 0x3e, 0x10,
[all …]
H A Daic79xx_seq.h_shipped9 0xff, 0x02, 0x06, 0x78,
10 0x00, 0xea, 0x6e, 0x59,
11 0x01, 0xea, 0x04, 0x30,
12 0xff, 0x04, 0x0c, 0x78,
13 0x19, 0xea, 0x6e, 0x59,
14 0x19, 0xea, 0x04, 0x00,
15 0x33, 0xea, 0x68, 0x59,
16 0x33, 0xea, 0x00, 0x00,
17 0x60, 0x3a, 0x3a, 0x68,
18 0x04, 0x4d, 0x35, 0x78,
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dmxm.c36 return 0x0000; in mxm_table()
43 return 0x0000; in mxm_table()
55 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
56 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
60 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
61 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
65 0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31,
66 0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
70 0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31,
71 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
[all …]
/linux/drivers/staging/media/meson/vdec/
H A Dcodec_h264.c15 #define SIZE_WORKSPACE 0x1ee000
22 #define WORKSPACE_BUF_OFFSET 0x1000000
25 #define CMD_MASK GENMASK(7, 0)
43 #define PIC_STRUCT_MASK GENMASK(2, 0)
44 #define BUF_IDX_MASK GENMASK(4, 0)
47 #define OFFSET_MASK GENMASK(15, 0)
51 #define MB_TOTAL_MASK GENMASK(15, 0)
52 #define MB_WIDTH_MASK GENMASK(7, 0)
54 #define MAX_REF_MASK GENMASK(6, 0)
56 #define AR_IDC_MASK GENMASK(7, 0)
[all …]
/linux/net/wireless/certs/
H A Dwens.hex2 0x30, 0x82, 0x02, 0xa7, 0x30, 0x82, 0x01, 0x8f,
3 0x02, 0x14, 0x61, 0xc0, 0x38, 0x65, 0x1a, 0xab,
4 0xdc, 0xf9, 0x4b, 0xd0, 0xac, 0x7f, 0xf0, 0x6c,
5 0x72, 0x48, 0xdb, 0x18, 0xc6, 0x00, 0x30, 0x0d,
6 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d,
7 0x01, 0x01, 0x0b, 0x05, 0x00, 0x30, 0x0f, 0x31,
8 0x0d, 0x30, 0x0b, 0x06, 0x03, 0x55, 0x04, 0x03,
9 0x0c, 0x04, 0x77, 0x65, 0x6e, 0x73, 0x30, 0x20,
10 0x17, 0x0d, 0x32, 0x33, 0x31, 0x32, 0x30, 0x31,
11 0x30, 0x37, 0x34, 0x31, 0x31, 0x34, 0x5a, 0x18,
[all …]
H A Dsforshee.hex2 0x30, 0x82, 0x02, 0xa4, 0x30, 0x82, 0x01, 0x8c,
3 0x02, 0x09, 0x00, 0xb2, 0x8d, 0xdf, 0x47, 0xae,
4 0xf9, 0xce, 0xa7, 0x30, 0x0d, 0x06, 0x09, 0x2a,
5 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b,
6 0x05, 0x00, 0x30, 0x13, 0x31, 0x11, 0x30, 0x0f,
7 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x08, 0x73,
8 0x66, 0x6f, 0x72, 0x73, 0x68, 0x65, 0x65, 0x30,
9 0x20, 0x17, 0x0d, 0x31, 0x37, 0x31, 0x30, 0x30,
10 0x36, 0x31, 0x39, 0x34, 0x30, 0x33, 0x35, 0x5a,
11 0x18, 0x0f, 0x32, 0x31, 0x31, 0x37, 0x30, 0x39,
[all …]
/linux/arch/riscv/kernel/
H A Dentry.S70 REG_L a2, 0(a0)
78 ALTERNATIVE("sfence.vma", "nop", 0, RISCV_ISA_EXT_SVVPTC, 1)
99 * register will contain 0, and we should continue on the current TP.
125 andi sp, sp, 0x1
162 * Set the scratch register to 0, so that if a recursive exception
196 REG_L t1, 0(t0)
287 /* we reach here from kernel context, sscratch must be 0 */
288 csrrw x31, CSR_SCRATCH, x31
289 asm_per_cpu sp, overflow_stack, x31
290 li x31, OVERFLOW_STACK_SIZE
[all …]
/linux/drivers/input/misc/
H A Dwistron_btns.c30 #define WIFI 0x35
31 #define BLUETOOTH 0x34
32 #define MAIL_LED 0x31
38 static bool force; /* = 0; */
39 module_param(force, bool, 0);
43 module_param_named(keymap, keymap_name, charp, 0);
71 : "0" (regs->eax), "1" (regs->ebx), "2" (regs->ecx), in call_bios()
81 { 0x42, 0x21, 0x55, 0x30 }; in locate_wistron_bios()
84 for (offset = 0; offset < 0x10000; offset += 0x10) { in locate_wistron_bios()
86 sizeof(signature)) != 0) in locate_wistron_bios()
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_marvel.h34 ev7_csr RBOX_CFG; /* 0x0000 */
38 ev7_csr RBOX_TCTL; /* 0x0040 */
42 ev7_csr RBOX_INTQ; /* 0x0080 */
46 ev7_csr RBOX_SCRATCH2; /* 0x00c0 */
56 #define EV7_PE_MASK 0x1ffUL /* 9 bits ( 256 + mem/io ) */
59 #define EV7_CSR_PHYS(pe, off) (EV7_IPE(pe) | (0x7FFCUL << 20) | (off))
60 #define EV7_CSRS_PHYS(pe) (EV7_CSR_PHYS(pe, 0UL))
76 io7_csr POx_CTRL; /* 0x0000 */
80 io7_csr POx_MEM_ADR_EXT; /* 0x0100 */
82 io7_csr rsvd1[2]; /* ?? spec doesn't show 0x180 */
[all …]
/linux/sound/soc/codecs/
H A Des8389.c44 if ((reg <= 0xff)) in es8389_volatile_register()
50 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
51 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
52 static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, 0, 300, 0);
53 static const DECLARE_TLV_DB_SCALE(mix_vol_tlv, -9500, 100, 0);
54 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -3200, 200, 0);
55 static const DECLARE_TLV_DB_SCALE(alc_max_level, -3200, 200, 0);
67 val = ucontrol->value.integer.value[0]; in es8389_dmic_set()
72 regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0xC0, &changed1); in es8389_dmic_set()
73 regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x03, &changed2); in es8389_dmic_set()
[all …]
H A Dtas571x.h12 #define TAS571X_CLK_CTRL_REG 0x00
13 #define TAS571X_DEV_ID_REG 0x01
14 #define TAS571X_ERR_STATUS_REG 0x02
15 #define TAS571X_SYS_CTRL_1_REG 0x03
16 #define TAS571X_SDI_REG 0x04
17 #define TAS571X_SDI_FMT_MASK 0x0f
19 #define TAS571X_SYS_CTRL_2_REG 0x05
20 #define TAS571X_SYS_CTRL_2_SDN_MASK 0x40
22 #define TAS571X_SOFT_MUTE_REG 0x06
23 #define TAS571X_SOFT_MUTE_CH1_SHIFT 0
[all …]
H A Des8375.c42 static const DECLARE_TLV_DB_SCALE(es8375_adc_osr_gain_tlv, -3100, 100, 0);
43 static const DECLARE_TLV_DB_SCALE(es8375_adc_volume_tlv, -9550, 50, 0);
44 static const DECLARE_TLV_DB_SCALE(es8375_adc_automute_attn_tlv, 0, 100, 0);
45 static const DECLARE_TLV_DB_SCALE(es8375_adc_dmic_volume_tlv, 0, 600, 0);
46 static const DECLARE_TLV_DB_SCALE(es8375_dac_volume_tlv, -9550, 50, 0);
47 static const DECLARE_TLV_DB_SCALE(es8375_dac_vppscale_tlv, -388, 12, 0);
48 static const DECLARE_TLV_DB_SCALE(es8375_dac_automute_attn_tlv, 0, 400, 0);
49 static const DECLARE_TLV_DB_SCALE(es8375_automute_ng_tlv, -9600, 600, 0);
111 ADC_OSR_GAIN_SHIFT_0, ES8375_ADC_OSR_GAIN_MAX, 0,
113 SOC_SINGLE("ADC Invert Switch", ES8375_ADC1, ADC_INV_SHIFT_6, 1, 0),
[all …]
/linux/lib/crypto/
H A Dcurve25519-fiat32.c18 * entries t[0]...t[9], represents the integer t[0]+2^26 t[1]+2^51 t[2]+2^77
41 h[0] = a0&((1<<26)-1); /* 26 used, 32-26 left. 26 */ in fe_frombytes_impl()
104 t = -!!t; /* all set if nonzero, 0 if 0 */ in cmovznz32()
119 { const u32 x2 = in1[0]; in fe_freeze()
120 { u32 x20; u8/*bool*/ x21 = subborrow_u26(0x0, x2, 0x3ffffed, &x20); in fe_freeze()
121 { u32 x23; u8/*bool*/ x24 = subborrow_u25(x21, x4, 0x1ffffff, &x23); in fe_freeze()
122 { u32 x26; u8/*bool*/ x27 = subborrow_u26(x24, x6, 0x3ffffff, &x26); in fe_freeze()
123 { u32 x29; u8/*bool*/ x30 = subborrow_u25(x27, x8, 0x1ffffff, &x29); in fe_freeze()
124 { u32 x32; u8/*bool*/ x33 = subborrow_u26(x30, x10, 0x3ffffff, &x32); in fe_freeze()
125 { u32 x35; u8/*bool*/ x36 = subborrow_u25(x33, x12, 0x1ffffff, &x35); in fe_freeze()
[all …]
H A Daesgcm.c43 * Returns: 0 on success, or -EINVAL if @keysize or @authsize contain values
60 return 0; in aesgcm_expandkey()
67 while (len > 0) { in aesgcm_ghash()
114 while (len > 0) { in aesgcm_crypt()
221 "\xd9\x31\x32\x25\xf8\x84\x06\xe5"
224 "\x2e\x4c\x30\x3d\x8a\x31\x8a\x72"
243 "\xd9\x31\x32\x25\xf8\x84\x06\xe5"
246 "\x2e\x4c\x30\x3d\x8a\x31\x8a\x72"
275 "\xd9\x31\x32\x25\xf8\x84\x06\xe5"
278 "\x2e\x4c\x30\x3d\x8a\x31\x8a\x72"
[all …]
/linux/drivers/media/pci/saa7146/
H A Dhexium_orion.c21 module_param(debug, int, 0);
34 { 0, "CVBS 1", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
35 { 1, "CVBS 2", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
36 { 2, "CVBS 3", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
37 { 3, "CVBS 4", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
38 { 4, "CVBS 5", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
39 { 5, "CVBS 6", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
40 { 6, "Y/C 1", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
41 { 7, "Y/C 2", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
42 { 8, "Y/C 3", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
[all …]
/linux/drivers/net/wireless/realtek/rtl818x/rtl8187/
H A Drtl8225.c28 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0), in rtl818x_ioread8_idx()
30 (unsigned long)addr, idx & 0x03, in rtl818x_ioread8_idx()
45 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0), in rtl818x_ioread16_idx()
47 (unsigned long)addr, idx & 0x03, in rtl818x_ioread16_idx()
62 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0), in rtl818x_ioread32_idx()
64 (unsigned long)addr, idx & 0x03, in rtl818x_ioread32_idx()
79 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0), in rtl818x_iowrite8_idx()
81 (unsigned long)addr, idx & 0x03, in rtl818x_iowrite8_idx()
93 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0), in rtl818x_iowrite16_idx()
95 (unsigned long)addr, idx & 0x03, in rtl818x_iowrite16_idx()
[all …]
/linux/drivers/regulator/
H A Dhi655x-regulator.c74 unsigned int value = 0; in hi655x_is_enabled()
151 HI655X_LDO_LINEAR(LDO2, 0x72, 0x07, 0x29, 0x2a, 0x2b, 0x01,
153 HI655X_LDO(LDO7, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x06, ldo7_voltages),
154 HI655X_LDO(LDO10, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x01, ldo7_voltages),
155 HI655X_LDO_LINEAR(LDO13, 0x7e, 0x07, 0x2c, 0x2d, 0x2e, 0x04,
157 HI655X_LDO_LINEAR(LDO14, 0x7f, 0x07, 0x2c, 0x2d, 0x2e, 0x05,
159 HI655X_LDO_LINEAR(LDO15, 0x80, 0x07, 0x2c, 0x2d, 0x2e, 0x06,
161 HI655X_LDO_LINEAR(LDO17, 0x82, 0x07, 0x2f, 0x30, 0x31, 0x00,
163 HI655X_LDO(LDO19, 0x84, 0x07, 0x2f, 0x30, 0x31, 0x02, ldo19_voltages),
164 HI655X_LDO_LINEAR(LDO21, 0x86, 0x07, 0x2f, 0x30, 0x31, 0x04,
[all …]
/linux/drivers/staging/fbtft/
H A Dfb_ili9340.c25 write_reg(par, 0xEF, 0x03, 0x80, 0x02); in init_display()
26 write_reg(par, 0xCF, 0x00, 0XC1, 0X30); in init_display()
27 write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81); in init_display()
28 write_reg(par, 0xE8, 0x85, 0x00, 0x78); in init_display()
29 write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02); in init_display()
30 write_reg(par, 0xF7, 0x20); in init_display()
31 write_reg(par, 0xEA, 0x00, 0x00); in init_display()
34 write_reg(par, 0xC0, 0x23); in init_display()
37 write_reg(par, 0xC1, 0x10); in init_display()
40 write_reg(par, 0xC5, 0x3e, 0x28); in init_display()
[all …]
/linux/drivers/media/dvb-frontends/
H A Dm88ds3103_priv.h23 #define M88RS6000_CHIP_ID 0x74
24 #define M88DS3103_CHIP_ID 0x70
26 #define M88DS3103_CHIPTYPE_3103 0
60 {0x23, 0x07},
61 {0x08, 0x03},
62 {0x0c, 0x02},
63 {0x21, 0x54},
64 {0x25, 0x8a},
65 {0x27, 0x31},
66 {0x30, 0x08},
[all …]
/linux/lib/fonts/
H A Dfont_10x18.c12 { 0, 0, FONTDATAMAX, 0 }, {
13 /* 0 0x00 '^@' */
14 0x00, 0x00, /* 0000000000 */
15 0x00, 0x00, /* 0000000000 */
16 0x00, 0x00, /* 0000000000 */
17 0x00, 0x00, /* 0000000000 */
18 0x00, 0x00, /* 0000000000 */
19 0x00, 0x00, /* 0000000000 */
20 0x00, 0x00, /* 0000000000 */
21 0x00, 0x00, /* 0000000000 */
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dmcu.h35 #define MCU_PKT_ID 0xa0
36 #define MCU_PORT_QUEUE 0x8000
37 #define MCU_PORT_QUEUE_FW 0xc000
39 #define MCU_FIRMWARE_ADDRESS 0x100000
49 MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01,
50 MCU_CMD_FW_START_REQ = 0x02,
51 MCU_CMD_INIT_ACCESS_REG = 0x3,
52 MCU_CMD_PATCH_START_REQ = 0x05,
53 MCU_CMD_PATCH_FINISH_REQ = 0x07,
54 MCU_CMD_PATCH_SEM_CONTROL = 0x10,
[all …]

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