| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am62l.dtsi | 35 arm,smc-id = <0x82004000>;
38 #size-cells = <0>;
41 reg = <0x14>;
47 reg = <0x11>;
69 ranges = <0x00 0x00600000 0x00 0x00600000 0x00 0x00010100>, /* GPIO */
70 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First Peripheral Window */
71 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000400>, /* Timesync Router */
72 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* CPSW */
73 <0x00 0x09000000 0x00 0x09000000 0x00 0x00400000>, /* CTRL MMRs */
74 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x1a001400>, /* Second Peripheral Window */
[all …]
|
| H A D | k3-am62p.dtsi | 80 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
81 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
82 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
83 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
84 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
85 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
86 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
87 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
88 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
89 <0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */
[all …]
|
| H A D | k3-am62.dtsi | 77 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
78 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
79 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
80 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
81 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
82 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
83 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
84 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
85 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
86 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
|
| H A D | k3-am62a.dtsi | 81 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
82 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
83 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
84 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
85 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
86 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
87 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
88 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
89 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
90 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
|
| H A D | k3-j722s.dtsi | 24 #size-cells = <0>;
46 cpu0: cpu@0 {
48 reg = <0x000>;
51 i-cache-size = <0x8000>;
54 d-cache-size = <0x8000>;
58 clocks = <&k3_clks 135 0>;
64 reg = <0x001>;
67 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
74 clocks = <&k3_clks 136 0>;
[all …]
|
| H A D | k3-am62-main.dtsi | 11 reg = <0x00 0x70000000 0x00 0x10000>;
14 ranges = <0x0 0x00 0x70000000 0x10000>;
24 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
25 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
26 <0x01 0x00000000 0x00 0x2000>, /* GICC */
27 <0x01 0x00010000 0x00 0x1000>, /* GICH */
28 <0x01 0x00020000 0x00 0x2000>; /* GICV */
37 reg = <0x00 0x01820000 0x00 0x10000>;
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
48 ranges = <0x0 0x00 0x00100000 0x20000>;
[all …]
|
| H A D | k3-am62a-main.dtsi | 11 reg = <0x00 0x70000000 0x00 0x10000>;
14 ranges = <0x0 0x00 0x70000000 0x10000>;
19 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
20 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
21 <0x01 0x00000000 0x00 0x2000>, /* GICC */
22 <0x01 0x00010000 0x00 0x1000>, /* GICH */
23 <0x01 0x00020000 0x00 0x2000>; /* GICV */
37 reg = <0x00 0x01820000 0x00 0x10000>;
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
48 ranges = <0x00 0x00 0x00100000 0x20000>;
[all …]
|
| /linux/arch/arm64/boot/dts/cix/ |
| H A D | sky1.dtsi | 17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0x0 0x0>;
30 reg = <0x0 0x100>;
38 reg = <0x0 0x200>;
46 reg = <0x0 0x300>;
54 reg = <0x0 0x400>;
62 reg = <0x0 0x500>;
70 reg = <0x0 0x600>;
78 reg = <0x0 0x700>;
[all …]
|
| /linux/Documentation/devicetree/bindings/display/ti/ |
| H A D | ti,am65x-dss.yaml | 93 port@0:
103 endpoint@0:
118 - endpoint@0
153 const: 0
156 '^oldi@[0-1]$':
171 port@0: false
195 port@0:
218 reg = <0x04a00000 0x1000>, /* common */
219 <0x04a02000 0x1000>, /* vidl1 */
220 <0x04a06000 0x1000>, /* vid */
[all …]
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7988a.dtsi | 46 #size-cells = <0>;
48 cpu0: cpu@0 {
50 reg = <0x0>;
62 reg = <0x1>;
74 reg = <0x2>;
86 reg = <0x3>;
96 cluster0_opp: opp-table-0 {
122 #clock-cells = <0>;
144 reg = <0 0x43000000 0 0x50000>;
157 reg = <0 0x0c000000 0 0x40000>, /* GICD */
[all …]
|
| /linux/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
| H A D | nbio_4_3_0_offset.h | 29 // base address: 0x0
30 …BIF_BX0_PCIE_INDEX 0x000c
31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0
32 …BIF_BX0_PCIE_DATA 0x000d
33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0
34 …BIF_BX0_PCIE_INDEX2 0x000e
35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0
36 …BIF_BX0_PCIE_DATA2 0x000f
37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0
38 …BIF_BX0_PCIE_INDEX_HI 0x0010
[all …]
|
| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rv1108.dtsi | 29 #size-cells = <0>;
34 reg = <0xf00>;
42 cpu_opp_table: opp-table-0 {
84 #clock-cells = <0>;
89 reg = <0x10080000 0x2000>;
92 ranges = <0 0x10080000 0x2000>;
97 reg = <0x10210000 0x100>;
106 pinctrl-0 = <&uart2m0_xfer>;
112 reg = <0x10220000 0x100>;
121 pinctrl-0 = <&uart1_xfer>;
[all …]
|
| H A D | rk322x.dtsi | 30 #size-cells = <0>;
35 reg = <0xf00>;
46 reg = <0xf01>;
56 reg = <0xf02>;
66 reg = <0xf03>;
74 cpu0_opp_table: opp-table-0 {
130 #clock-cells = <0>;
140 reg = <0x100b0000 0x4000>;
147 pinctrl-0 = <&i2s1_bus>;
153 reg = <0x100c0000 0x4000>;
[all …]
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mn.dtsi | 46 #size-cells = <0>;
53 arm,psci-suspend-param = <0x0010033>;
61 A53_0: cpu@0 {
64 reg = <0x0>;
67 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
84 reg = <0x1>;
87 i-cache-size = <0x8000>;
90 d-cache-size = <0x8000>;
102 reg = <0x2>;
[all …]
|
| H A D | imx8mp.dtsi | 50 #size-cells = <0>;
57 arm,psci-suspend-param = <0x0010033>;
66 A53_0: cpu@0 {
69 reg = <0x0>;
72 i-cache-size = <0x8000>;
75 d-cache-size = <0x8000>;
95 reg = <0x1>;
98 i-cache-size = <0x8000>;
101 d-cache-size = <0x8000>;
119 reg = <0x2>;
[all …]
|
| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7s.dtsi | 56 #size-cells = <0>;
63 arm,psci-suspend-param = <0x0010000>;
71 cpu0: cpu@0 {
74 reg = <0>;
93 opp-supported-hw = <0xf>, <0xf>;
99 #clock-cells = <0>;
106 #clock-cells = <0>;
115 #phy-cells = <0>;
123 #phy-cells = <0>;
142 #size-cells = <0>;
[all …]
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc8280xp.dtsi | 34 #clock-cells = <0>;
39 #clock-cells = <0>;
46 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0x0 0x0>;
52 clocks = <&cpufreq_hw 0>;
59 qcom,freq-domain = <&cpufreq_hw 0>;
79 reg = <0x0 0x100>;
80 clocks = <&cpufreq_hw 0>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
|