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Searched +full:0 +full:x300c0000 (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,easrc.yaml91 reg = <0x300c0000 0x10000>;
92 interrupts = <0x0 122 0x4>;
95 dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
96 <&sdma2 18 23 0> , <&sdma2 19 23 0>,
97 <&sdma2 20 23 0> , <&sdma2 21 23 0>,
98 <&sdma2 22 23 0> , <&sdma2 23 23 0>;
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi46 #size-cells = <0>;
53 arm,psci-suspend-param = <0x0010033>;
61 A53_0: cpu@0 {
64 reg = <0x0>;
68 i-cache-size = <0x8000>;
71 d-cache-size = <0x8000>;
85 reg = <0x1>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
104 reg = <0x2>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk322x.dtsi30 #size-cells = <0>;
35 reg = <0xf00>;
47 reg = <0xf01>;
57 reg = <0xf02>;
67 reg = <0xf03>;
75 cpu0_opp_table: opp-table-0 {
131 #clock-cells = <0>;
141 reg = <0x100b0000 0x4000>;
148 pinctrl-0 = <&i2s1_bus>;
154 reg = <0x100c0000 0x4000>;
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxnv50.c23 #define CP_FLAG_CLEAR 0
25 #define CP_FLAG_SWAP_DIRECTION ((0 * 32) + 0)
26 #define CP_FLAG_SWAP_DIRECTION_LOAD 0
28 #define CP_FLAG_UNK01 ((0 * 32) + 1)
29 #define CP_FLAG_UNK01_CLEAR 0
31 #define CP_FLAG_UNK03 ((0 * 32) + 3)
32 #define CP_FLAG_UNK03_CLEAR 0
34 #define CP_FLAG_USER_SAVE ((0 * 32) + 5)
35 #define CP_FLAG_USER_SAVE_NOT_PENDING 0
37 #define CP_FLAG_USER_LOAD ((0 * 32) + 6)
[all …]