| /linux/drivers/net/wireless/mediatek/mt76/mt76x0/ |
| H A D | initvals_phy.h | 12 { MT_RF(0, 1), 0x01 }, 13 { MT_RF(0, 2), 0x11 }, 15 { MT_RF(0, 3), 0x73 }, /* VCO Freq Cal */ 16 { MT_RF(0, 4), 0x30 }, /* R4 b<7>=1, VCO cal */ 17 { MT_RF(0, 5), 0x00 }, 18 { MT_RF(0, 6), 0x41 }, 19 { MT_RF(0, 7), 0x00 }, 20 { MT_RF(0, 8), 0x00 }, 21 { MT_RF(0, 9), 0x00 }, 22 { MT_RF(0, 10), 0x0C }, [all …]
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| /linux/net/wireless/certs/ |
| H A D | sforshee.hex | 2 0x30, 0x82, 0x02, 0xa4, 0x30, 0x82, 0x01, 0x8c, 3 0x02, 0x09, 0x00, 0xb2, 0x8d, 0xdf, 0x47, 0xae, 4 0xf9, 0xce, 0xa7, 0x30, 0x0d, 0x06, 0x09, 0x2a, 5 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b, 6 0x05, 0x00, 0x30, 0x13, 0x31, 0x11, 0x30, 0x0f, 7 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x08, 0x73, 8 0x66, 0x6f, 0x72, 0x73, 0x68, 0x65, 0x65, 0x30, 9 0x20, 0x17, 0x0d, 0x31, 0x37, 0x31, 0x30, 0x30, 10 0x36, 0x31, 0x39, 0x34, 0x30, 0x33, 0x35, 0x5a, 11 0x18, 0x0f, 0x32, 0x31, 0x31, 0x37, 0x30, 0x39, [all …]
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| H A D | wens.hex | 2 0x30, 0x82, 0x02, 0xa7, 0x30, 0x82, 0x01, 0x8f, 3 0x02, 0x14, 0x61, 0xc0, 0x38, 0x65, 0x1a, 0xab, 4 0xdc, 0xf9, 0x4b, 0xd0, 0xac, 0x7f, 0xf0, 0x6c, 5 0x72, 0x48, 0xdb, 0x18, 0xc6, 0x00, 0x30, 0x0d, 6 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 7 0x01, 0x01, 0x0b, 0x05, 0x00, 0x30, 0x0f, 0x31, 8 0x0d, 0x30, 0x0b, 0x06, 0x03, 0x55, 0x04, 0x03, 9 0x0c, 0x04, 0x77, 0x65, 0x6e, 0x73, 0x30, 0x20, 10 0x17, 0x0d, 0x32, 0x33, 0x31, 0x32, 0x30, 0x31, 11 0x30, 0x37, 0x34, 0x31, 0x31, 0x34, 0x5a, 0x18, [all …]
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| /linux/drivers/scsi/aic7xxx/ |
| H A D | aic7xxx_seq.h_shipped | 9 0xb2, 0x00, 0x00, 0x08, 10 0xf7, 0x11, 0x22, 0x08, 11 0x00, 0x65, 0xee, 0x59, 12 0xf7, 0x01, 0x02, 0x08, 13 0xff, 0x6a, 0x24, 0x08, 14 0x40, 0x00, 0x40, 0x68, 15 0x08, 0x1f, 0x3e, 0x10, 16 0x40, 0x00, 0x40, 0x68, 17 0xff, 0x40, 0x3c, 0x60, 18 0x08, 0x1f, 0x3e, 0x10, [all …]
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| H A D | aic79xx_seq.h_shipped | 9 0xff, 0x02, 0x06, 0x78, 10 0x00, 0xea, 0x6e, 0x59, 11 0x01, 0xea, 0x04, 0x30, 12 0xff, 0x04, 0x0c, 0x78, 13 0x19, 0xea, 0x6e, 0x59, 14 0x19, 0xea, 0x04, 0x00, 15 0x33, 0xea, 0x68, 0x59, 16 0x33, 0xea, 0x00, 0x00, 17 0x60, 0x3a, 0x3a, 0x68, 18 0x04, 0x4d, 0x35, 0x78, [all …]
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| /linux/Documentation/i2c/ |
| H A D | slave-testunit-backend.rst | 19 Instantiating the device is regular. Example for bus 0, address 0x30:: 21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device 31 reg = <(0x30 | I2C_OWN_SLAVE_ADDRESS)>; 36 byte. Its value is 0 if the testunit is idle, otherwise the command number of 46 0x00, CMD, which test to trigger 47 0x01, DATAL, configuration byte 1 for the test 48 0x02, DATAH, configuration byte 2 for the test 49 0x03, DELAY, delay in n * 10ms until test is started 65 0x00 NOOP 70 0x01 READ_BYTES [all …]
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | radio_2059.c | 17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 }, 18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 }, 19 { 0x188, 0x05 }, 61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 63 0x00, 0x00, 0x00, 0xd0, 0x00), 64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), 68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 70 0x00, 0x00, 0x00, 0xd0, 0x00), [all …]
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| /linux/drivers/accel/habanalabs/include/goya/asic_reg/ |
| H A D | cpu_ca53_cfg_masks.h | 23 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_SHIFT 0 24 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK 0x3 26 #define CPU_CA53_CFG_ARM_CFG_END_MASK 0x30 28 #define CPU_CA53_CFG_ARM_CFG_TE_MASK 0x300 30 #define CPU_CA53_CFG_ARM_CFG_VINITHI_MASK 0x3000 33 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_SHIFT 0 34 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_MASK 0xFFFFFFFF 37 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_SHIFT 0 38 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_MASK 0xFF 41 #define CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_SHIFT 0 [all …]
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt7981.c | 12 MTK_PIN(_number, _name, 0, _number, DRV_GRP4) 16 _x_bits, 32, 0) 23 PIN_FIELD(0, 56, 0x300, 0x10, 0, 4), 27 PIN_FIELD(0, 56, 0x0, 0x10, 0, 1), 31 PIN_FIELD(0, 56, 0x200, 0x10, 0, 1), 35 PIN_FIELD(0, 56, 0x100, 0x10, 0, 1), 39 PIN_FIELD_BASE(0, 0, 1, 0x10, 0x10, 1, 1), 40 PIN_FIELD_BASE(1, 1, 1, 0x10, 0x10, 0, 1), 41 PIN_FIELD_BASE(2, 2, 5, 0x20, 0x10, 6, 1), 42 PIN_FIELD_BASE(3, 3, 4, 0x20, 0x10, 6, 1), [all …]
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| /linux/kernel/bpf/preload/iterators/ |
| H A D | iterators.lskel-big-endian.h | 27 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_map__attach() 29 if (fd > 0) in iterators_bpf__dump_bpf_map__attach() 38 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_prog__attach() 40 if (fd > 0) in iterators_bpf__dump_bpf_prog__attach() 48 int ret = 0; in iterators_bpf__attach() 50 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_map__attach(skel); in iterators_bpf__attach() 51 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_prog__attach(skel); in iterators_bpf__attach() 52 return ret < 0 ? ret : 0; in iterators_bpf__attach() 93 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load() 94 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load() [all …]
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| /linux/sound/pci/au88x0/ |
| H A D | au88x0_eq.c | 31 #define VORTEX_EQ_BASE 0x2b000 32 #define VORTEX_EQ_DEST (VORTEX_EQ_BASE + 0x410) 33 #define VORTEX_EQ_SOURCE (VORTEX_EQ_BASE + 0x430) 34 #define VORTEX_EQ_CTRL (VORTEX_EQ_BASE + 0x440) 36 #define VORTEX_BAND_COEFF_SIZE 0x30 41 hwwrite(vortex->mmio, 0x2b3c4, gain); in vortex_EqHw_SetTimeConsts() 42 hwwrite(vortex->mmio, 0x2b3c8, level); in vortex_EqHw_SetTimeConsts() 57 int i = 0, n /*esp2c */; in vortex_EqHw_SetLeftCoefs() 59 for (n = 0; in vortex_EqHw_SetLeftCoefs() [all...] |
| /linux/include/dt-bindings/clock/ |
| H A D | omap4.h | 8 #define OMAP4_CLKCTRL_OFFSET 0x20 12 #define OMAP4_MPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) 15 #define OMAP4_DSP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) 18 #define OMAP4_L4_ABE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) 19 #define OMAP4_AESS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) 20 #define OMAP4_MCPDM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) 21 #define OMAP4_DMIC_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) 22 #define OMAP4_MCASP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40) 23 #define OMAP4_MCBSP1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x48) 24 #define OMAP4_MCBSP2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x50) [all …]
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| H A D | omap5.h | 8 #define OMAP5_CLKCTRL_OFFSET 0x20 12 #define OMAP5_MPU_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) 15 #define OMAP5_MMU_DSP_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) 18 #define OMAP5_L4_ABE_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) 19 #define OMAP5_AESS_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) 20 #define OMAP5_MCPDM_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30) 21 #define OMAP5_DMIC_CLKCTRL OMAP5_CLKCTRL_INDEX(0x38) 22 #define OMAP5_MCBSP1_CLKCTRL OMAP5_CLKCTRL_INDEX(0x48) 23 #define OMAP5_MCBSP2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x50) 24 #define OMAP5_MCBSP3_CLKCTRL OMAP5_CLKCTRL_INDEX(0x58) [all …]
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| /linux/tools/testing/selftests/arm64/fp/ |
| H A D | asm-utils.S | 19 svc #0 31 mov x2, #0 32 0: ldrb w3, [x0], #1 35 b 0b 39 svc #0 49 str x30, [sp, #-32]! // Result can't be > 20 digits 51 mov x2, #0 55 0: udiv x3, x0, x2 // div-mod loop to generate the digits 57 add w0, w0, #'0' 60 cbnz x3, 0b [all …]
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| /linux/lib/crypto/x86/ |
| H A D | chacha-ssse3-x86_64.S | 13 ROT8: .octa 0x0e0d0c0f0a09080b0605040702010003 16 ROT16: .octa 0x0d0c0f0e09080b0a0504070601000302 19 CTRINC: .octa 0x00000003000000020000000100000000 68 # x1 = shuffle32(x1, MASK(0, 3, 2, 1)) 69 pshufd $0x39,%xmm1,%xmm1 70 # x2 = shuffle32(x2, MASK(1, 0, 3, 2)) 71 pshufd $0x4e,%xmm2,%xmm2 72 # x3 = shuffle32(x3, MASK(2, 1, 0, 3)) 73 pshufd $0x93,%xmm3,%xmm3 101 # x1 = shuffle32(x1, MASK(2, 1, 0, 3)) [all …]
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| /linux/drivers/usb/misc/sisusbvga/ |
| H A D | sisusb_tables.h | 58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 59 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 60 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 61 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 63 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 64 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 65 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F 69 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15, 70 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15, [all …]
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | dm814x-clocks.dtsi | 12 reg = <0x40 0x40>; 24 reg = <0x80 0x30>; 35 reg = <0xb0 0x30>; 46 reg = <0xe0 0x30>; 57 reg = <0x110 0x30>; 68 reg = <0x140 0x30>; 79 reg = <0x170 0x30>; 90 reg = <0x1a0 0x30>; 101 reg = <0x1d0 0x30>; 112 reg = <0x200 0x30>; [all …]
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7629-hif.c | 23 .set_ofs = 0x30, 24 .clr_ofs = 0x30, 25 .sta_ofs = 0x30, 29 .set_ofs = 0x30, 30 .clr_ofs = 0x30, 31 .sta_ofs = 0x30, 36 "to_u2_phy_1p", 0), 59 static u16 rst_ofs[] = { 0x34, };
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| H A D | clk-mt7622-hif.c | 23 .set_ofs = 0x30, 24 .clr_ofs = 0x30, 25 .sta_ofs = 0x30, 29 .set_ofs = 0x30, 30 .clr_ofs = 0x30, 31 .sta_ofs = 0x30, 36 "to_u2_phy_1p", 0), 64 static u16 rst_ofs[] = { 0x34, };
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| /linux/tools/perf/pmu-events/arch/x86/bonnell/ |
| H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x40", 8 "UMask": "0xa3" 12 "Counter": "0,1", 13 "EventCode": "0x40", 16 "UMask": "0x83" 20 "Counter": "0,1", 21 "EventCode": "0x40", 24 "UMask": "0x10" 28 "Counter": "0,1", [all …]
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| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-samsung-s6e63j0x03.c | 23 #define MCS_LEVEL2_KEY 0xf0 24 #define MCS_MTP_KEY 0xf1 25 #define MCS_MTP_SET3 0xd4 54 .flags = 0, 60 0x00, 0x00, 0x00, 0x7f, 0x7f, 0x7f, 0x52, 0x6b, 0x6f, 0x26, 61 0x28, 0x2d, 0x28, 0x26, 0x27, 0x33, 0x34, 0x32, 0x36, 0x36, 62 0x35, 0x00, 0xab, 0x00, 0xae, 0x00, 0xbf 66 0x00, 0x00, 0x00, 0x70, 0x7f, 0x7f, 0x4e, 0x64, 0x69, 0x26, 67 0x27, 0x2a, 0x28, 0x29, 0x27, 0x31, 0x32, 0x31, 0x35, 0x34, 68 0x35, 0x00, 0xc4, 0x00, 0xca, 0x00, 0xdc [all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | dp.h | 12 #define DPCD_RC00_DPCD_REV 0x00000 13 #define DPCD_RC01_MAX_LINK_RATE 0x00001 14 #define DPCD_RC02 0x00002 15 #define DPCD_RC02_ENHANCED_FRAME_CAP 0x80 16 #define DPCD_RC02_TPS3_SUPPORTED 0x40 17 #define DPCD_RC02_MAX_LANE_COUNT 0x1f 18 #define DPCD_RC03 0x00003 19 #define DPCD_RC03_TPS4_SUPPORTED 0x80 20 #define DPCD_RC03_MAX_DOWNSPREAD 0x01 21 #define DPCD_RC0E 0x0000e [all …]
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| /linux/include/linux/mfd/da9063/ |
| H A D | registers.h | 18 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */ 19 /* Page 1 : SPI access 0x080 - 0x0FF */ 20 /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */ 21 /* Page 3 : SPI access 0x180 - 0x1FF */ 22 #define DA9063_REG_PAGE_CON 0x00 25 #define DA9063_REG_STATUS_A 0x01 26 #define DA9063_REG_STATUS_B 0x02 27 #define DA9063_REG_STATUS_C 0x03 28 #define DA9063_REG_STATUS_D 0x04 29 #define DA9063_REG_FAULT_LOG 0x05 [all …]
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| /linux/drivers/soc/qcom/ |
| H A D | spm.c | 29 #define SPM_CTL_INDEX 0x7f 31 #define SPM_CTL_EN BIT(0) 34 #define SPM_VCTL_VLVL GENMASK(7, 0) 35 #define SPM_PMIC_DATA_0_VLVL GENMASK(7, 0) 36 #define SPM_PMIC_DATA_1_MIN_VSEL GENMASK(5, 0) 91 [SPM_REG_AVS_CTL] = 0x904, 92 [SPM_REG_AVS_LIMIT] = 0x908, 97 .avs_ctl = 0x1010031, 98 .avs_limit = 0x4580458, 103 .avs_ctl = 0x101c031, [all …]
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| /linux/arch/alpha/include/asm/ |
| H A D | core_marvel.h | 34 ev7_csr RBOX_CFG; /* 0x0000 */ 38 ev7_csr RBOX_TCTL; /* 0x0040 */ 42 ev7_csr RBOX_INTQ; /* 0x0080 */ 46 ev7_csr RBOX_SCRATCH2; /* 0x00c0 */ 56 #define EV7_PE_MASK 0x1ffUL /* 9 bits ( 256 + mem/io ) */ 59 #define EV7_CSR_PHYS(pe, off) (EV7_IPE(pe) | (0x7FFCUL << 20) | (off)) 60 #define EV7_CSRS_PHYS(pe) (EV7_CSR_PHYS(pe, 0UL)) 76 io7_csr POx_CTRL; /* 0x0000 */ 80 io7_csr POx_MEM_ADR_EXT; /* 0x0100 */ 82 io7_csr rsvd1[2]; /* ?? spec doesn't show 0x180 */ [all …]
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