/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nxp,s32g2-siul2-pinctrl.yaml | 17 SIUL2_0 @ 0x4009c000 18 SIUL2_1 @ 0x44010000 41 - description: MSCR registers group 0 in SIUL2_0 44 - description: IMCR registers group 0 in SIUL2_0 54 '-grp[0-9]$': 97 reg = <0x4009c240 0x198>, 99 <0x44010400 0x2c>, 101 <0x44010480 0xbc>, 103 <0x4009ca40 0x150>, 105 <0x44010c1c 0x45c>, [all …]
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/linux/drivers/net/dsa/xrs700x/ |
H A D | xrs700x_reg.h | 4 #define XRS_DEVICE_ID_BASE 0x0 5 #define XRS_GPIO_BASE 0x10000 6 #define XRS_PORT_OFFSET 0x10000 7 #define XRS_PORT_BASE(x) (0x200000 + XRS_PORT_OFFSET * (x)) 8 #define XRS_RTC_BASE 0x280000 9 #define XRS_TS_OFFSET 0x8000 10 #define XRS_TS_BASE(x) (0x290000 + XRS_TS_OFFSET * (x)) 11 #define XRS_SWITCH_CONF_BASE 0x300000 14 #define XRS_DEV_ID0 (XRS_DEVICE_ID_BASE + 0) 21 #define XRS_CONFIG0 (XRS_GPIO_BASE + 0x1000) [all …]
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/linux/drivers/usb/serial/ |
H A D | safe_serial.c | 35 * 0..N-2 data and optional padding 38 * bits 1-0 top two bits of 10 bit CRC 43 * + 7 . 6 . 5 . 4 . 3 . 2 . 1 . 0 | 7 . 6 . 5 . 4 . 3 . 2 . 1 . 0 + 85 module_param(safe, bool, 0); 88 module_param(padded, bool, 0); 91 #define CDC_DEVICE_CLASS 0x02 93 #define CDC_INTERFACE_CLASS 0x02 94 #define CDC_INTERFACE_SUBCLASS 0x06 96 #define LINEO_INTERFACE_CLASS 0xff 98 #define LINEO_INTERFACE_SUBCLASS_SAFENET 0x01 [all …]
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/linux/include/linux/mfd/mt6331/ |
H A D | registers.h | 10 #define MT6331_STRUP_CON0 0x0 11 #define MT6331_STRUP_CON2 0x2 12 #define MT6331_STRUP_CON3 0x4 13 #define MT6331_STRUP_CON4 0x6 14 #define MT6331_STRUP_CON5 0x8 15 #define MT6331_STRUP_CON6 0xA 16 #define MT6331_STRUP_CON7 0xC 17 #define MT6331_STRUP_CON8 0xE 18 #define MT6331_STRUP_CON9 0x10 19 #define MT6331_STRUP_CON10 0x12 [all …]
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/linux/drivers/video/fbdev/ |
H A D | platinumfb.h | 54 * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5)) 55 * Newer ones use the values in clocksel[0], for which the formula 57 * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5)) 69 #define DIV2 0x20 70 #define DIV4 0x40 71 #define DIV8 0x60 72 #define DIV16 0x80 76 0x5c00, 78 { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, 79 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d, [all …]
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/linux/include/uapi/linux/ |
H A D | input-event-codes.h | 23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */ 24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */ 25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */ 26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */ 27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ 28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ 29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ 31 #define INPUT_PROP_MAX 0x1f 38 #define EV_SYN 0x00 39 #define EV_KEY 0x0 [all...] |
/linux/include/dt-bindings/input/ |
H A D | linux-event-codes.h | 23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */ 24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */ 25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */ 26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */ 27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ 28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ 29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ 31 #define INPUT_PROP_MAX 0x1f 38 #define EV_SYN 0x00 39 #define EV_KEY 0x0 [all...] |
/linux/sound/drivers/opl4/ |
H A D | opl4_synth.c | 41 #define MIDI_CTL_RELEASE_TIME 0x48 42 #define MIDI_CTL_ATTACK_TIME 0x49 43 #define MIDI_CTL_DECAY_TIME 0x4b 44 #define MIDI_CTL_VIBRATO_RATE 0x4c 45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d 46 #define MIDI_CTL_VIBRATO_DELAY 0x4e 52 static const s16 snd_opl4_pitch_map[0x600] = { 53 0x000,0x000,0x001,0x001,0x002,0x002,0x003,0x003, 54 0x004,0x004,0x005,0x005,0x006,0x006,0x006,0x007, 55 0x007,0x008,0x008,0x009,0x009,0x00a,0x00a,0x00b, [all …]
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/linux/drivers/net/ethernet/meta/fbnic/ |
H A D | fbnic_csr.h | 16 #define MIN_FW_MAJOR_VERSION 0 23 #define PCI_DEVICE_ID_META_FBNIC_ASIC 0x0013 29 #define FBNIC_TWD_L2_HLEN_MASK DESC_GENMASK(5, 0) 33 FBNIC_TWD_L3_TYPE_OTHER = 0, 43 FBNIC_TWD_L4_TYPE_OTHER = 0, 62 FBNIC_TWD_TYPE_META = 0, 71 #define FBNIC_TWD_TS_MASK DESC_GENMASK(39, 0) 72 #define FBNIC_TWD_ADDR_MASK DESC_GENMASK(45, 0) 76 #define FBNIC_TCD_TYPE0_HEAD0_MASK DESC_GENMASK(15, 0) 79 #define FBNIC_TCD_TYPE1_TS_MASK DESC_GENMASK(39, 0) [all …]
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/linux/arch/powerpc/xmon/ |
H A D | spu-insns.h | 17 0 3 1 1 2 3 0 1 1 2 3 18 0 7 4 1 0 7 4 1 23 0 9 1 2 3 0 7 1 2 3 29 0 8 2 3 0 6 2 3 35 0 1 1 2 3 0 6 8 2 3 36 0 7 4 1 4 1 41 0 1 1 1 2 3 42 0 5 7 4 1 47 …t field other than op are defined as 0s. For example, opcode of fma instruction which is RRR forma… 48 since 0x700 -> 11'b11100000000, this means opcode is 4'b1110, and other 7bits are defined as 7'b000… [all …]
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/linux/drivers/mfd/ |
H A D | cs47l85-tables.c | 18 { 0x80, 0x0003 }, 19 { 0x213, 0x03E4 }, 20 { 0x177, 0x0281 }, 21 { 0x197, 0x0281 }, 22 { 0x1B7, 0x0281 }, 23 { 0x4B1, 0x010A }, 24 { 0x4CF, 0x0933 }, 25 { 0x36C, 0x011B }, 26 { 0x4B8, 0x1120 }, 27 { 0x4A0, 0x3280 }, [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/dce/ |
H A D | dce_11_0_d.h | 27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmDCFEV0_PG_CONFIG 0x2db [all …]
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H A D | dce_10_0_d.h | 27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmPIPE3_PG_CONFIG 0x2c9 [all …]
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H A D | dce_11_2_d.h | 27 #define mmPIPE0_PG_CONFIG 0x2c0 28 #define mmPIPE0_PG_ENABLE 0x2c1 29 #define mmPIPE0_PG_STATUS 0x2c2 30 #define mmPIPE1_PG_CONFIG 0x2c3 31 #define mmPIPE1_PG_ENABLE 0x2c4 32 #define mmPIPE1_PG_STATUS 0x2c5 33 #define mmPIPE2_PG_CONFIG 0x2c6 34 #define mmPIPE2_PG_ENABLE 0x2c7 35 #define mmPIPE2_PG_STATUS 0x2c8 36 #define mmPIPE3_PG_CONFIG 0x2c9 [all …]
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