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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dsamsung,exynos4212-fimc-is.yaml85 "^pmu@[0-9a-f]+$":
100 "^i2c-isp@[0-9a-f]+$":
122 pinctrl-0: true
154 reg = <0x12000000 0x260000>;
198 reg = <0x12140000 0x100>;
201 pinctrl-0 = <&fimc_is_i2c1>;
204 #size-cells = <0>;
[all...]
H A Dsamsung,fimc.yaml34 The clock specifier cell stores an index of a clock: 0, 1 for
78 "^csis@[0-9a-f]+$":
83 "^fimc@[0-9a-f]+$":
88 "^fimc-is@[0-9a-f]+$":
93 "^fimc-lite@[0-9a-f]+$":
121 ranges = <0x0 0x0 0xba1000>;
133 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
136 fimc@0 {
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-cm-t3x.dtsi10 reg = <0x80000000 0x10000000>; /* 256 MB */
16 pinctrl-0 = <&green_led_pins>;
46 #phy-cells = <0>;
53 #phy-cells = <0>;
79 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
80 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
86 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
87 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
88 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
89 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
[all …]
H A Domap3-tao3530.dtsi25 cpu@0 {
32 reg = <0x80000000 0x10000000>; /* 256 MB */
50 #phy-cells = <0>;
75 OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
76 OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
77 OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
78 OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
79 OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
80 OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
81 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
[all …]
H A Domap3-devkit8000-common.dtsi12 reg = <0x80000000 0x10000000>; /* 256 MB */
74 #size-cells = <0>;
76 port@0 {
77 reg = <0>;
125 reg = <0x48>;
165 timer@0 {
174 timer@0 {
186 ti,pulldowns = <0x03a1c6>;
190 linux,keymap = <MATRIX_KEY(0,
[all...]
H A Domap3-beagle.dts14 cpu@0 {
21 reg = <0x80000000 0x10000000>; /* 256 MB */
64 #phy-cells = <0>;
80 linux,code = <0x114>;
91 pinctrl-0 = <&tfp410_pins>;
95 #size-cells = <0>;
97 port@0 {
98 reg = <0>;
143 reg = <0x5401b000 0x1000>;
158 reg = <0x54010000 0x1000>;
[all …]
H A Domap3-lilly-a83x.dtsi13 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
18 reg = <0x80000000 0x8000000>; /* 128 MB */
50 #phy-cells = <0>;
59 OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
65 OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
71 OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
81 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
82 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
83 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
84 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
[all …]
H A Domap3-pandora-common.dtsi13 cpu@0 {
20 reg = <0x80000000 0x20000000>; /* 512 MB */
29 #clock-cells = <0>;
50 pinctrl-0 = <&led_pins>;
54 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* GPIO_128 */
85 pinctrl-0 = <&button_pins>;
104 gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; /* GPIO_96 */
201 linux,code = <0x00>; /* SW_LID lid shut */
202 linux,input-type = <0x05>; /* EV_SW */
212 #phy-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi35 reg = <0x03200000 0x800000>;
88 pinctrl-0 = <&backlight_i2c_default_state>;
94 #size-cells = <0>;
98 reg = <0x2c>;
100 dev-ctrl = /bits/ 8 <0x80>;
101 init-brt = /bits/ 8 <0x3f>;
103 pwms = <&backlight_pwm 0 100000>;
107 rom-addr = /bits/ 8 <0xa0>;
108 rom-val = /bits/ 8 <0x44>;
112 rom-addr = /bits/ 8 <0xa1>;
[all …]
H A Dqcom-apq8026-samsung-milletwifi.dts39 reg = <0x03200000 0x800000>;
92 pinctrl-0 = <&backlight_i2c_default_state>;
98 #size-cells = <0>;
102 reg = <0x2c>;
105 dev-ctrl = /bits/ 8 <0x80>;
106 init-brt = /bits/ 8 <0x3f>;
114 rom-addr = /bits/ 8 <0xa3>;
115 rom-val = /bits/ 8 <0x5e>;
120 * (0, 120deg, 240deg, -, -, -),
124 rom-addr = /bits/ 8 <0xa5>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
77 ranges = <0x0 0x0 0xf0000000 0x1000000>;
81 reg = <0x100000 0x100000>;
105 reg = <0x210000 0x10000>,
106 <0x220000 0x20000>,
107 <0x240000 0x20000>,
108 <0x260000 0x20000>;
113 reg = <0x280000 0x1000>;
120 reg = <0x290000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8250-xiaomi-pipa.dts35 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
36 qcom,board-id = <0x34 0>;
45 reg = <0x0 0x9c000000 0x0 0x2300000>;
92 pinctrl-0 = <&vol_up_n>;
124 reg = <0x0 0x80600000 0x0 0x260000>;
129 reg = <0x0 0x88c00000 0x0 0x2f00000>;
134 reg = <0x0 0x8bb00000 0x0 0x2500000>;
139 reg = <0x0 0x8e000000 0x0 0x100000>;
144 reg = <0x0 0x8e100000 0x0 0x4600000>;
149 reg = <0x0 0x9c000000 0x0 0x2300000>;
[all …]
H A Dsm8250-xiaomi-elish.dts32 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
33 qcom,board-id = <0x10008 0>;
42 reg = <0x0 0x9c000000 0x0 0x2300000>;
90 pinctrl-0 = <&vol_up_n>;
121 reg = <0x0 0x80600000 0x0 0x260000>;
126 reg = <0x0 0x88c00000 0x0 0x2f00000>;
131 reg = <0x0 0x8bb00000 0x0 0x2500000>;
136 reg = <0x0 0x8e000000 0x0 0x100000>;
141 reg = <0x0 0x8e100000 0x0 0x4600000>;
146 reg = <0x0 0x9c000000 0x0 0x2300000>;
[all …]
H A Dsm8250-xiaomi-elish-common.dtsi30 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
31 qcom,board-id = <0x10008 0>;
44 reg = <0x0 0x9c000000 0x0 0x2300000>;
92 pinctrl-0 = <&vol_up_n>;
108 pinctrl-0 = <&bt_en_state>, <&wlan_en_state>;
184 reg = <0x0 0x80600000 0x0 0x260000>;
189 reg = <0x0 0x88c00000 0x0 0x2f00000>;
194 reg = <0x0 0x8bb00000 0x0 0x2500000>;
199 reg = <0x0 0x8e000000 0x0 0x100000>;
204 reg = <0x0 0x8e100000 0x0 0x4600000>;
[all …]
H A Dsm8550.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
67 #size-cells = <0>;
69 cpu0: cpu@0 {
72 reg = <0 0>;
73 clocks = <&cpufreq_hw 0>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0 0x100>;
[all …]
H A Dsm8650.dtsi42 #clock-cells = <0>;
47 #clock-cells = <0>;
52 #clock-cells = <0>;
61 #clock-cells = <0>;
71 #size-cells = <0>;
73 cpu0: cpu@0 {
76 reg = <0 0>;
78 clocks = <&cpufreq_hw 0>;
88 qcom,freq-domain = <&cpufreq_hw 0>;
118 reg = <0 0x100>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4x12.dtsi70 #interconnect-cells = <0>;
80 #interconnect-cells = <0>;
120 #interconnect-cells = <0>;
211 reg = <0x11400000 0x1000>;
217 reg = <0x11000000 0x1000>;
229 reg = <0x03860000 0x1000>;
231 interrupts = <10 0>;
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
[all …]
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/freebsd/sys/dev/bnxt/bnxt_en/
H A Dbnxt.h54 #define BROADCOM_VENDOR_ID 0x14E4
56 #define BCM57301 0x16c8
57 #define BCM57302 0x16c9
58 #define BCM57304 0x16ca
59 #define BCM57311 0x16ce
60 #define BCM57312 0x16cf
61 #define BCM57314 0x16df
62 #define BCM57402 0x16d0
63 #define BCM57402_NPAR 0x16d4
64 #define BCM57404 0x16d1
[all …]
/freebsd/sys/arm/freescale/imx/
H A Dimx6_ipu.c61 static int have_ipu = 0;
75 #define DI_PORT 0
87 #define CPMEM_BASE 0x300000
88 #define DC_TEMPL_BASE 0x380000
92 #define TEMPLATE_SYNC(v) ((v) << 0)
100 #define OPCODE_WROD 0x18
103 #define IPU_CONF 0x200000
109 #define IPU_DISP_GEN 0x2000C4
114 #define IPU_MEM_RST 0x2000DC
116 #define IPU_MEM_RST_ALL 0x807FFFFF
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]