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/freebsd/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos5433-decon.txt26 size-cells must 1 and 0, respectively.
28 node. The reg value muset be 0.
34 reg = <0x13800000 0x2104>;
47 interrupts = <0 202 0>, <0 203 0>;
51 #size-cells = <0>;
53 port@0 {
54 reg = <0>;
/freebsd/sys/contrib/device-tree/Bindings/display/samsung/
H A Dsamsung,exynos5433-decon.yaml102 reg = <0x13800000 0x2104>;
136 #size-cells = <0>;
138 port@0 {
139 reg = <0>;
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-overo-common-dvi.dtsi13 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
14 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
15 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
16 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
17 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
18 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
19 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
20 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
21 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
22 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
[all …]
H A Domap3-thunder.dts17 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
18 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
19 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
20 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
21 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
22 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
23 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
24 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
25 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
26 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
[all …]
H A Domap3-ha-lcd.dts16 pinctrl-0 = <
29 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio_136, Touchscreen IRQ */
35 OMAP3_CORE1_IOPAD(0x212c, PIN_OUTPUT_PULLUP | MUX_MODE4) /* gpio_110, Touchscreen Wake */
41 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
42 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
43 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
44 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
45 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
46 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
47 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
[all …]
H A Domap3-overo-common-lcd43.dtsi13 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
14 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
15 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
16 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
17 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
18 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
19 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
20 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
21 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
22 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
[all …]
H A Domap3-overo-common-lcd35.dtsi13 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
14 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
15 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
16 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
17 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
18 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
19 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
20 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
21 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
22 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
[all …]
H A Domap3-evm-processor-common.dtsi8 reg = <0x80000000 0x10000000>; /* 256 MB */
13 pinctrl-0 = <&wl12xx_gpio>;
21 pinctrl-0 = <
29 pinctrl-0 = <&ehci_phy_pins>;
34 pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
38 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
39 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
40 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
41 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
43 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
[all …]
H A Domap3-igep0020-common.dtsi16 pinctrl-0 = <&leds_pins>;
58 #phy-cells = <0>;
67 #size-cells = <0>;
69 port@0 {
70 reg = <0>;
105 pinctrl-0 = <
112 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
118 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
119 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
120 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
[all …]
H A Domap3-cm-t3x.dtsi10 reg = <0x80000000 0x10000000>; /* 256 MB */
16 pinctrl-0 = <&green_led_pins>;
46 #phy-cells = <0>;
53 #phy-cells = <0>;
79 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
80 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
86 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
87 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
88 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
89 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
[all …]
H A Domap3-beagle-xm.dts14 cpu@0 {
21 reg = <0x80000000 0x20000000>; /* 512 MB */
32 #clock-cells = <0>;
76 linux,code = <0x114>;
97 #phy-cells = <0>;
108 #size-cells = <0>;
110 port@0 {
111 reg = <0>;
156 reg = <0x5401b000 0x1000>;
171 reg = <0x54010000 0x1000>;
[all …]
H A Domap3-devkit8000-common.dtsi12 reg = <0x80000000 0x10000000>; /* 256 MB */
74 #size-cells = <0>;
76 port@0 {
77 reg = <0>;
125 reg = <0x48>;
165 timer@0 {
174 timer@0 {
186 ti,pulldowns = <0x03a1c6>;
190 linux,keymap = <MATRIX_KEY(0,
[all...]
H A Domap3-beagle.dts14 cpu@0 {
21 reg = <0x80000000 0x10000000>; /* 256 MB */
64 #phy-cells = <0>;
80 linux,code = <0x114>;
91 pinctrl-0 = <&tfp410_pins>;
95 #size-cells = <0>;
97 port@0 {
98 reg = <0>;
143 reg = <0x5401b000 0x1000>;
158 reg = <0x54010000 0x1000>;
[all …]
H A Dlogicpd-torpedo-baseboard.dtsi7 pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
47 pinctrl-0 = <&led_pins>;
65 pinctrl-0 = <&pwm_pins>;
68 ti,clock-source = <0x01>;
85 pinctrl-0 = <&mcbsp2_pins>;
95 ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
96 1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */
97 6 0 0x28000000 0x1000000>; /* CS6: 16MB for ISP1763 */
101 pinctrl-0 = <&lan9221_pins>;
104 reg = <1 0 0xff>;
[all …]
H A Domap3-pandora-common.dtsi13 cpu@0 {
20 reg = <0x80000000 0x20000000>; /* 512 MB */
29 #clock-cells = <0>;
50 pinctrl-0 = <&led_pins>;
54 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* GPIO_128 */
85 pinctrl-0 = <&button_pins>;
104 gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; /* GPIO_96 */
201 linux,code = <0x00>; /* SW_LID lid shut */
202 linux,input-type = <0x05>; /* EV_SW */
212 #phy-cells = <0>;
[all …]
H A Domap3-gta04.dtsi16 cpu@0 {
23 reg = <0x80000000 0x20000000>; /* 512 MB */
47 #clock-cells = <0>;
105 #sound-dai-cells = <0>;
110 #address-cells = <0x1>;
111 #size-cells = <0x0>;
113 pinctrl-0 = <&spi_gpio_pins>;
122 lcd: td028ttec1@0 {
124 reg = <0>;
[all...]
H A Domap3-n900.dts46 cpu@0 {
58 pinctrl-0 = <&debug_leds>;
64 reg = <0x80000000 0x10000000>; /* 256 MB */
117 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
156 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
164 ti,clock-source = <0x00>; /* timer_sys_ck */
169 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
181 #clock-cells = <0>;
190 pinctrl-0 = <&camera_pins>;
200 data-lanes = <0>;
[all …]
/freebsd/sys/dev/tws/
H A Dtws_services.c55 { "Cannot add sysctl tree node", 0x2000, ERROR,
56 "%s: (0x%02X: 0x%04X): %s:\n", "ERROR" },
57 { "Register window not available", 0x2001, ERROR,
58 "%s: (0x%02X: 0x%04X): %s:\n", "ERROR" },
59 { "Can't allocate register window", 0x2002, ERROR,
60 "%s: (0x%02X: 0x%04X): %s:\n", "ERROR" },
61 { "Can't allocate interrupt", 0x2003, ERROR,
62 "%s: (0x%02X: 0x%04X): %s:\n", "ERROR" },
63 { "Can't set up interrupt", 0x2004, ERROR,
64 "%s: (0x%02X: 0x%04X): %s:\n", "ERROR" },
[all …]
/freebsd/sys/dev/cxgb/common/
H A Dcxgb_ael1002.c46 AEL100X_TX_CONFIG1 = 0xc002,
48 AEL1002_PWR_DOWN_HI = 0xc011,
49 AEL1002_PWR_DOWN_LO = 0xc012,
50 AEL1002_XFI_EQL = 0xc015,
51 AEL1002_LB_EN = 0xc017,
53 AEL_OPT_SETTINGS = 0xc017,
54 AEL_I2C_CTRL = 0xc30a,
55 AEL_I2C_DATA = 0xc30b,
56 AEL_I2C_STAT = 0xc30c,
58 AEL2005_GPIO_CTRL = 0xc214,
[all …]
/freebsd/contrib/elftoolchain/libdwarf/
H A Ddwarf.h32 #define DW_TAG_array_type 0x01
33 #define DW_TAG_class_type 0x02
34 #define DW_TAG_entry_point 0x03
35 #define DW_TAG_enumeration_type 0x04
36 #define DW_TAG_formal_parameter 0x05
37 #define DW_TAG_imported_declaration 0x08
38 #define DW_TAG_label 0x0a
39 #define DW_TAG_lexical_block 0x0b
40 #define DW_TAG_member 0x0d
41 #define DW_TAG_pointer_type 0x0f
[all …]
/freebsd/sys/dev/ral/
H A Drt2661reg.h35 #define RT2661_HOST_CMD_CSR 0x0008
36 #define RT2661_MCU_CNTL_CSR 0x000c
37 #define RT2661_SOFT_RESET_CSR 0x0010
38 #define RT2661_MCU_INT_SOURCE_CSR 0x0014
39 #define RT2661_MCU_INT_MASK_CSR 0x0018
40 #define RT2661_PCI_USEC_CSR 0x001c
41 #define RT2661_H2M_MAILBOX_CSR 0x2100
42 #define RT2661_M2H_CMD_DONE_CSR 0x2104
43 #define RT2661_HW_BEACON_BASE0 0x2c00
44 #define RT2661_MAC_CSR0 0x3000
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_regs.h9 #define MT_ASIC_VERSION 0x0000
11 #define MT76XX_REV_E3 0x22
12 #define MT76XX_REV_E4 0x33
14 #define MT_CMB_CTRL 0x0020
18 #define MT_EFUSE_CTRL 0x0024
19 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0)
27 #define MT_EFUSE_DATA_BASE 0x0028
30 #define MT_COEXCFG0 0x0040
31 #define MT_COEXCFG0_COEX_EN BIT(0)
33 #define MT_WLAN_FUN_CTRL 0x0080
[all …]
/freebsd/sys/dev/gem/
H A Dif_gemreg.h37 #define GEM_SEB_STATE 0x0000 /* SEB state reg, R/O */
38 #define GEM_CONFIG 0x0004 /* config reg */
39 #define GEM_STATUS 0x000c /* status reg */
40 /* Note: Reading the status reg clears bits 0-6. */
41 #define GEM_INTMASK 0x0010
42 #define GEM_INTACK 0x0014 /* Interrupt acknowledge, W/O */
43 #define GEM_STATUS_ALIAS 0x001c
46 #define GEM_SEB_ARB 0x00000002 /* Arbitration status */
47 #define GEM_SEB_RXWON 0x00000004
50 #define GEM_CONFIG_BURST_64 0x00000000 /* maximum burst size 64KB */
[all …]
/freebsd/sys/dev/cas/
H A Dif_casreg.h42 #define CAS_CAW 0x0004 /* core arbitration weight */
43 #define CAS_INF_BURST 0x0008 /* infinite burst enable */
44 #define CAS_STATUS 0x000c /* interrupt status */
45 #define CAS_INTMASK 0x0010 /* interrupt mask */
46 #define CAS_CLEAR_ALIAS 0x0014 /* clear mask alias */
47 #define CAS_STATUS_ALIAS 0x001c /* interrupt status alias */
48 #define CAS_ERROR_STATUS 0x1000 /* PCI error status */
49 #define CAS_ERROR_MASK 0x1004 /* PCI error mask */
50 #define CAS_BIM_CONF 0x1008 /* BIM configuration */
51 #define CAS_BIM_DIAG 0x100c /* BIM diagnostic */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
96 i-cache-size = <0x8000>;
99 d-cache-size = <0x8000>;
109 reg = <0x101>;
112 i-cache-size = <0x8000>;
115 d-cache-size = <0x8000>;
125 reg = <0x102>;
128 i-cache-size = <0x800
[all...]

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