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/freebsd/sys/contrib/dev/rtw89/
H A Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,qcm2290-dpu.yaml61 reg = <0x05e01000 0x8f000>,
62 <0x05eb0000 0x2008>;
76 interrupts = <0>;
80 #size-cells = <0>;
82 port@0 {
83 reg = <0>;
H A Dqcom,sm6115-dpu.yaml63 reg = <0x05e01000 0x8f000>,
64 <0x05eb0000 0x2008>;
79 interrupts = <0>;
83 #size-cells = <0>;
85 port@0 {
86 reg = <0>;
H A Dqcom,sc7280-dpu.yaml63 reg = <0x0ae01000 0x8f000>,
64 <0x0aeb0000 0x2008>;
82 interrupts = <0>;
88 #size-cells = <0>;
90 port@0 {
91 reg = <0>;
H A Dqcom,sdm845-dpu.yaml63 reg = <0x0ae01000 0x8f000>,
64 <0x0aeb0000 0x2008>;
75 interrupts = <0>;
81 #size-cells = <0>;
83 port@0 {
84 reg = <0>;
H A Dqcom,sm8150-dpu.yaml54 reg = <0x0ae01000 0x8f000>,
55 <0x0aeb0000 0x2008>;
71 interrupts = <0>;
75 #size-cells = <0>;
77 port@0 {
78 reg = <0>;
H A Dqcom,msm8998-dpu.yaml64 reg = <0x0c901000 0x8f000>,
65 <0x0c9a8e00 0xf0>,
66 <0x0c9b0000 0x2008>,
67 <0x0c9b8000 0x1040>;
78 interrupts = <0>;
[all...]
H A Dqcom,sm8250-dpu.yaml61 reg = <0x0ae01000 0x8f000>,
62 <0x0aeb0000 0x2008>;
78 interrupts = <0>;
82 #size-cells = <0>;
84 port@0 {
85 reg = <0>;
H A Dqcom,sc7180-dpu.yaml87 reg = <0x0ae01000 0x8f000>,
88 <0x0aeb0000 0x2008>;
102 interrupts = <0>;
108 #size-cells = <0>;
110 port@0 {
111 reg = <0>;
H A Dqcom,sc8280xp-dpu.yaml61 reg = <0x0ae01000 0x8f000>,
62 <0x0aeb0000 0x2008>;
87 interrupts = <0>;
91 #size-cells = <0>;
93 port@0 {
94 reg = <0>;
H A Dqcom,sm8350-dpu.yaml58 reg = <0x0ae01000 0x8f000>,
59 <0x0aeb0000 0x2008>;
82 interrupts = <0>;
86 #size-cells = <0>;
88 port@0 {
89 reg = <0>;
H A Dqcom,sm8550-dpu.yaml64 reg = <0x0ae01000 0x8f000>,
65 <0x0aeb0000 0x2008>;
88 interrupts = <0>;
92 #size-cells = <0>;
94 port@0 {
95 reg = <0>;
H A Dqcom,sm8650-dpu.yaml62 reg = <0x0ae01000 0x8f000>,
63 <0x0aeb0000 0x2008>;
84 interrupts = <0>;
88 #size-cells = <0>;
90 port@0 {
91 reg = <0>;
H A Dqcom,sm8450-dpu.yaml65 reg = <0x0ae01000 0x8f000>,
66 <0x0aeb0000 0x2008>;
89 interrupts = <0>;
93 #size-cells = <0>;
95 port@0 {
96 reg = <0>;
H A Dqcom,sm7150-dpu.yaml62 reg = <0x0ae01000 0x8f000>,
63 <0x0aeb0000 0x2008>;
86 interrupts = <0>;
90 #size-cells = <0>;
92 port@0 {
93 reg = <0>;
H A Dqcom,sc8280xp-mdss.yaml35 "^display-controller@[0-9a-f]+$":
43 "^displayport-controller@[0-9a-f]+$":
65 reg = <0x0ae00000 0x1000>;
83 interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>,
84 <&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>;
87 iommus = <&apps_smmu 0x1000 0x40
[all...]
H A Ddpu.txt66 Port 0 -> DPU_INTF1 (DSI1)
78 reg = <0xae00000 0x1000>;
81 power-domains = <&clock_dispcc 0>;
99 iommus = <&apps_iommu 0>;
103 ranges = <0 0 0xae00000 0xb2008>;
107 reg = <0 0x1000 0x8f000>, <0 0xb0000 0x2008>;
118 assigned-clock-rates = <0 0 300000000 19200000>;
120 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
124 #size-cells = <0>;
126 port@0 {
[all …]
H A Ddpu-msm8998.yaml62 "^display-controller@[0-9a-f]+$":
121 port@0:
130 - port@0
164 reg = <0x0c900000 0x1000>;
178 iommus = <&mmss_smmu 0>;
185 reg = <0x0c901000 0x8f000>,
186 <0x0c9a8e00 0xf0>,
187 <0x0c9b0000 0x2008>,
188 <0x0c9b8000 0x1040>;
199 interrupts = <0>;
[all …]
H A Ddpu-sdm845.yaml65 "^display-controller@[0-9a-f]+$":
118 port@0:
127 - port@0
164 reg = <0x0ae00000 0x1000>;
176 iommus = <&apps_smmu 0x880 0x8>,
177 <&apps_smmu 0xc80 0x8>;
182 reg = <0x0ae01000 0x8f000>,
183 <0x0aeb0000 0x2008>;
193 interrupts = <0>;
199 #size-cells = <0>;
[all …]
H A Dqcom,qcm2290-mdss.yaml49 "^display-controller@[0-9a-f]+$":
57 "^dsi@[0-9a-f]+$":
67 "^phy@[0-9a-f]+$":
93 reg = <0x05e00000 0x1000>;
110 iommus = <&apps_smmu 0x420 0x2>,
111 <&apps_smmu 0x421 0x0>;
116 reg = <0x05e0100
[all...]
H A Dqcom,sm6115-mdss.yaml43 "^display-controller@[0-9a-f]+$":
51 "^dsi@[0-9a-f]+$":
65 "^phy@[0-9a-f]+$":
90 reg = <0x05e00000 0x1000>;
101 iommus = <&apps_smmu 0x420 0x2>,
102 <&apps_smmu 0x421 0x0>;
107 reg = <0x05e0100
[all...]
H A Dqcom,sm6375-mdss.yaml48 "^display-controller@[0-9a-f]+$":
56 "^dsi@[0-9a-f]+$":
66 "^phy@[0-9a-f]+$":
86 reg = <0x05e00000 0x1000>;
100 iommus = <&apps_smmu 0x820 0x2>;
107 reg = <0x05e01000 0x8e030>,
108 <0x05eb0000 0x2008>;
133 interrupts = <0>;
137 #size-cells = <0>;
139 port@0 {
[all …]
H A Ddpu-qcm2290.yaml74 "^display-controller@[0-9a-f]+$":
129 port@0:
134 - port@0
171 reg = <0x05e00000 0x1000>;
186 iommus = <&apps_smmu 0x420 0x2>,
187 <&apps_smmu 0x421 0x0>;
192 reg = <0x05e01000 0x8f000>,
193 <0x05eb0000 0x2008>;
207 interrupts = <0>;
211 #size-cells = <0>;
[all …]
H A Ddpu-sc7180.yaml73 "^display-controller@[0-9a-f]+$":
130 port@0:
139 - port@0
176 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x800 0x2>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
211 interrupts = <0>;
217 #size-cells = <0>;
219 port@0 {
[all …]
/freebsd/sys/dev/mlx5/
H A Ddiagnostics.h41 m(+1, pxd_ready_bp, 0x0401) \
42 m(+1, pci_write_bp, 0x0402) \
43 m(+1, pci_read_bp, 0x0403) \
44 m(+1, pci_read_stuck_no_completion_buffer, 0x0404) \
45 m(+1, max_pci_bw, 0x0405) \
46 m(+1, used_pci_bw, 0x0406) \
47 m(+1, rx_pci_errors, 0) \
48 m(+1, tx_pci_errors, 0) \
49 m(+1, tx_pci_correctable_errors, 0) \
50 m(+1, tx_pci_non_fatal_errors, 0) \
[all …]

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