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Searched +full:0 +full:x20002000 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dsi_blit_shaders.h29 0xc0066900,
30 0x00000000,
31 0x00000060, /* DB_RENDER_CONTROL */
32 0x00000000, /* DB_COUNT_CONTROL */
33 0x00000000, /* DB_DEPTH_VIEW */
34 0x0000002a, /* DB_RENDER_OVERRIDE */
35 0x00000000, /* DB_RENDER_OVERRIDE2 */
36 0x00000000, /* DB_HTILE_DATA_BASE */
38 0xc0046900,
39 0x00000008,
[all …]
H A Dcik_blit_shaders.h32 0xc0066900,
33 0x00000000,
34 0x00000060, /* DB_RENDER_CONTROL */
35 0x00000000, /* DB_COUNT_CONTROL */
36 0x00000000, /* DB_DEPTH_VIEW */
37 0x0000002a, /* DB_RENDER_OVERRIDE */
38 0x00000000, /* DB_RENDER_OVERRIDE2 */
39 0x00000000, /* DB_HTILE_DATA_BASE */
41 0xc0046900,
42 0x00000008,
[all …]
H A Dcayman_blit_shaders.h40 0xc0066900,
41 0x00000000,
42 0x00000060, /* DB_RENDER_CONTROL */
43 0x00000000, /* DB_COUNT_CONTROL */
44 0x00000000, /* DB_DEPTH_VIEW */
45 0x0000002a, /* DB_RENDER_OVERRIDE */
46 0x00000000, /* DB_RENDER_OVERRIDE2 */
47 0x00000000, /* DB_HTILE_DATA_BASE */
49 0xc0026900,
50 0x0000000a,
[all …]
H A Devergreen_blit_shaders.h41 0xc0016900,
42 0x0000023b,
43 0x00000000, /* SQ_LDS_ALLOC_PS */
45 0xc0066900,
46 0x00000240,
47 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
48 0x00000000,
49 0x00000000,
50 0x00000000,
51 0x00000000,
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_4_1_default.h26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
[all …]
H A Dmmhub_1_0_default.h26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
[all …]
H A Dmmhub_2_0_0_default.h26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
[all …]
H A Dmmhub_2_3_0_default.h26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-clkcfg.yaml18 0 to 32.
76 reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_disp_regs.h18 #define ZYNQMP_DISP_V_BLEND_BG_CLR_0 0x0
19 #define ZYNQMP_DISP_V_BLEND_BG_CLR_1 0x4
20 #define ZYNQMP_DISP_V_BLEND_BG_CLR_2 0x8
21 #define ZYNQMP_DISP_V_BLEND_BG_MAX 0xfff
22 #define ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA 0xc
24 #define ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA_EN BIT(0)
25 #define ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT 0x14
26 #define ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT_RGB 0x0
27 #define ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT_YCBCR444 0x1
28 #define ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT_YCBCR422 0x2
[all …]
/linux/drivers/dpll/zl3073x/
H A Dfw.c22 ZL3073X_FLASH_TYPE_NONE = 0,
40 .max_size = 0x4000,
41 .load_addr = 0x20000000,
46 .max_size = 0x35000,
47 .load_addr = 0x20002000,
49 .dest_page = 0x020,
53 .max_size = 0x0040,
54 .load_addr = 0x20000000,
56 .dest_page = 0x3e0,
57 .copy_page = 0x000,
[all …]
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi15 #size-cells = <0>;
18 cpu0: cpu@0 {
24 reg = <0>;
189 #clock-cells = <0>;
194 mboxes = <&mbox 0>;
199 #clock-cells = <0>;
211 reg = <0x0 0x2010000 0x0 0x1000>;
223 reg = <0x0 0x2000000 0x0 0xC000>;
232 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
233 reg = <0x0 0xc000000 0x0 0x4000000>;
[all …]
/linux/lib/crypto/
H A Ddes.c30 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
31 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
32 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
33 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
34 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
35 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
36 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
37 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
38 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
39 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]