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/linux/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
H A Dg98.fuc0s23 ctx_dma_query: .b32 0
24 ctx_dma_src: .b32 0
25 ctx_dma_dst: .b32 0
27 ctx_query_address_high: .b32 0
28 ctx_query_address_low: .b32 0
29 ctx_query_counter: .b32 0
30 ctx_cond_address_high: .b32 0
31 ctx_cond_address_low: .b32 0
32 ctx_cond_off: .b32 0
33 ctx_src_address_high: .b32 0
[all …]
/linux/arch/arm64/boot/dts/apple/
H A Dt6002.dtsi71 reg = <0x0 0x800>;
73 cpu-release-addr = <0 0>; /* To be filled by loader */
75 i-cache-size = <0x20000>;
76 d-cache-size = <0x10000>;
85 reg = <0x0 0x801>;
87 cpu-release-addr = <0 0>; /* To be filled by loader */
89 i-cache-size = <0x20000>;
90 d-cache-size = <0x10000>;
99 reg = <0x0 0x10900>;
101 cpu-release-addr = <0 0>; /* To be filled by loader */
[all …]
H A Dt600x-common.dtsi20 #size-cells = <0>;
63 cpu_e00: cpu@0 {
66 reg = <0x0 0x0>;
68 cpu-release-addr = <0 0>; /* To be filled by loader */
70 i-cache-size = <0x20000>;
71 d-cache-size = <0x10000>;
80 reg = <0x0 0x1>;
82 cpu-release-addr = <0 0>; /* To be filled by loader */
84 i-cache-size = <0x20000>;
85 d-cache-size = <0x10000>;
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Delba-flash-parts.dtsi11 partition@0 {
13 reg = <0x0 0x10000>;
19 reg = <0x10000 0xfff0000>;
24 reg = <0xf0000 0x10000>;
29 reg = <0x100000 0x80000>;
34 reg = <0x180000 0x200000>;
39 reg = <0x380000 0x10000>;
44 reg = <0x390000 0x10000>;
49 reg = <0x400000 0x3c00000>;
54 reg = <0x4010000 0x20000>;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dtny_a9260_common.dtsi14 reg = <0x20000000 0x4000000>;
30 timer@0 {
32 reg = <0>, <1>;
51 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
55 reg = <0x3 0x0 0x800000>;
68 at91bootstrap@0 {
70 reg = <0x0 0x20000>;
75 reg = <0x20000 0x40000>;
80 reg = <0x60000 0x20000>;
85 reg = <0x80000 0x20000>;
[all …]
H A Dtny_a9263.dts19 reg = <0x20000000 0x4000000>;
39 timer@0 {
41 reg = <0>, <1>;
61 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
65 reg = <0x3 0x0 0x800000>;
78 at91bootstrap@0 {
80 reg = <0x0 0x20000>;
85 reg = <0x20000 0x40000>;
90 reg = <0x60000 0x20000>;
95 reg = <0x80000 0x20000>;
[all …]
H A Dusb_a9260_common.dtsi25 reg = <0x20000000 0x4000000>;
35 timer@0 {
37 reg = <0>, <1>;
62 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
66 reg = <0x3 0x0 0x800000>;
79 at91bootstrap@0 {
81 reg = <0x0 0x20000>;
86 reg = <0x20000 0x40000>;
91 reg = <0x60000 0x20000>;
96 reg = <0x80000 0x20000>;
[all …]
H A Dusb_a9263.dts19 reg = <0x20000000 0x4000000>;
39 timer@0 {
41 reg = <0>, <1>;
63 flash@0 {
65 reg = <0>;
81 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
85 reg = <0x3 0x0 0x800000>;
98 at91bootstrap@0 {
100 reg = <0x0 0x20000>;
105 reg = <0x20000 0x40000>;
[all …]
H A Dat91-qil_a9260.dts18 reg = <0x20000000 0x4000000>;
34 timer@0 {
36 reg = <0>, <1>;
51 pinctrl-0 = <
57 slot@0 {
58 reg = <0>;
64 pinctrl-0 =
75 pinctrl-0 =
83 pinctrl-0 =
99 m41t94@0 {
[all …]
H A Dat91-wb45n.dtsi21 reg = <0x20000000 0x4000000>;
49 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
54 reg = <0x3 0x0 0x800000>;
69 at91bootstrap@0 {
71 reg = <0x0 0x20000>;
76 reg = <0x20000 0x80000>;
81 reg = <0xa0000 0x20000>;
86 reg = <0xc0000 0x20000>;
91 reg = <0xe0000 0x280000>;
96 reg = <0x360000 0x280000>;
[all …]
H A Dat91sam9263ek.dts20 reg = <0x20000000 0x4000000>;
40 timer@0 {
42 reg = <0>, <1>;
52 pinctrl-0 = <
70 pinctrl-0 = <
77 slot@0 {
78 reg = <0>;
97 cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
98 flash@0 {
101 reg = <0>;
[all …]
H A Dat91sam9g20ek_common.dtsi18 reg = <0x20000000 0x4000000>;
62 timer@0 {
64 reg = <0>, <1>;
74 pinctrl-0 =
94 pinctrl-0 = <&pinctrl_usb1_vbus_gpio>;
101 pinctrl-0 = <
117 pinctrl-0 = <&pinctrl_ssc0_tx>;
121 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
135 atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
153 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
[all …]
H A Dat91-som60.dtsi20 reg = <0x20000000 0x8000000>;
105 slot@0 {
106 reg = <0>;
113 slot@0 {
114 reg = <0>;
120 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
127 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
131 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
135 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
139 pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
[all …]
H A Dat91-wb50n.dtsi21 reg = <0x20000000 0x4000000>;
51 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
53 slot@0 {
54 reg = <0>;
61 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
63 atheros@0 {
66 reg = <0>;
76 dmas = <0>, <0>; /* Do not use DMA for dbgu */
84 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
92 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dc293si-post.dtsi39 interrupts = <19 2 0 0>;
42 /* controller at 0xa000 */
48 bus-range = <0 255>;
50 interrupts = <16 2 0 0>;
52 pcie@0 {
53 reg = <0 0 0 0 0>;
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
[all …]
/linux/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2_special_blocks.h16 { GAUDI2_BLOCK_TYPE_TPC, 0xfc008000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
17 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00a000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
18 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00b000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
19 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00c000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
20 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc080000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
21 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc081000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
22 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc083000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
23 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc084000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
24 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c8000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \
25 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c9000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp.dtsi11 reg = <0x00940000 0x20000>;
12 ranges = <0 0x00940000 0x20000>;
20 reg = <0x00960000 0x20000>;
21 ranges = <0 0x00960000 0x20000>;
30 reg = <0x021c8000 0x1000>;
39 reg = <0x021c9000 0x1000>;
48 reg = <0x021ca000 0x1000>;
57 reg = <0x021cb000 0x1000>;
66 reg = <0x021cc000 0x1000>;
75 reg = <0x021cd000 0x1000>;
[all …]
/linux/drivers/of/unittest-data/
H A Dtests-address.dtsi17 ranges = <0x70000000 0x70000000 0x50000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml39 enum: [0, 1, 2]
44 clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
47 If set to 1 then lockstep mode and if 0 then split mode.
50 0: split mode
56 enum: [0, 1]
59 0: split mode
63 "^r(.*)@[0-9a-f]+$":
162 "^r52f@[0-9a-f]+$":
206 "^r5f@[0-9a-f]+$":
241 enum: [0]
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk-netcp.dtsi15 queue-range = <0 0x4000>;
16 linkram0 = <0x100000 0x8000>;
17 linkram1 = <0x0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dkeystone-navigator-qmss.txt27 external link ram entries. If the address is specified as "0"
83 0 : None, i.e interrupt on list full only
123 queue-range = <0 0x4000>;
124 linkram0 = <0x100000 0x8000>;
125 linkram1 = <0x0 0x10000>;
132 managed-queues = <0 0x2000>;
133 reg = <0x2a40000 0x20000>,
134 <0x2a06000 0x400>,
135 <0x2a02000 0x1000>,
136 <0x2a03000 0x1000>,
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap2420-h4.dts15 reg = <0x80000000 0x4000000>; /* 64 MB */
20 ranges = <0 0 0x08000000 0x04000000>;
22 nor@0,0 {
27 reg = <0 0 0x04000000>;
46 partition@0 {
48 reg = <0 0x20000>;
52 reg = <0x20000 0x20000>;
56 reg = <0x40000 0x200000>;
60 reg = <0x240000 0x3dc0000>;
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS_MASK 0x2
36 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS__SHIFT 0x1
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-vpu.dtsi10 ranges = <0x2c000000 0x0 0x2c000000 0x2000000>;
11 reg = <0 0x2c000000 0 0x1000000>;
17 reg = <0x2d000000 0x20000>;
26 reg = <0x2d020000 0x20000>;
35 reg = <0x2d040000 0x20000>;
43 reg = <0x2d080000 0x10000>;
47 mboxes = <&mu_m0 0 0>,
48 <&mu_m0 0 1>,
49 <&mu_m0 1 0>;
54 reg = <0x2d090000 0x10000>;
[all …]
/linux/arch/arm64/boot/dts/blaize/
H A Dblaize-blzp1600.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
22 reg = <0x0 0x0>;
30 reg = <0x0 0x1>;
46 arm,smc-id = <0x82002000>;
48 #size-cells = <0>;
53 reg = <0x14>;
58 reg = <0x16>;
84 reg = <0x0 0x800 0x0 0x80>;
91 <GIC_PPI 13 (GIC_CPU_MASK_RAW(0x3) |
[all …]

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