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/linux/arch/mips/include/asm/mach-pic32/
H A Dpic32.h14 #define PIC32_CLR(_reg) ((_reg) + 0x04)
15 #define PIC32_SET(_reg) ((_reg) + 0x08)
16 #define PIC32_INV(_reg) ((_reg) + 0x0C)
21 #define PIC32_BASE_CONFIG 0x1f800000
22 #define PIC32_BASE_OSC 0x1f801200
23 #define PIC32_BASE_RESET 0x1f801240
24 #define PIC32_BASE_PPS 0x1f801400
25 #define PIC32_BASE_UART 0x1f822000
26 #define PIC32_BASE_PORT 0x1f860000
27 #define PIC32_BASE_DEVCFG2 0x1fc4ff44
/linux/Documentation/devicetree/bindings/gpio/
H A Dmicrochip,pic32mzda-gpio.yaml62 reg = <0x1f860000 0x100>;
69 microchip,gpio-bank = <0>;
70 gpio-ranges = <&pic32_pinctrl 0 0 16>;
/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda.dtsi34 #size-cells = <0>;
36 cpu@0 {
44 interrupts = <0 IRQ_TYPE_EDGE_RISING>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
65 reg = <0x1f801200 0x200>;
74 reg = <0x1f810000 0x1000>;
82 reg = <0x1f801400 0x400>;
89 reg = <0x1f860000 0x100>;
96 microchip,gpio-bank = <0>;
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