Home
last modified time | relevance | path

Searched +full:0 +full:x1f000000 (Results 1 – 25 of 68) sorted by relevance

123

/freebsd/sys/contrib/device-tree/src/arm/sigmastar/
H A Dmstar-v7.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0x0>;
55 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
80 ranges = <0x16001000 0x16001000 0x00007000>,
81 <0x1f000000 0x1f000000 0x00400000>,
82 <0xa0000000 0xa0000000 0x20000>;
86 reg = <0x16001000 0x1000>,
[all …]
/freebsd/sys/contrib/device-tree/src/mips/lantiq/
H A Ddanube.dtsi8 cpu@0 {
17 reg = <0x1f800000 0x800000>;
18 ranges = <0x0 0x1f800000 0x7fffff>;
24 reg = <0x80200 0x120>;
29 reg = <0x803f0 0x10>;
37 reg = <0x1f000000 0x800000>;
38 ranges = <0x0 0x1f000000 0x7fffff>;
44 reg = <0x101000 0x1000>;
49 reg = <0x102000 0x1000>;
54 reg = <0x103000 0x1000>;
[all …]
/freebsd/sys/dev/rtwn/rtl8812a/
H A Dr12a_tx_desc.h35 #define R12A_FLAGS0_BMCAST 0x01
36 #define R12A_FLAGS0_LSG 0x04
37 #define R12A_FLAGS0_FSG 0x08
38 #define R12A_FLAGS0_OWN 0x80
41 #define R12A_TXDW1_MACID_M 0x0000003f
42 #define R12A_TXDW1_MACID_S 0
43 #define R12A_TXDW1_QSEL_M 0x00001f00
46 #define R12A_TXDW1_QSEL_BE 0x00 /* or 0x03 */
47 #define R12A_TXDW1_QSEL_BK 0x01 /* or 0x02 */
48 #define R12A_TXDW1_QSEL_VI 0x04 /* or 0x05 */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dgoogle,goldfish-pic.txt15 #interrupt-cells = <0x1>;
16 #address-cells = <0>;
23 reg = <0x1f000000 0x1000>;
26 #interrupt-cells = <0x1>;
29 interrupts = <0x2>;
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-ath79.txt9 - #size-cells: <0>, also as required by generic SPI binding.
17 reg = <0x1f000000 0x10>;
23 #size-cells = <0>;
H A Dmikrotik,rb4xx-spi.yaml33 #size-cells = <0>;
35 reg = <0x1f000000 0x10>;
H A Dqca,ar934x-spi.yaml39 reg = <0x1f000000 0x1c>;
42 #size-cells = <0>;
/freebsd/sys/contrib/device-tree/src/mips/ralink/
H A Drt2880_eval.dts10 memory@0 {
12 reg = <0x8000000 0x2000000>;
21 reg = <0x1f000000 0x400000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x3b0000>;
H A Drt3052_eval.dts10 memory@0 {
12 reg = <0x0 0x2000000>;
21 reg = <0x1f000000 0x800000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x7b0000>;
/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h46 #define CHIPC_GET_FLAG(_value, _flag) (((_value) & _flag) != 0)
50 #define CHIPC_ID 0x00
51 #define CHIPC_CAPABILITIES 0x04
52 #define CHIPC_CORECTRL 0x08 /* rev >= 1 */
53 #define CHIPC_BIST 0x0C
55 #define CHIPC_OTPST 0x10 /**< otp status */
56 #define CHIPC_OTPCTRL 0x14 /**< otp control */
57 #define CHIPC_OTPPROG 0x18
58 #define CHIPC_OTPLAYOUT 0x1C /**< otp layout (IPX OTP) */
60 #define CHIPC_INTST 0x20 /**< interrupt status */
[all …]
/freebsd/sys/contrib/device-tree/src/mips/mti/
H A Dmalta.dts7 /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
8 /memreserve/ 0x00001000 0x000ef000; /* YAMON */
9 /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
25 reg = <0x1bdc0000 0x20000>;
56 reg = <0x1e000000 0x400000>;
66 yamon@0 {
68 reg = <0x0 0x100000>;
74 reg = <0x100000 0x2e0000>;
79 reg = <0x3e0000 0x20000>;
87 reg = <0x1f000000 0x1000>;
[all …]
H A Dsead3.dts4 /memreserve/ 0x00000000 0x00001000; // reserved
5 /memreserve/ 0x00001000 0x000ef000; // ROM data
6 /memreserve/ 0x000f0000 0x004cc000; // reserved
26 cpu@0 {
33 reg = <0x0 0x08000000>;
45 reg = <0x1b1c0000 0x20000>;
61 reg = <0x1b200000 0x1000>;
64 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
71 reg = <0x1c000000 0x2000000>;
81 user-fs@0 {
[all …]
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Dsinpif.c19 .poly = { V4 (0x1.921fb6p1f), V4 (-0x1.4abbcep2f), V4 (0x1.466bc6p1f),
20 V4 (-0x1.32d2ccp-1f), V4 (0x1.50783p-4f), V4 (-0x1.e30750p-8f) },
24 # define TinyBound v_u32 (0x30000000) /* asuint32(0x1p-31f). */
25 # define Thresh v_u32 (0x1f000000) /* asuint32(0x1p31f) - TinyBound. */
38 _ZGVnN4v_sinpif(0x1.c597ccp-2) got 0x1.f7cd56p-1
39 want 0x1.f7cd5p-1. */
48 /* When WANT_SIMD_EXCEPT = 1, special lanes should be set to 0 in V_NAME_F1()
80 TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0, 0x1p-31, 5000)
81 TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0x1p-31, 0.5, 10000)
82 TEST_SYM_INTERVAL (V_NAME_F1 (sinpi), 0.5, 0x1p31f, 10000)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Darm,pl172.txt11 first address cell and it may accept values 0..N-1
88 Example for pl172 with nor flash on chip select 0 shown below.
92 reg = <0x40005000 0x1000>;
97 ranges = <0 0 0x1c000000 0x1000000
98 1 0 0x1d000000 0x1000000
99 2 0 0x1e000000 0x1000000
100 3 0 0x1f000000 0x1000000>;
107 mpmc,cs = <0>;
110 mpmc,write-enable-delay = <0>;
111 mpmc,output-enable-delay = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/qca/
H A Dar9132.dtsi12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
30 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
54 reg = <0x18000000 0x100>;
61 reg = <0x18020000 0x20>;
77 reg = <0x18040000 0x30>;
92 reg = <0x18050000 0x20>;
103 reg = <0x18060008 0x8>;
114 reg = <0x18060010 0x8>;
[all …]
H A Dar9331.dtsi12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dtplink12 0 ulelong <3
13 >0 ulelong !0
15 >>0x100 long 0
17 >>>4 ubelong >0x1F000000
19 >>>>0x40 ubeshort >0
22 # with invalid vendor names \240\0\0\0 \140\0\0\0 \040\0\0\0
23 >>>>>5 short !0
24 >>>>>>0 use firmware-tplink
26 0 name firmware-tplink
27 >0 ubyte x firmware
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/
H A Dmediatek,mt8192-clock.yaml56 reg = <0x10720000 0x1000>;
63 reg = <0x11007000 0x1000>;
70 reg = <0x11cb1000 0x1000>;
77 reg = <0x11d03000 0x1000>;
84 reg = <0x11d23000 0x1000>;
91 reg = <0x11e01000 0x1000>;
98 reg = <0x11f02000 0x1000>;
105 reg = <0x11f10000 0x1000>;
112 reg = <0x13fbf000 0x1000>;
119 reg = <0x15020000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,mt8192-clock.yaml56 reg = <0x10720000 0x1000>;
63 reg = <0x11007000 0x1000>;
70 reg = <0x11cb1000 0x1000>;
77 reg = <0x11d03000 0x1000>;
84 reg = <0x11d23000 0x1000>;
91 reg = <0x11e01000 0x1000>;
98 reg = <0x11f02000 0x1000>;
105 reg = <0x11f10000 0x1000>;
112 reg = <0x13fbf000 0x1000>;
119 reg = <0x15020000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Darm-realview-pbx-a9.dts32 arm,hbi = <0x182>;
36 #size-cells = <0>;
49 CPU0: cpu@0 {
52 reg = <0x0>;
58 reg = <0x1>;
65 reg = <0x1f002000 0x1000>;
83 reg = <0x1f000000 0x100>;
88 reg = <0x1f000600 0x20>;
90 interrupts = <1 13 0xf04>;
95 reg = <0x1f000620 0x20>;
[all …]
H A Darm-realview-eb-mp.dtsi46 reg = <0x1f001000 0x1000>,
47 <0x1f000100 0x100>;
56 reg = <0x10041000 0x1000>,
57 <0x10040000 0x100>;
59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
64 reg = <0x1f002000 0x1000>;
66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,
67 <0 30 IRQ_TYPE_LEVEL_HIGH>,
68 <0 31 IRQ_TYPE_LEVEL_HIGH>;
88 reg = <0x1f000000 0x100>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8536ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 partition@0 {
45 reg = <0x0 0x03000000>;
50 reg = <0x03000000 0x00e00000>;
56 reg = <0x03e00000 0x00200000>;
62 reg = <0x04000000 0x00400000>;
67 reg = <0x04400000 0x03b00000>;
72 reg = <0x07f00000 0x00080000>;
77 reg = <0x07f80000 0x00080000>;
[all …]
H A Dp2041rdb.dts67 size = <0 0x1000000>;
68 alignment = <0 0x1000000>;
71 size = <0 0x400000>;
72 alignment = <0 0x400000>;
75 size = <0 0x2000000>;
76 alignment = <0 0x2000000>;
81 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
85 ranges = <0x0 0xf 0xf4000000 0x200000>;
89 ranges = <0x0 0xf 0xf4200000 0x200000>;
93 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
[all …]
H A Dp2020ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 ramdisk@0 {
45 reg = <0x0 0x03000000>;
50 reg = <0x03000000 0x00e00000>;
55 reg = <0x03e00000 0x00200000>;
60 reg = <0x04000000 0x00400000>;
65 reg = <0x04400000 0x03b00000>;
69 reg = <0x07f00000 0x00080000>;
74 reg = <0x07f80000 0x00080000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/actions/
H A Ds700.dtsi19 #size-cells = <0>;
21 cpu0: cpu@0 {
24 reg = <0x0 0x0>;
31 reg = <0x0 0x1>;
38 reg = <0x0 0x2>;
45 reg = <0x0 0x3>;
56 reg = <0x0 0x1f000000 0x0 0x1000000>;
90 #clock-cells = <0>;
96 #clock-cells = <0>;
107 reg = <0x0 0xe00f1000 0x0 0x1000>,
[all …]

123