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/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,imx-weim.yaml21 pattern: "^memory-controller@[0-9a-f]+$"
63 WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
67 IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
69 05 128M 0M 0M 0M
70 033 64M 64M 0M 0M
71 0113 64M 32M 32M 0M
75 sets up in IOMUXC_GPR1[11:0] will be used.
90 "^.*@[0-7],[0-9a-f]+$":
133 "^.*@[0-7],[0-9a-f]+$":
149 "^.*@[0-7],[0-9a-f]+$":
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51-ts4800.dts22 reg = <0x90000000 0x10000000>;
38 pinctrl-0 = <&pinctrl_enable_lcd>;
48 pwms = <&pwm1 0 78770 0>;
49 brightness-levels = <0 150 200 255>;
58 pinctrl-0 = <&pinctrl_lcd>;
69 vback-porch = <0>;
70 vfront-porch = <0>;
85 pinctrl-0 = <&pinctrl_esdhc1>;
86 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
93 pinctrl-0 = <&pinctrl_fec>;
[all …]
H A Dimx6q-mccmon6.dts20 reg = <0x10000000 0x80000000>;
26 pinctrl-0 = <&pinctrl_backlight>;
27 pwms = <&pwm2 0 5000000 PWM_POLARITY_INVERTED>;
28 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
65 pinctrl-0 = <&pinctrl_reg_lvds>;
86 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>;
89 s25sl032p: flash@0 {
94 reg = <0>;
100 pinctrl-0 = <&pinctrl_enet>;
105 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
[all …]
H A Dimx6qdl-sabreauto.dtsi16 reg = <0x10000000 0x80000000>;
22 pinctrl-0 = <&pinctrl_gpio_leds>;
33 pinctrl-0 = <&pinctrl_gpio_keys>;
74 #clock-cells = <0>;
148 #sound-dai-cells = <0>;
161 pwms = <&pwm3 0 5000000 0>;
162 brightness-levels = <0 4 8 16 32 64 128 255>;
170 #size-cells = <0>;
172 pinctrl-0 = <&pinctrl_i2c3mux>;
173 mux-gpios = <&gpio5 4 0>;
[all …]
/linux/arch/arm64/boot/dts/apm/
H A Dapm-storm.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
29 reg = <0x0 0x001>;
31 cpu-release-addr = <0x1 0x0000fff8>;
37 reg = <0x0 0x100>;
39 cpu-release-addr = <0x1 0x0000fff8>;
45 reg = <0x0 0x101>;
47 cpu-release-addr = <0x1 0x0000fff8>;
[all …]