1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2016-2017 4*724ba675SRob Herring * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include "imx6q.dtsi" 10*724ba675SRob Herring 11*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 12*724ba675SRob Herring#include <dt-bindings/pwm/pwm.h> 13*724ba675SRob Herring 14*724ba675SRob Herring/ { 15*724ba675SRob Herring model = "Liebherr (LWN) monitor6 i.MX6 Quad Board"; 16*724ba675SRob Herring compatible = "lwn,mccmon6", "fsl,imx6q"; 17*724ba675SRob Herring 18*724ba675SRob Herring memory@10000000 { 19*724ba675SRob Herring device_type = "memory"; 20*724ba675SRob Herring reg = <0x10000000 0x80000000>; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring backlight_lvds: backlight { 24*724ba675SRob Herring compatible = "pwm-backlight"; 25*724ba675SRob Herring pinctrl-names = "default"; 26*724ba675SRob Herring pinctrl-0 = <&pinctrl_backlight>; 27*724ba675SRob Herring pwms = <&pwm2 0 5000000 PWM_POLARITY_INVERTED>; 28*724ba675SRob Herring brightness-levels = < 0 1 2 3 4 5 6 7 8 9 29*724ba675SRob Herring 10 11 12 13 14 15 16 17 18 19 30*724ba675SRob Herring 20 21 22 23 24 25 26 27 28 29 31*724ba675SRob Herring 30 31 32 33 34 35 36 37 38 39 32*724ba675SRob Herring 40 41 42 43 44 45 46 47 48 49 33*724ba675SRob Herring 50 51 52 53 54 55 56 57 58 59 34*724ba675SRob Herring 60 61 62 63 64 65 66 67 68 69 35*724ba675SRob Herring 70 71 72 73 74 75 76 77 78 79 36*724ba675SRob Herring 80 81 82 83 84 85 86 87 88 89 37*724ba675SRob Herring 90 91 92 93 94 95 96 97 98 99 38*724ba675SRob Herring 100 101 102 103 104 105 106 107 108 109 39*724ba675SRob Herring 110 111 112 113 114 115 116 117 118 119 40*724ba675SRob Herring 120 121 122 123 124 125 126 127 128 129 41*724ba675SRob Herring 130 131 132 133 134 135 136 137 138 139 42*724ba675SRob Herring 140 141 142 143 144 145 146 147 148 149 43*724ba675SRob Herring 150 151 152 153 154 155 156 157 158 159 44*724ba675SRob Herring 160 161 162 163 164 165 166 167 168 169 45*724ba675SRob Herring 170 171 172 173 174 175 176 177 178 179 46*724ba675SRob Herring 180 181 182 183 184 185 186 187 188 189 47*724ba675SRob Herring 190 191 192 193 194 195 196 197 198 199 48*724ba675SRob Herring 200 201 202 203 204 205 206 207 208 209 49*724ba675SRob Herring 210 211 212 213 214 215 216 217 218 219 50*724ba675SRob Herring 220 221 222 223 224 225 226 227 228 229 51*724ba675SRob Herring 230 231 232 233 234 235 236 237 238 239 52*724ba675SRob Herring 240 241 242 243 244 245 246 247 248 249 53*724ba675SRob Herring 250 251 252 253 254 255>; 54*724ba675SRob Herring default-brightness-level = <50>; 55*724ba675SRob Herring enable-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 56*724ba675SRob Herring }; 57*724ba675SRob Herring 58*724ba675SRob Herring reg_lvds: regulator-lvds { 59*724ba675SRob Herring compatible = "regulator-fixed"; 60*724ba675SRob Herring regulator-name = "lvds_ppen"; 61*724ba675SRob Herring regulator-min-microvolt = <3300000>; 62*724ba675SRob Herring regulator-max-microvolt = <3300000>; 63*724ba675SRob Herring regulator-boot-on; 64*724ba675SRob Herring pinctrl-names = "default"; 65*724ba675SRob Herring pinctrl-0 = <&pinctrl_reg_lvds>; 66*724ba675SRob Herring gpio = <&gpio1 19 GPIO_ACTIVE_HIGH>; 67*724ba675SRob Herring enable-active-high; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring panel-lvds0 { 71*724ba675SRob Herring compatible = "innolux,g121x1-l03"; 72*724ba675SRob Herring backlight = <&backlight_lvds>; 73*724ba675SRob Herring power-supply = <®_lvds>; 74*724ba675SRob Herring 75*724ba675SRob Herring port { 76*724ba675SRob Herring panel_in_lvds0: endpoint { 77*724ba675SRob Herring remote-endpoint = <&lvds0_out>; 78*724ba675SRob Herring }; 79*724ba675SRob Herring }; 80*724ba675SRob Herring }; 81*724ba675SRob Herring}; 82*724ba675SRob Herring 83*724ba675SRob Herring&ecspi3 { 84*724ba675SRob Herring cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 85*724ba675SRob Herring pinctrl-names = "default"; 86*724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>; 87*724ba675SRob Herring status = "okay"; 88*724ba675SRob Herring 89*724ba675SRob Herring s25sl032p: flash@0 { 90*724ba675SRob Herring #address-cells = <1>; 91*724ba675SRob Herring #size-cells = <1>; 92*724ba675SRob Herring compatible = "jedec,spi-nor"; 93*724ba675SRob Herring spi-max-frequency = <40000000>; 94*724ba675SRob Herring reg = <0>; 95*724ba675SRob Herring }; 96*724ba675SRob Herring}; 97*724ba675SRob Herring 98*724ba675SRob Herring&fec { 99*724ba675SRob Herring pinctrl-names = "default"; 100*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 101*724ba675SRob Herring phy-mode = "rgmii"; 102*724ba675SRob Herring phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 103*724ba675SRob Herring /delete-property/ interrupts; 104*724ba675SRob Herring interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 105*724ba675SRob Herring <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 106*724ba675SRob Herring fsl,err006687-workaround-present; 107*724ba675SRob Herring status = "okay"; 108*724ba675SRob Herring}; 109*724ba675SRob Herring 110*724ba675SRob Herring&i2c1 { 111*724ba675SRob Herring clock-frequency = <100000>; 112*724ba675SRob Herring pinctrl-names = "default"; 113*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 114*724ba675SRob Herring status = "okay"; 115*724ba675SRob Herring}; 116*724ba675SRob Herring 117*724ba675SRob Herring&i2c2 { 118*724ba675SRob Herring clock-frequency = <100000>; 119*724ba675SRob Herring pinctrl-names = "default"; 120*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 121*724ba675SRob Herring status = "okay"; 122*724ba675SRob Herring 123*724ba675SRob Herring pfuze100: pmic@8 { 124*724ba675SRob Herring compatible = "fsl,pfuze100"; 125*724ba675SRob Herring reg = <0x08>; 126*724ba675SRob Herring 127*724ba675SRob Herring regulators { 128*724ba675SRob Herring sw1a_reg: sw1ab { 129*724ba675SRob Herring regulator-min-microvolt = <300000>; 130*724ba675SRob Herring regulator-max-microvolt = <1875000>; 131*724ba675SRob Herring regulator-boot-on; 132*724ba675SRob Herring regulator-always-on; 133*724ba675SRob Herring regulator-ramp-delay = <6250>; 134*724ba675SRob Herring }; 135*724ba675SRob Herring 136*724ba675SRob Herring sw1c_reg: sw1c { 137*724ba675SRob Herring regulator-min-microvolt = <300000>; 138*724ba675SRob Herring regulator-max-microvolt = <1875000>; 139*724ba675SRob Herring regulator-boot-on; 140*724ba675SRob Herring regulator-always-on; 141*724ba675SRob Herring regulator-ramp-delay = <6250>; 142*724ba675SRob Herring }; 143*724ba675SRob Herring 144*724ba675SRob Herring sw2_reg: sw2 { 145*724ba675SRob Herring regulator-min-microvolt = <800000>; 146*724ba675SRob Herring regulator-max-microvolt = <3950000>; 147*724ba675SRob Herring regulator-boot-on; 148*724ba675SRob Herring regulator-always-on; 149*724ba675SRob Herring }; 150*724ba675SRob Herring 151*724ba675SRob Herring sw3a_reg: sw3a { 152*724ba675SRob Herring regulator-min-microvolt = <400000>; 153*724ba675SRob Herring regulator-max-microvolt = <1975000>; 154*724ba675SRob Herring regulator-boot-on; 155*724ba675SRob Herring regulator-always-on; 156*724ba675SRob Herring }; 157*724ba675SRob Herring 158*724ba675SRob Herring sw3b_reg: sw3b { 159*724ba675SRob Herring regulator-min-microvolt = <400000>; 160*724ba675SRob Herring regulator-max-microvolt = <1975000>; 161*724ba675SRob Herring regulator-boot-on; 162*724ba675SRob Herring regulator-always-on; 163*724ba675SRob Herring }; 164*724ba675SRob Herring 165*724ba675SRob Herring sw4_reg: sw4 { 166*724ba675SRob Herring regulator-min-microvolt = <800000>; 167*724ba675SRob Herring regulator-max-microvolt = <3300000>; 168*724ba675SRob Herring }; 169*724ba675SRob Herring 170*724ba675SRob Herring swbst_reg: swbst { 171*724ba675SRob Herring regulator-min-microvolt = <5000000>; 172*724ba675SRob Herring regulator-max-microvolt = <5150000>; 173*724ba675SRob Herring }; 174*724ba675SRob Herring 175*724ba675SRob Herring snvs_reg: vsnvs { 176*724ba675SRob Herring regulator-min-microvolt = <1000000>; 177*724ba675SRob Herring regulator-max-microvolt = <3000000>; 178*724ba675SRob Herring regulator-boot-on; 179*724ba675SRob Herring regulator-always-on; 180*724ba675SRob Herring }; 181*724ba675SRob Herring 182*724ba675SRob Herring vref_reg: vrefddr { 183*724ba675SRob Herring regulator-boot-on; 184*724ba675SRob Herring regulator-always-on; 185*724ba675SRob Herring }; 186*724ba675SRob Herring 187*724ba675SRob Herring vgen1_reg: vgen1 { 188*724ba675SRob Herring regulator-min-microvolt = <800000>; 189*724ba675SRob Herring regulator-max-microvolt = <1550000>; 190*724ba675SRob Herring }; 191*724ba675SRob Herring 192*724ba675SRob Herring vgen2_reg: vgen2 { 193*724ba675SRob Herring regulator-min-microvolt = <800000>; 194*724ba675SRob Herring regulator-max-microvolt = <1550000>; 195*724ba675SRob Herring }; 196*724ba675SRob Herring 197*724ba675SRob Herring vgen3_reg: vgen3 { 198*724ba675SRob Herring regulator-min-microvolt = <1800000>; 199*724ba675SRob Herring regulator-max-microvolt = <3300000>; 200*724ba675SRob Herring }; 201*724ba675SRob Herring 202*724ba675SRob Herring vgen4_reg: vgen4 { 203*724ba675SRob Herring regulator-min-microvolt = <1800000>; 204*724ba675SRob Herring regulator-max-microvolt = <3300000>; 205*724ba675SRob Herring regulator-always-on; 206*724ba675SRob Herring }; 207*724ba675SRob Herring 208*724ba675SRob Herring vgen5_reg: vgen5 { 209*724ba675SRob Herring regulator-min-microvolt = <1800000>; 210*724ba675SRob Herring regulator-max-microvolt = <3300000>; 211*724ba675SRob Herring regulator-always-on; 212*724ba675SRob Herring }; 213*724ba675SRob Herring 214*724ba675SRob Herring vgen6_reg: vgen6 { 215*724ba675SRob Herring regulator-min-microvolt = <1800000>; 216*724ba675SRob Herring regulator-max-microvolt = <3300000>; 217*724ba675SRob Herring regulator-always-on; 218*724ba675SRob Herring }; 219*724ba675SRob Herring }; 220*724ba675SRob Herring }; 221*724ba675SRob Herring}; 222*724ba675SRob Herring 223*724ba675SRob Herring&ldb { 224*724ba675SRob Herring status = "okay"; 225*724ba675SRob Herring 226*724ba675SRob Herring lvds0: lvds-channel@0 { 227*724ba675SRob Herring fsl,data-mapping = "spwg"; 228*724ba675SRob Herring fsl,data-width = <24>; 229*724ba675SRob Herring status = "okay"; 230*724ba675SRob Herring 231*724ba675SRob Herring port@4 { 232*724ba675SRob Herring reg = <4>; 233*724ba675SRob Herring 234*724ba675SRob Herring lvds0_out: endpoint { 235*724ba675SRob Herring remote-endpoint = <&panel_in_lvds0>; 236*724ba675SRob Herring }; 237*724ba675SRob Herring }; 238*724ba675SRob Herring }; 239*724ba675SRob Herring}; 240*724ba675SRob Herring 241*724ba675SRob Herring&pwm2 { 242*724ba675SRob Herring pinctrl-names = "default"; 243*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; 244*724ba675SRob Herring status = "okay"; 245*724ba675SRob Herring}; 246*724ba675SRob Herring 247*724ba675SRob Herring&uart1 { 248*724ba675SRob Herring pinctrl-names = "default"; 249*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 250*724ba675SRob Herring status = "okay"; 251*724ba675SRob Herring}; 252*724ba675SRob Herring 253*724ba675SRob Herring&uart4 { 254*724ba675SRob Herring pinctrl-names = "default"; 255*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart4>; 256*724ba675SRob Herring uart-has-rtscts; 257*724ba675SRob Herring status = "okay"; 258*724ba675SRob Herring}; 259*724ba675SRob Herring 260*724ba675SRob Herring&usdhc2 { 261*724ba675SRob Herring pinctrl-names = "default"; 262*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc2>; 263*724ba675SRob Herring cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 264*724ba675SRob Herring bus-width = <4>; 265*724ba675SRob Herring status = "okay"; 266*724ba675SRob Herring}; 267*724ba675SRob Herring 268*724ba675SRob Herring&usdhc3 { 269*724ba675SRob Herring pinctrl-names = "default"; 270*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc3>; 271*724ba675SRob Herring bus-width = <8>; 272*724ba675SRob Herring non-removable; 273*724ba675SRob Herring status = "okay"; 274*724ba675SRob Herring}; 275*724ba675SRob Herring 276*724ba675SRob Herring&weim { 277*724ba675SRob Herring pinctrl-names = "default"; 278*724ba675SRob Herring pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>; 279*724ba675SRob Herring ranges = <0 0 0x08000000 0x08000000>; 280*724ba675SRob Herring status = "okay"; 281*724ba675SRob Herring 282*724ba675SRob Herring nor@0,0 { 283*724ba675SRob Herring compatible = "cfi-flash"; 284*724ba675SRob Herring reg = <0 0 0x02000000>; 285*724ba675SRob Herring #address-cells = <1>; 286*724ba675SRob Herring #size-cells = <1>; 287*724ba675SRob Herring bank-width = <2>; 288*724ba675SRob Herring use-advanced-sector-protection; 289*724ba675SRob Herring fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 290*724ba675SRob Herring 0x0000c000 0x1404a38e 0x00000000>; 291*724ba675SRob Herring }; 292*724ba675SRob Herring}; 293*724ba675SRob Herring 294*724ba675SRob Herring&iomuxc { 295*724ba675SRob Herring pinctrl-names = "default"; 296*724ba675SRob Herring 297*724ba675SRob Herring pinctrl_backlight: dispgrp { 298*724ba675SRob Herring fsl,pins = < 299*724ba675SRob Herring /* BLEN_OUT */ 300*724ba675SRob Herring MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 301*724ba675SRob Herring >; 302*724ba675SRob Herring }; 303*724ba675SRob Herring 304*724ba675SRob Herring pinctrl_ecspi3: ecspi3grp { 305*724ba675SRob Herring fsl,pins = < 306*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 307*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 308*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 309*724ba675SRob Herring >; 310*724ba675SRob Herring }; 311*724ba675SRob Herring 312*724ba675SRob Herring pinctrl_ecspi3_cs: ecspi3csgrp { 313*724ba675SRob Herring fsl,pins = < 314*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 315*724ba675SRob Herring >; 316*724ba675SRob Herring }; 317*724ba675SRob Herring 318*724ba675SRob Herring pinctrl_ecspi3_flwp: ecspi3flwpgrp { 319*724ba675SRob Herring fsl,pins = < 320*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x80000000 321*724ba675SRob Herring >; 322*724ba675SRob Herring }; 323*724ba675SRob Herring 324*724ba675SRob Herring pinctrl_enet: enetgrp { 325*724ba675SRob Herring fsl,pins = < 326*724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 327*724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 328*724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 329*724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 330*724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 331*724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 332*724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 333*724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 334*724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 335*724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 336*724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 337*724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 338*724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 339*724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 340*724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 341*724ba675SRob Herring MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 342*724ba675SRob Herring MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 343*724ba675SRob Herring MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0 344*724ba675SRob Herring >; 345*724ba675SRob Herring }; 346*724ba675SRob Herring 347*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 348*724ba675SRob Herring fsl,pins = < 349*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 350*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 351*724ba675SRob Herring >; 352*724ba675SRob Herring }; 353*724ba675SRob Herring 354*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 355*724ba675SRob Herring fsl,pins = < 356*724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 357*724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 358*724ba675SRob Herring >; 359*724ba675SRob Herring }; 360*724ba675SRob Herring 361*724ba675SRob Herring pinctrl_pwm2: pwm2grp { 362*724ba675SRob Herring fsl,pins = < 363*724ba675SRob Herring MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 364*724ba675SRob Herring >; 365*724ba675SRob Herring }; 366*724ba675SRob Herring 367*724ba675SRob Herring pinctrl_reg_lvds: reqlvdsgrp { 368*724ba675SRob Herring fsl,pins = < 369*724ba675SRob Herring /* LVDS_PPEN_OUT */ 370*724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0 371*724ba675SRob Herring >; 372*724ba675SRob Herring }; 373*724ba675SRob Herring 374*724ba675SRob Herring pinctrl_uart1: uart1grp { 375*724ba675SRob Herring fsl,pins = < 376*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 377*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 378*724ba675SRob Herring >; 379*724ba675SRob Herring }; 380*724ba675SRob Herring 381*724ba675SRob Herring pinctrl_uart4: uart4grp { 382*724ba675SRob Herring fsl,pins = < 383*724ba675SRob Herring MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 384*724ba675SRob Herring MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 385*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 386*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 387*724ba675SRob Herring >; 388*724ba675SRob Herring }; 389*724ba675SRob Herring 390*724ba675SRob Herring pinctrl_usdhc2: usdhc2grp { 391*724ba675SRob Herring fsl,pins = < 392*724ba675SRob Herring MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 393*724ba675SRob Herring MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 394*724ba675SRob Herring MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 395*724ba675SRob Herring MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 396*724ba675SRob Herring MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 397*724ba675SRob Herring MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 398*724ba675SRob Herring MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1 399*724ba675SRob Herring >; 400*724ba675SRob Herring }; 401*724ba675SRob Herring 402*724ba675SRob Herring pinctrl_usdhc3: usdhc3grp { 403*724ba675SRob Herring fsl,pins = < 404*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 405*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 406*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 407*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 408*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 409*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 410*724ba675SRob Herring MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 411*724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 412*724ba675SRob Herring MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 413*724ba675SRob Herring MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 414*724ba675SRob Herring MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 415*724ba675SRob Herring >; 416*724ba675SRob Herring }; 417*724ba675SRob Herring 418*724ba675SRob Herring pinctrl_weim_cs0: weimcs0grp { 419*724ba675SRob Herring fsl,pins = < 420*724ba675SRob Herring MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1 421*724ba675SRob Herring >; 422*724ba675SRob Herring }; 423*724ba675SRob Herring 424*724ba675SRob Herring pinctrl_weim_nor: weimnorgrp { 425*724ba675SRob Herring fsl,pins = < 426*724ba675SRob Herring MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 427*724ba675SRob Herring MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 428*724ba675SRob Herring MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060 429*724ba675SRob Herring MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0 430*724ba675SRob Herring MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0 431*724ba675SRob Herring MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0 432*724ba675SRob Herring MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0 433*724ba675SRob Herring MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0 434*724ba675SRob Herring MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0 435*724ba675SRob Herring MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0 436*724ba675SRob Herring MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0 437*724ba675SRob Herring MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0 438*724ba675SRob Herring MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0 439*724ba675SRob Herring MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0 440*724ba675SRob Herring MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0 441*724ba675SRob Herring MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0 442*724ba675SRob Herring MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0 443*724ba675SRob Herring MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0 444*724ba675SRob Herring MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0 445*724ba675SRob Herring MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1 446*724ba675SRob Herring MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1 447*724ba675SRob Herring MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1 448*724ba675SRob Herring MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1 449*724ba675SRob Herring MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1 450*724ba675SRob Herring MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1 451*724ba675SRob Herring MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1 452*724ba675SRob Herring MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1 453*724ba675SRob Herring MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 454*724ba675SRob Herring MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 455*724ba675SRob Herring MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 456*724ba675SRob Herring MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 457*724ba675SRob Herring MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 458*724ba675SRob Herring MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 459*724ba675SRob Herring MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 460*724ba675SRob Herring MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 461*724ba675SRob Herring MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 462*724ba675SRob Herring MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 463*724ba675SRob Herring MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 464*724ba675SRob Herring MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 465*724ba675SRob Herring MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 466*724ba675SRob Herring MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 467*724ba675SRob Herring MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 468*724ba675SRob Herring MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 469*724ba675SRob Herring >; 470*724ba675SRob Herring }; 471*724ba675SRob Herring}; 472