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Searched +full:0 +full:x1a100 (Results 1 – 7 of 7) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Data-generic.yaml42 default: 0
54 reg = <0x1a000 0x100>,
55 <0x1a100 0xf00>;
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2m.dtsi27 ranges = <0x40000000 0x40000000 0x10000000>,
28 <0x10000000 0x10000000 0x00020000>;
31 interrupt-map-mask = <0 63>;
32 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
33 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
34 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
35 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
36 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
37 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
38 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c46 } while (0)
60 * at the time it indicated completion is stored there. Returns 0 if the
72 return 0; in t4_wait_op_done_val()
74 if (--attempts == 0) in t4_wait_op_done_val()
179 * Reset F_ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
181 * F_ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
184 t4_write_reg(adap, A_PCIE_CFG_SPACE_REQ, 0); in t4_hw_pci_read_cfg4()
213 CH_ERR(adap, "firmware reports adapter error: %s (0x%08x)\n", in t4_report_fw_error()
291 t4_set_reg_field(sc, port_ctl_reg, F_PORTTXEN, 0); in check_tx_state()
298 #define X_CIM_PF_NOACCESS 0xeeeeeeee
[all …]
H A Dt4_regs.h36 #define MYPF_BASE 0x1b000
39 #define PF0_BASE 0x1e000
42 #define PF1_BASE 0x1e400
45 #define PF2_BASE 0x1e800
48 #define PF3_BASE 0x1ec00
51 #define PF4_BASE 0x1f000
54 #define PF5_BASE 0x1f400
57 #define PF6_BASE 0x1f800
60 #define PF7_BASE 0x1fc00
63 #define PF_STRIDE 0x400
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t4.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
8 { "PIDX", 0, 14 },
9 { "SGE_PF_GTS", 0x1e004, 0 },
13 { "CIDXInc", 0, 12 },
14 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
17 { "PIDX", 0, 14 },
18 { "SGE_PF_GTS", 0x1e404, 0 },
22 { "CIDXInc", 0, 12 },
23 { "SGE_PF_KDOORBELL", 0x1e800, 0 },
26 { "PIDX", 0, 14 },
[all …]
H A Dreg_defs_t6.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]
H A Dreg_defs_t5.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]