Lines Matching +full:0 +full:x1a100

5 	{ "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 		{ "PIDX", 0, 13 },
10 	{ "SGE_PF_GTS", 0x1e004, 0 },
14 		{ "CIDXInc", 0, 12 },
15 	{ "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 	{ "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 	{ "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 		{ "PIDX", 0, 13 },
22 	{ "SGE_PF_GTS", 0x1e404, 0 },
26 		{ "CIDXInc", 0, 12 },
27 	{ "SGE_PF_KTIMESTAMP_LO", 0x1e408, 0 },
28 	{ "SGE_PF_KTIMESTAMP_HI", 0x1e40c, 0 },
29 	{ "SGE_PF_KDOORBELL", 0x1e800, 0 },
33 		{ "PIDX", 0, 13 },
34 	{ "SGE_PF_GTS", 0x1e804, 0 },
38 		{ "CIDXInc", 0, 12 },
39 	{ "SGE_PF_KTIMESTAMP_LO", 0x1e808, 0 },
40 	{ "SGE_PF_KTIMESTAMP_HI", 0x1e80c, 0 },
41 	{ "SGE_PF_KDOORBELL", 0x1ec00, 0 },
45 		{ "PIDX", 0, 13 },
46 	{ "SGE_PF_GTS", 0x1ec04, 0 },
50 		{ "CIDXInc", 0, 12 },
51 	{ "SGE_PF_KTIMESTAMP_LO", 0x1ec08, 0 },
52 	{ "SGE_PF_KTIMESTAMP_HI", 0x1ec0c, 0 },
53 	{ "SGE_PF_KDOORBELL", 0x1f000, 0 },
57 		{ "PIDX", 0, 13 },
58 	{ "SGE_PF_GTS", 0x1f004, 0 },
62 		{ "CIDXInc", 0, 12 },
63 	{ "SGE_PF_KTIMESTAMP_LO", 0x1f008, 0 },
64 	{ "SGE_PF_KTIMESTAMP_HI", 0x1f00c, 0 },
65 	{ "SGE_PF_KDOORBELL", 0x1f400, 0 },
69 		{ "PIDX", 0, 13 },
70 	{ "SGE_PF_GTS", 0x1f404, 0 },
74 		{ "CIDXInc", 0, 12 },
75 	{ "SGE_PF_KTIMESTAMP_LO", 0x1f408, 0 },
76 	{ "SGE_PF_KTIMESTAMP_HI", 0x1f40c, 0 },
77 	{ "SGE_PF_KDOORBELL", 0x1f800, 0 },
81 		{ "PIDX", 0, 13 },
82 	{ "SGE_PF_GTS", 0x1f804, 0 },
86 		{ "CIDXInc", 0, 12 },
87 	{ "SGE_PF_KTIMESTAMP_LO", 0x1f808, 0 },
88 	{ "SGE_PF_KTIMESTAMP_HI", 0x1f80c, 0 },
89 	{ "SGE_PF_KDOORBELL", 0x1fc00, 0 },
93 		{ "PIDX", 0, 13 },
94 	{ "SGE_PF_GTS", 0x1fc04, 0 },
98 		{ "CIDXInc", 0, 12 },
99 	{ "SGE_PF_KTIMESTAMP_LO", 0x1fc08, 0 },
100 	{ "SGE_PF_KTIMESTAMP_HI", 0x1fc0c, 0 },
101 	{ "SGE_CONTROL", 0x1008, 0 },
112 		{ "GlobalEnable", 0, 1 },
113 	{ "SGE_HOST_PAGE_SIZE", 0x100c, 0 },
121 		{ "HostPageSizePF0", 0, 4 },
122 	{ "SGE_EGRESS_QUEUES_PER_PAGE_PF", 0x1010, 0 },
130 		{ "QueuesPerPagePF0", 0, 4 },
131 	{ "SGE_EGRESS_QUEUES_PER_PAGE_VF", 0x1014, 0 },
139 		{ "QueuesPerPageVFPF0", 0, 4 },
140 	{ "SGE_USER_MODE_LIMITS", 0x1018, 0 },
144 		{ "Length_Max", 0, 8 },
145 	{ "SGE_WR_ERROR", 0x101c, 0 },
146 	{ "SGE_INT_CAUSE1", 0x1024, 0 },
172 		{ "perr_egr_ctxt_mifrsp", 0, 1 },
173 	{ "SGE_INT_ENABLE1", 0x1028, 0 },
199 		{ "perr_egr_ctxt_mifrsp", 0, 1 },
200 	{ "SGE_PERR_ENABLE1", 0x102c, 0 },
226 		{ "perr_egr_ctxt_mifrsp", 0, 1 },
227 	{ "SGE_INT_CAUSE2", 0x1030, 0 },
248 		{ "perr_base_size", 0, 1 },
249 	{ "SGE_INT_ENABLE2", 0x1034, 0 },
270 		{ "perr_base_size", 0, 1 },
271 	{ "SGE_PERR_ENABLE2", 0x1038, 0 },
292 		{ "perr_base_size", 0, 1 },
293 	{ "SGE_INT_CAUSE3", 0x103c, 0 },
325 		{ "err_inv_ctxt0", 0, 1 },
326 	{ "SGE_INT_ENABLE3", 0x1040, 0 },
358 		{ "err_inv_ctxt0", 0, 1 },
359 	{ "SGE_FL_BUFFER_SIZE0", 0x1044, 0 },
361 	{ "SGE_FL_BUFFER_SIZE1", 0x1048, 0 },
363 	{ "SGE_FL_BUFFER_SIZE2", 0x104c, 0 },
365 	{ "SGE_FL_BUFFER_SIZE3", 0x1050, 0 },
367 	{ "SGE_FL_BUFFER_SIZE4", 0x1054, 0 },
369 	{ "SGE_FL_BUFFER_SIZE5", 0x1058, 0 },
371 	{ "SGE_FL_BUFFER_SIZE6", 0x105c, 0 },
373 	{ "SGE_FL_BUFFER_SIZE7", 0x1060, 0 },
375 	{ "SGE_FL_BUFFER_SIZE8", 0x1064, 0 },
377 	{ "SGE_FL_BUFFER_SIZE9", 0x1068, 0 },
379 	{ "SGE_FL_BUFFER_SIZE10", 0x106c, 0 },
381 	{ "SGE_FL_BUFFER_SIZE11", 0x1070, 0 },
383 	{ "SGE_FL_BUFFER_SIZE12", 0x1074, 0 },
385 	{ "SGE_FL_BUFFER_SIZE13", 0x1078, 0 },
387 	{ "SGE_FL_BUFFER_SIZE14", 0x107c, 0 },
389 	{ "SGE_FL_BUFFER_SIZE15", 0x1080, 0 },
391 	{ "SGE_DBQ_CTXT_BADDR", 0x1084, 0 },
393 	{ "SGE_IMSG_CTXT_BADDR", 0x1088, 0 },
395 	{ "SGE_FLM_CACHE_BADDR", 0x108c, 0 },
397 	{ "SGE_FLM_CFG", 0x1090, 0 },
408 		{ "NoEDRAM", 0, 1 },
409 	{ "SGE_CONM_CTRL", 0x1094, 0 },
413 	{ "SGE_TIMESTAMP_LO", 0x1098, 0 },
414 	{ "SGE_TIMESTAMP_HI", 0x109c, 0 },
416 		{ "Value", 0, 28 },
417 	{ "SGE_INGRESS_RX_THRESHOLD", 0x10a0, 0 },
421 		{ "Threshold_3", 0, 6 },
422 	{ "SGE_DBFIFO_STATUS", 0x10a4, 0 },
425 		{ "merge_fifo_cnt", 0, 6 },
426 	{ "SGE_DOORBELL_CONTROL", 0x10a8, 0 },
446 		{ "gts_dbg_en", 0, 1 },
447 	{ "SGE_ITP_CONTROL", 0x10b4, 0 },
451 		{ "LL_Read_Wait_Disable", 0, 1 },
452 	{ "SGE_TIMER_VALUE_0_AND_1", 0x10b8, 0 },
454 		{ "TimerValue1", 0, 16 },
455 	{ "SGE_TIMER_VALUE_2_AND_3", 0x10bc, 0 },
457 		{ "TimerValue3", 0, 16 },
458 	{ "SGE_TIMER_VALUE_4_AND_5", 0x10c0, 0 },
460 		{ "TimerValue5", 0, 16 },
461 	{ "SGE_GK_CONTROL", 0x10c4, 0 },
468 		{ "100ns_timer", 0, 8 },
469 	{ "SGE_GK_CONTROL2", 0x10c8, 0 },
472 		{ "merge_cnt_thresh", 0, 6 },
473 	{ "SGE_DEBUG_INDEX", 0x10cc, 0 },
474 	{ "SGE_DEBUG_DATA_HIGH", 0x10d0, 0 },
475 	{ "SGE_DEBUG_DATA_LOW", 0x10d4, 0 },
476 	{ "SGE_REVISION", 0x10d8, 0 },
477 	{ "SGE_INT_CAUSE4", 0x10dc, 0 },
509 		{ "err_unexpected_timer", 0, 1 },
510 	{ "SGE_INT_ENABLE4", 0x10e0, 0 },
542 		{ "err_unexpected_timer", 0, 1 },
543 	{ "SGE_STAT_TOTAL", 0x10e4, 0 },
544 	{ "SGE_STAT_MATCH", 0x10e8, 0 },
545 	{ "SGE_STAT_CFG", 0x10ec, 0 },
550 		{ "StatMode", 0, 4 },
551 	{ "SGE_HINT_CFG", 0x10f0, 0 },
554 		{ "HintsAllowedHdr", 0, 6 },
555 	{ "SGE_INGRESS_QUEUES_PER_PAGE_PF", 0x10f4, 0 },
563 		{ "QueuesPerPagePF0", 0, 4 },
564 	{ "SGE_INGRESS_QUEUES_PER_PAGE_VF", 0x10f8, 0 },
572 		{ "QueuesPerPageVFPF0", 0, 4 },
573 	{ "SGE_ERROR_STATS", 0x1100, 0 },
578 		{ "Error_QID", 0, 17 },
579 	{ "SGE_IDMA0_DROP_CNT", 0x1104, 0 },
580 	{ "SGE_IDMA1_DROP_CNT", 0x1108, 0 },
581 	{ "SGE_INT_CAUSE5", 0x110c, 0 },
613 		{ "perr_idma_switch_output_fifo0", 0, 1 },
614 	{ "SGE_INT_ENABLE5", 0x1110, 0 },
646 		{ "perr_idma_switch_output_fifo0", 0, 1 },
647 	{ "SGE_PERR_ENABLE5", 0x1114, 0 },
679 		{ "perr_idma_switch_output_fifo0", 0, 1 },
680 	{ "SGE_FETCH_BURST_MAX_0_AND_1", 0x111c, 0 },
682 		{ "FetchBurstMax1", 0, 10 },
683 	{ "SGE_FETCH_BURST_MAX_2_AND_3", 0x1120, 0 },
685 		{ "FetchBurstMax3", 0, 10 },
686 	{ "SGE_CONTROL2", 0x1124, 0 },
702 		{ "TX_Coalesce_Pri", 0, 1 },
703 	{ "SGE_INT_CAUSE6", 0x1128, 0 },
723 		{ "fatal_deq", 0, 1 },
724 	{ "SGE_INT_ENABLE6", 0x112c, 0 },
744 		{ "fatal_deq", 0, 1 },
745 	{ "SGE_DBVFIFO_BADDR", 0x1138, 0 },
747 	{ "SGE_DBVFIFO_SIZE", 0x113c, 0 },
748 	{ "SGE_CHANGESET", 0x1144, 0 },
749 	{ "SGE_PC_RSP_ERROR", 0x1148, 0 },
750 	{ "SGE_TBUF_CONTROL", 0x114c, 0 },
752 		{ "DbpTbufRsv0", 0, 9 },
753 	{ "SGE_PC0_REQ_BIST_CMD", 0x1180, 0 },
754 	{ "SGE_PC0_REQ_BIST_ERROR_CNT", 0x1184, 0 },
755 	{ "SGE_PC1_REQ_BIST_CMD", 0x1190, 0 },
756 	{ "SGE_PC1_REQ_BIST_ERROR_CNT", 0x1194, 0 },
757 	{ "SGE_PC0_RSP_BIST_CMD", 0x11a0, 0 },
758 	{ "SGE_PC0_RSP_BIST_ERROR_CNT", 0x11a4, 0 },
759 	{ "SGE_PC1_RSP_BIST_CMD", 0x11b0, 0 },
760 	{ "SGE_PC1_RSP_BIST_ERROR_CNT", 0x11b4, 0 },
761 	{ "SGE_DBQ_TIMER_THRESH0", 0x11b8, 0 },
765 		{ "TxTimeTh0", 0, 6 },
766 	{ "SGE_DBQ_TIMER_THRESH1", 0x11bc, 0 },
770 		{ "TxTimeTh4", 0, 6 },
771 	{ "SGE_DBQ_TIMER_CONFIG", 0x11c0, 0 },
772 	{ "SGE_DBQ_TIMER_DBG", 0x11c4, 0 },
775 		{ "dbq_timer_qcnt", 0, 17 },
776 	{ "SGE_CTXT_CMD", 0x11fc, 0 },
780 		{ "QID", 0, 17 },
781 	{ "SGE_CTXT_DATA0", 0x1200, 0 },
782 	{ "SGE_CTXT_DATA1", 0x1204, 0 },
783 	{ "SGE_CTXT_DATA2", 0x1208, 0 },
784 	{ "SGE_CTXT_DATA3", 0x120c, 0 },
785 	{ "SGE_CTXT_DATA4", 0x1210, 0 },
786 	{ "SGE_CTXT_DATA5", 0x1214, 0 },
787 	{ "SGE_CTXT_DATA6", 0x1218, 0 },
788 	{ "SGE_CTXT_DATA7", 0x121c, 0 },
789 	{ "SGE_CTXT_MASK0", 0x1220, 0 },
790 	{ "SGE_CTXT_MASK1", 0x1224, 0 },
791 	{ "SGE_CTXT_MASK2", 0x1228, 0 },
792 	{ "SGE_CTXT_MASK3", 0x122c, 0 },
793 	{ "SGE_CTXT_MASK4", 0x1230, 0 },
794 	{ "SGE_CTXT_MASK5", 0x1234, 0 },
795 	{ "SGE_CTXT_MASK6", 0x1238, 0 },
796 	{ "SGE_CTXT_MASK7", 0x123c, 0 },
797 	{ "SGE_QBASE_MAP0", 0x1240, 0 },
801 		{ "Ingress1_Size", 0, 5 },
802 	{ "SGE_QBASE_MAP1", 0x1244, 0 },
803 	{ "SGE_QBASE_MAP2", 0x1248, 0 },
804 	{ "SGE_QBASE_MAP3", 0x124c, 0 },
806 		{ "Ingress0_Base", 0, 16 },
807 	{ "SGE_QBASE_INDEX", 0x1250, 0 },
808 	{ "SGE_CONM_CTRL2", 0x1254, 0 },
810 		{ "FlmThresh", 0, 7 },
811 	{ "SGE_DEBUG_CONM", 0x1258, 0 },
816 		{ "last_qid", 0, 10 },
817 	{ "SGE_DBG_QUEUE_STAT0_CTRL", 0x125c, 0 },
820 		{ "db_gts_qid", 0, 17 },
821 	{ "SGE_DBG_QUEUE_STAT1_CTRL", 0x1260, 0 },
824 		{ "db_gts_qid", 0, 17 },
825 	{ "SGE_DBG_QUEUE_STAT0", 0x1264, 0 },
826 	{ "SGE_DBG_QUEUE_STAT1", 0x1268, 0 },
827 	{ "SGE_DBG_BAR2_PKT_CNT", 0x126c, 0 },
828 	{ "SGE_DBG_DB_PKT_CNT", 0x1270, 0 },
829 	{ "SGE_DBG_GTS_PKT_CNT", 0x1274, 0 },
830 	{ "SGE_DEBUG_DATA_HIGH_INDEX_0", 0x1280, 0 },
838 		{ "debug_CIM_EOP0_cnt", 0, 4 },
839 	{ "SGE_DEBUG_DATA_HIGH_INDEX_1", 0x1284, 0 },
847 		{ "debug_U_Rx_EOP0_cnt", 0, 4 },
848 	{ "SGE_DEBUG_DATA_HIGH_INDEX_2", 0x1288, 0 },
850 		{ "dbg_tbuf_used0", 0, 9 },
851 	{ "SGE_DEBUG1_DBP_THREAD", 0x128c, 0 },
855 		{ "fl_enq_cnt", 0, 4 },
856 	{ "SGE_DEBUG1_DBP_THREAD", 0x1290, 0 },
860 		{ "fl_enq_cnt", 0, 4 },
861 	{ "SGE_DEBUG1_DBP_THREAD", 0x1294, 0 },
865 		{ "fl_enq_cnt", 0, 4 },
866 	{ "SGE_DEBUG1_DBP_THREAD", 0x1298, 0 },
870 		{ "fl_enq_cnt", 0, 4 },
871 	{ "SGE_DEBUG_DATA_HIGH_INDEX_7", 0x129c, 0 },
879 		{ "debug_PD_WrReq_EOP0_cnt", 0, 4 },
880 	{ "SGE_DEBUG_DATA_HIGH_INDEX_8", 0x12a0, 0 },
898 		{ "debug_PD_WrReq_Int0_cnt", 0, 4 },
899 	{ "SGE_DEBUG_DATA_HIGH_INDEX_9", 0x12a4, 0 },
905 		{ "debug_CPLSW_CIM_EOP0_cnt", 0, 4 },
906 	{ "SGE_DEBUG_DATA_HIGH_INDEX_10", 0x12a8, 0 },
928 		{ "debug_CIM_AFull_d", 0, 1 },
929 	{ "SGE_DEBUG_DATA_HIGH_INDEX_11", 0x12ac, 0 },
941 		{ "debug_st_flm_idma0_ctxt", 0, 3 },
942 	{ "SGE_DEBUG_DATA_HIGH_INDEX_12", 0x12b0, 0 },
948 		{ "debug_idma0_ishift_tx_size", 0, 7 },
949 	{ "SGE_DEBUG_DATA_HIGH_INDEX_13", 0x12b4, 0 },
950 	{ "SGE_DEBUG_DATA_HIGH_INDEX_14", 0x12b8, 0 },
951 	{ "SGE_DEBUG_DATA_HIGH_INDEX_15", 0x12bc, 0 },
952 	{ "SGE_DEBUG_DATA_LOW_INDEX_0", 0x12c0, 0 },
962 		{ "debug_st_idma0_idma_sm", 0, 6 },
963 	{ "SGE_DEBUG_DATA_LOW_INDEX_1", 0x12c4, 0 },
969 		{ "debug_itp_evr_state", 0, 3 },
970 	{ "SGE_DEBUG_DATA_LOW_INDEX_2", 0x12c8, 0 },
974 	{ "SGE_DEBUG_DATA_LOW_INDEX_3", 0x12cc, 0 },
975 	{ "SGE_DEBUG_DATA_LOW_INDEX_4", 0x12d0, 0 },
981 		{ "debug_flm_dbptr_qid", 0, 12 },
982 	{ "SGE_DEBUG0_DBP_THREAD", 0x12d4, 0 },
986 		{ "thread_qid", 0, 17 },
987 	{ "SGE_DEBUG0_DBP_THREAD", 0x12d8, 0 },
991 		{ "thread_qid", 0, 17 },
992 	{ "SGE_DEBUG0_DBP_THREAD", 0x12dc, 0 },
996 		{ "thread_qid", 0, 17 },
997 	{ "SGE_DEBUG0_DBP_THREAD", 0x12e0, 0 },
1001 		{ "thread_qid", 0, 17 },
1002 	{ "SGE_DEBUG0_DBP_THREAD", 0x12e4, 0 },
1006 		{ "thread_qid", 0, 17 },
1007 	{ "SGE_DEBUG_DATA_LOW_INDEX_10", 0x12e8, 0 },
1009 		{ "debug_imsg_qid", 0, 16 },
1010 	{ "SGE_DEBUG_DATA_LOW_INDEX_11", 0x12ec, 0 },
1012 		{ "debug_idma0_qid", 0, 16 },
1013 	{ "SGE_DEBUG_DATA_LOW_INDEX_12", 0x12f0, 0 },
1015 		{ "debug_idma0_flm_req_qid", 0, 16 },
1016 	{ "SGE_DEBUG_DATA_LOW_INDEX_13", 0x12f4, 0 },
1017 	{ "SGE_DEBUG_DATA_LOW_INDEX_14", 0x12f8, 0 },
1018 	{ "SGE_DEBUG_DATA_LOW_INDEX_15", 0x12fc, 0 },
1019 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1300, 0 },
1025 		{ "PfWCOffset", 0, 17 },
1026 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1304, 0 },
1032 		{ "PfWCOffset", 0, 17 },
1033 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1308, 0 },
1039 		{ "PfWCOffset", 0, 17 },
1040 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x130c, 0 },
1046 		{ "PfWCOffset", 0, 17 },
1047 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1310, 0 },
1053 		{ "PfWCOffset", 0, 17 },
1054 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1314, 0 },
1060 		{ "PfWCOffset", 0, 17 },
1061 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x1318, 0 },
1067 		{ "PfWCOffset", 0, 17 },
1068 	{ "SGE_WC_EGRS_BAR2_OFF_PF", 0x131c, 0 },
1074 		{ "PfWCOffset", 0, 17 },
1075 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1320, 0 },
1081 		{ "VfWCOffset", 0, 17 },
1082 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1324, 0 },
1088 		{ "VfWCOffset", 0, 17 },
1089 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1328, 0 },
1095 		{ "VfWCOffset", 0, 17 },
1096 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x132c, 0 },
1102 		{ "VfWCOffset", 0, 17 },
1103 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1330, 0 },
1109 		{ "VfWCOffset", 0, 17 },
1110 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1334, 0 },
1116 		{ "VfWCOffset", 0, 17 },
1117 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x1338, 0 },
1123 		{ "VfWCOffset", 0, 17 },
1124 	{ "SGE_WC_EGRS_BAR2_OFF_VF", 0x133c, 0 },
1130 		{ "VfWCOffset", 0, 17 },
1131 	{ "SGE_LA_RDPTR_0", 0x1800, 0 },
1132 	{ "SGE_LA_RDDATA_0", 0x1804, 0 },
1133 	{ "SGE_LA_WRPTR_0", 0x1808, 0 },
1134 	{ "SGE_LA_RESERVED_0", 0x180c, 0 },
1135 	{ "SGE_LA_RDPTR_1", 0x1810, 0 },
1136 	{ "SGE_LA_RDDATA_1", 0x1814, 0 },
1137 	{ "SGE_LA_WRPTR_1", 0x1818, 0 },
1138 	{ "SGE_LA_RESERVED_1", 0x181c, 0 },
1139 	{ "SGE_LA_RDPTR_2", 0x1820, 0 },
1140 	{ "SGE_LA_RDDATA_2", 0x1824, 0 },
1141 	{ "SGE_LA_WRPTR_2", 0x1828, 0 },
1142 	{ "SGE_LA_RESERVED_2", 0x182c, 0 },
1143 	{ "SGE_LA_RDPTR_3", 0x1830, 0 },
1144 	{ "SGE_LA_RDDATA_3", 0x1834, 0 },
1145 	{ "SGE_LA_WRPTR_3", 0x1838, 0 },
1146 	{ "SGE_LA_RESERVED_3", 0x183c, 0 },
1147 	{ "SGE_LA_RDPTR_4", 0x1840, 0 },
1148 	{ "SGE_LA_RDDATA_4", 0x1844, 0 },
1149 	{ "SGE_LA_WRPTR_4", 0x1848, 0 },
1150 	{ "SGE_LA_RESERVED_4", 0x184c, 0 },
1151 	{ "SGE_LA_RDPTR_5", 0x1850, 0 },
1152 	{ "SGE_LA_RDDATA_5", 0x1854, 0 },
1153 	{ "SGE_LA_WRPTR_5", 0x1858, 0 },
1154 	{ "SGE_LA_RESERVED_5", 0x185c, 0 },
1155 	{ "SGE_LA_RDPTR_6", 0x1860, 0 },
1156 	{ "SGE_LA_RDDATA_6", 0x1864, 0 },
1157 	{ "SGE_LA_WRPTR_6", 0x1868, 0 },
1158 	{ "SGE_LA_RESERVED_6", 0x186c, 0 },
1159 	{ "SGE_LA_RDPTR_7", 0x1870, 0 },
1160 	{ "SGE_LA_RDDATA_7", 0x1874, 0 },
1161 	{ "SGE_LA_WRPTR_7", 0x1878, 0 },
1162 	{ "SGE_LA_RESERVED_7", 0x187c, 0 },
1163 	{ "SGE_LA_RDPTR_8", 0x1880, 0 },
1164 	{ "SGE_LA_RDDATA_8", 0x1884, 0 },
1165 	{ "SGE_LA_WRPTR_8", 0x1888, 0 },
1166 	{ "SGE_LA_RESERVED_8", 0x188c, 0 },
1167 	{ "SGE_LA_RDPTR_9", 0x1890, 0 },
1168 	{ "SGE_LA_RDDATA_9", 0x1894, 0 },
1169 	{ "SGE_LA_WRPTR_9", 0x1898, 0 },
1170 	{ "SGE_LA_RESERVED_9", 0x189c, 0 },
1171 	{ "SGE_LA_RDPTR_10", 0x18a0, 0 },
1172 	{ "SGE_LA_RDDATA_10", 0x18a4, 0 },
1173 	{ "SGE_LA_WRPTR_10", 0x18a8, 0 },
1174 	{ "SGE_LA_RESERVED_10", 0x18ac, 0 },
1175 	{ "SGE_LA_RDPTR_11", 0x18b0, 0 },
1176 	{ "SGE_LA_RDDATA_11", 0x18b4, 0 },
1177 	{ "SGE_LA_WRPTR_11", 0x18b8, 0 },
1178 	{ "SGE_LA_RESERVED_11", 0x18bc, 0 },
1179 	{ "SGE_LA_RDPTR_12", 0x18c0, 0 },
1180 	{ "SGE_LA_RDDATA_12", 0x18c4, 0 },
1181 	{ "SGE_LA_WRPTR_12", 0x18c8, 0 },
1182 	{ "SGE_LA_RESERVED_12", 0x18cc, 0 },
1183 	{ "SGE_LA_RDPTR_13", 0x18d0, 0 },
1184 	{ "SGE_LA_RDDATA_13", 0x18d4, 0 },
1185 	{ "SGE_LA_WRPTR_13", 0x18d8, 0 },
1186 	{ "SGE_LA_RESERVED_13", 0x18dc, 0 },
1187 	{ "SGE_LA_RDPTR_14", 0x18e0, 0 },
1188 	{ "SGE_LA_RDDATA_14", 0x18e4, 0 },
1189 	{ "SGE_LA_WRPTR_14", 0x18e8, 0 },
1190 	{ "SGE_LA_RESERVED_14", 0x18ec, 0 },
1191 	{ "SGE_LA_RDPTR_15", 0x18f0, 0 },
1192 	{ "SGE_LA_RDDATA_15", 0x18f4, 0 },
1193 	{ "SGE_LA_WRPTR_15", 0x18f8, 0 },
1194 	{ "SGE_LA_RESERVED_15", 0x18fc, 0 },
1199 	{ "PCIE_INT_ENABLE", 0x3000, 0 },
1231 		{ "MstGrpPerr", 0, 1 },
1232 	{ "PCIE_INT_CAUSE", 0x3004, 0 },
1264 		{ "MstGrpPerr", 0, 1 },
1265 	{ "PCIE_PERR_ENABLE", 0x3008, 0 },
1295 		{ "MstGrpPerr", 0, 1 },
1296 	{ "PCIE_PERR_INJECT", 0x300c, 0 },
1298 		{ "IDE", 0, 1 },
1299 	{ "PCIE_NONFAT_ERR", 0x3010, 0 },
1327 		{ "CfgSnp", 0, 1 },
1328 	{ "PCIE_CFG", 0x3014, 0 },
1346 		{ "LinkDnRstEn", 0, 1 },
1347 	{ "PCIE_CFG2", 0x3018, 0 },
1350 		{ "TotMaxTag", 0, 3 },
1351 	{ "PCIE_CFG3", 0x301c, 0 },
1356 		{ "DMADCASTFirstOnly", 0, 1 },
1357 	{ "PCIE_CFG4", 0x3020, 0 },
1362 		{ "GenPME", 0, 8 },
1363 	{ "PCIE_CFG5", 0x3024, 0 },
1366 		{ "HoldCplEnteringL1", 0, 1 },
1367 	{ "PCIE_CFG6", 0x3028, 0 },
1370 		{ "PERstTimer", 0, 4 },
1371 	{ "PCIE_CFG7", 0x302c, 0 },
1372 	{ "PCIE_CFG_SPACE_REQ", 0x3060, 0 },
1381 		{ "Register", 0, 8 },
1382 	{ "PCIE_CFG_SPACE_DATA", 0x3064, 0 },
1383 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3068, 0 },
1386 		{ "Window", 0, 8 },
1387 	{ "PCIE_MEM_ACCESS_OFFSET", 0x306c, 0 },
1389 		{ "PFNum", 0, 3 },
1390 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3070, 0 },
1393 		{ "Window", 0, 8 },
1394 	{ "PCIE_MEM_ACCESS_OFFSET", 0x3074, 0 },
1396 		{ "PFNum", 0, 3 },
1397 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3078, 0 },
1400 		{ "Window", 0, 8 },
1401 	{ "PCIE_MEM_ACCESS_OFFSET", 0x307c, 0 },
1403 		{ "PFNum", 0, 3 },
1404 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3080, 0 },
1407 		{ "Window", 0, 8 },
1408 	{ "PCIE_MEM_ACCESS_OFFSET", 0x3084, 0 },
1410 		{ "PFNum", 0, 3 },
1411 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3088, 0 },
1414 		{ "Window", 0, 8 },
1415 	{ "PCIE_MEM_ACCESS_OFFSET", 0x308c, 0 },
1417 		{ "PFNum", 0, 3 },
1418 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3090, 0 },
1421 		{ "Window", 0, 8 },
1422 	{ "PCIE_MEM_ACCESS_OFFSET", 0x3094, 0 },
1424 		{ "PFNum", 0, 3 },
1425 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x3098, 0 },
1428 		{ "Window", 0, 8 },
1429 	{ "PCIE_MEM_ACCESS_OFFSET", 0x309c, 0 },
1431 		{ "PFNum", 0, 3 },
1432 	{ "PCIE_MEM_ACCESS_BASE_WIN", 0x30a0, 0 },
1435 		{ "Window", 0, 8 },
1436 	{ "PCIE_MEM_ACCESS_OFFSET", 0x30a4, 0 },
1438 		{ "PFNum", 0, 3 },
1439 	{ "PCIE_MAILBOX_BASE_WIN", 0x30a8, 0 },
1442 		{ "Window", 0, 2 },
1443 	{ "PCIE_MAILBOX_OFFSET", 0x30ac, 0 },
1445 	{ "PCIE_MA_CTRL", 0x30b0, 0 },
1450 		{ "MaxTag", 0, 5 },
1451 	{ "PCIE_FW", 0x30b8, 0 },
1452 	{ "PCIE_FW_PF", 0x30bc, 0 },
1453 	{ "PCIE_FW_PF", 0x30c0, 0 },
1454 	{ "PCIE_FW_PF", 0x30c4, 0 },
1455 	{ "PCIE_FW_PF", 0x30c8, 0 },
1456 	{ "PCIE_FW_PF", 0x30cc, 0 },
1457 	{ "PCIE_FW_PF", 0x30d0, 0 },
1458 	{ "PCIE_FW_PF", 0x30d4, 0 },
1459 	{ "PCIE_FW_PF", 0x30d8, 0 },
1460 	{ "PCIE_PIO_PAUSE", 0x30dc, 0 },
1465 		{ "PIOPause", 0, 1 },
1466 	{ "PCIE_MA_STAT", 0x30e0, 0 },
1467 	{ "PCIE_STATIC_CFG1", 0x30e4, 0 },
1469 	{ "PCIE_STATIC_CFG2", 0x30e8, 0 },
1471 		{ "STATIC_SPARE3", 0, 14 },
1472 	{ "PCIE_DBG_INDIR_REQ", 0x30ec, 0 },
1476 		{ "Select", 0, 4 },
1477 	{ "PCIE_DBG_INDIR_DATA_0", 0x30f0, 0 },
1478 	{ "PCIE_DBG_INDIR_DATA_1", 0x30f4, 0 },
1479 	{ "PCIE_DBG_INDIR_DATA_2", 0x30f8, 0 },
1480 	{ "PCIE_DBG_INDIR_DATA_3", 0x30fc, 0 },
1481 	{ "PCIE_PF_INT_CFG", 0x3140, 0 },
1485 		{ "VecBase", 0, 11 },
1486 	{ "PCIE_PF_INT_CFG2", 0x3144, 0 },
1490 	{ "PCIE_PF_INT_CFG", 0x3148, 0 },
1494 		{ "VecBase", 0, 11 },
1495 	{ "PCIE_PF_INT_CFG2", 0x314c, 0 },
1499 	{ "PCIE_PF_INT_CFG", 0x3150, 0 },
1503 		{ "VecBase", 0, 11 },
1504 	{ "PCIE_PF_INT_CFG2", 0x3154, 0 },
1508 	{ "PCIE_PF_INT_CFG", 0x3158, 0 },
1512 		{ "VecBase", 0, 11 },
1513 	{ "PCIE_PF_INT_CFG2", 0x315c, 0 },
1517 	{ "PCIE_PF_INT_CFG", 0x3160, 0 },
1521 		{ "VecBase", 0, 11 },
1522 	{ "PCIE_PF_INT_CFG2", 0x3164, 0 },
1526 	{ "PCIE_PF_INT_CFG", 0x3168, 0 },
1530 		{ "VecBase", 0, 11 },
1531 	{ "PCIE_PF_INT_CFG2", 0x316c, 0 },
1535 	{ "PCIE_PF_INT_CFG", 0x3170, 0 },
1539 		{ "VecBase", 0, 11 },
1540 	{ "PCIE_PF_INT_CFG2", 0x3174, 0 },
1544 	{ "PCIE_PF_INT_CFG", 0x3178, 0 },
1548 		{ "VecBase", 0, 11 },
1549 	{ "PCIE_PF_INT_CFG2", 0x317c, 0 },
1553 	{ "PCIE_VF_INT_CFG", 0x3180, 0 },
1555 		{ "VecBase", 0, 11 },
1556 	{ "PCIE_VF_INT_CFG2", 0x3184, 0 },
1560 	{ "PCIE_VF_INT_CFG", 0x3188, 0 },
1562 		{ "VecBase", 0, 11 },
1563 	{ "PCIE_VF_INT_CFG2", 0x318c, 0 },
1567 	{ "PCIE_VF_INT_CFG", 0x3190, 0 },
1569 		{ "VecBase", 0, 11 },
1570 	{ "PCIE_VF_INT_CFG2", 0x3194, 0 },
1574 	{ "PCIE_VF_INT_CFG", 0x3198, 0 },
1576 		{ "VecBase", 0, 11 },
1577 	{ "PCIE_VF_INT_CFG2", 0x319c, 0 },
1581 	{ "PCIE_VF_INT_CFG", 0x31a0, 0 },
1583 		{ "VecBase", 0, 11 },
1584 	{ "PCIE_VF_INT_CFG2", 0x31a4, 0 },
1588 	{ "PCIE_VF_INT_CFG", 0x31a8, 0 },
1590 		{ "VecBase", 0, 11 },
1591 	{ "PCIE_VF_INT_CFG2", 0x31ac, 0 },
1595 	{ "PCIE_VF_INT_CFG", 0x31b0, 0 },
1597 		{ "VecBase", 0, 11 },
1598 	{ "PCIE_VF_INT_CFG2", 0x31b4, 0 },
1602 	{ "PCIE_VF_INT_CFG", 0x31b8, 0 },
1604 		{ "VecBase", 0, 11 },
1605 	{ "PCIE_VF_INT_CFG2", 0x31bc, 0 },
1609 	{ "PCIE_VF_INT_CFG", 0x31c0, 0 },
1611 		{ "VecBase", 0, 11 },
1612 	{ "PCIE_VF_INT_CFG2", 0x31c4, 0 },
1616 	{ "PCIE_VF_INT_CFG", 0x31c8, 0 },
1618 		{ "VecBase", 0, 11 },
1619 	{ "PCIE_VF_INT_CFG2", 0x31cc, 0 },
1623 	{ "PCIE_VF_INT_CFG", 0x31d0, 0 },
1625 		{ "VecBase", 0, 11 },
1626 	{ "PCIE_VF_INT_CFG2", 0x31d4, 0 },
1630 	{ "PCIE_VF_INT_CFG", 0x31d8, 0 },
1632 		{ "VecBase", 0, 11 },
1633 	{ "PCIE_VF_INT_CFG2", 0x31dc, 0 },
1637 	{ "PCIE_VF_INT_CFG", 0x31e0, 0 },
1639 		{ "VecBase", 0, 11 },
1640 	{ "PCIE_VF_INT_CFG2", 0x31e4, 0 },
1644 	{ "PCIE_VF_INT_CFG", 0x31e8, 0 },
1646 		{ "VecBase", 0, 11 },
1647 	{ "PCIE_VF_INT_CFG2", 0x31ec, 0 },
1651 	{ "PCIE_VF_INT_CFG", 0x31f0, 0 },
1653 		{ "VecBase", 0, 11 },
1654 	{ "PCIE_VF_INT_CFG2", 0x31f4, 0 },
1658 	{ "PCIE_VF_INT_CFG", 0x31f8, 0 },
1660 		{ "VecBase", 0, 11 },
1661 	{ "PCIE_VF_INT_CFG2", 0x31fc, 0 },
1665 	{ "PCIE_VF_INT_CFG", 0x3200, 0 },
1667 		{ "VecBase", 0, 11 },
1668 	{ "PCIE_VF_INT_CFG2", 0x3204, 0 },
1672 	{ "PCIE_VF_INT_CFG", 0x3208, 0 },
1674 		{ "VecBase", 0, 11 },
1675 	{ "PCIE_VF_INT_CFG2", 0x320c, 0 },
1679 	{ "PCIE_VF_INT_CFG", 0x3210, 0 },
1681 		{ "VecBase", 0, 11 },
1682 	{ "PCIE_VF_INT_CFG2", 0x3214, 0 },
1686 	{ "PCIE_VF_INT_CFG", 0x3218, 0 },
1688 		{ "VecBase", 0, 11 },
1689 	{ "PCIE_VF_INT_CFG2", 0x321c, 0 },
1693 	{ "PCIE_VF_INT_CFG", 0x3220, 0 },
1695 		{ "VecBase", 0, 11 },
1696 	{ "PCIE_VF_INT_CFG2", 0x3224, 0 },
1700 	{ "PCIE_VF_INT_CFG", 0x3228, 0 },
1702 		{ "VecBase", 0, 11 },
1703 	{ "PCIE_VF_INT_CFG2", 0x322c, 0 },
1707 	{ "PCIE_VF_INT_CFG", 0x3230, 0 },
1709 		{ "VecBase", 0, 11 },
1710 	{ "PCIE_VF_INT_CFG2", 0x3234, 0 },
1714 	{ "PCIE_VF_INT_CFG", 0x3238, 0 },
1716 		{ "VecBase", 0, 11 },
1717 	{ "PCIE_VF_INT_CFG2", 0x323c, 0 },
1721 	{ "PCIE_VF_INT_CFG", 0x3240, 0 },
1723 		{ "VecBase", 0, 11 },
1724 	{ "PCIE_VF_INT_CFG2", 0x3244, 0 },
1728 	{ "PCIE_VF_INT_CFG", 0x3248, 0 },
1730 		{ "VecBase", 0, 11 },
1731 	{ "PCIE_VF_INT_CFG2", 0x324c, 0 },
1735 	{ "PCIE_VF_INT_CFG", 0x3250, 0 },
1737 		{ "VecBase", 0, 11 },
1738 	{ "PCIE_VF_INT_CFG2", 0x3254, 0 },
1742 	{ "PCIE_VF_INT_CFG", 0x3258, 0 },
1744 		{ "VecBase", 0, 11 },
1745 	{ "PCIE_VF_INT_CFG2", 0x325c, 0 },
1749 	{ "PCIE_VF_INT_CFG", 0x3260, 0 },
1751 		{ "VecBase", 0, 11 },
1752 	{ "PCIE_VF_INT_CFG2", 0x3264, 0 },
1756 	{ "PCIE_VF_INT_CFG", 0x3268, 0 },
1758 		{ "VecBase", 0, 11 },
1759 	{ "PCIE_VF_INT_CFG2", 0x326c, 0 },
1763 	{ "PCIE_VF_INT_CFG", 0x3270, 0 },
1765 		{ "VecBase", 0, 11 },
1766 	{ "PCIE_VF_INT_CFG2", 0x3274, 0 },
1770 	{ "PCIE_VF_INT_CFG", 0x3278, 0 },
1772 		{ "VecBase", 0, 11 },
1773 	{ "PCIE_VF_INT_CFG2", 0x327c, 0 },
1777 	{ "PCIE_VF_INT_CFG", 0x3280, 0 },
1779 		{ "VecBase", 0, 11 },
1780 	{ "PCIE_VF_INT_CFG2", 0x3284, 0 },
1784 	{ "PCIE_VF_INT_CFG", 0x3288, 0 },
1786 		{ "VecBase", 0, 11 },
1787 	{ "PCIE_VF_INT_CFG2", 0x328c, 0 },
1791 	{ "PCIE_VF_INT_CFG", 0x3290, 0 },
1793 		{ "VecBase", 0, 11 },
1794 	{ "PCIE_VF_INT_CFG2", 0x3294, 0 },
1798 	{ "PCIE_VF_INT_CFG", 0x3298, 0 },
1800 		{ "VecBase", 0, 11 },
1801 	{ "PCIE_VF_INT_CFG2", 0x329c, 0 },
1805 	{ "PCIE_VF_INT_CFG", 0x32a0, 0 },
1807 		{ "VecBase", 0, 11 },
1808 	{ "PCIE_VF_INT_CFG2", 0x32a4, 0 },
1812 	{ "PCIE_VF_INT_CFG", 0x32a8, 0 },
1814 		{ "VecBase", 0, 11 },
1815 	{ "PCIE_VF_INT_CFG2", 0x32ac, 0 },
1819 	{ "PCIE_VF_INT_CFG", 0x32b0, 0 },
1821 		{ "VecBase", 0, 11 },
1822 	{ "PCIE_VF_INT_CFG2", 0x32b4, 0 },
1826 	{ "PCIE_VF_INT_CFG", 0x32b8, 0 },
1828 		{ "VecBase", 0, 11 },
1829 	{ "PCIE_VF_INT_CFG2", 0x32bc, 0 },
1833 	{ "PCIE_VF_INT_CFG", 0x32c0, 0 },
1835 		{ "VecBase", 0, 11 },
1836 	{ "PCIE_VF_INT_CFG2", 0x32c4, 0 },
1840 	{ "PCIE_VF_INT_CFG", 0x32c8, 0 },
1842 		{ "VecBase", 0, 11 },
1843 	{ "PCIE_VF_INT_CFG2", 0x32cc, 0 },
1847 	{ "PCIE_VF_INT_CFG", 0x32d0, 0 },
1849 		{ "VecBase", 0, 11 },
1850 	{ "PCIE_VF_INT_CFG2", 0x32d4, 0 },
1854 	{ "PCIE_VF_INT_CFG", 0x32d8, 0 },
1856 		{ "VecBase", 0, 11 },
1857 	{ "PCIE_VF_INT_CFG2", 0x32dc, 0 },
1861 	{ "PCIE_VF_INT_CFG", 0x32e0, 0 },
1863 		{ "VecBase", 0, 11 },
1864 	{ "PCIE_VF_INT_CFG2", 0x32e4, 0 },
1868 	{ "PCIE_VF_INT_CFG", 0x32e8, 0 },
1870 		{ "VecBase", 0, 11 },
1871 	{ "PCIE_VF_INT_CFG2", 0x32ec, 0 },
1875 	{ "PCIE_VF_INT_CFG", 0x32f0, 0 },
1877 		{ "VecBase", 0, 11 },
1878 	{ "PCIE_VF_INT_CFG2", 0x32f4, 0 },
1882 	{ "PCIE_VF_INT_CFG", 0x32f8, 0 },
1884 		{ "VecBase", 0, 11 },
1885 	{ "PCIE_VF_INT_CFG2", 0x32fc, 0 },
1889 	{ "PCIE_VF_INT_CFG", 0x3300, 0 },
1891 		{ "VecBase", 0, 11 },
1892 	{ "PCIE_VF_INT_CFG2", 0x3304, 0 },
1896 	{ "PCIE_VF_INT_CFG", 0x3308, 0 },
1898 		{ "VecBase", 0, 11 },
1899 	{ "PCIE_VF_INT_CFG2", 0x330c, 0 },
1903 	{ "PCIE_VF_INT_CFG", 0x3310, 0 },
1905 		{ "VecBase", 0, 11 },
1906 	{ "PCIE_VF_INT_CFG2", 0x3314, 0 },
1910 	{ "PCIE_VF_INT_CFG", 0x3318, 0 },
1912 		{ "VecBase", 0, 11 },
1913 	{ "PCIE_VF_INT_CFG2", 0x331c, 0 },
1917 	{ "PCIE_VF_INT_CFG", 0x3320, 0 },
1919 		{ "VecBase", 0, 11 },
1920 	{ "PCIE_VF_INT_CFG2", 0x3324, 0 },
1924 	{ "PCIE_VF_INT_CFG", 0x3328, 0 },
1926 		{ "VecBase", 0, 11 },
1927 	{ "PCIE_VF_INT_CFG2", 0x332c, 0 },
1931 	{ "PCIE_VF_INT_CFG", 0x3330, 0 },
1933 		{ "VecBase", 0, 11 },
1934 	{ "PCIE_VF_INT_CFG2", 0x3334, 0 },
1938 	{ "PCIE_VF_INT_CFG", 0x3338, 0 },
1940 		{ "VecBase", 0, 11 },
1941 	{ "PCIE_VF_INT_CFG2", 0x333c, 0 },
1945 	{ "PCIE_VF_INT_CFG", 0x3340, 0 },
1947 		{ "VecBase", 0, 11 },
1948 	{ "PCIE_VF_INT_CFG2", 0x3344, 0 },
1952 	{ "PCIE_VF_INT_CFG", 0x3348, 0 },
1954 		{ "VecBase", 0, 11 },
1955 	{ "PCIE_VF_INT_CFG2", 0x334c, 0 },
1959 	{ "PCIE_VF_INT_CFG", 0x3350, 0 },
1961 		{ "VecBase", 0, 11 },
1962 	{ "PCIE_VF_INT_CFG2", 0x3354, 0 },
1966 	{ "PCIE_VF_INT_CFG", 0x3358, 0 },
1968 		{ "VecBase", 0, 11 },
1969 	{ "PCIE_VF_INT_CFG2", 0x335c, 0 },
1973 	{ "PCIE_VF_INT_CFG", 0x3360, 0 },
1975 		{ "VecBase", 0, 11 },
1976 	{ "PCIE_VF_INT_CFG2", 0x3364, 0 },
1980 	{ "PCIE_VF_INT_CFG", 0x3368, 0 },
1982 		{ "VecBase", 0, 11 },
1983 	{ "PCIE_VF_INT_CFG2", 0x336c, 0 },
1987 	{ "PCIE_VF_INT_CFG", 0x3370, 0 },
1989 		{ "VecBase", 0, 11 },
1990 	{ "PCIE_VF_INT_CFG2", 0x3374, 0 },
1994 	{ "PCIE_VF_INT_CFG", 0x3378, 0 },
1996 		{ "VecBase", 0, 11 },
1997 	{ "PCIE_VF_INT_CFG2", 0x337c, 0 },
2001 	{ "PCIE_VF_INT_CFG", 0x3380, 0 },
2003 		{ "VecBase", 0, 11 },
2004 	{ "PCIE_VF_INT_CFG2", 0x3384, 0 },
2008 	{ "PCIE_VF_INT_CFG", 0x3388, 0 },
2010 		{ "VecBase", 0, 11 },
2011 	{ "PCIE_VF_INT_CFG2", 0x338c, 0 },
2015 	{ "PCIE_VF_INT_CFG", 0x3390, 0 },
2017 		{ "VecBase", 0, 11 },
2018 	{ "PCIE_VF_INT_CFG2", 0x3394, 0 },
2022 	{ "PCIE_VF_INT_CFG", 0x3398, 0 },
2024 		{ "VecBase", 0, 11 },
2025 	{ "PCIE_VF_INT_CFG2", 0x339c, 0 },
2029 	{ "PCIE_VF_INT_CFG", 0x33a0, 0 },
2031 		{ "VecBase", 0, 11 },
2032 	{ "PCIE_VF_INT_CFG2", 0x33a4, 0 },
2036 	{ "PCIE_VF_INT_CFG", 0x33a8, 0 },
2038 		{ "VecBase", 0, 11 },
2039 	{ "PCIE_VF_INT_CFG2", 0x33ac, 0 },
2043 	{ "PCIE_VF_INT_CFG", 0x33b0, 0 },
2045 		{ "VecBase", 0, 11 },
2046 	{ "PCIE_VF_INT_CFG2", 0x33b4, 0 },
2050 	{ "PCIE_VF_INT_CFG", 0x33b8, 0 },
2052 		{ "VecBase", 0, 11 },
2053 	{ "PCIE_VF_INT_CFG2", 0x33bc, 0 },
2057 	{ "PCIE_VF_INT_CFG", 0x33c0, 0 },
2059 		{ "VecBase", 0, 11 },
2060 	{ "PCIE_VF_INT_CFG2", 0x33c4, 0 },
2064 	{ "PCIE_VF_INT_CFG", 0x33c8, 0 },
2066 		{ "VecBase", 0, 11 },
2067 	{ "PCIE_VF_INT_CFG2", 0x33cc, 0 },
2071 	{ "PCIE_VF_INT_CFG", 0x33d0, 0 },
2073 		{ "VecBase", 0, 11 },
2074 	{ "PCIE_VF_INT_CFG2", 0x33d4, 0 },
2078 	{ "PCIE_VF_INT_CFG", 0x33d8, 0 },
2080 		{ "VecBase", 0, 11 },
2081 	{ "PCIE_VF_INT_CFG2", 0x33dc, 0 },
2085 	{ "PCIE_VF_INT_CFG", 0x33e0, 0 },
2087 		{ "VecBase", 0, 11 },
2088 	{ "PCIE_VF_INT_CFG2", 0x33e4, 0 },
2092 	{ "PCIE_VF_INT_CFG", 0x33e8, 0 },
2094 		{ "VecBase", 0, 11 },
2095 	{ "PCIE_VF_INT_CFG2", 0x33ec, 0 },
2099 	{ "PCIE_VF_INT_CFG", 0x33f0, 0 },
2101 		{ "VecBase", 0, 11 },
2102 	{ "PCIE_VF_INT_CFG2", 0x33f4, 0 },
2106 	{ "PCIE_VF_INT_CFG", 0x33f8, 0 },
2108 		{ "VecBase", 0, 11 },
2109 	{ "PCIE_VF_INT_CFG2", 0x33fc, 0 },
2113 	{ "PCIE_VF_INT_CFG", 0x3400, 0 },
2115 		{ "VecBase", 0, 11 },
2116 	{ "PCIE_VF_INT_CFG2", 0x3404, 0 },
2120 	{ "PCIE_VF_INT_CFG", 0x3408, 0 },
2122 		{ "VecBase", 0, 11 },
2123 	{ "PCIE_VF_INT_CFG2", 0x340c, 0 },
2127 	{ "PCIE_VF_INT_CFG", 0x3410, 0 },
2129 		{ "VecBase", 0, 11 },
2130 	{ "PCIE_VF_INT_CFG2", 0x3414, 0 },
2134 	{ "PCIE_VF_INT_CFG", 0x3418, 0 },
2136 		{ "VecBase", 0, 11 },
2137 	{ "PCIE_VF_INT_CFG2", 0x341c, 0 },
2141 	{ "PCIE_VF_INT_CFG", 0x3420, 0 },
2143 		{ "VecBase", 0, 11 },
2144 	{ "PCIE_VF_INT_CFG2", 0x3424, 0 },
2148 	{ "PCIE_VF_INT_CFG", 0x3428, 0 },
2150 		{ "VecBase", 0, 11 },
2151 	{ "PCIE_VF_INT_CFG2", 0x342c, 0 },
2155 	{ "PCIE_VF_INT_CFG", 0x3430, 0 },
2157 		{ "VecBase", 0, 11 },
2158 	{ "PCIE_VF_INT_CFG2", 0x3434, 0 },
2162 	{ "PCIE_VF_INT_CFG", 0x3438, 0 },
2164 		{ "VecBase", 0, 11 },
2165 	{ "PCIE_VF_INT_CFG2", 0x343c, 0 },
2169 	{ "PCIE_VF_INT_CFG", 0x3440, 0 },
2171 		{ "VecBase", 0, 11 },
2172 	{ "PCIE_VF_INT_CFG2", 0x3444, 0 },
2176 	{ "PCIE_VF_INT_CFG", 0x3448, 0 },
2178 		{ "VecBase", 0, 11 },
2179 	{ "PCIE_VF_INT_CFG2", 0x344c, 0 },
2183 	{ "PCIE_VF_INT_CFG", 0x3450, 0 },
2185 		{ "VecBase", 0, 11 },
2186 	{ "PCIE_VF_INT_CFG2", 0x3454, 0 },
2190 	{ "PCIE_VF_INT_CFG", 0x3458, 0 },
2192 		{ "VecBase", 0, 11 },
2193 	{ "PCIE_VF_INT_CFG2", 0x345c, 0 },
2197 	{ "PCIE_VF_INT_CFG", 0x3460, 0 },
2199 		{ "VecBase", 0, 11 },
2200 	{ "PCIE_VF_INT_CFG2", 0x3464, 0 },
2204 	{ "PCIE_VF_INT_CFG", 0x3468, 0 },
2206 		{ "VecBase", 0, 11 },
2207 	{ "PCIE_VF_INT_CFG2", 0x346c, 0 },
2211 	{ "PCIE_VF_INT_CFG", 0x3470, 0 },
2213 		{ "VecBase", 0, 11 },
2214 	{ "PCIE_VF_INT_CFG2", 0x3474, 0 },
2218 	{ "PCIE_VF_INT_CFG", 0x3478, 0 },
2220 		{ "VecBase", 0, 11 },
2221 	{ "PCIE_VF_INT_CFG2", 0x347c, 0 },
2225 	{ "PCIE_VF_INT_CFG", 0x3480, 0 },
2227 		{ "VecBase", 0, 11 },
2228 	{ "PCIE_VF_INT_CFG2", 0x3484, 0 },
2232 	{ "PCIE_VF_INT_CFG", 0x3488, 0 },
2234 		{ "VecBase", 0, 11 },
2235 	{ "PCIE_VF_INT_CFG2", 0x348c, 0 },
2239 	{ "PCIE_VF_INT_CFG", 0x3490, 0 },
2241 		{ "VecBase", 0, 11 },
2242 	{ "PCIE_VF_INT_CFG2", 0x3494, 0 },
2246 	{ "PCIE_VF_INT_CFG", 0x3498, 0 },
2248 		{ "VecBase", 0, 11 },
2249 	{ "PCIE_VF_INT_CFG2", 0x349c, 0 },
2253 	{ "PCIE_VF_INT_CFG", 0x34a0, 0 },
2255 		{ "VecBase", 0, 11 },
2256 	{ "PCIE_VF_INT_CFG2", 0x34a4, 0 },
2260 	{ "PCIE_VF_INT_CFG", 0x34a8, 0 },
2262 		{ "VecBase", 0, 11 },
2263 	{ "PCIE_VF_INT_CFG2", 0x34ac, 0 },
2267 	{ "PCIE_VF_INT_CFG", 0x34b0, 0 },
2269 		{ "VecBase", 0, 11 },
2270 	{ "PCIE_VF_INT_CFG2", 0x34b4, 0 },
2274 	{ "PCIE_VF_INT_CFG", 0x34b8, 0 },
2276 		{ "VecBase", 0, 11 },
2277 	{ "PCIE_VF_INT_CFG2", 0x34bc, 0 },
2281 	{ "PCIE_VF_INT_CFG", 0x34c0, 0 },
2283 		{ "VecBase", 0, 11 },
2284 	{ "PCIE_VF_INT_CFG2", 0x34c4, 0 },
2288 	{ "PCIE_VF_INT_CFG", 0x34c8, 0 },
2290 		{ "VecBase", 0, 11 },
2291 	{ "PCIE_VF_INT_CFG2", 0x34cc, 0 },
2295 	{ "PCIE_VF_INT_CFG", 0x34d0, 0 },
2297 		{ "VecBase", 0, 11 },
2298 	{ "PCIE_VF_INT_CFG2", 0x34d4, 0 },
2302 	{ "PCIE_VF_INT_CFG", 0x34d8, 0 },
2304 		{ "VecBase", 0, 11 },
2305 	{ "PCIE_VF_INT_CFG2", 0x34dc, 0 },
2309 	{ "PCIE_VF_INT_CFG", 0x34e0, 0 },
2311 		{ "VecBase", 0, 11 },
2312 	{ "PCIE_VF_INT_CFG2", 0x34e4, 0 },
2316 	{ "PCIE_VF_INT_CFG", 0x34e8, 0 },
2318 		{ "VecBase", 0, 11 },
2319 	{ "PCIE_VF_INT_CFG2", 0x34ec, 0 },
2323 	{ "PCIE_VF_INT_CFG", 0x34f0, 0 },
2325 		{ "VecBase", 0, 11 },
2326 	{ "PCIE_VF_INT_CFG2", 0x34f4, 0 },
2330 	{ "PCIE_VF_INT_CFG", 0x34f8, 0 },
2332 		{ "VecBase", 0, 11 },
2333 	{ "PCIE_VF_INT_CFG2", 0x34fc, 0 },
2337 	{ "PCIE_VF_INT_CFG", 0x3500, 0 },
2339 		{ "VecBase", 0, 11 },
2340 	{ "PCIE_VF_INT_CFG2", 0x3504, 0 },
2344 	{ "PCIE_VF_INT_CFG", 0x3508, 0 },
2346 		{ "VecBase", 0, 11 },
2347 	{ "PCIE_VF_INT_CFG2", 0x350c, 0 },
2351 	{ "PCIE_VF_INT_CFG", 0x3510, 0 },
2353 		{ "VecBase", 0, 11 },
2354 	{ "PCIE_VF_INT_CFG2", 0x3514, 0 },
2358 	{ "PCIE_VF_INT_CFG", 0x3518, 0 },
2360 		{ "VecBase", 0, 11 },
2361 	{ "PCIE_VF_INT_CFG2", 0x351c, 0 },
2365 	{ "PCIE_VF_INT_CFG", 0x3520, 0 },
2367 		{ "VecBase", 0, 11 },
2368 	{ "PCIE_VF_INT_CFG2", 0x3524, 0 },
2372 	{ "PCIE_VF_INT_CFG", 0x3528, 0 },
2374 		{ "VecBase", 0, 11 },
2375 	{ "PCIE_VF_INT_CFG2", 0x352c, 0 },
2379 	{ "PCIE_VF_INT_CFG", 0x3530, 0 },
2381 		{ "VecBase", 0, 11 },
2382 	{ "PCIE_VF_INT_CFG2", 0x3534, 0 },
2386 	{ "PCIE_VF_INT_CFG", 0x3538, 0 },
2388 		{ "VecBase", 0, 11 },
2389 	{ "PCIE_VF_INT_CFG2", 0x353c, 0 },
2393 	{ "PCIE_VF_INT_CFG", 0x3540, 0 },
2395 		{ "VecBase", 0, 11 },
2396 	{ "PCIE_VF_INT_CFG2", 0x3544, 0 },
2400 	{ "PCIE_VF_INT_CFG", 0x3548, 0 },
2402 		{ "VecBase", 0, 11 },
2403 	{ "PCIE_VF_INT_CFG2", 0x354c, 0 },
2407 	{ "PCIE_VF_INT_CFG", 0x3550, 0 },
2409 		{ "VecBase", 0, 11 },
2410 	{ "PCIE_VF_INT_CFG2", 0x3554, 0 },
2414 	{ "PCIE_VF_INT_CFG", 0x3558, 0 },
2416 		{ "VecBase", 0, 11 },
2417 	{ "PCIE_VF_INT_CFG2", 0x355c, 0 },
2421 	{ "PCIE_VF_INT_CFG", 0x3560, 0 },
2423 		{ "VecBase", 0, 11 },
2424 	{ "PCIE_VF_INT_CFG2", 0x3564, 0 },
2428 	{ "PCIE_VF_INT_CFG", 0x3568, 0 },
2430 		{ "VecBase", 0, 11 },
2431 	{ "PCIE_VF_INT_CFG2", 0x356c, 0 },
2435 	{ "PCIE_VF_INT_CFG", 0x3570, 0 },
2437 		{ "VecBase", 0, 11 },
2438 	{ "PCIE_VF_INT_CFG2", 0x3574, 0 },
2442 	{ "PCIE_VF_INT_CFG", 0x3578, 0 },
2444 		{ "VecBase", 0, 11 },
2445 	{ "PCIE_VF_INT_CFG2", 0x357c, 0 },
2449 	{ "PCIE_PF_MSI_EN", 0x35a8, 0 },
2450 	{ "PCIE_VF_MSI_EN_0", 0x35ac, 0 },
2451 	{ "PCIE_VF_MSI_EN_1", 0x35b0, 0 },
2452 	{ "PCIE_VF_MSI_EN_2", 0x35b4, 0 },
2453 	{ "PCIE_VF_MSI_EN_3", 0x35b8, 0 },
2454 	{ "PCIE_PF_MSIX_EN", 0x35bc, 0 },
2455 	{ "PCIE_VF_MSIX_EN_0", 0x35c0, 0 },
2456 	{ "PCIE_VF_MSIX_EN_1", 0x35c4, 0 },
2457 	{ "PCIE_VF_MSIX_EN_2", 0x35c8, 0 },
2458 	{ "PCIE_VF_MSIX_EN_3", 0x35cc, 0 },
2459 	{ "PCIE_FID_VFID_SEL", 0x35ec, 0 },
2460 	{ "PCIE_FID_VFID", 0x3600, 0 },
2467 		{ "RVF", 0, 8 },
2468 	{ "PCIE_FID_VFID", 0x3604, 0 },
2475 		{ "RVF", 0, 8 },
2476 	{ "PCIE_FID_VFID", 0x3608, 0 },
2483 		{ "RVF", 0, 8 },
2484 	{ "PCIE_FID_VFID", 0x360c, 0 },
2491 		{ "RVF", 0, 8 },
2492 	{ "PCIE_FID_VFID", 0x3610, 0 },
2499 		{ "RVF", 0, 8 },
2500 	{ "PCIE_FID_VFID", 0x3614, 0 },
2507 		{ "RVF", 0, 8 },
2508 	{ "PCIE_FID_VFID", 0x3618, 0 },
2515 		{ "RVF", 0, 8 },
2516 	{ "PCIE_FID_VFID", 0x361c, 0 },
2523 		{ "RVF", 0, 8 },
2524 	{ "PCIE_FID_VFID", 0x3620, 0 },
2531 		{ "RVF", 0, 8 },
2532 	{ "PCIE_FID_VFID", 0x3624, 0 },
2539 		{ "RVF", 0, 8 },
2540 	{ "PCIE_FID_VFID", 0x3628, 0 },
2547 		{ "RVF", 0, 8 },
2548 	{ "PCIE_FID_VFID", 0x362c, 0 },
2555 		{ "RVF", 0, 8 },
2556 	{ "PCIE_FID_VFID", 0x3630, 0 },
2563 		{ "RVF", 0, 8 },
2564 	{ "PCIE_FID_VFID", 0x3634, 0 },
2571 		{ "RVF", 0, 8 },
2572 	{ "PCIE_FID_VFID", 0x3638, 0 },
2579 		{ "RVF", 0, 8 },
2580 	{ "PCIE_FID_VFID", 0x363c, 0 },
2587 		{ "RVF", 0, 8 },
2588 	{ "PCIE_FID_VFID", 0x3640, 0 },
2595 		{ "RVF", 0, 8 },
2596 	{ "PCIE_FID_VFID", 0x3644, 0 },
2603 		{ "RVF", 0, 8 },
2604 	{ "PCIE_FID_VFID", 0x3648, 0 },
2611 		{ "RVF", 0, 8 },
2612 	{ "PCIE_FID_VFID", 0x364c, 0 },
2619 		{ "RVF", 0, 8 },
2620 	{ "PCIE_FID_VFID", 0x3650, 0 },
2627 		{ "RVF", 0, 8 },
2628 	{ "PCIE_FID_VFID", 0x3654, 0 },
2635 		{ "RVF", 0, 8 },
2636 	{ "PCIE_FID_VFID", 0x3658, 0 },
2643 		{ "RVF", 0, 8 },
2644 	{ "PCIE_FID_VFID", 0x365c, 0 },
2651 		{ "RVF", 0, 8 },
2652 	{ "PCIE_FID_VFID", 0x3660, 0 },
2659 		{ "RVF", 0, 8 },
2660 	{ "PCIE_FID_VFID", 0x3664, 0 },
2667 		{ "RVF", 0, 8 },
2668 	{ "PCIE_FID_VFID", 0x3668, 0 },
2675 		{ "RVF", 0, 8 },
2676 	{ "PCIE_FID_VFID", 0x366c, 0 },
2683 		{ "RVF", 0, 8 },
2684 	{ "PCIE_FID_VFID", 0x3670, 0 },
2691 		{ "RVF", 0, 8 },
2692 	{ "PCIE_FID_VFID", 0x3674, 0 },
2699 		{ "RVF", 0, 8 },
2700 	{ "PCIE_FID_VFID", 0x3678, 0 },
2707 		{ "RVF", 0, 8 },
2708 	{ "PCIE_FID_VFID", 0x367c, 0 },
2715 		{ "RVF", 0, 8 },
2716 	{ "PCIE_FID_VFID", 0x3680, 0 },
2723 		{ "RVF", 0, 8 },
2724 	{ "PCIE_FID_VFID", 0x3684, 0 },
2731 		{ "RVF", 0, 8 },
2732 	{ "PCIE_FID_VFID", 0x3688, 0 },
2739 		{ "RVF", 0, 8 },
2740 	{ "PCIE_FID_VFID", 0x368c, 0 },
2747 		{ "RVF", 0, 8 },
2748 	{ "PCIE_FID_VFID", 0x3690, 0 },
2755 		{ "RVF", 0, 8 },
2756 	{ "PCIE_FID_VFID", 0x3694, 0 },
2763 		{ "RVF", 0, 8 },
2764 	{ "PCIE_FID_VFID", 0x3698, 0 },
2771 		{ "RVF", 0, 8 },
2772 	{ "PCIE_FID_VFID", 0x369c, 0 },
2779 		{ "RVF", 0, 8 },
2780 	{ "PCIE_FID_VFID", 0x36a0, 0 },
2787 		{ "RVF", 0, 8 },
2788 	{ "PCIE_FID_VFID", 0x36a4, 0 },
2795 		{ "RVF", 0, 8 },
2796 	{ "PCIE_FID_VFID", 0x36a8, 0 },
2803 		{ "RVF", 0, 8 },
2804 	{ "PCIE_FID_VFID", 0x36ac, 0 },
2811 		{ "RVF", 0, 8 },
2812 	{ "PCIE_FID_VFID", 0x36b0, 0 },
2819 		{ "RVF", 0, 8 },
2820 	{ "PCIE_FID_VFID", 0x36b4, 0 },
2827 		{ "RVF", 0, 8 },
2828 	{ "PCIE_FID_VFID", 0x36b8, 0 },
2835 		{ "RVF", 0, 8 },
2836 	{ "PCIE_FID_VFID", 0x36bc, 0 },
2843 		{ "RVF", 0, 8 },
2844 	{ "PCIE_FID_VFID", 0x36c0, 0 },
2851 		{ "RVF", 0, 8 },
2852 	{ "PCIE_FID_VFID", 0x36c4, 0 },
2859 		{ "RVF", 0, 8 },
2860 	{ "PCIE_FID_VFID", 0x36c8, 0 },
2867 		{ "RVF", 0, 8 },
2868 	{ "PCIE_FID_VFID", 0x36cc, 0 },
2875 		{ "RVF", 0, 8 },
2876 	{ "PCIE_FID_VFID", 0x36d0, 0 },
2883 		{ "RVF", 0, 8 },
2884 	{ "PCIE_FID_VFID", 0x36d4, 0 },
2891 		{ "RVF", 0, 8 },
2892 	{ "PCIE_FID_VFID", 0x36d8, 0 },
2899 		{ "RVF", 0, 8 },
2900 	{ "PCIE_FID_VFID", 0x36dc, 0 },
2907 		{ "RVF", 0, 8 },
2908 	{ "PCIE_FID_VFID", 0x36e0, 0 },
2915 		{ "RVF", 0, 8 },
2916 	{ "PCIE_FID_VFID", 0x36e4, 0 },
2923 		{ "RVF", 0, 8 },
2924 	{ "PCIE_FID_VFID", 0x36e8, 0 },
2931 		{ "RVF", 0, 8 },
2932 	{ "PCIE_FID_VFID", 0x36ec, 0 },
2939 		{ "RVF", 0, 8 },
2940 	{ "PCIE_FID_VFID", 0x36f0, 0 },
2947 		{ "RVF", 0, 8 },
2948 	{ "PCIE_FID_VFID", 0x36f4, 0 },
2955 		{ "RVF", 0, 8 },
2956 	{ "PCIE_FID_VFID", 0x36f8, 0 },
2963 		{ "RVF", 0, 8 },
2964 	{ "PCIE_FID_VFID", 0x36fc, 0 },
2971 		{ "RVF", 0, 8 },
2972 	{ "PCIE_FID_VFID", 0x3700, 0 },
2979 		{ "RVF", 0, 8 },
2980 	{ "PCIE_FID_VFID", 0x3704, 0 },
2987 		{ "RVF", 0, 8 },
2988 	{ "PCIE_FID_VFID", 0x3708, 0 },
2995 		{ "RVF", 0, 8 },
2996 	{ "PCIE_FID_VFID", 0x370c, 0 },
3003 		{ "RVF", 0, 8 },
3004 	{ "PCIE_FID_VFID", 0x3710, 0 },
3011 		{ "RVF", 0, 8 },
3012 	{ "PCIE_FID_VFID", 0x3714, 0 },
3019 		{ "RVF", 0, 8 },
3020 	{ "PCIE_FID_VFID", 0x3718, 0 },
3027 		{ "RVF", 0, 8 },
3028 	{ "PCIE_FID_VFID", 0x371c, 0 },
3035 		{ "RVF", 0, 8 },
3036 	{ "PCIE_FID_VFID", 0x3720, 0 },
3043 		{ "RVF", 0, 8 },
3044 	{ "PCIE_FID_VFID", 0x3724, 0 },
3051 		{ "RVF", 0, 8 },
3052 	{ "PCIE_FID_VFID", 0x3728, 0 },
3059 		{ "RVF", 0, 8 },
3060 	{ "PCIE_FID_VFID", 0x372c, 0 },
3067 		{ "RVF", 0, 8 },
3068 	{ "PCIE_FID_VFID", 0x3730, 0 },
3075 		{ "RVF", 0, 8 },
3076 	{ "PCIE_FID_VFID", 0x3734, 0 },
3083 		{ "RVF", 0, 8 },
3084 	{ "PCIE_FID_VFID", 0x3738, 0 },
3091 		{ "RVF", 0, 8 },
3092 	{ "PCIE_FID_VFID", 0x373c, 0 },
3099 		{ "RVF", 0, 8 },
3100 	{ "PCIE_FID_VFID", 0x3740, 0 },
3107 		{ "RVF", 0, 8 },
3108 	{ "PCIE_FID_VFID", 0x3744, 0 },
3115 		{ "RVF", 0, 8 },
3116 	{ "PCIE_FID_VFID", 0x3748, 0 },
3123 		{ "RVF", 0, 8 },
3124 	{ "PCIE_FID_VFID", 0x374c, 0 },
3131 		{ "RVF", 0, 8 },
3132 	{ "PCIE_FID_VFID", 0x3750, 0 },
3139 		{ "RVF", 0, 8 },
3140 	{ "PCIE_FID_VFID", 0x3754, 0 },
3147 		{ "RVF", 0, 8 },
3148 	{ "PCIE_FID_VFID", 0x3758, 0 },
3155 		{ "RVF", 0, 8 },
3156 	{ "PCIE_FID_VFID", 0x375c, 0 },
3163 		{ "RVF", 0, 8 },
3164 	{ "PCIE_FID_VFID", 0x3760, 0 },
3171 		{ "RVF", 0, 8 },
3172 	{ "PCIE_FID_VFID", 0x3764, 0 },
3179 		{ "RVF", 0, 8 },
3180 	{ "PCIE_FID_VFID", 0x3768, 0 },
3187 		{ "RVF", 0, 8 },
3188 	{ "PCIE_FID_VFID", 0x376c, 0 },
3195 		{ "RVF", 0, 8 },
3196 	{ "PCIE_FID_VFID", 0x3770, 0 },
3203 		{ "RVF", 0, 8 },
3204 	{ "PCIE_FID_VFID", 0x3774, 0 },
3211 		{ "RVF", 0, 8 },
3212 	{ "PCIE_FID_VFID", 0x3778, 0 },
3219 		{ "RVF", 0, 8 },
3220 	{ "PCIE_FID_VFID", 0x377c, 0 },
3227 		{ "RVF", 0, 8 },
3228 	{ "PCIE_FID_VFID", 0x3780, 0 },
3235 		{ "RVF", 0, 8 },
3236 	{ "PCIE_FID_VFID", 0x3784, 0 },
3243 		{ "RVF", 0, 8 },
3244 	{ "PCIE_FID_VFID", 0x3788, 0 },
3251 		{ "RVF", 0, 8 },
3252 	{ "PCIE_FID_VFID", 0x378c, 0 },
3259 		{ "RVF", 0, 8 },
3260 	{ "PCIE_FID_VFID", 0x3790, 0 },
3267 		{ "RVF", 0, 8 },
3268 	{ "PCIE_FID_VFID", 0x3794, 0 },
3275 		{ "RVF", 0, 8 },
3276 	{ "PCIE_FID_VFID", 0x3798, 0 },
3283 		{ "RVF", 0, 8 },
3284 	{ "PCIE_FID_VFID", 0x379c, 0 },
3291 		{ "RVF", 0, 8 },
3292 	{ "PCIE_FID_VFID", 0x37a0, 0 },
3299 		{ "RVF", 0, 8 },
3300 	{ "PCIE_FID_VFID", 0x37a4, 0 },
3307 		{ "RVF", 0, 8 },
3308 	{ "PCIE_FID_VFID", 0x37a8, 0 },
3315 		{ "RVF", 0, 8 },
3316 	{ "PCIE_FID_VFID", 0x37ac, 0 },
3323 		{ "RVF", 0, 8 },
3324 	{ "PCIE_FID_VFID", 0x37b0, 0 },
3331 		{ "RVF", 0, 8 },
3332 	{ "PCIE_FID_VFID", 0x37b4, 0 },
3339 		{ "RVF", 0, 8 },
3340 	{ "PCIE_FID_VFID", 0x37b8, 0 },
3347 		{ "RVF", 0, 8 },
3348 	{ "PCIE_FID_VFID", 0x37bc, 0 },
3355 		{ "RVF", 0, 8 },
3356 	{ "PCIE_FID_VFID", 0x37c0, 0 },
3363 		{ "RVF", 0, 8 },
3364 	{ "PCIE_FID_VFID", 0x37c4, 0 },
3371 		{ "RVF", 0, 8 },
3372 	{ "PCIE_FID_VFID", 0x37c8, 0 },
3379 		{ "RVF", 0, 8 },
3380 	{ "PCIE_FID_VFID", 0x37cc, 0 },
3387 		{ "RVF", 0, 8 },
3388 	{ "PCIE_FID_VFID", 0x37d0, 0 },
3395 		{ "RVF", 0, 8 },
3396 	{ "PCIE_FID_VFID", 0x37d4, 0 },
3403 		{ "RVF", 0, 8 },
3404 	{ "PCIE_FID_VFID", 0x37d8, 0 },
3411 		{ "RVF", 0, 8 },
3412 	{ "PCIE_FID_VFID", 0x37dc, 0 },
3419 		{ "RVF", 0, 8 },
3420 	{ "PCIE_FID_VFID", 0x37e0, 0 },
3427 		{ "RVF", 0, 8 },
3428 	{ "PCIE_FID_VFID", 0x37e4, 0 },
3435 		{ "RVF", 0, 8 },
3436 	{ "PCIE_FID_VFID", 0x37e8, 0 },
3443 		{ "RVF", 0, 8 },
3444 	{ "PCIE_FID_VFID", 0x37ec, 0 },
3451 		{ "RVF", 0, 8 },
3452 	{ "PCIE_FID_VFID", 0x37f0, 0 },
3459 		{ "RVF", 0, 8 },
3460 	{ "PCIE_FID_VFID", 0x37f4, 0 },
3467 		{ "RVF", 0, 8 },
3468 	{ "PCIE_FID_VFID", 0x37f8, 0 },
3475 		{ "RVF", 0, 8 },
3476 	{ "PCIE_FID_VFID", 0x37fc, 0 },
3483 		{ "RVF", 0, 8 },
3484 	{ "PCIE_FID_VFID", 0x3800, 0 },
3491 		{ "RVF", 0, 8 },
3492 	{ "PCIE_FID_VFID", 0x3804, 0 },
3499 		{ "RVF", 0, 8 },
3500 	{ "PCIE_FID_VFID", 0x3808, 0 },
3507 		{ "RVF", 0, 8 },
3508 	{ "PCIE_FID_VFID", 0x380c, 0 },
3515 		{ "RVF", 0, 8 },
3516 	{ "PCIE_FID_VFID", 0x3810, 0 },
3523 		{ "RVF", 0, 8 },
3524 	{ "PCIE_FID_VFID", 0x3814, 0 },
3531 		{ "RVF", 0, 8 },
3532 	{ "PCIE_FID_VFID", 0x3818, 0 },
3539 		{ "RVF", 0, 8 },
3540 	{ "PCIE_FID_VFID", 0x381c, 0 },
3547 		{ "RVF", 0, 8 },
3548 	{ "PCIE_FID_VFID", 0x3820, 0 },
3555 		{ "RVF", 0, 8 },
3556 	{ "PCIE_FID_VFID", 0x3824, 0 },
3563 		{ "RVF", 0, 8 },
3564 	{ "PCIE_FID_VFID", 0x3828, 0 },
3571 		{ "RVF", 0, 8 },
3572 	{ "PCIE_FID_VFID", 0x382c, 0 },
3579 		{ "RVF", 0, 8 },
3580 	{ "PCIE_FID_VFID", 0x3830, 0 },
3587 		{ "RVF", 0, 8 },
3588 	{ "PCIE_FID_VFID", 0x3834, 0 },
3595 		{ "RVF", 0, 8 },
3596 	{ "PCIE_FID_VFID", 0x3838, 0 },
3603 		{ "RVF", 0, 8 },
3604 	{ "PCIE_FID_VFID", 0x383c, 0 },
3611 		{ "RVF", 0, 8 },
3612 	{ "PCIE_FID_VFID", 0x3840, 0 },
3619 		{ "RVF", 0, 8 },
3620 	{ "PCIE_FID_VFID", 0x3844, 0 },
3627 		{ "RVF", 0, 8 },
3628 	{ "PCIE_FID_VFID", 0x3848, 0 },
3635 		{ "RVF", 0, 8 },
3636 	{ "PCIE_FID_VFID", 0x384c, 0 },
3643 		{ "RVF", 0, 8 },
3644 	{ "PCIE_FID_VFID", 0x3850, 0 },
3651 		{ "RVF", 0, 8 },
3652 	{ "PCIE_FID_VFID", 0x3854, 0 },
3659 		{ "RVF", 0, 8 },
3660 	{ "PCIE_FID_VFID", 0x3858, 0 },
3667 		{ "RVF", 0, 8 },
3668 	{ "PCIE_FID_VFID", 0x385c, 0 },
3675 		{ "RVF", 0, 8 },
3676 	{ "PCIE_FID_VFID", 0x3860, 0 },
3683 		{ "RVF", 0, 8 },
3684 	{ "PCIE_FID_VFID", 0x3864, 0 },
3691 		{ "RVF", 0, 8 },
3692 	{ "PCIE_FID_VFID", 0x3868, 0 },
3699 		{ "RVF", 0, 8 },
3700 	{ "PCIE_FID_VFID", 0x386c, 0 },
3707 		{ "RVF", 0, 8 },
3708 	{ "PCIE_FID_VFID", 0x3870, 0 },
3715 		{ "RVF", 0, 8 },
3716 	{ "PCIE_FID_VFID", 0x3874, 0 },
3723 		{ "RVF", 0, 8 },
3724 	{ "PCIE_FID_VFID", 0x3878, 0 },
3731 		{ "RVF", 0, 8 },
3732 	{ "PCIE_FID_VFID", 0x387c, 0 },
3739 		{ "RVF", 0, 8 },
3740 	{ "PCIE_FID_VFID", 0x3880, 0 },
3747 		{ "RVF", 0, 8 },
3748 	{ "PCIE_FID_VFID", 0x3884, 0 },
3755 		{ "RVF", 0, 8 },
3756 	{ "PCIE_FID_VFID", 0x3888, 0 },
3763 		{ "RVF", 0, 8 },
3764 	{ "PCIE_FID_VFID", 0x388c, 0 },
3771 		{ "RVF", 0, 8 },
3772 	{ "PCIE_FID_VFID", 0x3890, 0 },
3779 		{ "RVF", 0, 8 },
3780 	{ "PCIE_FID_VFID", 0x3894, 0 },
3787 		{ "RVF", 0, 8 },
3788 	{ "PCIE_FID_VFID", 0x3898, 0 },
3795 		{ "RVF", 0, 8 },
3796 	{ "PCIE_FID_VFID", 0x389c, 0 },
3803 		{ "RVF", 0, 8 },
3804 	{ "PCIE_FID_VFID", 0x38a0, 0 },
3811 		{ "RVF", 0, 8 },
3812 	{ "PCIE_FID_VFID", 0x38a4, 0 },
3819 		{ "RVF", 0, 8 },
3820 	{ "PCIE_FID_VFID", 0x38a8, 0 },
3827 		{ "RVF", 0, 8 },
3828 	{ "PCIE_FID_VFID", 0x38ac, 0 },
3835 		{ "RVF", 0, 8 },
3836 	{ "PCIE_FID_VFID", 0x38b0, 0 },
3843 		{ "RVF", 0, 8 },
3844 	{ "PCIE_FID_VFID", 0x38b4, 0 },
3851 		{ "RVF", 0, 8 },
3852 	{ "PCIE_FID_VFID", 0x38b8, 0 },
3859 		{ "RVF", 0, 8 },
3860 	{ "PCIE_FID_VFID", 0x38bc, 0 },
3867 		{ "RVF", 0, 8 },
3868 	{ "PCIE_FID_VFID", 0x38c0, 0 },
3875 		{ "RVF", 0, 8 },
3876 	{ "PCIE_FID_VFID", 0x38c4, 0 },
3883 		{ "RVF", 0, 8 },
3884 	{ "PCIE_FID_VFID", 0x38c8, 0 },
3891 		{ "RVF", 0, 8 },
3892 	{ "PCIE_FID_VFID", 0x38cc, 0 },
3899 		{ "RVF", 0, 8 },
3900 	{ "PCIE_FID_VFID", 0x38d0, 0 },
3907 		{ "RVF", 0, 8 },
3908 	{ "PCIE_FID_VFID", 0x38d4, 0 },
3915 		{ "RVF", 0, 8 },
3916 	{ "PCIE_FID_VFID", 0x38d8, 0 },
3923 		{ "RVF", 0, 8 },
3924 	{ "PCIE_FID_VFID", 0x38dc, 0 },
3931 		{ "RVF", 0, 8 },
3932 	{ "PCIE_FID_VFID", 0x38e0, 0 },
3939 		{ "RVF", 0, 8 },
3940 	{ "PCIE_FID_VFID", 0x38e4, 0 },
3947 		{ "RVF", 0, 8 },
3948 	{ "PCIE_FID_VFID", 0x38e8, 0 },
3955 		{ "RVF", 0, 8 },
3956 	{ "PCIE_FID_VFID", 0x38ec, 0 },
3963 		{ "RVF", 0, 8 },
3964 	{ "PCIE_FID_VFID", 0x38f0, 0 },
3971 		{ "RVF", 0, 8 },
3972 	{ "PCIE_FID_VFID", 0x38f4, 0 },
3979 		{ "RVF", 0, 8 },
3980 	{ "PCIE_FID_VFID", 0x38f8, 0 },
3987 		{ "RVF", 0, 8 },
3988 	{ "PCIE_FID_VFID", 0x38fc, 0 },
3995 		{ "RVF", 0, 8 },
3996 	{ "PCIE_FID_VFID", 0x3900, 0 },
4003 		{ "RVF", 0, 8 },
4004 	{ "PCIE_FID_VFID", 0x3904, 0 },
4011 		{ "RVF", 0, 8 },
4012 	{ "PCIE_FID_VFID", 0x3908, 0 },
4019 		{ "RVF", 0, 8 },
4020 	{ "PCIE_FID_VFID", 0x390c, 0 },
4027 		{ "RVF", 0, 8 },
4028 	{ "PCIE_FID_VFID", 0x3910, 0 },
4035 		{ "RVF", 0, 8 },
4036 	{ "PCIE_FID_VFID", 0x3914, 0 },
4043 		{ "RVF", 0, 8 },
4044 	{ "PCIE_FID_VFID", 0x3918, 0 },
4051 		{ "RVF", 0, 8 },
4052 	{ "PCIE_FID_VFID", 0x391c, 0 },
4059 		{ "RVF", 0, 8 },
4060 	{ "PCIE_FID_VFID", 0x3920, 0 },
4067 		{ "RVF", 0, 8 },
4068 	{ "PCIE_FID_VFID", 0x3924, 0 },
4075 		{ "RVF", 0, 8 },
4076 	{ "PCIE_FID_VFID", 0x3928, 0 },
4083 		{ "RVF", 0, 8 },
4084 	{ "PCIE_FID_VFID", 0x392c, 0 },
4091 		{ "RVF", 0, 8 },
4092 	{ "PCIE_FID_VFID", 0x3930, 0 },
4099 		{ "RVF", 0, 8 },
4100 	{ "PCIE_FID_VFID", 0x3934, 0 },
4107 		{ "RVF", 0, 8 },
4108 	{ "PCIE_FID_VFID", 0x3938, 0 },
4115 		{ "RVF", 0, 8 },
4116 	{ "PCIE_FID_VFID", 0x393c, 0 },
4123 		{ "RVF", 0, 8 },
4124 	{ "PCIE_FID_VFID", 0x3940, 0 },
4131 		{ "RVF", 0, 8 },
4132 	{ "PCIE_FID_VFID", 0x3944, 0 },
4139 		{ "RVF", 0, 8 },
4140 	{ "PCIE_FID_VFID", 0x3948, 0 },
4147 		{ "RVF", 0, 8 },
4148 	{ "PCIE_FID_VFID", 0x394c, 0 },
4155 		{ "RVF", 0, 8 },
4156 	{ "PCIE_FID_VFID", 0x3950, 0 },
4163 		{ "RVF", 0, 8 },
4164 	{ "PCIE_FID_VFID", 0x3954, 0 },
4171 		{ "RVF", 0, 8 },
4172 	{ "PCIE_FID_VFID", 0x3958, 0 },
4179 		{ "RVF", 0, 8 },
4180 	{ "PCIE_FID_VFID", 0x395c, 0 },
4187 		{ "RVF", 0, 8 },
4188 	{ "PCIE_FID_VFID", 0x3960, 0 },
4195 		{ "RVF", 0, 8 },
4196 	{ "PCIE_FID_VFID", 0x3964, 0 },
4203 		{ "RVF", 0, 8 },
4204 	{ "PCIE_FID_VFID", 0x3968, 0 },
4211 		{ "RVF", 0, 8 },
4212 	{ "PCIE_FID_VFID", 0x396c, 0 },
4219 		{ "RVF", 0, 8 },
4220 	{ "PCIE_FID_VFID", 0x3970, 0 },
4227 		{ "RVF", 0, 8 },
4228 	{ "PCIE_FID_VFID", 0x3974, 0 },
4235 		{ "RVF", 0, 8 },
4236 	{ "PCIE_FID_VFID", 0x3978, 0 },
4243 		{ "RVF", 0, 8 },
4244 	{ "PCIE_FID_VFID", 0x397c, 0 },
4251 		{ "RVF", 0, 8 },
4252 	{ "PCIE_FID_VFID", 0x3980, 0 },
4259 		{ "RVF", 0, 8 },
4260 	{ "PCIE_FID_VFID", 0x3984, 0 },
4267 		{ "RVF", 0, 8 },
4268 	{ "PCIE_FID_VFID", 0x3988, 0 },
4275 		{ "RVF", 0, 8 },
4276 	{ "PCIE_FID_VFID", 0x398c, 0 },
4283 		{ "RVF", 0, 8 },
4284 	{ "PCIE_FID_VFID", 0x3990, 0 },
4291 		{ "RVF", 0, 8 },
4292 	{ "PCIE_FID_VFID", 0x3994, 0 },
4299 		{ "RVF", 0, 8 },
4300 	{ "PCIE_FID_VFID", 0x3998, 0 },
4307 		{ "RVF", 0, 8 },
4308 	{ "PCIE_FID_VFID", 0x399c, 0 },
4315 		{ "RVF", 0, 8 },
4316 	{ "PCIE_FID_VFID", 0x39a0, 0 },
4323 		{ "RVF", 0, 8 },
4324 	{ "PCIE_FID_VFID", 0x39a4, 0 },
4331 		{ "RVF", 0, 8 },
4332 	{ "PCIE_FID_VFID", 0x39a8, 0 },
4339 		{ "RVF", 0, 8 },
4340 	{ "PCIE_FID_VFID", 0x39ac, 0 },
4347 		{ "RVF", 0, 8 },
4348 	{ "PCIE_FID_VFID", 0x39b0, 0 },
4355 		{ "RVF", 0, 8 },
4356 	{ "PCIE_FID_VFID", 0x39b4, 0 },
4363 		{ "RVF", 0, 8 },
4364 	{ "PCIE_FID_VFID", 0x39b8, 0 },
4371 		{ "RVF", 0, 8 },
4372 	{ "PCIE_FID_VFID", 0x39bc, 0 },
4379 		{ "RVF", 0, 8 },
4380 	{ "PCIE_FID_VFID", 0x39c0, 0 },
4387 		{ "RVF", 0, 8 },
4388 	{ "PCIE_FID_VFID", 0x39c4, 0 },
4395 		{ "RVF", 0, 8 },
4396 	{ "PCIE_FID_VFID", 0x39c8, 0 },
4403 		{ "RVF", 0, 8 },
4404 	{ "PCIE_FID_VFID", 0x39cc, 0 },
4411 		{ "RVF", 0, 8 },
4412 	{ "PCIE_FID_VFID", 0x39d0, 0 },
4419 		{ "RVF", 0, 8 },
4420 	{ "PCIE_FID_VFID", 0x39d4, 0 },
4427 		{ "RVF", 0, 8 },
4428 	{ "PCIE_FID_VFID", 0x39d8, 0 },
4435 		{ "RVF", 0, 8 },
4436 	{ "PCIE_FID_VFID", 0x39dc, 0 },
4443 		{ "RVF", 0, 8 },
4444 	{ "PCIE_FID_VFID", 0x39e0, 0 },
4451 		{ "RVF", 0, 8 },
4452 	{ "PCIE_FID_VFID", 0x39e4, 0 },
4459 		{ "RVF", 0, 8 },
4460 	{ "PCIE_FID_VFID", 0x39e8, 0 },
4467 		{ "RVF", 0, 8 },
4468 	{ "PCIE_FID_VFID", 0x39ec, 0 },
4475 		{ "RVF", 0, 8 },
4476 	{ "PCIE_FID_VFID", 0x39f0, 0 },
4483 		{ "RVF", 0, 8 },
4484 	{ "PCIE_FID_VFID", 0x39f4, 0 },
4491 		{ "RVF", 0, 8 },
4492 	{ "PCIE_FID_VFID", 0x39f8, 0 },
4499 		{ "RVF", 0, 8 },
4500 	{ "PCIE_FID_VFID", 0x39fc, 0 },
4507 		{ "RVF", 0, 8 },
4508 	{ "PCIE_FID_VFID", 0x3a00, 0 },
4515 		{ "RVF", 0, 8 },
4516 	{ "PCIE_FID_VFID", 0x3a04, 0 },
4523 		{ "RVF", 0, 8 },
4524 	{ "PCIE_FID_VFID", 0x3a08, 0 },
4531 		{ "RVF", 0, 8 },
4532 	{ "PCIE_FID_VFID", 0x3a0c, 0 },
4539 		{ "RVF", 0, 8 },
4540 	{ "PCIE_FID_VFID", 0x3a10, 0 },
4547 		{ "RVF", 0, 8 },
4548 	{ "PCIE_FID_VFID", 0x3a14, 0 },
4555 		{ "RVF", 0, 8 },
4556 	{ "PCIE_FID_VFID", 0x3a18, 0 },
4563 		{ "RVF", 0, 8 },
4564 	{ "PCIE_FID_VFID", 0x3a1c, 0 },
4571 		{ "RVF", 0, 8 },
4572 	{ "PCIE_FID_VFID", 0x3a20, 0 },
4579 		{ "RVF", 0, 8 },
4580 	{ "PCIE_FID_VFID", 0x3a24, 0 },
4587 		{ "RVF", 0, 8 },
4588 	{ "PCIE_FID_VFID", 0x3a28, 0 },
4595 		{ "RVF", 0, 8 },
4596 	{ "PCIE_FID_VFID", 0x3a2c, 0 },
4603 		{ "RVF", 0, 8 },
4604 	{ "PCIE_FID_VFID", 0x3a30, 0 },
4611 		{ "RVF", 0, 8 },
4612 	{ "PCIE_FID_VFID", 0x3a34, 0 },
4619 		{ "RVF", 0, 8 },
4620 	{ "PCIE_FID_VFID", 0x3a38, 0 },
4627 		{ "RVF", 0, 8 },
4628 	{ "PCIE_FID_VFID", 0x3a3c, 0 },
4635 		{ "RVF", 0, 8 },
4636 	{ "PCIE_FID_VFID", 0x3a40, 0 },
4643 		{ "RVF", 0, 8 },
4644 	{ "PCIE_FID_VFID", 0x3a44, 0 },
4651 		{ "RVF", 0, 8 },
4652 	{ "PCIE_FID_VFID", 0x3a48, 0 },
4659 		{ "RVF", 0, 8 },
4660 	{ "PCIE_FID_VFID", 0x3a4c, 0 },
4667 		{ "RVF", 0, 8 },
4668 	{ "PCIE_FID_VFID", 0x3a50, 0 },
4675 		{ "RVF", 0, 8 },
4676 	{ "PCIE_FID_VFID", 0x3a54, 0 },
4683 		{ "RVF", 0, 8 },
4684 	{ "PCIE_FID_VFID", 0x3a58, 0 },
4691 		{ "RVF", 0, 8 },
4692 	{ "PCIE_FID_VFID", 0x3a5c, 0 },
4699 		{ "RVF", 0, 8 },
4700 	{ "PCIE_FID_VFID", 0x3a60, 0 },
4707 		{ "RVF", 0, 8 },
4708 	{ "PCIE_FID_VFID", 0x3a64, 0 },
4715 		{ "RVF", 0, 8 },
4716 	{ "PCIE_FID_VFID", 0x3a68, 0 },
4723 		{ "RVF", 0, 8 },
4724 	{ "PCIE_FID_VFID", 0x3a6c, 0 },
4731 		{ "RVF", 0, 8 },
4732 	{ "PCIE_FID_VFID", 0x3a70, 0 },
4739 		{ "RVF", 0, 8 },
4740 	{ "PCIE_FID_VFID", 0x3a74, 0 },
4747 		{ "RVF", 0, 8 },
4748 	{ "PCIE_FID_VFID", 0x3a78, 0 },
4755 		{ "RVF", 0, 8 },
4756 	{ "PCIE_FID_VFID", 0x3a7c, 0 },
4763 		{ "RVF", 0, 8 },
4764 	{ "PCIE_FID_VFID", 0x3a80, 0 },
4771 		{ "RVF", 0, 8 },
4772 	{ "PCIE_FID_VFID", 0x3a84, 0 },
4779 		{ "RVF", 0, 8 },
4780 	{ "PCIE_FID_VFID", 0x3a88, 0 },
4787 		{ "RVF", 0, 8 },
4788 	{ "PCIE_FID_VFID", 0x3a8c, 0 },
4795 		{ "RVF", 0, 8 },
4796 	{ "PCIE_FID_VFID", 0x3a90, 0 },
4803 		{ "RVF", 0, 8 },
4804 	{ "PCIE_FID_VFID", 0x3a94, 0 },
4811 		{ "RVF", 0, 8 },
4812 	{ "PCIE_FID_VFID", 0x3a98, 0 },
4819 		{ "RVF", 0, 8 },
4820 	{ "PCIE_FID_VFID", 0x3a9c, 0 },
4827 		{ "RVF", 0, 8 },
4828 	{ "PCIE_FID_VFID", 0x3aa0, 0 },
4835 		{ "RVF", 0, 8 },
4836 	{ "PCIE_FID_VFID", 0x3aa4, 0 },
4843 		{ "RVF", 0, 8 },
4844 	{ "PCIE_FID_VFID", 0x3aa8, 0 },
4851 		{ "RVF", 0, 8 },
4852 	{ "PCIE_FID_VFID", 0x3aac, 0 },
4859 		{ "RVF", 0, 8 },
4860 	{ "PCIE_FID_VFID", 0x3ab0, 0 },
4867 		{ "RVF", 0, 8 },
4868 	{ "PCIE_FID_VFID", 0x3ab4, 0 },
4875 		{ "RVF", 0, 8 },
4876 	{ "PCIE_FID_VFID", 0x3ab8, 0 },
4883 		{ "RVF", 0, 8 },
4884 	{ "PCIE_FID_VFID", 0x3abc, 0 },
4891 		{ "RVF", 0, 8 },
4892 	{ "PCIE_FID_VFID", 0x3ac0, 0 },
4899 		{ "RVF", 0, 8 },
4900 	{ "PCIE_FID_VFID", 0x3ac4, 0 },
4907 		{ "RVF", 0, 8 },
4908 	{ "PCIE_FID_VFID", 0x3ac8, 0 },
4915 		{ "RVF", 0, 8 },
4916 	{ "PCIE_FID_VFID", 0x3acc, 0 },
4923 		{ "RVF", 0, 8 },
4924 	{ "PCIE_FID_VFID", 0x3ad0, 0 },
4931 		{ "RVF", 0, 8 },
4932 	{ "PCIE_FID_VFID", 0x3ad4, 0 },
4939 		{ "RVF", 0, 8 },
4940 	{ "PCIE_FID_VFID", 0x3ad8, 0 },
4947 		{ "RVF", 0, 8 },
4948 	{ "PCIE_FID_VFID", 0x3adc, 0 },
4955 		{ "RVF", 0, 8 },
4956 	{ "PCIE_FID_VFID", 0x3ae0, 0 },
4963 		{ "RVF", 0, 8 },
4964 	{ "PCIE_FID_VFID", 0x3ae4, 0 },
4971 		{ "RVF", 0, 8 },
4972 	{ "PCIE_FID_VFID", 0x3ae8, 0 },
4979 		{ "RVF", 0, 8 },
4980 	{ "PCIE_FID_VFID", 0x3aec, 0 },
4987 		{ "RVF", 0, 8 },
4988 	{ "PCIE_FID_VFID", 0x3af0, 0 },
4995 		{ "RVF", 0, 8 },
4996 	{ "PCIE_FID_VFID", 0x3af4, 0 },
5003 		{ "RVF", 0, 8 },
5004 	{ "PCIE_FID_VFID", 0x3af8, 0 },
5011 		{ "RVF", 0, 8 },
5012 	{ "PCIE_FID_VFID", 0x3afc, 0 },
5019 		{ "RVF", 0, 8 },
5020 	{ "PCIE_FID_VFID", 0x3b00, 0 },
5027 		{ "RVF", 0, 8 },
5028 	{ "PCIE_FID_VFID", 0x3b04, 0 },
5035 		{ "RVF", 0, 8 },
5036 	{ "PCIE_FID_VFID", 0x3b08, 0 },
5043 		{ "RVF", 0, 8 },
5044 	{ "PCIE_FID_VFID", 0x3b0c, 0 },
5051 		{ "RVF", 0, 8 },
5052 	{ "PCIE_FID_VFID", 0x3b10, 0 },
5059 		{ "RVF", 0, 8 },
5060 	{ "PCIE_FID_VFID", 0x3b14, 0 },
5067 		{ "RVF", 0, 8 },
5068 	{ "PCIE_FID_VFID", 0x3b18, 0 },
5075 		{ "RVF", 0, 8 },
5076 	{ "PCIE_FID_VFID", 0x3b1c, 0 },
5083 		{ "RVF", 0, 8 },
5084 	{ "PCIE_FID_VFID", 0x3b20, 0 },
5091 		{ "RVF", 0, 8 },
5092 	{ "PCIE_FID_VFID", 0x3b24, 0 },
5099 		{ "RVF", 0, 8 },
5100 	{ "PCIE_FID_VFID", 0x3b28, 0 },
5107 		{ "RVF", 0, 8 },
5108 	{ "PCIE_FID_VFID", 0x3b2c, 0 },
5115 		{ "RVF", 0, 8 },
5116 	{ "PCIE_FID_VFID", 0x3b30, 0 },
5123 		{ "RVF", 0, 8 },
5124 	{ "PCIE_FID_VFID", 0x3b34, 0 },
5131 		{ "RVF", 0, 8 },
5132 	{ "PCIE_FID_VFID", 0x3b38, 0 },
5139 		{ "RVF", 0, 8 },
5140 	{ "PCIE_FID_VFID", 0x3b3c, 0 },
5147 		{ "RVF", 0, 8 },
5148 	{ "PCIE_FID_VFID", 0x3b40, 0 },
5155 		{ "RVF", 0, 8 },
5156 	{ "PCIE_FID_VFID", 0x3b44, 0 },
5163 		{ "RVF", 0, 8 },
5164 	{ "PCIE_FID_VFID", 0x3b48, 0 },
5171 		{ "RVF", 0, 8 },
5172 	{ "PCIE_FID_VFID", 0x3b4c, 0 },
5179 		{ "RVF", 0, 8 },
5180 	{ "PCIE_FID_VFID", 0x3b50, 0 },
5187 		{ "RVF", 0, 8 },
5188 	{ "PCIE_FID_VFID", 0x3b54, 0 },
5195 		{ "RVF", 0, 8 },
5196 	{ "PCIE_FID_VFID", 0x3b58, 0 },
5203 		{ "RVF", 0, 8 },
5204 	{ "PCIE_FID_VFID", 0x3b5c, 0 },
5211 		{ "RVF", 0, 8 },
5212 	{ "PCIE_FID_VFID", 0x3b60, 0 },
5219 		{ "RVF", 0, 8 },
5220 	{ "PCIE_FID_VFID", 0x3b64, 0 },
5227 		{ "RVF", 0, 8 },
5228 	{ "PCIE_FID_VFID", 0x3b68, 0 },
5235 		{ "RVF", 0, 8 },
5236 	{ "PCIE_FID_VFID", 0x3b6c, 0 },
5243 		{ "RVF", 0, 8 },
5244 	{ "PCIE_FID_VFID", 0x3b70, 0 },
5251 		{ "RVF", 0, 8 },
5252 	{ "PCIE_FID_VFID", 0x3b74, 0 },
5259 		{ "RVF", 0, 8 },
5260 	{ "PCIE_FID_VFID", 0x3b78, 0 },
5267 		{ "RVF", 0, 8 },
5268 	{ "PCIE_FID_VFID", 0x3b7c, 0 },
5275 		{ "RVF", 0, 8 },
5276 	{ "PCIE_FID_VFID", 0x3b80, 0 },
5283 		{ "RVF", 0, 8 },
5284 	{ "PCIE_FID_VFID", 0x3b84, 0 },
5291 		{ "RVF", 0, 8 },
5292 	{ "PCIE_FID_VFID", 0x3b88, 0 },
5299 		{ "RVF", 0, 8 },
5300 	{ "PCIE_FID_VFID", 0x3b8c, 0 },
5307 		{ "RVF", 0, 8 },
5308 	{ "PCIE_FID_VFID", 0x3b90, 0 },
5315 		{ "RVF", 0, 8 },
5316 	{ "PCIE_FID_VFID", 0x3b94, 0 },
5323 		{ "RVF", 0, 8 },
5324 	{ "PCIE_FID_VFID", 0x3b98, 0 },
5331 		{ "RVF", 0, 8 },
5332 	{ "PCIE_FID_VFID", 0x3b9c, 0 },
5339 		{ "RVF", 0, 8 },
5340 	{ "PCIE_FID_VFID", 0x3ba0, 0 },
5347 		{ "RVF", 0, 8 },
5348 	{ "PCIE_FID_VFID", 0x3ba4, 0 },
5355 		{ "RVF", 0, 8 },
5356 	{ "PCIE_FID_VFID", 0x3ba8, 0 },
5363 		{ "RVF", 0, 8 },
5364 	{ "PCIE_FID_VFID", 0x3bac, 0 },
5371 		{ "RVF", 0, 8 },
5372 	{ "PCIE_FID_VFID", 0x3bb0, 0 },
5379 		{ "RVF", 0, 8 },
5380 	{ "PCIE_FID_VFID", 0x3bb4, 0 },
5387 		{ "RVF", 0, 8 },
5388 	{ "PCIE_FID_VFID", 0x3bb8, 0 },
5395 		{ "RVF", 0, 8 },
5396 	{ "PCIE_FID_VFID", 0x3bbc, 0 },
5403 		{ "RVF", 0, 8 },
5404 	{ "PCIE_FID_VFID", 0x3bc0, 0 },
5411 		{ "RVF", 0, 8 },
5412 	{ "PCIE_FID_VFID", 0x3bc4, 0 },
5419 		{ "RVF", 0, 8 },
5420 	{ "PCIE_FID_VFID", 0x3bc8, 0 },
5427 		{ "RVF", 0, 8 },
5428 	{ "PCIE_FID_VFID", 0x3bcc, 0 },
5435 		{ "RVF", 0, 8 },
5436 	{ "PCIE_FID_VFID", 0x3bd0, 0 },
5443 		{ "RVF", 0, 8 },
5444 	{ "PCIE_FID_VFID", 0x3bd4, 0 },
5451 		{ "RVF", 0, 8 },
5452 	{ "PCIE_FID_VFID", 0x3bd8, 0 },
5459 		{ "RVF", 0, 8 },
5460 	{ "PCIE_FID_VFID", 0x3bdc, 0 },
5467 		{ "RVF", 0, 8 },
5468 	{ "PCIE_FID_VFID", 0x3be0, 0 },
5475 		{ "RVF", 0, 8 },
5476 	{ "PCIE_FID_VFID", 0x3be4, 0 },
5483 		{ "RVF", 0, 8 },
5484 	{ "PCIE_FID_VFID", 0x3be8, 0 },
5491 		{ "RVF", 0, 8 },
5492 	{ "PCIE_FID_VFID", 0x3bec, 0 },
5499 		{ "RVF", 0, 8 },
5500 	{ "PCIE_FID_VFID", 0x3bf0, 0 },
5507 		{ "RVF", 0, 8 },
5508 	{ "PCIE_FID_VFID", 0x3bf4, 0 },
5515 		{ "RVF", 0, 8 },
5516 	{ "PCIE_FID_VFID", 0x3bf8, 0 },
5523 		{ "RVF", 0, 8 },
5524 	{ "PCIE_FID_VFID", 0x3bfc, 0 },
5531 		{ "RVF", 0, 8 },
5532 	{ "PCIE_FID_VFID", 0x3c00, 0 },
5539 		{ "RVF", 0, 8 },
5540 	{ "PCIE_FID_VFID", 0x3c04, 0 },
5547 		{ "RVF", 0, 8 },
5548 	{ "PCIE_FID_VFID", 0x3c08, 0 },
5555 		{ "RVF", 0, 8 },
5556 	{ "PCIE_FID_VFID", 0x3c0c, 0 },
5563 		{ "RVF", 0, 8 },
5564 	{ "PCIE_FID_VFID", 0x3c10, 0 },
5571 		{ "RVF", 0, 8 },
5572 	{ "PCIE_FID_VFID", 0x3c14, 0 },
5579 		{ "RVF", 0, 8 },
5580 	{ "PCIE_FID_VFID", 0x3c18, 0 },
5587 		{ "RVF", 0, 8 },
5588 	{ "PCIE_FID_VFID", 0x3c1c, 0 },
5595 		{ "RVF", 0, 8 },
5596 	{ "PCIE_FID_VFID", 0x3c20, 0 },
5603 		{ "RVF", 0, 8 },
5604 	{ "PCIE_FID_VFID", 0x3c24, 0 },
5611 		{ "RVF", 0, 8 },
5612 	{ "PCIE_FID_VFID", 0x3c28, 0 },
5619 		{ "RVF", 0, 8 },
5620 	{ "PCIE_FID_VFID", 0x3c2c, 0 },
5627 		{ "RVF", 0, 8 },
5628 	{ "PCIE_FID_VFID", 0x3c30, 0 },
5635 		{ "RVF", 0, 8 },
5636 	{ "PCIE_FID_VFID", 0x3c34, 0 },
5643 		{ "RVF", 0, 8 },
5644 	{ "PCIE_FID_VFID", 0x3c38, 0 },
5651 		{ "RVF", 0, 8 },
5652 	{ "PCIE_FID_VFID", 0x3c3c, 0 },
5659 		{ "RVF", 0, 8 },
5660 	{ "PCIE_FID_VFID", 0x3c40, 0 },
5667 		{ "RVF", 0, 8 },
5668 	{ "PCIE_FID_VFID", 0x3c44, 0 },
5675 		{ "RVF", 0, 8 },
5676 	{ "PCIE_FID_VFID", 0x3c48, 0 },
5683 		{ "RVF", 0, 8 },
5684 	{ "PCIE_FID_VFID", 0x3c4c, 0 },
5691 		{ "RVF", 0, 8 },
5692 	{ "PCIE_FID_VFID", 0x3c50, 0 },
5699 		{ "RVF", 0, 8 },
5700 	{ "PCIE_FID_VFID", 0x3c54, 0 },
5707 		{ "RVF", 0, 8 },
5708 	{ "PCIE_FID_VFID", 0x3c58, 0 },
5715 		{ "RVF", 0, 8 },
5716 	{ "PCIE_FID_VFID", 0x3c5c, 0 },
5723 		{ "RVF", 0, 8 },
5724 	{ "PCIE_FID_VFID", 0x3c60, 0 },
5731 		{ "RVF", 0, 8 },
5732 	{ "PCIE_FID_VFID", 0x3c64, 0 },
5739 		{ "RVF", 0, 8 },
5740 	{ "PCIE_FID_VFID", 0x3c68, 0 },
5747 		{ "RVF", 0, 8 },
5748 	{ "PCIE_FID_VFID", 0x3c6c, 0 },
5755 		{ "RVF", 0, 8 },
5756 	{ "PCIE_FID_VFID", 0x3c70, 0 },
5763 		{ "RVF", 0, 8 },
5764 	{ "PCIE_FID_VFID", 0x3c74, 0 },
5771 		{ "RVF", 0, 8 },
5772 	{ "PCIE_FID_VFID", 0x3c78, 0 },
5779 		{ "RVF", 0, 8 },
5780 	{ "PCIE_FID_VFID", 0x3c7c, 0 },
5787 		{ "RVF", 0, 8 },
5788 	{ "PCIE_FID_VFID", 0x3c80, 0 },
5795 		{ "RVF", 0, 8 },
5796 	{ "PCIE_FID_VFID", 0x3c84, 0 },
5803 		{ "RVF", 0, 8 },
5804 	{ "PCIE_FID_VFID", 0x3c88, 0 },
5811 		{ "RVF", 0, 8 },
5812 	{ "PCIE_FID_VFID", 0x3c8c, 0 },
5819 		{ "RVF", 0, 8 },
5820 	{ "PCIE_FID_VFID", 0x3c90, 0 },
5827 		{ "RVF", 0, 8 },
5828 	{ "PCIE_FID_VFID", 0x3c94, 0 },
5835 		{ "RVF", 0, 8 },
5836 	{ "PCIE_FID_VFID", 0x3c98, 0 },
5843 		{ "RVF", 0, 8 },
5844 	{ "PCIE_FID_VFID", 0x3c9c, 0 },
5851 		{ "RVF", 0, 8 },
5852 	{ "PCIE_FID_VFID", 0x3ca0, 0 },
5859 		{ "RVF", 0, 8 },
5860 	{ "PCIE_FID_VFID", 0x3ca4, 0 },
5867 		{ "RVF", 0, 8 },
5868 	{ "PCIE_FID_VFID", 0x3ca8, 0 },
5875 		{ "RVF", 0, 8 },
5876 	{ "PCIE_FID_VFID", 0x3cac, 0 },
5883 		{ "RVF", 0, 8 },
5884 	{ "PCIE_FID_VFID", 0x3cb0, 0 },
5891 		{ "RVF", 0, 8 },
5892 	{ "PCIE_FID_VFID", 0x3cb4, 0 },
5899 		{ "RVF", 0, 8 },
5900 	{ "PCIE_FID_VFID", 0x3cb8, 0 },
5907 		{ "RVF", 0, 8 },
5908 	{ "PCIE_FID_VFID", 0x3cbc, 0 },
5915 		{ "RVF", 0, 8 },
5916 	{ "PCIE_FID_VFID", 0x3cc0, 0 },
5923 		{ "RVF", 0, 8 },
5924 	{ "PCIE_FID_VFID", 0x3cc4, 0 },
5931 		{ "RVF", 0, 8 },
5932 	{ "PCIE_FID_VFID", 0x3cc8, 0 },
5939 		{ "RVF", 0, 8 },
5940 	{ "PCIE_FID_VFID", 0x3ccc, 0 },
5947 		{ "RVF", 0, 8 },
5948 	{ "PCIE_FID_VFID", 0x3cd0, 0 },
5955 		{ "RVF", 0, 8 },
5956 	{ "PCIE_FID_VFID", 0x3cd4, 0 },
5963 		{ "RVF", 0, 8 },
5964 	{ "PCIE_FID_VFID", 0x3cd8, 0 },
5971 		{ "RVF", 0, 8 },
5972 	{ "PCIE_FID_VFID", 0x3cdc, 0 },
5979 		{ "RVF", 0, 8 },
5980 	{ "PCIE_FID_VFID", 0x3ce0, 0 },
5987 		{ "RVF", 0, 8 },
5988 	{ "PCIE_FID_VFID", 0x3ce4, 0 },
5995 		{ "RVF", 0, 8 },
5996 	{ "PCIE_FID_VFID", 0x3ce8, 0 },
6003 		{ "RVF", 0, 8 },
6004 	{ "PCIE_FID_VFID", 0x3cec, 0 },
6011 		{ "RVF", 0, 8 },
6012 	{ "PCIE_FID_VFID", 0x3cf0, 0 },
6019 		{ "RVF", 0, 8 },
6020 	{ "PCIE_FID_VFID", 0x3cf4, 0 },
6027 		{ "RVF", 0, 8 },
6028 	{ "PCIE_FID_VFID", 0x3cf8, 0 },
6035 		{ "RVF", 0, 8 },
6036 	{ "PCIE_FID_VFID", 0x3cfc, 0 },
6043 		{ "RVF", 0, 8 },
6044 	{ "PCIE_FID_VFID", 0x3d00, 0 },
6051 		{ "RVF", 0, 8 },
6052 	{ "PCIE_FID_VFID", 0x3d04, 0 },
6059 		{ "RVF", 0, 8 },
6060 	{ "PCIE_FID_VFID", 0x3d08, 0 },
6067 		{ "RVF", 0, 8 },
6068 	{ "PCIE_FID_VFID", 0x3d0c, 0 },
6075 		{ "RVF", 0, 8 },
6076 	{ "PCIE_FID_VFID", 0x3d10, 0 },
6083 		{ "RVF", 0, 8 },
6084 	{ "PCIE_FID_VFID", 0x3d14, 0 },
6091 		{ "RVF", 0, 8 },
6092 	{ "PCIE_FID_VFID", 0x3d18, 0 },
6099 		{ "RVF", 0, 8 },
6100 	{ "PCIE_FID_VFID", 0x3d1c, 0 },
6107 		{ "RVF", 0, 8 },
6108 	{ "PCIE_FID_VFID", 0x3d20, 0 },
6115 		{ "RVF", 0, 8 },
6116 	{ "PCIE_FID_VFID", 0x3d24, 0 },
6123 		{ "RVF", 0, 8 },
6124 	{ "PCIE_FID_VFID", 0x3d28, 0 },
6131 		{ "RVF", 0, 8 },
6132 	{ "PCIE_FID_VFID", 0x3d2c, 0 },
6139 		{ "RVF", 0, 8 },
6140 	{ "PCIE_FID_VFID", 0x3d30, 0 },
6147 		{ "RVF", 0, 8 },
6148 	{ "PCIE_FID_VFID", 0x3d34, 0 },
6155 		{ "RVF", 0, 8 },
6156 	{ "PCIE_FID_VFID", 0x3d38, 0 },
6163 		{ "RVF", 0, 8 },
6164 	{ "PCIE_FID_VFID", 0x3d3c, 0 },
6171 		{ "RVF", 0, 8 },
6172 	{ "PCIE_FID_VFID", 0x3d40, 0 },
6179 		{ "RVF", 0, 8 },
6180 	{ "PCIE_FID_VFID", 0x3d44, 0 },
6187 		{ "RVF", 0, 8 },
6188 	{ "PCIE_FID_VFID", 0x3d48, 0 },
6195 		{ "RVF", 0, 8 },
6196 	{ "PCIE_FID_VFID", 0x3d4c, 0 },
6203 		{ "RVF", 0, 8 },
6204 	{ "PCIE_FID_VFID", 0x3d50, 0 },
6211 		{ "RVF", 0, 8 },
6212 	{ "PCIE_FID_VFID", 0x3d54, 0 },
6219 		{ "RVF", 0, 8 },
6220 	{ "PCIE_FID_VFID", 0x3d58, 0 },
6227 		{ "RVF", 0, 8 },
6228 	{ "PCIE_FID_VFID", 0x3d5c, 0 },
6235 		{ "RVF", 0, 8 },
6236 	{ "PCIE_FID_VFID", 0x3d60, 0 },
6243 		{ "RVF", 0, 8 },
6244 	{ "PCIE_FID_VFID", 0x3d64, 0 },
6251 		{ "RVF", 0, 8 },
6252 	{ "PCIE_FID_VFID", 0x3d68, 0 },
6259 		{ "RVF", 0, 8 },
6260 	{ "PCIE_FID_VFID", 0x3d6c, 0 },
6267 		{ "RVF", 0, 8 },
6268 	{ "PCIE_FID_VFID", 0x3d70, 0 },
6275 		{ "RVF", 0, 8 },
6276 	{ "PCIE_FID_VFID", 0x3d74, 0 },
6283 		{ "RVF", 0, 8 },
6284 	{ "PCIE_FID_VFID", 0x3d78, 0 },
6291 		{ "RVF", 0, 8 },
6292 	{ "PCIE_FID_VFID", 0x3d7c, 0 },
6299 		{ "RVF", 0, 8 },
6300 	{ "PCIE_FID_VFID", 0x3d80, 0 },
6307 		{ "RVF", 0, 8 },
6308 	{ "PCIE_FID_VFID", 0x3d84, 0 },
6315 		{ "RVF", 0, 8 },
6316 	{ "PCIE_FID_VFID", 0x3d88, 0 },
6323 		{ "RVF", 0, 8 },
6324 	{ "PCIE_FID_VFID", 0x3d8c, 0 },
6331 		{ "RVF", 0, 8 },
6332 	{ "PCIE_FID_VFID", 0x3d90, 0 },
6339 		{ "RVF", 0, 8 },
6340 	{ "PCIE_FID_VFID", 0x3d94, 0 },
6347 		{ "RVF", 0, 8 },
6348 	{ "PCIE_FID_VFID", 0x3d98, 0 },
6355 		{ "RVF", 0, 8 },
6356 	{ "PCIE_FID_VFID", 0x3d9c, 0 },
6363 		{ "RVF", 0, 8 },
6364 	{ "PCIE_FID_VFID", 0x3da0, 0 },
6371 		{ "RVF", 0, 8 },
6372 	{ "PCIE_FID_VFID", 0x3da4, 0 },
6379 		{ "RVF", 0, 8 },
6380 	{ "PCIE_FID_VFID", 0x3da8, 0 },
6387 		{ "RVF", 0, 8 },
6388 	{ "PCIE_FID_VFID", 0x3dac, 0 },
6395 		{ "RVF", 0, 8 },
6396 	{ "PCIE_FID_VFID", 0x3db0, 0 },
6403 		{ "RVF", 0, 8 },
6404 	{ "PCIE_FID_VFID", 0x3db4, 0 },
6411 		{ "RVF", 0, 8 },
6412 	{ "PCIE_FID_VFID", 0x3db8, 0 },
6419 		{ "RVF", 0, 8 },
6420 	{ "PCIE_FID_VFID", 0x3dbc, 0 },
6427 		{ "RVF", 0, 8 },
6428 	{ "PCIE_FID_VFID", 0x3dc0, 0 },
6435 		{ "RVF", 0, 8 },
6436 	{ "PCIE_FID_VFID", 0x3dc4, 0 },
6443 		{ "RVF", 0, 8 },
6444 	{ "PCIE_FID_VFID", 0x3dc8, 0 },
6451 		{ "RVF", 0, 8 },
6452 	{ "PCIE_FID_VFID", 0x3dcc, 0 },
6459 		{ "RVF", 0, 8 },
6460 	{ "PCIE_FID_VFID", 0x3dd0, 0 },
6467 		{ "RVF", 0, 8 },
6468 	{ "PCIE_FID_VFID", 0x3dd4, 0 },
6475 		{ "RVF", 0, 8 },
6476 	{ "PCIE_FID_VFID", 0x3dd8, 0 },
6483 		{ "RVF", 0, 8 },
6484 	{ "PCIE_FID_VFID", 0x3ddc, 0 },
6491 		{ "RVF", 0, 8 },
6492 	{ "PCIE_FID_VFID", 0x3de0, 0 },
6499 		{ "RVF", 0, 8 },
6500 	{ "PCIE_FID_VFID", 0x3de4, 0 },
6507 		{ "RVF", 0, 8 },
6508 	{ "PCIE_FID_VFID", 0x3de8, 0 },
6515 		{ "RVF", 0, 8 },
6516 	{ "PCIE_FID_VFID", 0x3dec, 0 },
6523 		{ "RVF", 0, 8 },
6524 	{ "PCIE_FID_VFID", 0x3df0, 0 },
6531 		{ "RVF", 0, 8 },
6532 	{ "PCIE_FID_VFID", 0x3df4, 0 },
6539 		{ "RVF", 0, 8 },
6540 	{ "PCIE_FID_VFID", 0x3df8, 0 },
6547 		{ "RVF", 0, 8 },
6548 	{ "PCIE_FID_VFID", 0x3dfc, 0 },
6555 		{ "RVF", 0, 8 },
6556 	{ "PCIE_FID_VFID", 0x3e00, 0 },
6563 		{ "RVF", 0, 8 },
6564 	{ "PCIE_FID_VFID", 0x3e04, 0 },
6571 		{ "RVF", 0, 8 },
6572 	{ "PCIE_FID_VFID", 0x3e08, 0 },
6579 		{ "RVF", 0, 8 },
6580 	{ "PCIE_FID_VFID", 0x3e0c, 0 },
6587 		{ "RVF", 0, 8 },
6588 	{ "PCIE_FID_VFID", 0x3e10, 0 },
6595 		{ "RVF", 0, 8 },
6596 	{ "PCIE_FID_VFID", 0x3e14, 0 },
6603 		{ "RVF", 0, 8 },
6604 	{ "PCIE_FID_VFID", 0x3e18, 0 },
6611 		{ "RVF", 0, 8 },
6612 	{ "PCIE_FID_VFID", 0x3e1c, 0 },
6619 		{ "RVF", 0, 8 },
6620 	{ "PCIE_FID_VFID", 0x3e20, 0 },
6627 		{ "RVF", 0, 8 },
6628 	{ "PCIE_FID_VFID", 0x3e24, 0 },
6635 		{ "RVF", 0, 8 },
6636 	{ "PCIE_FID_VFID", 0x3e28, 0 },
6643 		{ "RVF", 0, 8 },
6644 	{ "PCIE_FID_VFID", 0x3e2c, 0 },
6651 		{ "RVF", 0, 8 },
6652 	{ "PCIE_FID_VFID", 0x3e30, 0 },
6659 		{ "RVF", 0, 8 },
6660 	{ "PCIE_FID_VFID", 0x3e34, 0 },
6667 		{ "RVF", 0, 8 },
6668 	{ "PCIE_FID_VFID", 0x3e38, 0 },
6675 		{ "RVF", 0, 8 },
6676 	{ "PCIE_FID_VFID", 0x3e3c, 0 },
6683 		{ "RVF", 0, 8 },
6684 	{ "PCIE_FID_VFID", 0x3e40, 0 },
6691 		{ "RVF", 0, 8 },
6692 	{ "PCIE_FID_VFID", 0x3e44, 0 },
6699 		{ "RVF", 0, 8 },
6700 	{ "PCIE_FID_VFID", 0x3e48, 0 },
6707 		{ "RVF", 0, 8 },
6708 	{ "PCIE_FID_VFID", 0x3e4c, 0 },
6715 		{ "RVF", 0, 8 },
6716 	{ "PCIE_FID_VFID", 0x3e50, 0 },
6723 		{ "RVF", 0, 8 },
6724 	{ "PCIE_FID_VFID", 0x3e54, 0 },
6731 		{ "RVF", 0, 8 },
6732 	{ "PCIE_FID_VFID", 0x3e58, 0 },
6739 		{ "RVF", 0, 8 },
6740 	{ "PCIE_FID_VFID", 0x3e5c, 0 },
6747 		{ "RVF", 0, 8 },
6748 	{ "PCIE_FID_VFID", 0x3e60, 0 },
6755 		{ "RVF", 0, 8 },
6756 	{ "PCIE_FID_VFID", 0x3e64, 0 },
6763 		{ "RVF", 0, 8 },
6764 	{ "PCIE_FID_VFID", 0x3e68, 0 },
6771 		{ "RVF", 0, 8 },
6772 	{ "PCIE_FID_VFID", 0x3e6c, 0 },
6779 		{ "RVF", 0, 8 },
6780 	{ "PCIE_FID_VFID", 0x3e70, 0 },
6787 		{ "RVF", 0, 8 },
6788 	{ "PCIE_FID_VFID", 0x3e74, 0 },
6795 		{ "RVF", 0, 8 },
6796 	{ "PCIE_FID_VFID", 0x3e78, 0 },
6803 		{ "RVF", 0, 8 },
6804 	{ "PCIE_FID_VFID", 0x3e7c, 0 },
6811 		{ "RVF", 0, 8 },
6812 	{ "PCIE_FID_VFID", 0x3e80, 0 },
6819 		{ "RVF", 0, 8 },
6820 	{ "PCIE_FID_VFID", 0x3e84, 0 },
6827 		{ "RVF", 0, 8 },
6828 	{ "PCIE_FID_VFID", 0x3e88, 0 },
6835 		{ "RVF", 0, 8 },
6836 	{ "PCIE_FID_VFID", 0x3e8c, 0 },
6843 		{ "RVF", 0, 8 },
6844 	{ "PCIE_FID_VFID", 0x3e90, 0 },
6851 		{ "RVF", 0, 8 },
6852 	{ "PCIE_FID_VFID", 0x3e94, 0 },
6859 		{ "RVF", 0, 8 },
6860 	{ "PCIE_FID_VFID", 0x3e98, 0 },
6867 		{ "RVF", 0, 8 },
6868 	{ "PCIE_FID_VFID", 0x3e9c, 0 },
6875 		{ "RVF", 0, 8 },
6876 	{ "PCIE_FID_VFID", 0x3ea0, 0 },
6883 		{ "RVF", 0, 8 },
6884 	{ "PCIE_FID_VFID", 0x3ea4, 0 },
6891 		{ "RVF", 0, 8 },
6892 	{ "PCIE_FID_VFID", 0x3ea8, 0 },
6899 		{ "RVF", 0, 8 },
6900 	{ "PCIE_FID_VFID", 0x3eac, 0 },
6907 		{ "RVF", 0, 8 },
6908 	{ "PCIE_FID_VFID", 0x3eb0, 0 },
6915 		{ "RVF", 0, 8 },
6916 	{ "PCIE_FID_VFID", 0x3eb4, 0 },
6923 		{ "RVF", 0, 8 },
6924 	{ "PCIE_FID_VFID", 0x3eb8, 0 },
6931 		{ "RVF", 0, 8 },
6932 	{ "PCIE_FID_VFID", 0x3ebc, 0 },
6939 		{ "RVF", 0, 8 },
6940 	{ "PCIE_FID_VFID", 0x3ec0, 0 },
6947 		{ "RVF", 0, 8 },
6948 	{ "PCIE_FID_VFID", 0x3ec4, 0 },
6955 		{ "RVF", 0, 8 },
6956 	{ "PCIE_FID_VFID", 0x3ec8, 0 },
6963 		{ "RVF", 0, 8 },
6964 	{ "PCIE_FID_VFID", 0x3ecc, 0 },
6971 		{ "RVF", 0, 8 },
6972 	{ "PCIE_FID_VFID", 0x3ed0, 0 },
6979 		{ "RVF", 0, 8 },
6980 	{ "PCIE_FID_VFID", 0x3ed4, 0 },
6987 		{ "RVF", 0, 8 },
6988 	{ "PCIE_FID_VFID", 0x3ed8, 0 },
6995 		{ "RVF", 0, 8 },
6996 	{ "PCIE_FID_VFID", 0x3edc, 0 },
7003 		{ "RVF", 0, 8 },
7004 	{ "PCIE_FID_VFID", 0x3ee0, 0 },
7011 		{ "RVF", 0, 8 },
7012 	{ "PCIE_FID_VFID", 0x3ee4, 0 },
7019 		{ "RVF", 0, 8 },
7020 	{ "PCIE_FID_VFID", 0x3ee8, 0 },
7027 		{ "RVF", 0, 8 },
7028 	{ "PCIE_FID_VFID", 0x3eec, 0 },
7035 		{ "RVF", 0, 8 },
7036 	{ "PCIE_FID_VFID", 0x3ef0, 0 },
7043 		{ "RVF", 0, 8 },
7044 	{ "PCIE_FID_VFID", 0x3ef4, 0 },
7051 		{ "RVF", 0, 8 },
7052 	{ "PCIE_FID_VFID", 0x3ef8, 0 },
7059 		{ "RVF", 0, 8 },
7060 	{ "PCIE_FID_VFID", 0x3efc, 0 },
7067 		{ "RVF", 0, 8 },
7068 	{ "PCIE_FID_VFID", 0x3f00, 0 },
7075 		{ "RVF", 0, 8 },
7076 	{ "PCIE_FID_VFID", 0x3f04, 0 },
7083 		{ "RVF", 0, 8 },
7084 	{ "PCIE_FID_VFID", 0x3f08, 0 },
7091 		{ "RVF", 0, 8 },
7092 	{ "PCIE_FID_VFID", 0x3f0c, 0 },
7099 		{ "RVF", 0, 8 },
7100 	{ "PCIE_FID_VFID", 0x3f10, 0 },
7107 		{ "RVF", 0, 8 },
7108 	{ "PCIE_FID_VFID", 0x3f14, 0 },
7115 		{ "RVF", 0, 8 },
7116 	{ "PCIE_FID_VFID", 0x3f18, 0 },
7123 		{ "RVF", 0, 8 },
7124 	{ "PCIE_FID_VFID", 0x3f1c, 0 },
7131 		{ "RVF", 0, 8 },
7132 	{ "PCIE_FID_VFID", 0x3f20, 0 },
7139 		{ "RVF", 0, 8 },
7140 	{ "PCIE_FID_VFID", 0x3f24, 0 },
7147 		{ "RVF", 0, 8 },
7148 	{ "PCIE_FID_VFID", 0x3f28, 0 },
7155 		{ "RVF", 0, 8 },
7156 	{ "PCIE_FID_VFID", 0x3f2c, 0 },
7163 		{ "RVF", 0, 8 },
7164 	{ "PCIE_FID_VFID", 0x3f30, 0 },
7171 		{ "RVF", 0, 8 },
7172 	{ "PCIE_FID_VFID", 0x3f34, 0 },
7179 		{ "RVF", 0, 8 },
7180 	{ "PCIE_FID_VFID", 0x3f38, 0 },
7187 		{ "RVF", 0, 8 },
7188 	{ "PCIE_FID_VFID", 0x3f3c, 0 },
7195 		{ "RVF", 0, 8 },
7196 	{ "PCIE_FID_VFID", 0x3f40, 0 },
7203 		{ "RVF", 0, 8 },
7204 	{ "PCIE_FID_VFID", 0x3f44, 0 },
7211 		{ "RVF", 0, 8 },
7212 	{ "PCIE_FID_VFID", 0x3f48, 0 },
7219 		{ "RVF", 0, 8 },
7220 	{ "PCIE_FID_VFID", 0x3f4c, 0 },
7227 		{ "RVF", 0, 8 },
7228 	{ "PCIE_FID_VFID", 0x3f50, 0 },
7235 		{ "RVF", 0, 8 },
7236 	{ "PCIE_FID_VFID", 0x3f54, 0 },
7243 		{ "RVF", 0, 8 },
7244 	{ "PCIE_FID_VFID", 0x3f58, 0 },
7251 		{ "RVF", 0, 8 },
7252 	{ "PCIE_FID_VFID", 0x3f5c, 0 },
7259 		{ "RVF", 0, 8 },
7260 	{ "PCIE_FID_VFID", 0x3f60, 0 },
7267 		{ "RVF", 0, 8 },
7268 	{ "PCIE_FID_VFID", 0x3f64, 0 },
7275 		{ "RVF", 0, 8 },
7276 	{ "PCIE_FID_VFID", 0x3f68, 0 },
7283 		{ "RVF", 0, 8 },
7284 	{ "PCIE_FID_VFID", 0x3f6c, 0 },
7291 		{ "RVF", 0, 8 },
7292 	{ "PCIE_FID_VFID", 0x3f70, 0 },
7299 		{ "RVF", 0, 8 },
7300 	{ "PCIE_FID_VFID", 0x3f74, 0 },
7307 		{ "RVF", 0, 8 },
7308 	{ "PCIE_FID_VFID", 0x3f78, 0 },
7315 		{ "RVF", 0, 8 },
7316 	{ "PCIE_FID_VFID", 0x3f7c, 0 },
7323 		{ "RVF", 0, 8 },
7324 	{ "PCIE_FID_VFID", 0x3f80, 0 },
7331 		{ "RVF", 0, 8 },
7332 	{ "PCIE_FID_VFID", 0x3f84, 0 },
7339 		{ "RVF", 0, 8 },
7340 	{ "PCIE_FID_VFID", 0x3f88, 0 },
7347 		{ "RVF", 0, 8 },
7348 	{ "PCIE_FID_VFID", 0x3f8c, 0 },
7355 		{ "RVF", 0, 8 },
7356 	{ "PCIE_FID_VFID", 0x3f90, 0 },
7363 		{ "RVF", 0, 8 },
7364 	{ "PCIE_FID_VFID", 0x3f94, 0 },
7371 		{ "RVF", 0, 8 },
7372 	{ "PCIE_FID_VFID", 0x3f98, 0 },
7379 		{ "RVF", 0, 8 },
7380 	{ "PCIE_FID_VFID", 0x3f9c, 0 },
7387 		{ "RVF", 0, 8 },
7388 	{ "PCIE_FID_VFID", 0x3fa0, 0 },
7395 		{ "RVF", 0, 8 },
7396 	{ "PCIE_FID_VFID", 0x3fa4, 0 },
7403 		{ "RVF", 0, 8 },
7404 	{ "PCIE_FID_VFID", 0x3fa8, 0 },
7411 		{ "RVF", 0, 8 },
7412 	{ "PCIE_FID_VFID", 0x3fac, 0 },
7419 		{ "RVF", 0, 8 },
7420 	{ "PCIE_FID_VFID", 0x3fb0, 0 },
7427 		{ "RVF", 0, 8 },
7428 	{ "PCIE_FID_VFID", 0x3fb4, 0 },
7435 		{ "RVF", 0, 8 },
7436 	{ "PCIE_FID_VFID", 0x3fb8, 0 },
7443 		{ "RVF", 0, 8 },
7444 	{ "PCIE_FID_VFID", 0x3fbc, 0 },
7451 		{ "RVF", 0, 8 },
7452 	{ "PCIE_FID_VFID", 0x3fc0, 0 },
7459 		{ "RVF", 0, 8 },
7460 	{ "PCIE_FID_VFID", 0x3fc4, 0 },
7467 		{ "RVF", 0, 8 },
7468 	{ "PCIE_FID_VFID", 0x3fc8, 0 },
7475 		{ "RVF", 0, 8 },
7476 	{ "PCIE_FID_VFID", 0x3fcc, 0 },
7483 		{ "RVF", 0, 8 },
7484 	{ "PCIE_FID_VFID", 0x3fd0, 0 },
7491 		{ "RVF", 0, 8 },
7492 	{ "PCIE_FID_VFID", 0x3fd4, 0 },
7499 		{ "RVF", 0, 8 },
7500 	{ "PCIE_FID_VFID", 0x3fd8, 0 },
7507 		{ "RVF", 0, 8 },
7508 	{ "PCIE_FID_VFID", 0x3fdc, 0 },
7515 		{ "RVF", 0, 8 },
7516 	{ "PCIE_FID_VFID", 0x3fe0, 0 },
7523 		{ "RVF", 0, 8 },
7524 	{ "PCIE_FID_VFID", 0x3fe4, 0 },
7531 		{ "RVF", 0, 8 },
7532 	{ "PCIE_FID_VFID", 0x3fe8, 0 },
7539 		{ "RVF", 0, 8 },
7540 	{ "PCIE_FID_VFID", 0x3fec, 0 },
7547 		{ "RVF", 0, 8 },
7548 	{ "PCIE_FID_VFID", 0x3ff0, 0 },
7555 		{ "RVF", 0, 8 },
7556 	{ "PCIE_FID_VFID", 0x3ff4, 0 },
7563 		{ "RVF", 0, 8 },
7564 	{ "PCIE_FID_VFID", 0x3ff8, 0 },
7571 		{ "RVF", 0, 8 },
7572 	{ "PCIE_FID_VFID", 0x3ffc, 0 },
7579 		{ "RVF", 0, 8 },
7580 	{ "PCIE_FID_VFID", 0x4000, 0 },
7587 		{ "RVF", 0, 8 },
7588 	{ "PCIE_FID_VFID", 0x4004, 0 },
7595 		{ "RVF", 0, 8 },
7596 	{ "PCIE_FID_VFID", 0x4008, 0 },
7603 		{ "RVF", 0, 8 },
7604 	{ "PCIE_FID_VFID", 0x400c, 0 },
7611 		{ "RVF", 0, 8 },
7612 	{ "PCIE_FID_VFID", 0x4010, 0 },
7619 		{ "RVF", 0, 8 },
7620 	{ "PCIE_FID_VFID", 0x4014, 0 },
7627 		{ "RVF", 0, 8 },
7628 	{ "PCIE_FID_VFID", 0x4018, 0 },
7635 		{ "RVF", 0, 8 },
7636 	{ "PCIE_FID_VFID", 0x401c, 0 },
7643 		{ "RVF", 0, 8 },
7644 	{ "PCIE_FID_VFID", 0x4020, 0 },
7651 		{ "RVF", 0, 8 },
7652 	{ "PCIE_FID_VFID", 0x4024, 0 },
7659 		{ "RVF", 0, 8 },
7660 	{ "PCIE_FID_VFID", 0x4028, 0 },
7667 		{ "RVF", 0, 8 },
7668 	{ "PCIE_FID_VFID", 0x402c, 0 },
7675 		{ "RVF", 0, 8 },
7676 	{ "PCIE_FID_VFID", 0x4030, 0 },
7683 		{ "RVF", 0, 8 },
7684 	{ "PCIE_FID_VFID", 0x4034, 0 },
7691 		{ "RVF", 0, 8 },
7692 	{ "PCIE_FID_VFID", 0x4038, 0 },
7699 		{ "RVF", 0, 8 },
7700 	{ "PCIE_FID_VFID", 0x403c, 0 },
7707 		{ "RVF", 0, 8 },
7708 	{ "PCIE_FID_VFID", 0x4040, 0 },
7715 		{ "RVF", 0, 8 },
7716 	{ "PCIE_FID_VFID", 0x4044, 0 },
7723 		{ "RVF", 0, 8 },
7724 	{ "PCIE_FID_VFID", 0x4048, 0 },
7731 		{ "RVF", 0, 8 },
7732 	{ "PCIE_FID_VFID", 0x404c, 0 },
7739 		{ "RVF", 0, 8 },
7740 	{ "PCIE_FID_VFID", 0x4050, 0 },
7747 		{ "RVF", 0, 8 },
7748 	{ "PCIE_FID_VFID", 0x4054, 0 },
7755 		{ "RVF", 0, 8 },
7756 	{ "PCIE_FID_VFID", 0x4058, 0 },
7763 		{ "RVF", 0, 8 },
7764 	{ "PCIE_FID_VFID", 0x405c, 0 },
7771 		{ "RVF", 0, 8 },
7772 	{ "PCIE_FID_VFID", 0x4060, 0 },
7779 		{ "RVF", 0, 8 },
7780 	{ "PCIE_FID_VFID", 0x4064, 0 },
7787 		{ "RVF", 0, 8 },
7788 	{ "PCIE_FID_VFID", 0x4068, 0 },
7795 		{ "RVF", 0, 8 },
7796 	{ "PCIE_FID_VFID", 0x406c, 0 },
7803 		{ "RVF", 0, 8 },
7804 	{ "PCIE_FID_VFID", 0x4070, 0 },
7811 		{ "RVF", 0, 8 },
7812 	{ "PCIE_FID_VFID", 0x4074, 0 },
7819 		{ "RVF", 0, 8 },
7820 	{ "PCIE_FID_VFID", 0x4078, 0 },
7827 		{ "RVF", 0, 8 },
7828 	{ "PCIE_FID_VFID", 0x407c, 0 },
7835 		{ "RVF", 0, 8 },
7836 	{ "PCIE_FID_VFID", 0x4080, 0 },
7843 		{ "RVF", 0, 8 },
7844 	{ "PCIE_FID_VFID", 0x4084, 0 },
7851 		{ "RVF", 0, 8 },
7852 	{ "PCIE_FID_VFID", 0x4088, 0 },
7859 		{ "RVF", 0, 8 },
7860 	{ "PCIE_FID_VFID", 0x408c, 0 },
7867 		{ "RVF", 0, 8 },
7868 	{ "PCIE_FID_VFID", 0x4090, 0 },
7875 		{ "RVF", 0, 8 },
7876 	{ "PCIE_FID_VFID", 0x4094, 0 },
7883 		{ "RVF", 0, 8 },
7884 	{ "PCIE_FID_VFID", 0x4098, 0 },
7891 		{ "RVF", 0, 8 },
7892 	{ "PCIE_FID_VFID", 0x409c, 0 },
7899 		{ "RVF", 0, 8 },
7900 	{ "PCIE_FID_VFID", 0x40a0, 0 },
7907 		{ "RVF", 0, 8 },
7908 	{ "PCIE_FID_VFID", 0x40a4, 0 },
7915 		{ "RVF", 0, 8 },
7916 	{ "PCIE_FID_VFID", 0x40a8, 0 },
7923 		{ "RVF", 0, 8 },
7924 	{ "PCIE_FID_VFID", 0x40ac, 0 },
7931 		{ "RVF", 0, 8 },
7932 	{ "PCIE_FID_VFID", 0x40b0, 0 },
7939 		{ "RVF", 0, 8 },
7940 	{ "PCIE_FID_VFID", 0x40b4, 0 },
7947 		{ "RVF", 0, 8 },
7948 	{ "PCIE_FID_VFID", 0x40b8, 0 },
7955 		{ "RVF", 0, 8 },
7956 	{ "PCIE_FID_VFID", 0x40bc, 0 },
7963 		{ "RVF", 0, 8 },
7964 	{ "PCIE_FID_VFID", 0x40c0, 0 },
7971 		{ "RVF", 0, 8 },
7972 	{ "PCIE_FID_VFID", 0x40c4, 0 },
7979 		{ "RVF", 0, 8 },
7980 	{ "PCIE_FID_VFID", 0x40c8, 0 },
7987 		{ "RVF", 0, 8 },
7988 	{ "PCIE_FID_VFID", 0x40cc, 0 },
7995 		{ "RVF", 0, 8 },
7996 	{ "PCIE_FID_VFID", 0x40d0, 0 },
8003 		{ "RVF", 0, 8 },
8004 	{ "PCIE_FID_VFID", 0x40d4, 0 },
8011 		{ "RVF", 0, 8 },
8012 	{ "PCIE_FID_VFID", 0x40d8, 0 },
8019 		{ "RVF", 0, 8 },
8020 	{ "PCIE_FID_VFID", 0x40dc, 0 },
8027 		{ "RVF", 0, 8 },
8028 	{ "PCIE_FID_VFID", 0x40e0, 0 },
8035 		{ "RVF", 0, 8 },
8036 	{ "PCIE_FID_VFID", 0x40e4, 0 },
8043 		{ "RVF", 0, 8 },
8044 	{ "PCIE_FID_VFID", 0x40e8, 0 },
8051 		{ "RVF", 0, 8 },
8052 	{ "PCIE_FID_VFID", 0x40ec, 0 },
8059 		{ "RVF", 0, 8 },
8060 	{ "PCIE_FID_VFID", 0x40f0, 0 },
8067 		{ "RVF", 0, 8 },
8068 	{ "PCIE_FID_VFID", 0x40f4, 0 },
8075 		{ "RVF", 0, 8 },
8076 	{ "PCIE_FID_VFID", 0x40f8, 0 },
8083 		{ "RVF", 0, 8 },
8084 	{ "PCIE_FID_VFID", 0x40fc, 0 },
8091 		{ "RVF", 0, 8 },
8092 	{ "PCIE_FID_VFID", 0x4100, 0 },
8099 		{ "RVF", 0, 8 },
8100 	{ "PCIE_FID_VFID", 0x4104, 0 },
8107 		{ "RVF", 0, 8 },
8108 	{ "PCIE_FID_VFID", 0x4108, 0 },
8115 		{ "RVF", 0, 8 },
8116 	{ "PCIE_FID_VFID", 0x410c, 0 },
8123 		{ "RVF", 0, 8 },
8124 	{ "PCIE_FID_VFID", 0x4110, 0 },
8131 		{ "RVF", 0, 8 },
8132 	{ "PCIE_FID_VFID", 0x4114, 0 },
8139 		{ "RVF", 0, 8 },
8140 	{ "PCIE_FID_VFID", 0x4118, 0 },
8147 		{ "RVF", 0, 8 },
8148 	{ "PCIE_FID_VFID", 0x411c, 0 },
8155 		{ "RVF", 0, 8 },
8156 	{ "PCIE_FID_VFID", 0x4120, 0 },
8163 		{ "RVF", 0, 8 },
8164 	{ "PCIE_FID_VFID", 0x4124, 0 },
8171 		{ "RVF", 0, 8 },
8172 	{ "PCIE_FID_VFID", 0x4128, 0 },
8179 		{ "RVF", 0, 8 },
8180 	{ "PCIE_FID_VFID", 0x412c, 0 },
8187 		{ "RVF", 0, 8 },
8188 	{ "PCIE_FID_VFID", 0x4130, 0 },
8195 		{ "RVF", 0, 8 },
8196 	{ "PCIE_FID_VFID", 0x4134, 0 },
8203 		{ "RVF", 0, 8 },
8204 	{ "PCIE_FID_VFID", 0x4138, 0 },
8211 		{ "RVF", 0, 8 },
8212 	{ "PCIE_FID_VFID", 0x413c, 0 },
8219 		{ "RVF", 0, 8 },
8220 	{ "PCIE_FID_VFID", 0x4140, 0 },
8227 		{ "RVF", 0, 8 },
8228 	{ "PCIE_FID_VFID", 0x4144, 0 },
8235 		{ "RVF", 0, 8 },
8236 	{ "PCIE_FID_VFID", 0x4148, 0 },
8243 		{ "RVF", 0, 8 },
8244 	{ "PCIE_FID_VFID", 0x414c, 0 },
8251 		{ "RVF", 0, 8 },
8252 	{ "PCIE_FID_VFID", 0x4150, 0 },
8259 		{ "RVF", 0, 8 },
8260 	{ "PCIE_FID_VFID", 0x4154, 0 },
8267 		{ "RVF", 0, 8 },
8268 	{ "PCIE_FID_VFID", 0x4158, 0 },
8275 		{ "RVF", 0, 8 },
8276 	{ "PCIE_FID_VFID", 0x415c, 0 },
8283 		{ "RVF", 0, 8 },
8284 	{ "PCIE_FID_VFID", 0x4160, 0 },
8291 		{ "RVF", 0, 8 },
8292 	{ "PCIE_FID_VFID", 0x4164, 0 },
8299 		{ "RVF", 0, 8 },
8300 	{ "PCIE_FID_VFID", 0x4168, 0 },
8307 		{ "RVF", 0, 8 },
8308 	{ "PCIE_FID_VFID", 0x416c, 0 },
8315 		{ "RVF", 0, 8 },
8316 	{ "PCIE_FID_VFID", 0x4170, 0 },
8323 		{ "RVF", 0, 8 },
8324 	{ "PCIE_FID_VFID", 0x4174, 0 },
8331 		{ "RVF", 0, 8 },
8332 	{ "PCIE_FID_VFID", 0x4178, 0 },
8339 		{ "RVF", 0, 8 },
8340 	{ "PCIE_FID_VFID", 0x417c, 0 },
8347 		{ "RVF", 0, 8 },
8348 	{ "PCIE_FID_VFID", 0x4180, 0 },
8355 		{ "RVF", 0, 8 },
8356 	{ "PCIE_FID_VFID", 0x4184, 0 },
8363 		{ "RVF", 0, 8 },
8364 	{ "PCIE_FID_VFID", 0x4188, 0 },
8371 		{ "RVF", 0, 8 },
8372 	{ "PCIE_FID_VFID", 0x418c, 0 },
8379 		{ "RVF", 0, 8 },
8380 	{ "PCIE_FID_VFID", 0x4190, 0 },
8387 		{ "RVF", 0, 8 },
8388 	{ "PCIE_FID_VFID", 0x4194, 0 },
8395 		{ "RVF", 0, 8 },
8396 	{ "PCIE_FID_VFID", 0x4198, 0 },
8403 		{ "RVF", 0, 8 },
8404 	{ "PCIE_FID_VFID", 0x419c, 0 },
8411 		{ "RVF", 0, 8 },
8412 	{ "PCIE_FID_VFID", 0x41a0, 0 },
8419 		{ "RVF", 0, 8 },
8420 	{ "PCIE_FID_VFID", 0x41a4, 0 },
8427 		{ "RVF", 0, 8 },
8428 	{ "PCIE_FID_VFID", 0x41a8, 0 },
8435 		{ "RVF", 0, 8 },
8436 	{ "PCIE_FID_VFID", 0x41ac, 0 },
8443 		{ "RVF", 0, 8 },
8444 	{ "PCIE_FID_VFID", 0x41b0, 0 },
8451 		{ "RVF", 0, 8 },
8452 	{ "PCIE_FID_VFID", 0x41b4, 0 },
8459 		{ "RVF", 0, 8 },
8460 	{ "PCIE_FID_VFID", 0x41b8, 0 },
8467 		{ "RVF", 0, 8 },
8468 	{ "PCIE_FID_VFID", 0x41bc, 0 },
8475 		{ "RVF", 0, 8 },
8476 	{ "PCIE_FID_VFID", 0x41c0, 0 },
8483 		{ "RVF", 0, 8 },
8484 	{ "PCIE_FID_VFID", 0x41c4, 0 },
8491 		{ "RVF", 0, 8 },
8492 	{ "PCIE_FID_VFID", 0x41c8, 0 },
8499 		{ "RVF", 0, 8 },
8500 	{ "PCIE_FID_VFID", 0x41cc, 0 },
8507 		{ "RVF", 0, 8 },
8508 	{ "PCIE_FID_VFID", 0x41d0, 0 },
8515 		{ "RVF", 0, 8 },
8516 	{ "PCIE_FID_VFID", 0x41d4, 0 },
8523 		{ "RVF", 0, 8 },
8524 	{ "PCIE_FID_VFID", 0x41d8, 0 },
8531 		{ "RVF", 0, 8 },
8532 	{ "PCIE_FID_VFID", 0x41dc, 0 },
8539 		{ "RVF", 0, 8 },
8540 	{ "PCIE_FID_VFID", 0x41e0, 0 },
8547 		{ "RVF", 0, 8 },
8548 	{ "PCIE_FID_VFID", 0x41e4, 0 },
8555 		{ "RVF", 0, 8 },
8556 	{ "PCIE_FID_VFID", 0x41e8, 0 },
8563 		{ "RVF", 0, 8 },
8564 	{ "PCIE_FID_VFID", 0x41ec, 0 },
8571 		{ "RVF", 0, 8 },
8572 	{ "PCIE_FID_VFID", 0x41f0, 0 },
8579 		{ "RVF", 0, 8 },
8580 	{ "PCIE_FID_VFID", 0x41f4, 0 },
8587 		{ "RVF", 0, 8 },
8588 	{ "PCIE_FID_VFID", 0x41f8, 0 },
8595 		{ "RVF", 0, 8 },
8596 	{ "PCIE_FID_VFID", 0x41fc, 0 },
8603 		{ "RVF", 0, 8 },
8604 	{ "PCIE_FID_VFID", 0x4200, 0 },
8611 		{ "RVF", 0, 8 },
8612 	{ "PCIE_FID_VFID", 0x4204, 0 },
8619 		{ "RVF", 0, 8 },
8620 	{ "PCIE_FID_VFID", 0x4208, 0 },
8627 		{ "RVF", 0, 8 },
8628 	{ "PCIE_FID_VFID", 0x420c, 0 },
8635 		{ "RVF", 0, 8 },
8636 	{ "PCIE_FID_VFID", 0x4210, 0 },
8643 		{ "RVF", 0, 8 },
8644 	{ "PCIE_FID_VFID", 0x4214, 0 },
8651 		{ "RVF", 0, 8 },
8652 	{ "PCIE_FID_VFID", 0x4218, 0 },
8659 		{ "RVF", 0, 8 },
8660 	{ "PCIE_FID_VFID", 0x421c, 0 },
8667 		{ "RVF", 0, 8 },
8668 	{ "PCIE_FID_VFID", 0x4220, 0 },
8675 		{ "RVF", 0, 8 },
8676 	{ "PCIE_FID_VFID", 0x4224, 0 },
8683 		{ "RVF", 0, 8 },
8684 	{ "PCIE_FID_VFID", 0x4228, 0 },
8691 		{ "RVF", 0, 8 },
8692 	{ "PCIE_FID_VFID", 0x422c, 0 },
8699 		{ "RVF", 0, 8 },
8700 	{ "PCIE_FID_VFID", 0x4230, 0 },
8707 		{ "RVF", 0, 8 },
8708 	{ "PCIE_FID_VFID", 0x4234, 0 },
8715 		{ "RVF", 0, 8 },
8716 	{ "PCIE_FID_VFID", 0x4238, 0 },
8723 		{ "RVF", 0, 8 },
8724 	{ "PCIE_FID_VFID", 0x423c, 0 },
8731 		{ "RVF", 0, 8 },
8732 	{ "PCIE_FID_VFID", 0x4240, 0 },
8739 		{ "RVF", 0, 8 },
8740 	{ "PCIE_FID_VFID", 0x4244, 0 },
8747 		{ "RVF", 0, 8 },
8748 	{ "PCIE_FID_VFID", 0x4248, 0 },
8755 		{ "RVF", 0, 8 },
8756 	{ "PCIE_FID_VFID", 0x424c, 0 },
8763 		{ "RVF", 0, 8 },
8764 	{ "PCIE_FID_VFID", 0x4250, 0 },
8771 		{ "RVF", 0, 8 },
8772 	{ "PCIE_FID_VFID", 0x4254, 0 },
8779 		{ "RVF", 0, 8 },
8780 	{ "PCIE_FID_VFID", 0x4258, 0 },
8787 		{ "RVF", 0, 8 },
8788 	{ "PCIE_FID_VFID", 0x425c, 0 },
8795 		{ "RVF", 0, 8 },
8796 	{ "PCIE_FID_VFID", 0x4260, 0 },
8803 		{ "RVF", 0, 8 },
8804 	{ "PCIE_FID_VFID", 0x4264, 0 },
8811 		{ "RVF", 0, 8 },
8812 	{ "PCIE_FID_VFID", 0x4268, 0 },
8819 		{ "RVF", 0, 8 },
8820 	{ "PCIE_FID_VFID", 0x426c, 0 },
8827 		{ "RVF", 0, 8 },
8828 	{ "PCIE_FID_VFID", 0x4270, 0 },
8835 		{ "RVF", 0, 8 },
8836 	{ "PCIE_FID_VFID", 0x4274, 0 },
8843 		{ "RVF", 0, 8 },
8844 	{ "PCIE_FID_VFID", 0x4278, 0 },
8851 		{ "RVF", 0, 8 },
8852 	{ "PCIE_FID_VFID", 0x427c, 0 },
8859 		{ "RVF", 0, 8 },
8860 	{ "PCIE_FID_VFID", 0x4280, 0 },
8867 		{ "RVF", 0, 8 },
8868 	{ "PCIE_FID_VFID", 0x4284, 0 },
8875 		{ "RVF", 0, 8 },
8876 	{ "PCIE_FID_VFID", 0x4288, 0 },
8883 		{ "RVF", 0, 8 },
8884 	{ "PCIE_FID_VFID", 0x428c, 0 },
8891 		{ "RVF", 0, 8 },
8892 	{ "PCIE_FID_VFID", 0x4290, 0 },
8899 		{ "RVF", 0, 8 },
8900 	{ "PCIE_FID_VFID", 0x4294, 0 },
8907 		{ "RVF", 0, 8 },
8908 	{ "PCIE_FID_VFID", 0x4298, 0 },
8915 		{ "RVF", 0, 8 },
8916 	{ "PCIE_FID_VFID", 0x429c, 0 },
8923 		{ "RVF", 0, 8 },
8924 	{ "PCIE_FID_VFID", 0x42a0, 0 },
8931 		{ "RVF", 0, 8 },
8932 	{ "PCIE_FID_VFID", 0x42a4, 0 },
8939 		{ "RVF", 0, 8 },
8940 	{ "PCIE_FID_VFID", 0x42a8, 0 },
8947 		{ "RVF", 0, 8 },
8948 	{ "PCIE_FID_VFID", 0x42ac, 0 },
8955 		{ "RVF", 0, 8 },
8956 	{ "PCIE_FID_VFID", 0x42b0, 0 },
8963 		{ "RVF", 0, 8 },
8964 	{ "PCIE_FID_VFID", 0x42b4, 0 },
8971 		{ "RVF", 0, 8 },
8972 	{ "PCIE_FID_VFID", 0x42b8, 0 },
8979 		{ "RVF", 0, 8 },
8980 	{ "PCIE_FID_VFID", 0x42bc, 0 },
8987 		{ "RVF", 0, 8 },
8988 	{ "PCIE_FID_VFID", 0x42c0, 0 },
8995 		{ "RVF", 0, 8 },
8996 	{ "PCIE_FID_VFID", 0x42c4, 0 },
9003 		{ "RVF", 0, 8 },
9004 	{ "PCIE_FID_VFID", 0x42c8, 0 },
9011 		{ "RVF", 0, 8 },
9012 	{ "PCIE_FID_VFID", 0x42cc, 0 },
9019 		{ "RVF", 0, 8 },
9020 	{ "PCIE_FID_VFID", 0x42d0, 0 },
9027 		{ "RVF", 0, 8 },
9028 	{ "PCIE_FID_VFID", 0x42d4, 0 },
9035 		{ "RVF", 0, 8 },
9036 	{ "PCIE_FID_VFID", 0x42d8, 0 },
9043 		{ "RVF", 0, 8 },
9044 	{ "PCIE_FID_VFID", 0x42dc, 0 },
9051 		{ "RVF", 0, 8 },
9052 	{ "PCIE_FID_VFID", 0x42e0, 0 },
9059 		{ "RVF", 0, 8 },
9060 	{ "PCIE_FID_VFID", 0x42e4, 0 },
9067 		{ "RVF", 0, 8 },
9068 	{ "PCIE_FID_VFID", 0x42e8, 0 },
9075 		{ "RVF", 0, 8 },
9076 	{ "PCIE_FID_VFID", 0x42ec, 0 },
9083 		{ "RVF", 0, 8 },
9084 	{ "PCIE_FID_VFID", 0x42f0, 0 },
9091 		{ "RVF", 0, 8 },
9092 	{ "PCIE_FID_VFID", 0x42f4, 0 },
9099 		{ "RVF", 0, 8 },
9100 	{ "PCIE_FID_VFID", 0x42f8, 0 },
9107 		{ "RVF", 0, 8 },
9108 	{ "PCIE_FID_VFID", 0x42fc, 0 },
9115 		{ "RVF", 0, 8 },
9116 	{ "PCIE_FID_VFID", 0x4300, 0 },
9123 		{ "RVF", 0, 8 },
9124 	{ "PCIE_FID_VFID", 0x4304, 0 },
9131 		{ "RVF", 0, 8 },
9132 	{ "PCIE_FID_VFID", 0x4308, 0 },
9139 		{ "RVF", 0, 8 },
9140 	{ "PCIE_FID_VFID", 0x430c, 0 },
9147 		{ "RVF", 0, 8 },
9148 	{ "PCIE_FID_VFID", 0x4310, 0 },
9155 		{ "RVF", 0, 8 },
9156 	{ "PCIE_FID_VFID", 0x4314, 0 },
9163 		{ "RVF", 0, 8 },
9164 	{ "PCIE_FID_VFID", 0x4318, 0 },
9171 		{ "RVF", 0, 8 },
9172 	{ "PCIE_FID_VFID", 0x431c, 0 },
9179 		{ "RVF", 0, 8 },
9180 	{ "PCIE_FID_VFID", 0x4320, 0 },
9187 		{ "RVF", 0, 8 },
9188 	{ "PCIE_FID_VFID", 0x4324, 0 },
9195 		{ "RVF", 0, 8 },
9196 	{ "PCIE_FID_VFID", 0x4328, 0 },
9203 		{ "RVF", 0, 8 },
9204 	{ "PCIE_FID_VFID", 0x432c, 0 },
9211 		{ "RVF", 0, 8 },
9212 	{ "PCIE_FID_VFID", 0x4330, 0 },
9219 		{ "RVF", 0, 8 },
9220 	{ "PCIE_FID_VFID", 0x4334, 0 },
9227 		{ "RVF", 0, 8 },
9228 	{ "PCIE_FID_VFID", 0x4338, 0 },
9235 		{ "RVF", 0, 8 },
9236 	{ "PCIE_FID_VFID", 0x433c, 0 },
9243 		{ "RVF", 0, 8 },
9244 	{ "PCIE_FID_VFID", 0x4340, 0 },
9251 		{ "RVF", 0, 8 },
9252 	{ "PCIE_FID_VFID", 0x4344, 0 },
9259 		{ "RVF", 0, 8 },
9260 	{ "PCIE_FID_VFID", 0x4348, 0 },
9267 		{ "RVF", 0, 8 },
9268 	{ "PCIE_FID_VFID", 0x434c, 0 },
9275 		{ "RVF", 0, 8 },
9276 	{ "PCIE_FID_VFID", 0x4350, 0 },
9283 		{ "RVF", 0, 8 },
9284 	{ "PCIE_FID_VFID", 0x4354, 0 },
9291 		{ "RVF", 0, 8 },
9292 	{ "PCIE_FID_VFID", 0x4358, 0 },
9299 		{ "RVF", 0, 8 },
9300 	{ "PCIE_FID_VFID", 0x435c, 0 },
9307 		{ "RVF", 0, 8 },
9308 	{ "PCIE_FID_VFID", 0x4360, 0 },
9315 		{ "RVF", 0, 8 },
9316 	{ "PCIE_FID_VFID", 0x4364, 0 },
9323 		{ "RVF", 0, 8 },
9324 	{ "PCIE_FID_VFID", 0x4368, 0 },
9331 		{ "RVF", 0, 8 },
9332 	{ "PCIE_FID_VFID", 0x436c, 0 },
9339 		{ "RVF", 0, 8 },
9340 	{ "PCIE_FID_VFID", 0x4370, 0 },
9347 		{ "RVF", 0, 8 },
9348 	{ "PCIE_FID_VFID", 0x4374, 0 },
9355 		{ "RVF", 0, 8 },
9356 	{ "PCIE_FID_VFID", 0x4378, 0 },
9363 		{ "RVF", 0, 8 },
9364 	{ "PCIE_FID_VFID", 0x437c, 0 },
9371 		{ "RVF", 0, 8 },
9372 	{ "PCIE_FID_VFID", 0x4380, 0 },
9379 		{ "RVF", 0, 8 },
9380 	{ "PCIE_FID_VFID", 0x4384, 0 },
9387 		{ "RVF", 0, 8 },
9388 	{ "PCIE_FID_VFID", 0x4388, 0 },
9395 		{ "RVF", 0, 8 },
9396 	{ "PCIE_FID_VFID", 0x438c, 0 },
9403 		{ "RVF", 0, 8 },
9404 	{ "PCIE_FID_VFID", 0x4390, 0 },
9411 		{ "RVF", 0, 8 },
9412 	{ "PCIE_FID_VFID", 0x4394, 0 },
9419 		{ "RVF", 0, 8 },
9420 	{ "PCIE_FID_VFID", 0x4398, 0 },
9427 		{ "RVF", 0, 8 },
9428 	{ "PCIE_FID_VFID", 0x439c, 0 },
9435 		{ "RVF", 0, 8 },
9436 	{ "PCIE_FID_VFID", 0x43a0, 0 },
9443 		{ "RVF", 0, 8 },
9444 	{ "PCIE_FID_VFID", 0x43a4, 0 },
9451 		{ "RVF", 0, 8 },
9452 	{ "PCIE_FID_VFID", 0x43a8, 0 },
9459 		{ "RVF", 0, 8 },
9460 	{ "PCIE_FID_VFID", 0x43ac, 0 },
9467 		{ "RVF", 0, 8 },
9468 	{ "PCIE_FID_VFID", 0x43b0, 0 },
9475 		{ "RVF", 0, 8 },
9476 	{ "PCIE_FID_VFID", 0x43b4, 0 },
9483 		{ "RVF", 0, 8 },
9484 	{ "PCIE_FID_VFID", 0x43b8, 0 },
9491 		{ "RVF", 0, 8 },
9492 	{ "PCIE_FID_VFID", 0x43bc, 0 },
9499 		{ "RVF", 0, 8 },
9500 	{ "PCIE_FID_VFID", 0x43c0, 0 },
9507 		{ "RVF", 0, 8 },
9508 	{ "PCIE_FID_VFID", 0x43c4, 0 },
9515 		{ "RVF", 0, 8 },
9516 	{ "PCIE_FID_VFID", 0x43c8, 0 },
9523 		{ "RVF", 0, 8 },
9524 	{ "PCIE_FID_VFID", 0x43cc, 0 },
9531 		{ "RVF", 0, 8 },
9532 	{ "PCIE_FID_VFID", 0x43d0, 0 },
9539 		{ "RVF", 0, 8 },
9540 	{ "PCIE_FID_VFID", 0x43d4, 0 },
9547 		{ "RVF", 0, 8 },
9548 	{ "PCIE_FID_VFID", 0x43d8, 0 },
9555 		{ "RVF", 0, 8 },
9556 	{ "PCIE_FID_VFID", 0x43dc, 0 },
9563 		{ "RVF", 0, 8 },
9564 	{ "PCIE_FID_VFID", 0x43e0, 0 },
9571 		{ "RVF", 0, 8 },
9572 	{ "PCIE_FID_VFID", 0x43e4, 0 },
9579 		{ "RVF", 0, 8 },
9580 	{ "PCIE_FID_VFID", 0x43e8, 0 },
9587 		{ "RVF", 0, 8 },
9588 	{ "PCIE_FID_VFID", 0x43ec, 0 },
9595 		{ "RVF", 0, 8 },
9596 	{ "PCIE_FID_VFID", 0x43f0, 0 },
9603 		{ "RVF", 0, 8 },
9604 	{ "PCIE_FID_VFID", 0x43f4, 0 },
9611 		{ "RVF", 0, 8 },
9612 	{ "PCIE_FID_VFID", 0x43f8, 0 },
9619 		{ "RVF", 0, 8 },
9620 	{ "PCIE_FID_VFID", 0x43fc, 0 },
9627 		{ "RVF", 0, 8 },
9628 	{ "PCIE_FID_VFID", 0x4400, 0 },
9635 		{ "RVF", 0, 8 },
9636 	{ "PCIE_FID_VFID", 0x4404, 0 },
9643 		{ "RVF", 0, 8 },
9644 	{ "PCIE_FID_VFID", 0x4408, 0 },
9651 		{ "RVF", 0, 8 },
9652 	{ "PCIE_FID_VFID", 0x440c, 0 },
9659 		{ "RVF", 0, 8 },
9660 	{ "PCIE_FID_VFID", 0x4410, 0 },
9667 		{ "RVF", 0, 8 },
9668 	{ "PCIE_FID_VFID", 0x4414, 0 },
9675 		{ "RVF", 0, 8 },
9676 	{ "PCIE_FID_VFID", 0x4418, 0 },
9683 		{ "RVF", 0, 8 },
9684 	{ "PCIE_FID_VFID", 0x441c, 0 },
9691 		{ "RVF", 0, 8 },
9692 	{ "PCIE_FID_VFID", 0x4420, 0 },
9699 		{ "RVF", 0, 8 },
9700 	{ "PCIE_FID_VFID", 0x4424, 0 },
9707 		{ "RVF", 0, 8 },
9708 	{ "PCIE_FID_VFID", 0x4428, 0 },
9715 		{ "RVF", 0, 8 },
9716 	{ "PCIE_FID_VFID", 0x442c, 0 },
9723 		{ "RVF", 0, 8 },
9724 	{ "PCIE_FID_VFID", 0x4430, 0 },
9731 		{ "RVF", 0, 8 },
9732 	{ "PCIE_FID_VFID", 0x4434, 0 },
9739 		{ "RVF", 0, 8 },
9740 	{ "PCIE_FID_VFID", 0x4438, 0 },
9747 		{ "RVF", 0, 8 },
9748 	{ "PCIE_FID_VFID", 0x443c, 0 },
9755 		{ "RVF", 0, 8 },
9756 	{ "PCIE_FID_VFID", 0x4440, 0 },
9763 		{ "RVF", 0, 8 },
9764 	{ "PCIE_FID_VFID", 0x4444, 0 },
9771 		{ "RVF", 0, 8 },
9772 	{ "PCIE_FID_VFID", 0x4448, 0 },
9779 		{ "RVF", 0, 8 },
9780 	{ "PCIE_FID_VFID", 0x444c, 0 },
9787 		{ "RVF", 0, 8 },
9788 	{ "PCIE_FID_VFID", 0x4450, 0 },
9795 		{ "RVF", 0, 8 },
9796 	{ "PCIE_FID_VFID", 0x4454, 0 },
9803 		{ "RVF", 0, 8 },
9804 	{ "PCIE_FID_VFID", 0x4458, 0 },
9811 		{ "RVF", 0, 8 },
9812 	{ "PCIE_FID_VFID", 0x445c, 0 },
9819 		{ "RVF", 0, 8 },
9820 	{ "PCIE_FID_VFID", 0x4460, 0 },
9827 		{ "RVF", 0, 8 },
9828 	{ "PCIE_FID_VFID", 0x4464, 0 },
9835 		{ "RVF", 0, 8 },
9836 	{ "PCIE_FID_VFID", 0x4468, 0 },
9843 		{ "RVF", 0, 8 },
9844 	{ "PCIE_FID_VFID", 0x446c, 0 },
9851 		{ "RVF", 0, 8 },
9852 	{ "PCIE_FID_VFID", 0x4470, 0 },
9859 		{ "RVF", 0, 8 },
9860 	{ "PCIE_FID_VFID", 0x4474, 0 },
9867 		{ "RVF", 0, 8 },
9868 	{ "PCIE_FID_VFID", 0x4478, 0 },
9875 		{ "RVF", 0, 8 },
9876 	{ "PCIE_FID_VFID", 0x447c, 0 },
9883 		{ "RVF", 0, 8 },
9884 	{ "PCIE_FID_VFID", 0x4480, 0 },
9891 		{ "RVF", 0, 8 },
9892 	{ "PCIE_FID_VFID", 0x4484, 0 },
9899 		{ "RVF", 0, 8 },
9900 	{ "PCIE_FID_VFID", 0x4488, 0 },
9907 		{ "RVF", 0, 8 },
9908 	{ "PCIE_FID_VFID", 0x448c, 0 },
9915 		{ "RVF", 0, 8 },
9916 	{ "PCIE_FID_VFID", 0x4490, 0 },
9923 		{ "RVF", 0, 8 },
9924 	{ "PCIE_FID_VFID", 0x4494, 0 },
9931 		{ "RVF", 0, 8 },
9932 	{ "PCIE_FID_VFID", 0x4498, 0 },
9939 		{ "RVF", 0, 8 },
9940 	{ "PCIE_FID_VFID", 0x449c, 0 },
9947 		{ "RVF", 0, 8 },
9948 	{ "PCIE_FID_VFID", 0x44a0, 0 },
9955 		{ "RVF", 0, 8 },
9956 	{ "PCIE_FID_VFID", 0x44a4, 0 },
9963 		{ "RVF", 0, 8 },
9964 	{ "PCIE_FID_VFID", 0x44a8, 0 },
9971 		{ "RVF", 0, 8 },
9972 	{ "PCIE_FID_VFID", 0x44ac, 0 },
9979 		{ "RVF", 0, 8 },
9980 	{ "PCIE_FID_VFID", 0x44b0, 0 },
9987 		{ "RVF", 0, 8 },
9988 	{ "PCIE_FID_VFID", 0x44b4, 0 },
9995 		{ "RVF", 0, 8 },
9996 	{ "PCIE_FID_VFID", 0x44b8, 0 },
10003 		{ "RVF", 0, 8 },
10004 	{ "PCIE_FID_VFID", 0x44bc, 0 },
10011 		{ "RVF", 0, 8 },
10012 	{ "PCIE_FID_VFID", 0x44c0, 0 },
10019 		{ "RVF", 0, 8 },
10020 	{ "PCIE_FID_VFID", 0x44c4, 0 },
10027 		{ "RVF", 0, 8 },
10028 	{ "PCIE_FID_VFID", 0x44c8, 0 },
10035 		{ "RVF", 0, 8 },
10036 	{ "PCIE_FID_VFID", 0x44cc, 0 },
10043 		{ "RVF", 0, 8 },
10044 	{ "PCIE_FID_VFID", 0x44d0, 0 },
10051 		{ "RVF", 0, 8 },
10052 	{ "PCIE_FID_VFID", 0x44d4, 0 },
10059 		{ "RVF", 0, 8 },
10060 	{ "PCIE_FID_VFID", 0x44d8, 0 },
10067 		{ "RVF", 0, 8 },
10068 	{ "PCIE_FID_VFID", 0x44dc, 0 },
10075 		{ "RVF", 0, 8 },
10076 	{ "PCIE_FID_VFID", 0x44e0, 0 },
10083 		{ "RVF", 0, 8 },
10084 	{ "PCIE_FID_VFID", 0x44e4, 0 },
10091 		{ "RVF", 0, 8 },
10092 	{ "PCIE_FID_VFID", 0x44e8, 0 },
10099 		{ "RVF", 0, 8 },
10100 	{ "PCIE_FID_VFID", 0x44ec, 0 },
10107 		{ "RVF", 0, 8 },
10108 	{ "PCIE_FID_VFID", 0x44f0, 0 },
10115 		{ "RVF", 0, 8 },
10116 	{ "PCIE_FID_VFID", 0x44f4, 0 },
10123 		{ "RVF", 0, 8 },
10124 	{ "PCIE_FID_VFID", 0x44f8, 0 },
10131 		{ "RVF", 0, 8 },
10132 	{ "PCIE_FID_VFID", 0x44fc, 0 },
10139 		{ "RVF", 0, 8 },
10140 	{ "PCIE_FID_VFID", 0x4500, 0 },
10147 		{ "RVF", 0, 8 },
10148 	{ "PCIE_FID_VFID", 0x4504, 0 },
10155 		{ "RVF", 0, 8 },
10156 	{ "PCIE_FID_VFID", 0x4508, 0 },
10163 		{ "RVF", 0, 8 },
10164 	{ "PCIE_FID_VFID", 0x450c, 0 },
10171 		{ "RVF", 0, 8 },
10172 	{ "PCIE_FID_VFID", 0x4510, 0 },
10179 		{ "RVF", 0, 8 },
10180 	{ "PCIE_FID_VFID", 0x4514, 0 },
10187 		{ "RVF", 0, 8 },
10188 	{ "PCIE_FID_VFID", 0x4518, 0 },
10195 		{ "RVF", 0, 8 },
10196 	{ "PCIE_FID_VFID", 0x451c, 0 },
10203 		{ "RVF", 0, 8 },
10204 	{ "PCIE_FID_VFID", 0x4520, 0 },
10211 		{ "RVF", 0, 8 },
10212 	{ "PCIE_FID_VFID", 0x4524, 0 },
10219 		{ "RVF", 0, 8 },
10220 	{ "PCIE_FID_VFID", 0x4528, 0 },
10227 		{ "RVF", 0, 8 },
10228 	{ "PCIE_FID_VFID", 0x452c, 0 },
10235 		{ "RVF", 0, 8 },
10236 	{ "PCIE_FID_VFID", 0x4530, 0 },
10243 		{ "RVF", 0, 8 },
10244 	{ "PCIE_FID_VFID", 0x4534, 0 },
10251 		{ "RVF", 0, 8 },
10252 	{ "PCIE_FID_VFID", 0x4538, 0 },
10259 		{ "RVF", 0, 8 },
10260 	{ "PCIE_FID_VFID", 0x453c, 0 },
10267 		{ "RVF", 0, 8 },
10268 	{ "PCIE_FID_VFID", 0x4540, 0 },
10275 		{ "RVF", 0, 8 },
10276 	{ "PCIE_FID_VFID", 0x4544, 0 },
10283 		{ "RVF", 0, 8 },
10284 	{ "PCIE_FID_VFID", 0x4548, 0 },
10291 		{ "RVF", 0, 8 },
10292 	{ "PCIE_FID_VFID", 0x454c, 0 },
10299 		{ "RVF", 0, 8 },
10300 	{ "PCIE_FID_VFID", 0x4550, 0 },
10307 		{ "RVF", 0, 8 },
10308 	{ "PCIE_FID_VFID", 0x4554, 0 },
10315 		{ "RVF", 0, 8 },
10316 	{ "PCIE_FID_VFID", 0x4558, 0 },
10323 		{ "RVF", 0, 8 },
10324 	{ "PCIE_FID_VFID", 0x455c, 0 },
10331 		{ "RVF", 0, 8 },
10332 	{ "PCIE_FID_VFID", 0x4560, 0 },
10339 		{ "RVF", 0, 8 },
10340 	{ "PCIE_FID_VFID", 0x4564, 0 },
10347 		{ "RVF", 0, 8 },
10348 	{ "PCIE_FID_VFID", 0x4568, 0 },
10355 		{ "RVF", 0, 8 },
10356 	{ "PCIE_FID_VFID", 0x456c, 0 },
10363 		{ "RVF", 0, 8 },
10364 	{ "PCIE_FID_VFID", 0x4570, 0 },
10371 		{ "RVF", 0, 8 },
10372 	{ "PCIE_FID_VFID", 0x4574, 0 },
10379 		{ "RVF", 0, 8 },
10380 	{ "PCIE_FID_VFID", 0x4578, 0 },
10387 		{ "RVF", 0, 8 },
10388 	{ "PCIE_FID_VFID", 0x457c, 0 },
10395 		{ "RVF", 0, 8 },
10396 	{ "PCIE_FID_VFID", 0x4580, 0 },
10403 		{ "RVF", 0, 8 },
10404 	{ "PCIE_FID_VFID", 0x4584, 0 },
10411 		{ "RVF", 0, 8 },
10412 	{ "PCIE_FID_VFID", 0x4588, 0 },
10419 		{ "RVF", 0, 8 },
10420 	{ "PCIE_FID_VFID", 0x458c, 0 },
10427 		{ "RVF", 0, 8 },
10428 	{ "PCIE_FID_VFID", 0x4590, 0 },
10435 		{ "RVF", 0, 8 },
10436 	{ "PCIE_FID_VFID", 0x4594, 0 },
10443 		{ "RVF", 0, 8 },
10444 	{ "PCIE_FID_VFID", 0x4598, 0 },
10451 		{ "RVF", 0, 8 },
10452 	{ "PCIE_FID_VFID", 0x459c, 0 },
10459 		{ "RVF", 0, 8 },
10460 	{ "PCIE_FID_VFID", 0x45a0, 0 },
10467 		{ "RVF", 0, 8 },
10468 	{ "PCIE_FID_VFID", 0x45a4, 0 },
10475 		{ "RVF", 0, 8 },
10476 	{ "PCIE_FID_VFID", 0x45a8, 0 },
10483 		{ "RVF", 0, 8 },
10484 	{ "PCIE_FID_VFID", 0x45ac, 0 },
10491 		{ "RVF", 0, 8 },
10492 	{ "PCIE_FID_VFID", 0x45b0, 0 },
10499 		{ "RVF", 0, 8 },
10500 	{ "PCIE_FID_VFID", 0x45b4, 0 },
10507 		{ "RVF", 0, 8 },
10508 	{ "PCIE_FID_VFID", 0x45b8, 0 },
10515 		{ "RVF", 0, 8 },
10516 	{ "PCIE_FID_VFID", 0x45bc, 0 },
10523 		{ "RVF", 0, 8 },
10524 	{ "PCIE_FID_VFID", 0x45c0, 0 },
10531 		{ "RVF", 0, 8 },
10532 	{ "PCIE_FID_VFID", 0x45c4, 0 },
10539 		{ "RVF", 0, 8 },
10540 	{ "PCIE_FID_VFID", 0x45c8, 0 },
10547 		{ "RVF", 0, 8 },
10548 	{ "PCIE_FID_VFID", 0x45cc, 0 },
10555 		{ "RVF", 0, 8 },
10556 	{ "PCIE_FID_VFID", 0x45d0, 0 },
10563 		{ "RVF", 0, 8 },
10564 	{ "PCIE_FID_VFID", 0x45d4, 0 },
10571 		{ "RVF", 0, 8 },
10572 	{ "PCIE_FID_VFID", 0x45d8, 0 },
10579 		{ "RVF", 0, 8 },
10580 	{ "PCIE_FID_VFID", 0x45dc, 0 },
10587 		{ "RVF", 0, 8 },
10588 	{ "PCIE_FID_VFID", 0x45e0, 0 },
10595 		{ "RVF", 0, 8 },
10596 	{ "PCIE_FID_VFID", 0x45e4, 0 },
10603 		{ "RVF", 0, 8 },
10604 	{ "PCIE_FID_VFID", 0x45e8, 0 },
10611 		{ "RVF", 0, 8 },
10612 	{ "PCIE_FID_VFID", 0x45ec, 0 },
10619 		{ "RVF", 0, 8 },
10620 	{ "PCIE_FID_VFID", 0x45f0, 0 },
10627 		{ "RVF", 0, 8 },
10628 	{ "PCIE_FID_VFID", 0x45f4, 0 },
10635 		{ "RVF", 0, 8 },
10636 	{ "PCIE_FID_VFID", 0x45f8, 0 },
10643 		{ "RVF", 0, 8 },
10644 	{ "PCIE_FID_VFID", 0x45fc, 0 },
10651 		{ "RVF", 0, 8 },
10652 	{ "PCIE_FID_VFID", 0x4600, 0 },
10659 		{ "RVF", 0, 8 },
10660 	{ "PCIE_FID_VFID", 0x4604, 0 },
10667 		{ "RVF", 0, 8 },
10668 	{ "PCIE_FID_VFID", 0x4608, 0 },
10675 		{ "RVF", 0, 8 },
10676 	{ "PCIE_FID_VFID", 0x460c, 0 },
10683 		{ "RVF", 0, 8 },
10684 	{ "PCIE_FID_VFID", 0x4610, 0 },
10691 		{ "RVF", 0, 8 },
10692 	{ "PCIE_FID_VFID", 0x4614, 0 },
10699 		{ "RVF", 0, 8 },
10700 	{ "PCIE_FID_VFID", 0x4618, 0 },
10707 		{ "RVF", 0, 8 },
10708 	{ "PCIE_FID_VFID", 0x461c, 0 },
10715 		{ "RVF", 0, 8 },
10716 	{ "PCIE_FID_VFID", 0x4620, 0 },
10723 		{ "RVF", 0, 8 },
10724 	{ "PCIE_FID_VFID", 0x4624, 0 },
10731 		{ "RVF", 0, 8 },
10732 	{ "PCIE_FID_VFID", 0x4628, 0 },
10739 		{ "RVF", 0, 8 },
10740 	{ "PCIE_FID_VFID", 0x462c, 0 },
10747 		{ "RVF", 0, 8 },
10748 	{ "PCIE_FID_VFID", 0x4630, 0 },
10755 		{ "RVF", 0, 8 },
10756 	{ "PCIE_FID_VFID", 0x4634, 0 },
10763 		{ "RVF", 0, 8 },
10764 	{ "PCIE_FID_VFID", 0x4638, 0 },
10771 		{ "RVF", 0, 8 },
10772 	{ "PCIE_FID_VFID", 0x463c, 0 },
10779 		{ "RVF", 0, 8 },
10780 	{ "PCIE_FID_VFID", 0x4640, 0 },
10787 		{ "RVF", 0, 8 },
10788 	{ "PCIE_FID_VFID", 0x4644, 0 },
10795 		{ "RVF", 0, 8 },
10796 	{ "PCIE_FID_VFID", 0x4648, 0 },
10803 		{ "RVF", 0, 8 },
10804 	{ "PCIE_FID_VFID", 0x464c, 0 },
10811 		{ "RVF", 0, 8 },
10812 	{ "PCIE_FID_VFID", 0x4650, 0 },
10819 		{ "RVF", 0, 8 },
10820 	{ "PCIE_FID_VFID", 0x4654, 0 },
10827 		{ "RVF", 0, 8 },
10828 	{ "PCIE_FID_VFID", 0x4658, 0 },
10835 		{ "RVF", 0, 8 },
10836 	{ "PCIE_FID_VFID", 0x465c, 0 },
10843 		{ "RVF", 0, 8 },
10844 	{ "PCIE_FID_VFID", 0x4660, 0 },
10851 		{ "RVF", 0, 8 },
10852 	{ "PCIE_FID_VFID", 0x4664, 0 },
10859 		{ "RVF", 0, 8 },
10860 	{ "PCIE_FID_VFID", 0x4668, 0 },
10867 		{ "RVF", 0, 8 },
10868 	{ "PCIE_FID_VFID", 0x466c, 0 },
10875 		{ "RVF", 0, 8 },
10876 	{ "PCIE_FID_VFID", 0x4670, 0 },
10883 		{ "RVF", 0, 8 },
10884 	{ "PCIE_FID_VFID", 0x4674, 0 },
10891 		{ "RVF", 0, 8 },
10892 	{ "PCIE_FID_VFID", 0x4678, 0 },
10899 		{ "RVF", 0, 8 },
10900 	{ "PCIE_FID_VFID", 0x467c, 0 },
10907 		{ "RVF", 0, 8 },
10908 	{ "PCIE_FID_VFID", 0x4680, 0 },
10915 		{ "RVF", 0, 8 },
10916 	{ "PCIE_FID_VFID", 0x4684, 0 },
10923 		{ "RVF", 0, 8 },
10924 	{ "PCIE_FID_VFID", 0x4688, 0 },
10931 		{ "RVF", 0, 8 },
10932 	{ "PCIE_FID_VFID", 0x468c, 0 },
10939 		{ "RVF", 0, 8 },
10940 	{ "PCIE_FID_VFID", 0x4690, 0 },
10947 		{ "RVF", 0, 8 },
10948 	{ "PCIE_FID_VFID", 0x4694, 0 },
10955 		{ "RVF", 0, 8 },
10956 	{ "PCIE_FID_VFID", 0x4698, 0 },
10963 		{ "RVF", 0, 8 },
10964 	{ "PCIE_FID_VFID", 0x469c, 0 },
10971 		{ "RVF", 0, 8 },
10972 	{ "PCIE_FID_VFID", 0x46a0, 0 },
10979 		{ "RVF", 0, 8 },
10980 	{ "PCIE_FID_VFID", 0x46a4, 0 },
10987 		{ "RVF", 0, 8 },
10988 	{ "PCIE_FID_VFID", 0x46a8, 0 },
10995 		{ "RVF", 0, 8 },
10996 	{ "PCIE_FID_VFID", 0x46ac, 0 },
11003 		{ "RVF", 0, 8 },
11004 	{ "PCIE_FID_VFID", 0x46b0, 0 },
11011 		{ "RVF", 0, 8 },
11012 	{ "PCIE_FID_VFID", 0x46b4, 0 },
11019 		{ "RVF", 0, 8 },
11020 	{ "PCIE_FID_VFID", 0x46b8, 0 },
11027 		{ "RVF", 0, 8 },
11028 	{ "PCIE_FID_VFID", 0x46bc, 0 },
11035 		{ "RVF", 0, 8 },
11036 	{ "PCIE_FID_VFID", 0x46c0, 0 },
11043 		{ "RVF", 0, 8 },
11044 	{ "PCIE_FID_VFID", 0x46c4, 0 },
11051 		{ "RVF", 0, 8 },
11052 	{ "PCIE_FID_VFID", 0x46c8, 0 },
11059 		{ "RVF", 0, 8 },
11060 	{ "PCIE_FID_VFID", 0x46cc, 0 },
11067 		{ "RVF", 0, 8 },
11068 	{ "PCIE_FID_VFID", 0x46d0, 0 },
11075 		{ "RVF", 0, 8 },
11076 	{ "PCIE_FID_VFID", 0x46d4, 0 },
11083 		{ "RVF", 0, 8 },
11084 	{ "PCIE_FID_VFID", 0x46d8, 0 },
11091 		{ "RVF", 0, 8 },
11092 	{ "PCIE_FID_VFID", 0x46dc, 0 },
11099 		{ "RVF", 0, 8 },
11100 	{ "PCIE_FID_VFID", 0x46e0, 0 },
11107 		{ "RVF", 0, 8 },
11108 	{ "PCIE_FID_VFID", 0x46e4, 0 },
11115 		{ "RVF", 0, 8 },
11116 	{ "PCIE_FID_VFID", 0x46e8, 0 },
11123 		{ "RVF", 0, 8 },
11124 	{ "PCIE_FID_VFID", 0x46ec, 0 },
11131 		{ "RVF", 0, 8 },
11132 	{ "PCIE_FID_VFID", 0x46f0, 0 },
11139 		{ "RVF", 0, 8 },
11140 	{ "PCIE_FID_VFID", 0x46f4, 0 },
11147 		{ "RVF", 0, 8 },
11148 	{ "PCIE_FID_VFID", 0x46f8, 0 },
11155 		{ "RVF", 0, 8 },
11156 	{ "PCIE_FID_VFID", 0x46fc, 0 },
11163 		{ "RVF", 0, 8 },
11164 	{ "PCIE_FID_VFID", 0x4700, 0 },
11171 		{ "RVF", 0, 8 },
11172 	{ "PCIE_FID_VFID", 0x4704, 0 },
11179 		{ "RVF", 0, 8 },
11180 	{ "PCIE_FID_VFID", 0x4708, 0 },
11187 		{ "RVF", 0, 8 },
11188 	{ "PCIE_FID_VFID", 0x470c, 0 },
11195 		{ "RVF", 0, 8 },
11196 	{ "PCIE_FID_VFID", 0x4710, 0 },
11203 		{ "RVF", 0, 8 },
11204 	{ "PCIE_FID_VFID", 0x4714, 0 },
11211 		{ "RVF", 0, 8 },
11212 	{ "PCIE_FID_VFID", 0x4718, 0 },
11219 		{ "RVF", 0, 8 },
11220 	{ "PCIE_FID_VFID", 0x471c, 0 },
11227 		{ "RVF", 0, 8 },
11228 	{ "PCIE_FID_VFID", 0x4720, 0 },
11235 		{ "RVF", 0, 8 },
11236 	{ "PCIE_FID_VFID", 0x4724, 0 },
11243 		{ "RVF", 0, 8 },
11244 	{ "PCIE_FID_VFID", 0x4728, 0 },
11251 		{ "RVF", 0, 8 },
11252 	{ "PCIE_FID_VFID", 0x472c, 0 },
11259 		{ "RVF", 0, 8 },
11260 	{ "PCIE_FID_VFID", 0x4730, 0 },
11267 		{ "RVF", 0, 8 },
11268 	{ "PCIE_FID_VFID", 0x4734, 0 },
11275 		{ "RVF", 0, 8 },
11276 	{ "PCIE_FID_VFID", 0x4738, 0 },
11283 		{ "RVF", 0, 8 },
11284 	{ "PCIE_FID_VFID", 0x473c, 0 },
11291 		{ "RVF", 0, 8 },
11292 	{ "PCIE_FID_VFID", 0x4740, 0 },
11299 		{ "RVF", 0, 8 },
11300 	{ "PCIE_FID_VFID", 0x4744, 0 },
11307 		{ "RVF", 0, 8 },
11308 	{ "PCIE_FID_VFID", 0x4748, 0 },
11315 		{ "RVF", 0, 8 },
11316 	{ "PCIE_FID_VFID", 0x474c, 0 },
11323 		{ "RVF", 0, 8 },
11324 	{ "PCIE_FID_VFID", 0x4750, 0 },
11331 		{ "RVF", 0, 8 },
11332 	{ "PCIE_FID_VFID", 0x4754, 0 },
11339 		{ "RVF", 0, 8 },
11340 	{ "PCIE_FID_VFID", 0x4758, 0 },
11347 		{ "RVF", 0, 8 },
11348 	{ "PCIE_FID_VFID", 0x475c, 0 },
11355 		{ "RVF", 0, 8 },
11356 	{ "PCIE_FID_VFID", 0x4760, 0 },
11363 		{ "RVF", 0, 8 },
11364 	{ "PCIE_FID_VFID", 0x4764, 0 },
11371 		{ "RVF", 0, 8 },
11372 	{ "PCIE_FID_VFID", 0x4768, 0 },
11379 		{ "RVF", 0, 8 },
11380 	{ "PCIE_FID_VFID", 0x476c, 0 },
11387 		{ "RVF", 0, 8 },
11388 	{ "PCIE_FID_VFID", 0x4770, 0 },
11395 		{ "RVF", 0, 8 },
11396 	{ "PCIE_FID_VFID", 0x4774, 0 },
11403 		{ "RVF", 0, 8 },
11404 	{ "PCIE_FID_VFID", 0x4778, 0 },
11411 		{ "RVF", 0, 8 },
11412 	{ "PCIE_FID_VFID", 0x477c, 0 },
11419 		{ "RVF", 0, 8 },
11420 	{ "PCIE_FID_VFID", 0x4780, 0 },
11427 		{ "RVF", 0, 8 },
11428 	{ "PCIE_FID_VFID", 0x4784, 0 },
11435 		{ "RVF", 0, 8 },
11436 	{ "PCIE_FID_VFID", 0x4788, 0 },
11443 		{ "RVF", 0, 8 },
11444 	{ "PCIE_FID_VFID", 0x478c, 0 },
11451 		{ "RVF", 0, 8 },
11452 	{ "PCIE_FID_VFID", 0x4790, 0 },
11459 		{ "RVF", 0, 8 },
11460 	{ "PCIE_FID_VFID", 0x4794, 0 },
11467 		{ "RVF", 0, 8 },
11468 	{ "PCIE_FID_VFID", 0x4798, 0 },
11475 		{ "RVF", 0, 8 },
11476 	{ "PCIE_FID_VFID", 0x479c, 0 },
11483 		{ "RVF", 0, 8 },
11484 	{ "PCIE_FID_VFID", 0x47a0, 0 },
11491 		{ "RVF", 0, 8 },
11492 	{ "PCIE_FID_VFID", 0x47a4, 0 },
11499 		{ "RVF", 0, 8 },
11500 	{ "PCIE_FID_VFID", 0x47a8, 0 },
11507 		{ "RVF", 0, 8 },
11508 	{ "PCIE_FID_VFID", 0x47ac, 0 },
11515 		{ "RVF", 0, 8 },
11516 	{ "PCIE_FID_VFID", 0x47b0, 0 },
11523 		{ "RVF", 0, 8 },
11524 	{ "PCIE_FID_VFID", 0x47b4, 0 },
11531 		{ "RVF", 0, 8 },
11532 	{ "PCIE_FID_VFID", 0x47b8, 0 },
11539 		{ "RVF", 0, 8 },
11540 	{ "PCIE_FID_VFID", 0x47bc, 0 },
11547 		{ "RVF", 0, 8 },
11548 	{ "PCIE_FID_VFID", 0x47c0, 0 },
11555 		{ "RVF", 0, 8 },
11556 	{ "PCIE_FID_VFID", 0x47c4, 0 },
11563 		{ "RVF", 0, 8 },
11564 	{ "PCIE_FID_VFID", 0x47c8, 0 },
11571 		{ "RVF", 0, 8 },
11572 	{ "PCIE_FID_VFID", 0x47cc, 0 },
11579 		{ "RVF", 0, 8 },
11580 	{ "PCIE_FID_VFID", 0x47d0, 0 },
11587 		{ "RVF", 0, 8 },
11588 	{ "PCIE_FID_VFID", 0x47d4, 0 },
11595 		{ "RVF", 0, 8 },
11596 	{ "PCIE_FID_VFID", 0x47d8, 0 },
11603 		{ "RVF", 0, 8 },
11604 	{ "PCIE_FID_VFID", 0x47dc, 0 },
11611 		{ "RVF", 0, 8 },
11612 	{ "PCIE_FID_VFID", 0x47e0, 0 },
11619 		{ "RVF", 0, 8 },
11620 	{ "PCIE_FID_VFID", 0x47e4, 0 },
11627 		{ "RVF", 0, 8 },
11628 	{ "PCIE_FID_VFID", 0x47e8, 0 },
11635 		{ "RVF", 0, 8 },
11636 	{ "PCIE_FID_VFID", 0x47ec, 0 },
11643 		{ "RVF", 0, 8 },
11644 	{ "PCIE_FID_VFID", 0x47f0, 0 },
11651 		{ "RVF", 0, 8 },
11652 	{ "PCIE_FID_VFID", 0x47f4, 0 },
11659 		{ "RVF", 0, 8 },
11660 	{ "PCIE_FID_VFID", 0x47f8, 0 },
11667 		{ "RVF", 0, 8 },
11668 	{ "PCIE_FID_VFID", 0x47fc, 0 },
11675 		{ "RVF", 0, 8 },
11676 	{ "PCIE_FID_VFID", 0x4800, 0 },
11683 		{ "RVF", 0, 8 },
11684 	{ "PCIE_FID_VFID", 0x4804, 0 },
11691 		{ "RVF", 0, 8 },
11692 	{ "PCIE_FID_VFID", 0x4808, 0 },
11699 		{ "RVF", 0, 8 },
11700 	{ "PCIE_FID_VFID", 0x480c, 0 },
11707 		{ "RVF", 0, 8 },
11708 	{ "PCIE_FID_VFID", 0x4810, 0 },
11715 		{ "RVF", 0, 8 },
11716 	{ "PCIE_FID_VFID", 0x4814, 0 },
11723 		{ "RVF", 0, 8 },
11724 	{ "PCIE_FID_VFID", 0x4818, 0 },
11731 		{ "RVF", 0, 8 },
11732 	{ "PCIE_FID_VFID", 0x481c, 0 },
11739 		{ "RVF", 0, 8 },
11740 	{ "PCIE_FID_VFID", 0x4820, 0 },
11747 		{ "RVF", 0, 8 },
11748 	{ "PCIE_FID_VFID", 0x4824, 0 },
11755 		{ "RVF", 0, 8 },
11756 	{ "PCIE_FID_VFID", 0x4828, 0 },
11763 		{ "RVF", 0, 8 },
11764 	{ "PCIE_FID_VFID", 0x482c, 0 },
11771 		{ "RVF", 0, 8 },
11772 	{ "PCIE_FID_VFID", 0x4830, 0 },
11779 		{ "RVF", 0, 8 },
11780 	{ "PCIE_FID_VFID", 0x4834, 0 },
11787 		{ "RVF", 0, 8 },
11788 	{ "PCIE_FID_VFID", 0x4838, 0 },
11795 		{ "RVF", 0, 8 },
11796 	{ "PCIE_FID_VFID", 0x483c, 0 },
11803 		{ "RVF", 0, 8 },
11804 	{ "PCIE_FID_VFID", 0x4840, 0 },
11811 		{ "RVF", 0, 8 },
11812 	{ "PCIE_FID_VFID", 0x4844, 0 },
11819 		{ "RVF", 0, 8 },
11820 	{ "PCIE_FID_VFID", 0x4848, 0 },
11827 		{ "RVF", 0, 8 },
11828 	{ "PCIE_FID_VFID", 0x484c, 0 },
11835 		{ "RVF", 0, 8 },
11836 	{ "PCIE_FID_VFID", 0x4850, 0 },
11843 		{ "RVF", 0, 8 },
11844 	{ "PCIE_FID_VFID", 0x4854, 0 },
11851 		{ "RVF", 0, 8 },
11852 	{ "PCIE_FID_VFID", 0x4858, 0 },
11859 		{ "RVF", 0, 8 },
11860 	{ "PCIE_FID_VFID", 0x485c, 0 },
11867 		{ "RVF", 0, 8 },
11868 	{ "PCIE_FID_VFID", 0x4860, 0 },
11875 		{ "RVF", 0, 8 },
11876 	{ "PCIE_FID_VFID", 0x4864, 0 },
11883 		{ "RVF", 0, 8 },
11884 	{ "PCIE_FID_VFID", 0x4868, 0 },
11891 		{ "RVF", 0, 8 },
11892 	{ "PCIE_FID_VFID", 0x486c, 0 },
11899 		{ "RVF", 0, 8 },
11900 	{ "PCIE_FID_VFID", 0x4870, 0 },
11907 		{ "RVF", 0, 8 },
11908 	{ "PCIE_FID_VFID", 0x4874, 0 },
11915 		{ "RVF", 0, 8 },
11916 	{ "PCIE_FID_VFID", 0x4878, 0 },
11923 		{ "RVF", 0, 8 },
11924 	{ "PCIE_FID_VFID", 0x487c, 0 },
11931 		{ "RVF", 0, 8 },
11932 	{ "PCIE_FID_VFID", 0x4880, 0 },
11939 		{ "RVF", 0, 8 },
11940 	{ "PCIE_FID_VFID", 0x4884, 0 },
11947 		{ "RVF", 0, 8 },
11948 	{ "PCIE_FID_VFID", 0x4888, 0 },
11955 		{ "RVF", 0, 8 },
11956 	{ "PCIE_FID_VFID", 0x488c, 0 },
11963 		{ "RVF", 0, 8 },
11964 	{ "PCIE_FID_VFID", 0x4890, 0 },
11971 		{ "RVF", 0, 8 },
11972 	{ "PCIE_FID_VFID", 0x4894, 0 },
11979 		{ "RVF", 0, 8 },
11980 	{ "PCIE_FID_VFID", 0x4898, 0 },
11987 		{ "RVF", 0, 8 },
11988 	{ "PCIE_FID_VFID", 0x489c, 0 },
11995 		{ "RVF", 0, 8 },
11996 	{ "PCIE_FID_VFID", 0x48a0, 0 },
12003 		{ "RVF", 0, 8 },
12004 	{ "PCIE_FID_VFID", 0x48a4, 0 },
12011 		{ "RVF", 0, 8 },
12012 	{ "PCIE_FID_VFID", 0x48a8, 0 },
12019 		{ "RVF", 0, 8 },
12020 	{ "PCIE_FID_VFID", 0x48ac, 0 },
12027 		{ "RVF", 0, 8 },
12028 	{ "PCIE_FID_VFID", 0x48b0, 0 },
12035 		{ "RVF", 0, 8 },
12036 	{ "PCIE_FID_VFID", 0x48b4, 0 },
12043 		{ "RVF", 0, 8 },
12044 	{ "PCIE_FID_VFID", 0x48b8, 0 },
12051 		{ "RVF", 0, 8 },
12052 	{ "PCIE_FID_VFID", 0x48bc, 0 },
12059 		{ "RVF", 0, 8 },
12060 	{ "PCIE_FID_VFID", 0x48c0, 0 },
12067 		{ "RVF", 0, 8 },
12068 	{ "PCIE_FID_VFID", 0x48c4, 0 },
12075 		{ "RVF", 0, 8 },
12076 	{ "PCIE_FID_VFID", 0x48c8, 0 },
12083 		{ "RVF", 0, 8 },
12084 	{ "PCIE_FID_VFID", 0x48cc, 0 },
12091 		{ "RVF", 0, 8 },
12092 	{ "PCIE_FID_VFID", 0x48d0, 0 },
12099 		{ "RVF", 0, 8 },
12100 	{ "PCIE_FID_VFID", 0x48d4, 0 },
12107 		{ "RVF", 0, 8 },
12108 	{ "PCIE_FID_VFID", 0x48d8, 0 },
12115 		{ "RVF", 0, 8 },
12116 	{ "PCIE_FID_VFID", 0x48dc, 0 },
12123 		{ "RVF", 0, 8 },
12124 	{ "PCIE_FID_VFID", 0x48e0, 0 },
12131 		{ "RVF", 0, 8 },
12132 	{ "PCIE_FID_VFID", 0x48e4, 0 },
12139 		{ "RVF", 0, 8 },
12140 	{ "PCIE_FID_VFID", 0x48e8, 0 },
12147 		{ "RVF", 0, 8 },
12148 	{ "PCIE_FID_VFID", 0x48ec, 0 },
12155 		{ "RVF", 0, 8 },
12156 	{ "PCIE_FID_VFID", 0x48f0, 0 },
12163 		{ "RVF", 0, 8 },
12164 	{ "PCIE_FID_VFID", 0x48f4, 0 },
12171 		{ "RVF", 0, 8 },
12172 	{ "PCIE_FID_VFID", 0x48f8, 0 },
12179 		{ "RVF", 0, 8 },
12180 	{ "PCIE_FID_VFID", 0x48fc, 0 },
12187 		{ "RVF", 0, 8 },
12188 	{ "PCIE_FID_VFID", 0x4900, 0 },
12195 		{ "RVF", 0, 8 },
12196 	{ "PCIE_FID_VFID", 0x4904, 0 },
12203 		{ "RVF", 0, 8 },
12204 	{ "PCIE_FID_VFID", 0x4908, 0 },
12211 		{ "RVF", 0, 8 },
12212 	{ "PCIE_FID_VFID", 0x490c, 0 },
12219 		{ "RVF", 0, 8 },
12220 	{ "PCIE_FID_VFID", 0x4910, 0 },
12227 		{ "RVF", 0, 8 },
12228 	{ "PCIE_FID_VFID", 0x4914, 0 },
12235 		{ "RVF", 0, 8 },
12236 	{ "PCIE_FID_VFID", 0x4918, 0 },
12243 		{ "RVF", 0, 8 },
12244 	{ "PCIE_FID_VFID", 0x491c, 0 },
12251 		{ "RVF", 0, 8 },
12252 	{ "PCIE_FID_VFID", 0x4920, 0 },
12259 		{ "RVF", 0, 8 },
12260 	{ "PCIE_FID_VFID", 0x4924, 0 },
12267 		{ "RVF", 0, 8 },
12268 	{ "PCIE_FID_VFID", 0x4928, 0 },
12275 		{ "RVF", 0, 8 },
12276 	{ "PCIE_FID_VFID", 0x492c, 0 },
12283 		{ "RVF", 0, 8 },
12284 	{ "PCIE_FID_VFID", 0x4930, 0 },
12291 		{ "RVF", 0, 8 },
12292 	{ "PCIE_FID_VFID", 0x4934, 0 },
12299 		{ "RVF", 0, 8 },
12300 	{ "PCIE_FID_VFID", 0x4938, 0 },
12307 		{ "RVF", 0, 8 },
12308 	{ "PCIE_FID_VFID", 0x493c, 0 },
12315 		{ "RVF", 0, 8 },
12316 	{ "PCIE_FID_VFID", 0x4940, 0 },
12323 		{ "RVF", 0, 8 },
12324 	{ "PCIE_FID_VFID", 0x4944, 0 },
12331 		{ "RVF", 0, 8 },
12332 	{ "PCIE_FID_VFID", 0x4948, 0 },
12339 		{ "RVF", 0, 8 },
12340 	{ "PCIE_FID_VFID", 0x494c, 0 },
12347 		{ "RVF", 0, 8 },
12348 	{ "PCIE_FID_VFID", 0x4950, 0 },
12355 		{ "RVF", 0, 8 },
12356 	{ "PCIE_FID_VFID", 0x4954, 0 },
12363 		{ "RVF", 0, 8 },
12364 	{ "PCIE_FID_VFID", 0x4958, 0 },
12371 		{ "RVF", 0, 8 },
12372 	{ "PCIE_FID_VFID", 0x495c, 0 },
12379 		{ "RVF", 0, 8 },
12380 	{ "PCIE_FID_VFID", 0x4960, 0 },
12387 		{ "RVF", 0, 8 },
12388 	{ "PCIE_FID_VFID", 0x4964, 0 },
12395 		{ "RVF", 0, 8 },
12396 	{ "PCIE_FID_VFID", 0x4968, 0 },
12403 		{ "RVF", 0, 8 },
12404 	{ "PCIE_FID_VFID", 0x496c, 0 },
12411 		{ "RVF", 0, 8 },
12412 	{ "PCIE_FID_VFID", 0x4970, 0 },
12419 		{ "RVF", 0, 8 },
12420 	{ "PCIE_FID_VFID", 0x4974, 0 },
12427 		{ "RVF", 0, 8 },
12428 	{ "PCIE_FID_VFID", 0x4978, 0 },
12435 		{ "RVF", 0, 8 },
12436 	{ "PCIE_FID_VFID", 0x497c, 0 },
12443 		{ "RVF", 0, 8 },
12444 	{ "PCIE_FID_VFID", 0x4980, 0 },
12451 		{ "RVF", 0, 8 },
12452 	{ "PCIE_FID_VFID", 0x4984, 0 },
12459 		{ "RVF", 0, 8 },
12460 	{ "PCIE_FID_VFID", 0x4988, 0 },
12467 		{ "RVF", 0, 8 },
12468 	{ "PCIE_FID_VFID", 0x498c, 0 },
12475 		{ "RVF", 0, 8 },
12476 	{ "PCIE_FID_VFID", 0x4990, 0 },
12483 		{ "RVF", 0, 8 },
12484 	{ "PCIE_FID_VFID", 0x4994, 0 },
12491 		{ "RVF", 0, 8 },
12492 	{ "PCIE_FID_VFID", 0x4998, 0 },
12499 		{ "RVF", 0, 8 },
12500 	{ "PCIE_FID_VFID", 0x499c, 0 },
12507 		{ "RVF", 0, 8 },
12508 	{ "PCIE_FID_VFID", 0x49a0, 0 },
12515 		{ "RVF", 0, 8 },
12516 	{ "PCIE_FID_VFID", 0x49a4, 0 },
12523 		{ "RVF", 0, 8 },
12524 	{ "PCIE_FID_VFID", 0x49a8, 0 },
12531 		{ "RVF", 0, 8 },
12532 	{ "PCIE_FID_VFID", 0x49ac, 0 },
12539 		{ "RVF", 0, 8 },
12540 	{ "PCIE_FID_VFID", 0x49b0, 0 },
12547 		{ "RVF", 0, 8 },
12548 	{ "PCIE_FID_VFID", 0x49b4, 0 },
12555 		{ "RVF", 0, 8 },
12556 	{ "PCIE_FID_VFID", 0x49b8, 0 },
12563 		{ "RVF", 0, 8 },
12564 	{ "PCIE_FID_VFID", 0x49bc, 0 },
12571 		{ "RVF", 0, 8 },
12572 	{ "PCIE_FID_VFID", 0x49c0, 0 },
12579 		{ "RVF", 0, 8 },
12580 	{ "PCIE_FID_VFID", 0x49c4, 0 },
12587 		{ "RVF", 0, 8 },
12588 	{ "PCIE_FID_VFID", 0x49c8, 0 },
12595 		{ "RVF", 0, 8 },
12596 	{ "PCIE_FID_VFID", 0x49cc, 0 },
12603 		{ "RVF", 0, 8 },
12604 	{ "PCIE_FID_VFID", 0x49d0, 0 },
12611 		{ "RVF", 0, 8 },
12612 	{ "PCIE_FID_VFID", 0x49d4, 0 },
12619 		{ "RVF", 0, 8 },
12620 	{ "PCIE_FID_VFID", 0x49d8, 0 },
12627 		{ "RVF", 0, 8 },
12628 	{ "PCIE_FID_VFID", 0x49dc, 0 },
12635 		{ "RVF", 0, 8 },
12636 	{ "PCIE_FID_VFID", 0x49e0, 0 },
12643 		{ "RVF", 0, 8 },
12644 	{ "PCIE_FID_VFID", 0x49e4, 0 },
12651 		{ "RVF", 0, 8 },
12652 	{ "PCIE_FID_VFID", 0x49e8, 0 },
12659 		{ "RVF", 0, 8 },
12660 	{ "PCIE_FID_VFID", 0x49ec, 0 },
12667 		{ "RVF", 0, 8 },
12668 	{ "PCIE_FID_VFID", 0x49f0, 0 },
12675 		{ "RVF", 0, 8 },
12676 	{ "PCIE_FID_VFID", 0x49f4, 0 },
12683 		{ "RVF", 0, 8 },
12684 	{ "PCIE_FID_VFID", 0x49f8, 0 },
12691 		{ "RVF", 0, 8 },
12692 	{ "PCIE_FID_VFID", 0x49fc, 0 },
12699 		{ "RVF", 0, 8 },
12700 	{ "PCIE_FID_VFID", 0x4a00, 0 },
12707 		{ "RVF", 0, 8 },
12708 	{ "PCIE_FID_VFID", 0x4a04, 0 },
12715 		{ "RVF", 0, 8 },
12716 	{ "PCIE_FID_VFID", 0x4a08, 0 },
12723 		{ "RVF", 0, 8 },
12724 	{ "PCIE_FID_VFID", 0x4a0c, 0 },
12731 		{ "RVF", 0, 8 },
12732 	{ "PCIE_FID_VFID", 0x4a10, 0 },
12739 		{ "RVF", 0, 8 },
12740 	{ "PCIE_FID_VFID", 0x4a14, 0 },
12747 		{ "RVF", 0, 8 },
12748 	{ "PCIE_FID_VFID", 0x4a18, 0 },
12755 		{ "RVF", 0, 8 },
12756 	{ "PCIE_FID_VFID", 0x4a1c, 0 },
12763 		{ "RVF", 0, 8 },
12764 	{ "PCIE_FID_VFID", 0x4a20, 0 },
12771 		{ "RVF", 0, 8 },
12772 	{ "PCIE_FID_VFID", 0x4a24, 0 },
12779 		{ "RVF", 0, 8 },
12780 	{ "PCIE_FID_VFID", 0x4a28, 0 },
12787 		{ "RVF", 0, 8 },
12788 	{ "PCIE_FID_VFID", 0x4a2c, 0 },
12795 		{ "RVF", 0, 8 },
12796 	{ "PCIE_FID_VFID", 0x4a30, 0 },
12803 		{ "RVF", 0, 8 },
12804 	{ "PCIE_FID_VFID", 0x4a34, 0 },
12811 		{ "RVF", 0, 8 },
12812 	{ "PCIE_FID_VFID", 0x4a38, 0 },
12819 		{ "RVF", 0, 8 },
12820 	{ "PCIE_FID_VFID", 0x4a3c, 0 },
12827 		{ "RVF", 0, 8 },
12828 	{ "PCIE_FID_VFID", 0x4a40, 0 },
12835 		{ "RVF", 0, 8 },
12836 	{ "PCIE_FID_VFID", 0x4a44, 0 },
12843 		{ "RVF", 0, 8 },
12844 	{ "PCIE_FID_VFID", 0x4a48, 0 },
12851 		{ "RVF", 0, 8 },
12852 	{ "PCIE_FID_VFID", 0x4a4c, 0 },
12859 		{ "RVF", 0, 8 },
12860 	{ "PCIE_FID_VFID", 0x4a50, 0 },
12867 		{ "RVF", 0, 8 },
12868 	{ "PCIE_FID_VFID", 0x4a54, 0 },
12875 		{ "RVF", 0, 8 },
12876 	{ "PCIE_FID_VFID", 0x4a58, 0 },
12883 		{ "RVF", 0, 8 },
12884 	{ "PCIE_FID_VFID", 0x4a5c, 0 },
12891 		{ "RVF", 0, 8 },
12892 	{ "PCIE_FID_VFID", 0x4a60, 0 },
12899 		{ "RVF", 0, 8 },
12900 	{ "PCIE_FID_VFID", 0x4a64, 0 },
12907 		{ "RVF", 0, 8 },
12908 	{ "PCIE_FID_VFID", 0x4a68, 0 },
12915 		{ "RVF", 0, 8 },
12916 	{ "PCIE_FID_VFID", 0x4a6c, 0 },
12923 		{ "RVF", 0, 8 },
12924 	{ "PCIE_FID_VFID", 0x4a70, 0 },
12931 		{ "RVF", 0, 8 },
12932 	{ "PCIE_FID_VFID", 0x4a74, 0 },
12939 		{ "RVF", 0, 8 },
12940 	{ "PCIE_FID_VFID", 0x4a78, 0 },
12947 		{ "RVF", 0, 8 },
12948 	{ "PCIE_FID_VFID", 0x4a7c, 0 },
12955 		{ "RVF", 0, 8 },
12956 	{ "PCIE_FID_VFID", 0x4a80, 0 },
12963 		{ "RVF", 0, 8 },
12964 	{ "PCIE_FID_VFID", 0x4a84, 0 },
12971 		{ "RVF", 0, 8 },
12972 	{ "PCIE_FID_VFID", 0x4a88, 0 },
12979 		{ "RVF", 0, 8 },
12980 	{ "PCIE_FID_VFID", 0x4a8c, 0 },
12987 		{ "RVF", 0, 8 },
12988 	{ "PCIE_FID_VFID", 0x4a90, 0 },
12995 		{ "RVF", 0, 8 },
12996 	{ "PCIE_FID_VFID", 0x4a94, 0 },
13003 		{ "RVF", 0, 8 },
13004 	{ "PCIE_FID_VFID", 0x4a98, 0 },
13011 		{ "RVF", 0, 8 },
13012 	{ "PCIE_FID_VFID", 0x4a9c, 0 },
13019 		{ "RVF", 0, 8 },
13020 	{ "PCIE_FID_VFID", 0x4aa0, 0 },
13027 		{ "RVF", 0, 8 },
13028 	{ "PCIE_FID_VFID", 0x4aa4, 0 },
13035 		{ "RVF", 0, 8 },
13036 	{ "PCIE_FID_VFID", 0x4aa8, 0 },
13043 		{ "RVF", 0, 8 },
13044 	{ "PCIE_FID_VFID", 0x4aac, 0 },
13051 		{ "RVF", 0, 8 },
13052 	{ "PCIE_FID_VFID", 0x4ab0, 0 },
13059 		{ "RVF", 0, 8 },
13060 	{ "PCIE_FID_VFID", 0x4ab4, 0 },
13067 		{ "RVF", 0, 8 },
13068 	{ "PCIE_FID_VFID", 0x4ab8, 0 },
13075 		{ "RVF", 0, 8 },
13076 	{ "PCIE_FID_VFID", 0x4abc, 0 },
13083 		{ "RVF", 0, 8 },
13084 	{ "PCIE_FID_VFID", 0x4ac0, 0 },
13091 		{ "RVF", 0, 8 },
13092 	{ "PCIE_FID_VFID", 0x4ac4, 0 },
13099 		{ "RVF", 0, 8 },
13100 	{ "PCIE_FID_VFID", 0x4ac8, 0 },
13107 		{ "RVF", 0, 8 },
13108 	{ "PCIE_FID_VFID", 0x4acc, 0 },
13115 		{ "RVF", 0, 8 },
13116 	{ "PCIE_FID_VFID", 0x4ad0, 0 },
13123 		{ "RVF", 0, 8 },
13124 	{ "PCIE_FID_VFID", 0x4ad4, 0 },
13131 		{ "RVF", 0, 8 },
13132 	{ "PCIE_FID_VFID", 0x4ad8, 0 },
13139 		{ "RVF", 0, 8 },
13140 	{ "PCIE_FID_VFID", 0x4adc, 0 },
13147 		{ "RVF", 0, 8 },
13148 	{ "PCIE_FID_VFID", 0x4ae0, 0 },
13155 		{ "RVF", 0, 8 },
13156 	{ "PCIE_FID_VFID", 0x4ae4, 0 },
13163 		{ "RVF", 0, 8 },
13164 	{ "PCIE_FID_VFID", 0x4ae8, 0 },
13171 		{ "RVF", 0, 8 },
13172 	{ "PCIE_FID_VFID", 0x4aec, 0 },
13179 		{ "RVF", 0, 8 },
13180 	{ "PCIE_FID_VFID", 0x4af0, 0 },
13187 		{ "RVF", 0, 8 },
13188 	{ "PCIE_FID_VFID", 0x4af4, 0 },
13195 		{ "RVF", 0, 8 },
13196 	{ "PCIE_FID_VFID", 0x4af8, 0 },
13203 		{ "RVF", 0, 8 },
13204 	{ "PCIE_FID_VFID", 0x4afc, 0 },
13211 		{ "RVF", 0, 8 },
13212 	{ "PCIE_FID_VFID", 0x4b00, 0 },
13219 		{ "RVF", 0, 8 },
13220 	{ "PCIE_FID_VFID", 0x4b04, 0 },
13227 		{ "RVF", 0, 8 },
13228 	{ "PCIE_FID_VFID", 0x4b08, 0 },
13235 		{ "RVF", 0, 8 },
13236 	{ "PCIE_FID_VFID", 0x4b0c, 0 },
13243 		{ "RVF", 0, 8 },
13244 	{ "PCIE_FID_VFID", 0x4b10, 0 },
13251 		{ "RVF", 0, 8 },
13252 	{ "PCIE_FID_VFID", 0x4b14, 0 },
13259 		{ "RVF", 0, 8 },
13260 	{ "PCIE_FID_VFID", 0x4b18, 0 },
13267 		{ "RVF", 0, 8 },
13268 	{ "PCIE_FID_VFID", 0x4b1c, 0 },
13275 		{ "RVF", 0, 8 },
13276 	{ "PCIE_FID_VFID", 0x4b20, 0 },
13283 		{ "RVF", 0, 8 },
13284 	{ "PCIE_FID_VFID", 0x4b24, 0 },
13291 		{ "RVF", 0, 8 },
13292 	{ "PCIE_FID_VFID", 0x4b28, 0 },
13299 		{ "RVF", 0, 8 },
13300 	{ "PCIE_FID_VFID", 0x4b2c, 0 },
13307 		{ "RVF", 0, 8 },
13308 	{ "PCIE_FID_VFID", 0x4b30, 0 },
13315 		{ "RVF", 0, 8 },
13316 	{ "PCIE_FID_VFID", 0x4b34, 0 },
13323 		{ "RVF", 0, 8 },
13324 	{ "PCIE_FID_VFID", 0x4b38, 0 },
13331 		{ "RVF", 0, 8 },
13332 	{ "PCIE_FID_VFID", 0x4b3c, 0 },
13339 		{ "RVF", 0, 8 },
13340 	{ "PCIE_FID_VFID", 0x4b40, 0 },
13347 		{ "RVF", 0, 8 },
13348 	{ "PCIE_FID_VFID", 0x4b44, 0 },
13355 		{ "RVF", 0, 8 },
13356 	{ "PCIE_FID_VFID", 0x4b48, 0 },
13363 		{ "RVF", 0, 8 },
13364 	{ "PCIE_FID_VFID", 0x4b4c, 0 },
13371 		{ "RVF", 0, 8 },
13372 	{ "PCIE_FID_VFID", 0x4b50, 0 },
13379 		{ "RVF", 0, 8 },
13380 	{ "PCIE_FID_VFID", 0x4b54, 0 },
13387 		{ "RVF", 0, 8 },
13388 	{ "PCIE_FID_VFID", 0x4b58, 0 },
13395 		{ "RVF", 0, 8 },
13396 	{ "PCIE_FID_VFID", 0x4b5c, 0 },
13403 		{ "RVF", 0, 8 },
13404 	{ "PCIE_FID_VFID", 0x4b60, 0 },
13411 		{ "RVF", 0, 8 },
13412 	{ "PCIE_FID_VFID", 0x4b64, 0 },
13419 		{ "RVF", 0, 8 },
13420 	{ "PCIE_FID_VFID", 0x4b68, 0 },
13427 		{ "RVF", 0, 8 },
13428 	{ "PCIE_FID_VFID", 0x4b6c, 0 },
13435 		{ "RVF", 0, 8 },
13436 	{ "PCIE_FID_VFID", 0x4b70, 0 },
13443 		{ "RVF", 0, 8 },
13444 	{ "PCIE_FID_VFID", 0x4b74, 0 },
13451 		{ "RVF", 0, 8 },
13452 	{ "PCIE_FID_VFID", 0x4b78, 0 },
13459 		{ "RVF", 0, 8 },
13460 	{ "PCIE_FID_VFID", 0x4b7c, 0 },
13467 		{ "RVF", 0, 8 },
13468 	{ "PCIE_FID_VFID", 0x4b80, 0 },
13475 		{ "RVF", 0, 8 },
13476 	{ "PCIE_FID_VFID", 0x4b84, 0 },
13483 		{ "RVF", 0, 8 },
13484 	{ "PCIE_FID_VFID", 0x4b88, 0 },
13491 		{ "RVF", 0, 8 },
13492 	{ "PCIE_FID_VFID", 0x4b8c, 0 },
13499 		{ "RVF", 0, 8 },
13500 	{ "PCIE_FID_VFID", 0x4b90, 0 },
13507 		{ "RVF", 0, 8 },
13508 	{ "PCIE_FID_VFID", 0x4b94, 0 },
13515 		{ "RVF", 0, 8 },
13516 	{ "PCIE_FID_VFID", 0x4b98, 0 },
13523 		{ "RVF", 0, 8 },
13524 	{ "PCIE_FID_VFID", 0x4b9c, 0 },
13531 		{ "RVF", 0, 8 },
13532 	{ "PCIE_FID_VFID", 0x4ba0, 0 },
13539 		{ "RVF", 0, 8 },
13540 	{ "PCIE_FID_VFID", 0x4ba4, 0 },
13547 		{ "RVF", 0, 8 },
13548 	{ "PCIE_FID_VFID", 0x4ba8, 0 },
13555 		{ "RVF", 0, 8 },
13556 	{ "PCIE_FID_VFID", 0x4bac, 0 },
13563 		{ "RVF", 0, 8 },
13564 	{ "PCIE_FID_VFID", 0x4bb0, 0 },
13571 		{ "RVF", 0, 8 },
13572 	{ "PCIE_FID_VFID", 0x4bb4, 0 },
13579 		{ "RVF", 0, 8 },
13580 	{ "PCIE_FID_VFID", 0x4bb8, 0 },
13587 		{ "RVF", 0, 8 },
13588 	{ "PCIE_FID_VFID", 0x4bbc, 0 },
13595 		{ "RVF", 0, 8 },
13596 	{ "PCIE_FID_VFID", 0x4bc0, 0 },
13603 		{ "RVF", 0, 8 },
13604 	{ "PCIE_FID_VFID", 0x4bc4, 0 },
13611 		{ "RVF", 0, 8 },
13612 	{ "PCIE_FID_VFID", 0x4bc8, 0 },
13619 		{ "RVF", 0, 8 },
13620 	{ "PCIE_FID_VFID", 0x4bcc, 0 },
13627 		{ "RVF", 0, 8 },
13628 	{ "PCIE_FID_VFID", 0x4bd0, 0 },
13635 		{ "RVF", 0, 8 },
13636 	{ "PCIE_FID_VFID", 0x4bd4, 0 },
13643 		{ "RVF", 0, 8 },
13644 	{ "PCIE_FID_VFID", 0x4bd8, 0 },
13651 		{ "RVF", 0, 8 },
13652 	{ "PCIE_FID_VFID", 0x4bdc, 0 },
13659 		{ "RVF", 0, 8 },
13660 	{ "PCIE_FID_VFID", 0x4be0, 0 },
13667 		{ "RVF", 0, 8 },
13668 	{ "PCIE_FID_VFID", 0x4be4, 0 },
13675 		{ "RVF", 0, 8 },
13676 	{ "PCIE_FID_VFID", 0x4be8, 0 },
13683 		{ "RVF", 0, 8 },
13684 	{ "PCIE_FID_VFID", 0x4bec, 0 },
13691 		{ "RVF", 0, 8 },
13692 	{ "PCIE_FID_VFID", 0x4bf0, 0 },
13699 		{ "RVF", 0, 8 },
13700 	{ "PCIE_FID_VFID", 0x4bf4, 0 },
13707 		{ "RVF", 0, 8 },
13708 	{ "PCIE_FID_VFID", 0x4bf8, 0 },
13715 		{ "RVF", 0, 8 },
13716 	{ "PCIE_FID_VFID", 0x4bfc, 0 },
13723 		{ "RVF", 0, 8 },
13724 	{ "PCIE_FID_VFID", 0x4c00, 0 },
13731 		{ "RVF", 0, 8 },
13732 	{ "PCIE_FID_VFID", 0x4c04, 0 },
13739 		{ "RVF", 0, 8 },
13740 	{ "PCIE_FID_VFID", 0x4c08, 0 },
13747 		{ "RVF", 0, 8 },
13748 	{ "PCIE_FID_VFID", 0x4c0c, 0 },
13755 		{ "RVF", 0, 8 },
13756 	{ "PCIE_FID_VFID", 0x4c10, 0 },
13763 		{ "RVF", 0, 8 },
13764 	{ "PCIE_FID_VFID", 0x4c14, 0 },
13771 		{ "RVF", 0, 8 },
13772 	{ "PCIE_FID_VFID", 0x4c18, 0 },
13779 		{ "RVF", 0, 8 },
13780 	{ "PCIE_FID_VFID", 0x4c1c, 0 },
13787 		{ "RVF", 0, 8 },
13788 	{ "PCIE_FID_VFID", 0x4c20, 0 },
13795 		{ "RVF", 0, 8 },
13796 	{ "PCIE_FID_VFID", 0x4c24, 0 },
13803 		{ "RVF", 0, 8 },
13804 	{ "PCIE_FID_VFID", 0x4c28, 0 },
13811 		{ "RVF", 0, 8 },
13812 	{ "PCIE_FID_VFID", 0x4c2c, 0 },
13819 		{ "RVF", 0, 8 },
13820 	{ "PCIE_FID_VFID", 0x4c30, 0 },
13827 		{ "RVF", 0, 8 },
13828 	{ "PCIE_FID_VFID", 0x4c34, 0 },
13835 		{ "RVF", 0, 8 },
13836 	{ "PCIE_FID_VFID", 0x4c38, 0 },
13843 		{ "RVF", 0, 8 },
13844 	{ "PCIE_FID_VFID", 0x4c3c, 0 },
13851 		{ "RVF", 0, 8 },
13852 	{ "PCIE_FID_VFID", 0x4c40, 0 },
13859 		{ "RVF", 0, 8 },
13860 	{ "PCIE_FID_VFID", 0x4c44, 0 },
13867 		{ "RVF", 0, 8 },
13868 	{ "PCIE_FID_VFID", 0x4c48, 0 },
13875 		{ "RVF", 0, 8 },
13876 	{ "PCIE_FID_VFID", 0x4c4c, 0 },
13883 		{ "RVF", 0, 8 },
13884 	{ "PCIE_FID_VFID", 0x4c50, 0 },
13891 		{ "RVF", 0, 8 },
13892 	{ "PCIE_FID_VFID", 0x4c54, 0 },
13899 		{ "RVF", 0, 8 },
13900 	{ "PCIE_FID_VFID", 0x4c58, 0 },
13907 		{ "RVF", 0, 8 },
13908 	{ "PCIE_FID_VFID", 0x4c5c, 0 },
13915 		{ "RVF", 0, 8 },
13916 	{ "PCIE_FID_VFID", 0x4c60, 0 },
13923 		{ "RVF", 0, 8 },
13924 	{ "PCIE_FID_VFID", 0x4c64, 0 },
13931 		{ "RVF", 0, 8 },
13932 	{ "PCIE_FID_VFID", 0x4c68, 0 },
13939 		{ "RVF", 0, 8 },
13940 	{ "PCIE_FID_VFID", 0x4c6c, 0 },
13947 		{ "RVF", 0, 8 },
13948 	{ "PCIE_FID_VFID", 0x4c70, 0 },
13955 		{ "RVF", 0, 8 },
13956 	{ "PCIE_FID_VFID", 0x4c74, 0 },
13963 		{ "RVF", 0, 8 },
13964 	{ "PCIE_FID_VFID", 0x4c78, 0 },
13971 		{ "RVF", 0, 8 },
13972 	{ "PCIE_FID_VFID", 0x4c7c, 0 },
13979 		{ "RVF", 0, 8 },
13980 	{ "PCIE_FID_VFID", 0x4c80, 0 },
13987 		{ "RVF", 0, 8 },
13988 	{ "PCIE_FID_VFID", 0x4c84, 0 },
13995 		{ "RVF", 0, 8 },
13996 	{ "PCIE_FID_VFID", 0x4c88, 0 },
14003 		{ "RVF", 0, 8 },
14004 	{ "PCIE_FID_VFID", 0x4c8c, 0 },
14011 		{ "RVF", 0, 8 },
14012 	{ "PCIE_FID_VFID", 0x4c90, 0 },
14019 		{ "RVF", 0, 8 },
14020 	{ "PCIE_FID_VFID", 0x4c94, 0 },
14027 		{ "RVF", 0, 8 },
14028 	{ "PCIE_FID_VFID", 0x4c98, 0 },
14035 		{ "RVF", 0, 8 },
14036 	{ "PCIE_FID_VFID", 0x4c9c, 0 },
14043 		{ "RVF", 0, 8 },
14044 	{ "PCIE_FID_VFID", 0x4ca0, 0 },
14051 		{ "RVF", 0, 8 },
14052 	{ "PCIE_FID_VFID", 0x4ca4, 0 },
14059 		{ "RVF", 0, 8 },
14060 	{ "PCIE_FID_VFID", 0x4ca8, 0 },
14067 		{ "RVF", 0, 8 },
14068 	{ "PCIE_FID_VFID", 0x4cac, 0 },
14075 		{ "RVF", 0, 8 },
14076 	{ "PCIE_FID_VFID", 0x4cb0, 0 },
14083 		{ "RVF", 0, 8 },
14084 	{ "PCIE_FID_VFID", 0x4cb4, 0 },
14091 		{ "RVF", 0, 8 },
14092 	{ "PCIE_FID_VFID", 0x4cb8, 0 },
14099 		{ "RVF", 0, 8 },
14100 	{ "PCIE_FID_VFID", 0x4cbc, 0 },
14107 		{ "RVF", 0, 8 },
14108 	{ "PCIE_FID_VFID", 0x4cc0, 0 },
14115 		{ "RVF", 0, 8 },
14116 	{ "PCIE_FID_VFID", 0x4cc4, 0 },
14123 		{ "RVF", 0, 8 },
14124 	{ "PCIE_FID_VFID", 0x4cc8, 0 },
14131 		{ "RVF", 0, 8 },
14132 	{ "PCIE_FID_VFID", 0x4ccc, 0 },
14139 		{ "RVF", 0, 8 },
14140 	{ "PCIE_FID_VFID", 0x4cd0, 0 },
14147 		{ "RVF", 0, 8 },
14148 	{ "PCIE_FID_VFID", 0x4cd4, 0 },
14155 		{ "RVF", 0, 8 },
14156 	{ "PCIE_FID_VFID", 0x4cd8, 0 },
14163 		{ "RVF", 0, 8 },
14164 	{ "PCIE_FID_VFID", 0x4cdc, 0 },
14171 		{ "RVF", 0, 8 },
14172 	{ "PCIE_FID_VFID", 0x4ce0, 0 },
14179 		{ "RVF", 0, 8 },
14180 	{ "PCIE_FID_VFID", 0x4ce4, 0 },
14187 		{ "RVF", 0, 8 },
14188 	{ "PCIE_FID_VFID", 0x4ce8, 0 },
14195 		{ "RVF", 0, 8 },
14196 	{ "PCIE_FID_VFID", 0x4cec, 0 },
14203 		{ "RVF", 0, 8 },
14204 	{ "PCIE_FID_VFID", 0x4cf0, 0 },
14211 		{ "RVF", 0, 8 },
14212 	{ "PCIE_FID_VFID", 0x4cf4, 0 },
14219 		{ "RVF", 0, 8 },
14220 	{ "PCIE_FID_VFID", 0x4cf8, 0 },
14227 		{ "RVF", 0, 8 },
14228 	{ "PCIE_FID_VFID", 0x4cfc, 0 },
14235 		{ "RVF", 0, 8 },
14236 	{ "PCIE_FID_VFID", 0x4d00, 0 },
14243 		{ "RVF", 0, 8 },
14244 	{ "PCIE_FID_VFID", 0x4d04, 0 },
14251 		{ "RVF", 0, 8 },
14252 	{ "PCIE_FID_VFID", 0x4d08, 0 },
14259 		{ "RVF", 0, 8 },
14260 	{ "PCIE_FID_VFID", 0x4d0c, 0 },
14267 		{ "RVF", 0, 8 },
14268 	{ "PCIE_FID_VFID", 0x4d10, 0 },
14275 		{ "RVF", 0, 8 },
14276 	{ "PCIE_FID_VFID", 0x4d14, 0 },
14283 		{ "RVF", 0, 8 },
14284 	{ "PCIE_FID_VFID", 0x4d18, 0 },
14291 		{ "RVF", 0, 8 },
14292 	{ "PCIE_FID_VFID", 0x4d1c, 0 },
14299 		{ "RVF", 0, 8 },
14300 	{ "PCIE_FID_VFID", 0x4d20, 0 },
14307 		{ "RVF", 0, 8 },
14308 	{ "PCIE_FID_VFID", 0x4d24, 0 },
14315 		{ "RVF", 0, 8 },
14316 	{ "PCIE_FID_VFID", 0x4d28, 0 },
14323 		{ "RVF", 0, 8 },
14324 	{ "PCIE_FID_VFID", 0x4d2c, 0 },
14331 		{ "RVF", 0, 8 },
14332 	{ "PCIE_FID_VFID", 0x4d30, 0 },
14339 		{ "RVF", 0, 8 },
14340 	{ "PCIE_FID_VFID", 0x4d34, 0 },
14347 		{ "RVF", 0, 8 },
14348 	{ "PCIE_FID_VFID", 0x4d38, 0 },
14355 		{ "RVF", 0, 8 },
14356 	{ "PCIE_FID_VFID", 0x4d3c, 0 },
14363 		{ "RVF", 0, 8 },
14364 	{ "PCIE_FID_VFID", 0x4d40, 0 },
14371 		{ "RVF", 0, 8 },
14372 	{ "PCIE_FID_VFID", 0x4d44, 0 },
14379 		{ "RVF", 0, 8 },
14380 	{ "PCIE_FID_VFID", 0x4d48, 0 },
14387 		{ "RVF", 0, 8 },
14388 	{ "PCIE_FID_VFID", 0x4d4c, 0 },
14395 		{ "RVF", 0, 8 },
14396 	{ "PCIE_FID_VFID", 0x4d50, 0 },
14403 		{ "RVF", 0, 8 },
14404 	{ "PCIE_FID_VFID", 0x4d54, 0 },
14411 		{ "RVF", 0, 8 },
14412 	{ "PCIE_FID_VFID", 0x4d58, 0 },
14419 		{ "RVF", 0, 8 },
14420 	{ "PCIE_FID_VFID", 0x4d5c, 0 },
14427 		{ "RVF", 0, 8 },
14428 	{ "PCIE_FID_VFID", 0x4d60, 0 },
14435 		{ "RVF", 0, 8 },
14436 	{ "PCIE_FID_VFID", 0x4d64, 0 },
14443 		{ "RVF", 0, 8 },
14444 	{ "PCIE_FID_VFID", 0x4d68, 0 },
14451 		{ "RVF", 0, 8 },
14452 	{ "PCIE_FID_VFID", 0x4d6c, 0 },
14459 		{ "RVF", 0, 8 },
14460 	{ "PCIE_FID_VFID", 0x4d70, 0 },
14467 		{ "RVF", 0, 8 },
14468 	{ "PCIE_FID_VFID", 0x4d74, 0 },
14475 		{ "RVF", 0, 8 },
14476 	{ "PCIE_FID_VFID", 0x4d78, 0 },
14483 		{ "RVF", 0, 8 },
14484 	{ "PCIE_FID_VFID", 0x4d7c, 0 },
14491 		{ "RVF", 0, 8 },
14492 	{ "PCIE_FID_VFID", 0x4d80, 0 },
14499 		{ "RVF", 0, 8 },
14500 	{ "PCIE_FID_VFID", 0x4d84, 0 },
14507 		{ "RVF", 0, 8 },
14508 	{ "PCIE_FID_VFID", 0x4d88, 0 },
14515 		{ "RVF", 0, 8 },
14516 	{ "PCIE_FID_VFID", 0x4d8c, 0 },
14523 		{ "RVF", 0, 8 },
14524 	{ "PCIE_FID_VFID", 0x4d90, 0 },
14531 		{ "RVF", 0, 8 },
14532 	{ "PCIE_FID_VFID", 0x4d94, 0 },
14539 		{ "RVF", 0, 8 },
14540 	{ "PCIE_FID_VFID", 0x4d98, 0 },
14547 		{ "RVF", 0, 8 },
14548 	{ "PCIE_FID_VFID", 0x4d9c, 0 },
14555 		{ "RVF", 0, 8 },
14556 	{ "PCIE_FID_VFID", 0x4da0, 0 },
14563 		{ "RVF", 0, 8 },
14564 	{ "PCIE_FID_VFID", 0x4da4, 0 },
14571 		{ "RVF", 0, 8 },
14572 	{ "PCIE_FID_VFID", 0x4da8, 0 },
14579 		{ "RVF", 0, 8 },
14580 	{ "PCIE_FID_VFID", 0x4dac, 0 },
14587 		{ "RVF", 0, 8 },
14588 	{ "PCIE_FID_VFID", 0x4db0, 0 },
14595 		{ "RVF", 0, 8 },
14596 	{ "PCIE_FID_VFID", 0x4db4, 0 },
14603 		{ "RVF", 0, 8 },
14604 	{ "PCIE_FID_VFID", 0x4db8, 0 },
14611 		{ "RVF", 0, 8 },
14612 	{ "PCIE_FID_VFID", 0x4dbc, 0 },
14619 		{ "RVF", 0, 8 },
14620 	{ "PCIE_FID_VFID", 0x4dc0, 0 },
14627 		{ "RVF", 0, 8 },
14628 	{ "PCIE_FID_VFID", 0x4dc4, 0 },
14635 		{ "RVF", 0, 8 },
14636 	{ "PCIE_FID_VFID", 0x4dc8, 0 },
14643 		{ "RVF", 0, 8 },
14644 	{ "PCIE_FID_VFID", 0x4dcc, 0 },
14651 		{ "RVF", 0, 8 },
14652 	{ "PCIE_FID_VFID", 0x4dd0, 0 },
14659 		{ "RVF", 0, 8 },
14660 	{ "PCIE_FID_VFID", 0x4dd4, 0 },
14667 		{ "RVF", 0, 8 },
14668 	{ "PCIE_FID_VFID", 0x4dd8, 0 },
14675 		{ "RVF", 0, 8 },
14676 	{ "PCIE_FID_VFID", 0x4ddc, 0 },
14683 		{ "RVF", 0, 8 },
14684 	{ "PCIE_FID_VFID", 0x4de0, 0 },
14691 		{ "RVF", 0, 8 },
14692 	{ "PCIE_FID_VFID", 0x4de4, 0 },
14699 		{ "RVF", 0, 8 },
14700 	{ "PCIE_FID_VFID", 0x4de8, 0 },
14707 		{ "RVF", 0, 8 },
14708 	{ "PCIE_FID_VFID", 0x4dec, 0 },
14715 		{ "RVF", 0, 8 },
14716 	{ "PCIE_FID_VFID", 0x4df0, 0 },
14723 		{ "RVF", 0, 8 },
14724 	{ "PCIE_FID_VFID", 0x4df4, 0 },
14731 		{ "RVF", 0, 8 },
14732 	{ "PCIE_FID_VFID", 0x4df8, 0 },
14739 		{ "RVF", 0, 8 },
14740 	{ "PCIE_FID_VFID", 0x4dfc, 0 },
14747 		{ "RVF", 0, 8 },
14748 	{ "PCIE_FID_VFID", 0x4e00, 0 },
14755 		{ "RVF", 0, 8 },
14756 	{ "PCIE_FID_VFID", 0x4e04, 0 },
14763 		{ "RVF", 0, 8 },
14764 	{ "PCIE_FID_VFID", 0x4e08, 0 },
14771 		{ "RVF", 0, 8 },
14772 	{ "PCIE_FID_VFID", 0x4e0c, 0 },
14779 		{ "RVF", 0, 8 },
14780 	{ "PCIE_FID_VFID", 0x4e10, 0 },
14787 		{ "RVF", 0, 8 },
14788 	{ "PCIE_FID_VFID", 0x4e14, 0 },
14795 		{ "RVF", 0, 8 },
14796 	{ "PCIE_FID_VFID", 0x4e18, 0 },
14803 		{ "RVF", 0, 8 },
14804 	{ "PCIE_FID_VFID", 0x4e1c, 0 },
14811 		{ "RVF", 0, 8 },
14812 	{ "PCIE_FID_VFID", 0x4e20, 0 },
14819 		{ "RVF", 0, 8 },
14820 	{ "PCIE_FID_VFID", 0x4e24, 0 },
14827 		{ "RVF", 0, 8 },
14828 	{ "PCIE_FID_VFID", 0x4e28, 0 },
14835 		{ "RVF", 0, 8 },
14836 	{ "PCIE_FID_VFID", 0x4e2c, 0 },
14843 		{ "RVF", 0, 8 },
14844 	{ "PCIE_FID_VFID", 0x4e30, 0 },
14851 		{ "RVF", 0, 8 },
14852 	{ "PCIE_FID_VFID", 0x4e34, 0 },
14859 		{ "RVF", 0, 8 },
14860 	{ "PCIE_FID_VFID", 0x4e38, 0 },
14867 		{ "RVF", 0, 8 },
14868 	{ "PCIE_FID_VFID", 0x4e3c, 0 },
14875 		{ "RVF", 0, 8 },
14876 	{ "PCIE_FID_VFID", 0x4e40, 0 },
14883 		{ "RVF", 0, 8 },
14884 	{ "PCIE_FID_VFID", 0x4e44, 0 },
14891 		{ "RVF", 0, 8 },
14892 	{ "PCIE_FID_VFID", 0x4e48, 0 },
14899 		{ "RVF", 0, 8 },
14900 	{ "PCIE_FID_VFID", 0x4e4c, 0 },
14907 		{ "RVF", 0, 8 },
14908 	{ "PCIE_FID_VFID", 0x4e50, 0 },
14915 		{ "RVF", 0, 8 },
14916 	{ "PCIE_FID_VFID", 0x4e54, 0 },
14923 		{ "RVF", 0, 8 },
14924 	{ "PCIE_FID_VFID", 0x4e58, 0 },
14931 		{ "RVF", 0, 8 },
14932 	{ "PCIE_FID_VFID", 0x4e5c, 0 },
14939 		{ "RVF", 0, 8 },
14940 	{ "PCIE_FID_VFID", 0x4e60, 0 },
14947 		{ "RVF", 0, 8 },
14948 	{ "PCIE_FID_VFID", 0x4e64, 0 },
14955 		{ "RVF", 0, 8 },
14956 	{ "PCIE_FID_VFID", 0x4e68, 0 },
14963 		{ "RVF", 0, 8 },
14964 	{ "PCIE_FID_VFID", 0x4e6c, 0 },
14971 		{ "RVF", 0, 8 },
14972 	{ "PCIE_FID_VFID", 0x4e70, 0 },
14979 		{ "RVF", 0, 8 },
14980 	{ "PCIE_FID_VFID", 0x4e74, 0 },
14987 		{ "RVF", 0, 8 },
14988 	{ "PCIE_FID_VFID", 0x4e78, 0 },
14995 		{ "RVF", 0, 8 },
14996 	{ "PCIE_FID_VFID", 0x4e7c, 0 },
15003 		{ "RVF", 0, 8 },
15004 	{ "PCIE_FID_VFID", 0x4e80, 0 },
15011 		{ "RVF", 0, 8 },
15012 	{ "PCIE_FID_VFID", 0x4e84, 0 },
15019 		{ "RVF", 0, 8 },
15020 	{ "PCIE_FID_VFID", 0x4e88, 0 },
15027 		{ "RVF", 0, 8 },
15028 	{ "PCIE_FID_VFID", 0x4e8c, 0 },
15035 		{ "RVF", 0, 8 },
15036 	{ "PCIE_FID_VFID", 0x4e90, 0 },
15043 		{ "RVF", 0, 8 },
15044 	{ "PCIE_FID_VFID", 0x4e94, 0 },
15051 		{ "RVF", 0, 8 },
15052 	{ "PCIE_FID_VFID", 0x4e98, 0 },
15059 		{ "RVF", 0, 8 },
15060 	{ "PCIE_FID_VFID", 0x4e9c, 0 },
15067 		{ "RVF", 0, 8 },
15068 	{ "PCIE_FID_VFID", 0x4ea0, 0 },
15075 		{ "RVF", 0, 8 },
15076 	{ "PCIE_FID_VFID", 0x4ea4, 0 },
15083 		{ "RVF", 0, 8 },
15084 	{ "PCIE_FID_VFID", 0x4ea8, 0 },
15091 		{ "RVF", 0, 8 },
15092 	{ "PCIE_FID_VFID", 0x4eac, 0 },
15099 		{ "RVF", 0, 8 },
15100 	{ "PCIE_FID_VFID", 0x4eb0, 0 },
15107 		{ "RVF", 0, 8 },
15108 	{ "PCIE_FID_VFID", 0x4eb4, 0 },
15115 		{ "RVF", 0, 8 },
15116 	{ "PCIE_FID_VFID", 0x4eb8, 0 },
15123 		{ "RVF", 0, 8 },
15124 	{ "PCIE_FID_VFID", 0x4ebc, 0 },
15131 		{ "RVF", 0, 8 },
15132 	{ "PCIE_FID_VFID", 0x4ec0, 0 },
15139 		{ "RVF", 0, 8 },
15140 	{ "PCIE_FID_VFID", 0x4ec4, 0 },
15147 		{ "RVF", 0, 8 },
15148 	{ "PCIE_FID_VFID", 0x4ec8, 0 },
15155 		{ "RVF", 0, 8 },
15156 	{ "PCIE_FID_VFID", 0x4ecc, 0 },
15163 		{ "RVF", 0, 8 },
15164 	{ "PCIE_FID_VFID", 0x4ed0, 0 },
15171 		{ "RVF", 0, 8 },
15172 	{ "PCIE_FID_VFID", 0x4ed4, 0 },
15179 		{ "RVF", 0, 8 },
15180 	{ "PCIE_FID_VFID", 0x4ed8, 0 },
15187 		{ "RVF", 0, 8 },
15188 	{ "PCIE_FID_VFID", 0x4edc, 0 },
15195 		{ "RVF", 0, 8 },
15196 	{ "PCIE_FID_VFID", 0x4ee0, 0 },
15203 		{ "RVF", 0, 8 },
15204 	{ "PCIE_FID_VFID", 0x4ee4, 0 },
15211 		{ "RVF", 0, 8 },
15212 	{ "PCIE_FID_VFID", 0x4ee8, 0 },
15219 		{ "RVF", 0, 8 },
15220 	{ "PCIE_FID_VFID", 0x4eec, 0 },
15227 		{ "RVF", 0, 8 },
15228 	{ "PCIE_FID_VFID", 0x4ef0, 0 },
15235 		{ "RVF", 0, 8 },
15236 	{ "PCIE_FID_VFID", 0x4ef4, 0 },
15243 		{ "RVF", 0, 8 },
15244 	{ "PCIE_FID_VFID", 0x4ef8, 0 },
15251 		{ "RVF", 0, 8 },
15252 	{ "PCIE_FID_VFID", 0x4efc, 0 },
15259 		{ "RVF", 0, 8 },
15260 	{ "PCIE_FID_VFID", 0x4f00, 0 },
15267 		{ "RVF", 0, 8 },
15268 	{ "PCIE_FID_VFID", 0x4f04, 0 },
15275 		{ "RVF", 0, 8 },
15276 	{ "PCIE_FID_VFID", 0x4f08, 0 },
15283 		{ "RVF", 0, 8 },
15284 	{ "PCIE_FID_VFID", 0x4f0c, 0 },
15291 		{ "RVF", 0, 8 },
15292 	{ "PCIE_FID_VFID", 0x4f10, 0 },
15299 		{ "RVF", 0, 8 },
15300 	{ "PCIE_FID_VFID", 0x4f14, 0 },
15307 		{ "RVF", 0, 8 },
15308 	{ "PCIE_FID_VFID", 0x4f18, 0 },
15315 		{ "RVF", 0, 8 },
15316 	{ "PCIE_FID_VFID", 0x4f1c, 0 },
15323 		{ "RVF", 0, 8 },
15324 	{ "PCIE_FID_VFID", 0x4f20, 0 },
15331 		{ "RVF", 0, 8 },
15332 	{ "PCIE_FID_VFID", 0x4f24, 0 },
15339 		{ "RVF", 0, 8 },
15340 	{ "PCIE_FID_VFID", 0x4f28, 0 },
15347 		{ "RVF", 0, 8 },
15348 	{ "PCIE_FID_VFID", 0x4f2c, 0 },
15355 		{ "RVF", 0, 8 },
15356 	{ "PCIE_FID_VFID", 0x4f30, 0 },
15363 		{ "RVF", 0, 8 },
15364 	{ "PCIE_FID_VFID", 0x4f34, 0 },
15371 		{ "RVF", 0, 8 },
15372 	{ "PCIE_FID_VFID", 0x4f38, 0 },
15379 		{ "RVF", 0, 8 },
15380 	{ "PCIE_FID_VFID", 0x4f3c, 0 },
15387 		{ "RVF", 0, 8 },
15388 	{ "PCIE_FID_VFID", 0x4f40, 0 },
15395 		{ "RVF", 0, 8 },
15396 	{ "PCIE_FID_VFID", 0x4f44, 0 },
15403 		{ "RVF", 0, 8 },
15404 	{ "PCIE_FID_VFID", 0x4f48, 0 },
15411 		{ "RVF", 0, 8 },
15412 	{ "PCIE_FID_VFID", 0x4f4c, 0 },
15419 		{ "RVF", 0, 8 },
15420 	{ "PCIE_FID_VFID", 0x4f50, 0 },
15427 		{ "RVF", 0, 8 },
15428 	{ "PCIE_FID_VFID", 0x4f54, 0 },
15435 		{ "RVF", 0, 8 },
15436 	{ "PCIE_FID_VFID", 0x4f58, 0 },
15443 		{ "RVF", 0, 8 },
15444 	{ "PCIE_FID_VFID", 0x4f5c, 0 },
15451 		{ "RVF", 0, 8 },
15452 	{ "PCIE_FID_VFID", 0x4f60, 0 },
15459 		{ "RVF", 0, 8 },
15460 	{ "PCIE_FID_VFID", 0x4f64, 0 },
15467 		{ "RVF", 0, 8 },
15468 	{ "PCIE_FID_VFID", 0x4f68, 0 },
15475 		{ "RVF", 0, 8 },
15476 	{ "PCIE_FID_VFID", 0x4f6c, 0 },
15483 		{ "RVF", 0, 8 },
15484 	{ "PCIE_FID_VFID", 0x4f70, 0 },
15491 		{ "RVF", 0, 8 },
15492 	{ "PCIE_FID_VFID", 0x4f74, 0 },
15499 		{ "RVF", 0, 8 },
15500 	{ "PCIE_FID_VFID", 0x4f78, 0 },
15507 		{ "RVF", 0, 8 },
15508 	{ "PCIE_FID_VFID", 0x4f7c, 0 },
15515 		{ "RVF", 0, 8 },
15516 	{ "PCIE_FID_VFID", 0x4f80, 0 },
15523 		{ "RVF", 0, 8 },
15524 	{ "PCIE_FID_VFID", 0x4f84, 0 },
15531 		{ "RVF", 0, 8 },
15532 	{ "PCIE_FID_VFID", 0x4f88, 0 },
15539 		{ "RVF", 0, 8 },
15540 	{ "PCIE_FID_VFID", 0x4f8c, 0 },
15547 		{ "RVF", 0, 8 },
15548 	{ "PCIE_FID_VFID", 0x4f90, 0 },
15555 		{ "RVF", 0, 8 },
15556 	{ "PCIE_FID_VFID", 0x4f94, 0 },
15563 		{ "RVF", 0, 8 },
15564 	{ "PCIE_FID_VFID", 0x4f98, 0 },
15571 		{ "RVF", 0, 8 },
15572 	{ "PCIE_FID_VFID", 0x4f9c, 0 },
15579 		{ "RVF", 0, 8 },
15580 	{ "PCIE_FID_VFID", 0x4fa0, 0 },
15587 		{ "RVF", 0, 8 },
15588 	{ "PCIE_FID_VFID", 0x4fa4, 0 },
15595 		{ "RVF", 0, 8 },
15596 	{ "PCIE_FID_VFID", 0x4fa8, 0 },
15603 		{ "RVF", 0, 8 },
15604 	{ "PCIE_FID_VFID", 0x4fac, 0 },
15611 		{ "RVF", 0, 8 },
15612 	{ "PCIE_FID_VFID", 0x4fb0, 0 },
15619 		{ "RVF", 0, 8 },
15620 	{ "PCIE_FID_VFID", 0x4fb4, 0 },
15627 		{ "RVF", 0, 8 },
15628 	{ "PCIE_FID_VFID", 0x4fb8, 0 },
15635 		{ "RVF", 0, 8 },
15636 	{ "PCIE_FID_VFID", 0x4fbc, 0 },
15643 		{ "RVF", 0, 8 },
15644 	{ "PCIE_FID_VFID", 0x4fc0, 0 },
15651 		{ "RVF", 0, 8 },
15652 	{ "PCIE_FID_VFID", 0x4fc4, 0 },
15659 		{ "RVF", 0, 8 },
15660 	{ "PCIE_FID_VFID", 0x4fc8, 0 },
15667 		{ "RVF", 0, 8 },
15668 	{ "PCIE_FID_VFID", 0x4fcc, 0 },
15675 		{ "RVF", 0, 8 },
15676 	{ "PCIE_FID_VFID", 0x4fd0, 0 },
15683 		{ "RVF", 0, 8 },
15684 	{ "PCIE_FID_VFID", 0x4fd4, 0 },
15691 		{ "RVF", 0, 8 },
15692 	{ "PCIE_FID_VFID", 0x4fd8, 0 },
15699 		{ "RVF", 0, 8 },
15700 	{ "PCIE_FID_VFID", 0x4fdc, 0 },
15707 		{ "RVF", 0, 8 },
15708 	{ "PCIE_FID_VFID", 0x4fe0, 0 },
15715 		{ "RVF", 0, 8 },
15716 	{ "PCIE_FID_VFID", 0x4fe4, 0 },
15723 		{ "RVF", 0, 8 },
15724 	{ "PCIE_FID_VFID", 0x4fe8, 0 },
15731 		{ "RVF", 0, 8 },
15732 	{ "PCIE_FID_VFID", 0x4fec, 0 },
15739 		{ "RVF", 0, 8 },
15740 	{ "PCIE_FID_VFID", 0x4ff0, 0 },
15747 		{ "RVF", 0, 8 },
15748 	{ "PCIE_FID_VFID", 0x4ff4, 0 },
15755 		{ "RVF", 0, 8 },
15756 	{ "PCIE_FID_VFID", 0x4ff8, 0 },
15763 		{ "RVF", 0, 8 },
15764 	{ "PCIE_FID_VFID", 0x4ffc, 0 },
15771 		{ "RVF", 0, 8 },
15772 	{ "PCIE_FID_VFID", 0x5000, 0 },
15779 		{ "RVF", 0, 8 },
15780 	{ "PCIE_FID_VFID", 0x5004, 0 },
15787 		{ "RVF", 0, 8 },
15788 	{ "PCIE_FID_VFID", 0x5008, 0 },
15795 		{ "RVF", 0, 8 },
15796 	{ "PCIE_FID_VFID", 0x500c, 0 },
15803 		{ "RVF", 0, 8 },
15804 	{ "PCIE_FID_VFID", 0x5010, 0 },
15811 		{ "RVF", 0, 8 },
15812 	{ "PCIE_FID_VFID", 0x5014, 0 },
15819 		{ "RVF", 0, 8 },
15820 	{ "PCIE_FID_VFID", 0x5018, 0 },
15827 		{ "RVF", 0, 8 },
15828 	{ "PCIE_FID_VFID", 0x501c, 0 },
15835 		{ "RVF", 0, 8 },
15836 	{ "PCIE_FID_VFID", 0x5020, 0 },
15843 		{ "RVF", 0, 8 },
15844 	{ "PCIE_FID_VFID", 0x5024, 0 },
15851 		{ "RVF", 0, 8 },
15852 	{ "PCIE_FID_VFID", 0x5028, 0 },
15859 		{ "RVF", 0, 8 },
15860 	{ "PCIE_FID_VFID", 0x502c, 0 },
15867 		{ "RVF", 0, 8 },
15868 	{ "PCIE_FID_VFID", 0x5030, 0 },
15875 		{ "RVF", 0, 8 },
15876 	{ "PCIE_FID_VFID", 0x5034, 0 },
15883 		{ "RVF", 0, 8 },
15884 	{ "PCIE_FID_VFID", 0x5038, 0 },
15891 		{ "RVF", 0, 8 },
15892 	{ "PCIE_FID_VFID", 0x503c, 0 },
15899 		{ "RVF", 0, 8 },
15900 	{ "PCIE_FID_VFID", 0x5040, 0 },
15907 		{ "RVF", 0, 8 },
15908 	{ "PCIE_FID_VFID", 0x5044, 0 },
15915 		{ "RVF", 0, 8 },
15916 	{ "PCIE_FID_VFID", 0x5048, 0 },
15923 		{ "RVF", 0, 8 },
15924 	{ "PCIE_FID_VFID", 0x504c, 0 },
15931 		{ "RVF", 0, 8 },
15932 	{ "PCIE_FID_VFID", 0x5050, 0 },
15939 		{ "RVF", 0, 8 },
15940 	{ "PCIE_FID_VFID", 0x5054, 0 },
15947 		{ "RVF", 0, 8 },
15948 	{ "PCIE_FID_VFID", 0x5058, 0 },
15955 		{ "RVF", 0, 8 },
15956 	{ "PCIE_FID_VFID", 0x505c, 0 },
15963 		{ "RVF", 0, 8 },
15964 	{ "PCIE_FID_VFID", 0x5060, 0 },
15971 		{ "RVF", 0, 8 },
15972 	{ "PCIE_FID_VFID", 0x5064, 0 },
15979 		{ "RVF", 0, 8 },
15980 	{ "PCIE_FID_VFID", 0x5068, 0 },
15987 		{ "RVF", 0, 8 },
15988 	{ "PCIE_FID_VFID", 0x506c, 0 },
15995 		{ "RVF", 0, 8 },
15996 	{ "PCIE_FID_VFID", 0x5070, 0 },
16003 		{ "RVF", 0, 8 },
16004 	{ "PCIE_FID_VFID", 0x5074, 0 },
16011 		{ "RVF", 0, 8 },
16012 	{ "PCIE_FID_VFID", 0x5078, 0 },
16019 		{ "RVF", 0, 8 },
16020 	{ "PCIE_FID_VFID", 0x507c, 0 },
16027 		{ "RVF", 0, 8 },
16028 	{ "PCIE_FID_VFID", 0x5080, 0 },
16035 		{ "RVF", 0, 8 },
16036 	{ "PCIE_FID_VFID", 0x5084, 0 },
16043 		{ "RVF", 0, 8 },
16044 	{ "PCIE_FID_VFID", 0x5088, 0 },
16051 		{ "RVF", 0, 8 },
16052 	{ "PCIE_FID_VFID", 0x508c, 0 },
16059 		{ "RVF", 0, 8 },
16060 	{ "PCIE_FID_VFID", 0x5090, 0 },
16067 		{ "RVF", 0, 8 },
16068 	{ "PCIE_FID_VFID", 0x5094, 0 },
16075 		{ "RVF", 0, 8 },
16076 	{ "PCIE_FID_VFID", 0x5098, 0 },
16083 		{ "RVF", 0, 8 },
16084 	{ "PCIE_FID_VFID", 0x509c, 0 },
16091 		{ "RVF", 0, 8 },
16092 	{ "PCIE_FID_VFID", 0x50a0, 0 },
16099 		{ "RVF", 0, 8 },
16100 	{ "PCIE_FID_VFID", 0x50a4, 0 },
16107 		{ "RVF", 0, 8 },
16108 	{ "PCIE_FID_VFID", 0x50a8, 0 },
16115 		{ "RVF", 0, 8 },
16116 	{ "PCIE_FID_VFID", 0x50ac, 0 },
16123 		{ "RVF", 0, 8 },
16124 	{ "PCIE_FID_VFID", 0x50b0, 0 },
16131 		{ "RVF", 0, 8 },
16132 	{ "PCIE_FID_VFID", 0x50b4, 0 },
16139 		{ "RVF", 0, 8 },
16140 	{ "PCIE_FID_VFID", 0x50b8, 0 },
16147 		{ "RVF", 0, 8 },
16148 	{ "PCIE_FID_VFID", 0x50bc, 0 },
16155 		{ "RVF", 0, 8 },
16156 	{ "PCIE_FID_VFID", 0x50c0, 0 },
16163 		{ "RVF", 0, 8 },
16164 	{ "PCIE_FID_VFID", 0x50c4, 0 },
16171 		{ "RVF", 0, 8 },
16172 	{ "PCIE_FID_VFID", 0x50c8, 0 },
16179 		{ "RVF", 0, 8 },
16180 	{ "PCIE_FID_VFID", 0x50cc, 0 },
16187 		{ "RVF", 0, 8 },
16188 	{ "PCIE_FID_VFID", 0x50d0, 0 },
16195 		{ "RVF", 0, 8 },
16196 	{ "PCIE_FID_VFID", 0x50d4, 0 },
16203 		{ "RVF", 0, 8 },
16204 	{ "PCIE_FID_VFID", 0x50d8, 0 },
16211 		{ "RVF", 0, 8 },
16212 	{ "PCIE_FID_VFID", 0x50dc, 0 },
16219 		{ "RVF", 0, 8 },
16220 	{ "PCIE_FID_VFID", 0x50e0, 0 },
16227 		{ "RVF", 0, 8 },
16228 	{ "PCIE_FID_VFID", 0x50e4, 0 },
16235 		{ "RVF", 0, 8 },
16236 	{ "PCIE_FID_VFID", 0x50e8, 0 },
16243 		{ "RVF", 0, 8 },
16244 	{ "PCIE_FID_VFID", 0x50ec, 0 },
16251 		{ "RVF", 0, 8 },
16252 	{ "PCIE_FID_VFID", 0x50f0, 0 },
16259 		{ "RVF", 0, 8 },
16260 	{ "PCIE_FID_VFID", 0x50f4, 0 },
16267 		{ "RVF", 0, 8 },
16268 	{ "PCIE_FID_VFID", 0x50f8, 0 },
16275 		{ "RVF", 0, 8 },
16276 	{ "PCIE_FID_VFID", 0x50fc, 0 },
16283 		{ "RVF", 0, 8 },
16284 	{ "PCIE_FID_VFID", 0x5100, 0 },
16291 		{ "RVF", 0, 8 },
16292 	{ "PCIE_FID_VFID", 0x5104, 0 },
16299 		{ "RVF", 0, 8 },
16300 	{ "PCIE_FID_VFID", 0x5108, 0 },
16307 		{ "RVF", 0, 8 },
16308 	{ "PCIE_FID_VFID", 0x510c, 0 },
16315 		{ "RVF", 0, 8 },
16316 	{ "PCIE_FID_VFID", 0x5110, 0 },
16323 		{ "RVF", 0, 8 },
16324 	{ "PCIE_FID_VFID", 0x5114, 0 },
16331 		{ "RVF", 0, 8 },
16332 	{ "PCIE_FID_VFID", 0x5118, 0 },
16339 		{ "RVF", 0, 8 },
16340 	{ "PCIE_FID_VFID", 0x511c, 0 },
16347 		{ "RVF", 0, 8 },
16348 	{ "PCIE_FID_VFID", 0x5120, 0 },
16355 		{ "RVF", 0, 8 },
16356 	{ "PCIE_FID_VFID", 0x5124, 0 },
16363 		{ "RVF", 0, 8 },
16364 	{ "PCIE_FID_VFID", 0x5128, 0 },
16371 		{ "RVF", 0, 8 },
16372 	{ "PCIE_FID_VFID", 0x512c, 0 },
16379 		{ "RVF", 0, 8 },
16380 	{ "PCIE_FID_VFID", 0x5130, 0 },
16387 		{ "RVF", 0, 8 },
16388 	{ "PCIE_FID_VFID", 0x5134, 0 },
16395 		{ "RVF", 0, 8 },
16396 	{ "PCIE_FID_VFID", 0x5138, 0 },
16403 		{ "RVF", 0, 8 },
16404 	{ "PCIE_FID_VFID", 0x513c, 0 },
16411 		{ "RVF", 0, 8 },
16412 	{ "PCIE_FID_VFID", 0x5140, 0 },
16419 		{ "RVF", 0, 8 },
16420 	{ "PCIE_FID_VFID", 0x5144, 0 },
16427 		{ "RVF", 0, 8 },
16428 	{ "PCIE_FID_VFID", 0x5148, 0 },
16435 		{ "RVF", 0, 8 },
16436 	{ "PCIE_FID_VFID", 0x514c, 0 },
16443 		{ "RVF", 0, 8 },
16444 	{ "PCIE_FID_VFID", 0x5150, 0 },
16451 		{ "RVF", 0, 8 },
16452 	{ "PCIE_FID_VFID", 0x5154, 0 },
16459 		{ "RVF", 0, 8 },
16460 	{ "PCIE_FID_VFID", 0x5158, 0 },
16467 		{ "RVF", 0, 8 },
16468 	{ "PCIE_FID_VFID", 0x515c, 0 },
16475 		{ "RVF", 0, 8 },
16476 	{ "PCIE_FID_VFID", 0x5160, 0 },
16483 		{ "RVF", 0, 8 },
16484 	{ "PCIE_FID_VFID", 0x5164, 0 },
16491 		{ "RVF", 0, 8 },
16492 	{ "PCIE_FID_VFID", 0x5168, 0 },
16499 		{ "RVF", 0, 8 },
16500 	{ "PCIE_FID_VFID", 0x516c, 0 },
16507 		{ "RVF", 0, 8 },
16508 	{ "PCIE_FID_VFID", 0x5170, 0 },
16515 		{ "RVF", 0, 8 },
16516 	{ "PCIE_FID_VFID", 0x5174, 0 },
16523 		{ "RVF", 0, 8 },
16524 	{ "PCIE_FID_VFID", 0x5178, 0 },
16531 		{ "RVF", 0, 8 },
16532 	{ "PCIE_FID_VFID", 0x517c, 0 },
16539 		{ "RVF", 0, 8 },
16540 	{ "PCIE_FID_VFID", 0x5180, 0 },
16547 		{ "RVF", 0, 8 },
16548 	{ "PCIE_FID_VFID", 0x5184, 0 },
16555 		{ "RVF", 0, 8 },
16556 	{ "PCIE_FID_VFID", 0x5188, 0 },
16563 		{ "RVF", 0, 8 },
16564 	{ "PCIE_FID_VFID", 0x518c, 0 },
16571 		{ "RVF", 0, 8 },
16572 	{ "PCIE_FID_VFID", 0x5190, 0 },
16579 		{ "RVF", 0, 8 },
16580 	{ "PCIE_FID_VFID", 0x5194, 0 },
16587 		{ "RVF", 0, 8 },
16588 	{ "PCIE_FID_VFID", 0x5198, 0 },
16595 		{ "RVF", 0, 8 },
16596 	{ "PCIE_FID_VFID", 0x519c, 0 },
16603 		{ "RVF", 0, 8 },
16604 	{ "PCIE_FID_VFID", 0x51a0, 0 },
16611 		{ "RVF", 0, 8 },
16612 	{ "PCIE_FID_VFID", 0x51a4, 0 },
16619 		{ "RVF", 0, 8 },
16620 	{ "PCIE_FID_VFID", 0x51a8, 0 },
16627 		{ "RVF", 0, 8 },
16628 	{ "PCIE_FID_VFID", 0x51ac, 0 },
16635 		{ "RVF", 0, 8 },
16636 	{ "PCIE_FID_VFID", 0x51b0, 0 },
16643 		{ "RVF", 0, 8 },
16644 	{ "PCIE_FID_VFID", 0x51b4, 0 },
16651 		{ "RVF", 0, 8 },
16652 	{ "PCIE_FID_VFID", 0x51b8, 0 },
16659 		{ "RVF", 0, 8 },
16660 	{ "PCIE_FID_VFID", 0x51bc, 0 },
16667 		{ "RVF", 0, 8 },
16668 	{ "PCIE_FID_VFID", 0x51c0, 0 },
16675 		{ "RVF", 0, 8 },
16676 	{ "PCIE_FID_VFID", 0x51c4, 0 },
16683 		{ "RVF", 0, 8 },
16684 	{ "PCIE_FID_VFID", 0x51c8, 0 },
16691 		{ "RVF", 0, 8 },
16692 	{ "PCIE_FID_VFID", 0x51cc, 0 },
16699 		{ "RVF", 0, 8 },
16700 	{ "PCIE_FID_VFID", 0x51d0, 0 },
16707 		{ "RVF", 0, 8 },
16708 	{ "PCIE_FID_VFID", 0x51d4, 0 },
16715 		{ "RVF", 0, 8 },
16716 	{ "PCIE_FID_VFID", 0x51d8, 0 },
16723 		{ "RVF", 0, 8 },
16724 	{ "PCIE_FID_VFID", 0x51dc, 0 },
16731 		{ "RVF", 0, 8 },
16732 	{ "PCIE_FID_VFID", 0x51e0, 0 },
16739 		{ "RVF", 0, 8 },
16740 	{ "PCIE_FID_VFID", 0x51e4, 0 },
16747 		{ "RVF", 0, 8 },
16748 	{ "PCIE_FID_VFID", 0x51e8, 0 },
16755 		{ "RVF", 0, 8 },
16756 	{ "PCIE_FID_VFID", 0x51ec, 0 },
16763 		{ "RVF", 0, 8 },
16764 	{ "PCIE_FID_VFID", 0x51f0, 0 },
16771 		{ "RVF", 0, 8 },
16772 	{ "PCIE_FID_VFID", 0x51f4, 0 },
16779 		{ "RVF", 0, 8 },
16780 	{ "PCIE_FID_VFID", 0x51f8, 0 },
16787 		{ "RVF", 0, 8 },
16788 	{ "PCIE_FID_VFID", 0x51fc, 0 },
16795 		{ "RVF", 0, 8 },
16796 	{ "PCIE_FID_VFID", 0x5200, 0 },
16803 		{ "RVF", 0, 8 },
16804 	{ "PCIE_FID_VFID", 0x5204, 0 },
16811 		{ "RVF", 0, 8 },
16812 	{ "PCIE_FID_VFID", 0x5208, 0 },
16819 		{ "RVF", 0, 8 },
16820 	{ "PCIE_FID_VFID", 0x520c, 0 },
16827 		{ "RVF", 0, 8 },
16828 	{ "PCIE_FID_VFID", 0x5210, 0 },
16835 		{ "RVF", 0, 8 },
16836 	{ "PCIE_FID_VFID", 0x5214, 0 },
16843 		{ "RVF", 0, 8 },
16844 	{ "PCIE_FID_VFID", 0x5218, 0 },
16851 		{ "RVF", 0, 8 },
16852 	{ "PCIE_FID_VFID", 0x521c, 0 },
16859 		{ "RVF", 0, 8 },
16860 	{ "PCIE_FID_VFID", 0x5220, 0 },
16867 		{ "RVF", 0, 8 },
16868 	{ "PCIE_FID_VFID", 0x5224, 0 },
16875 		{ "RVF", 0, 8 },
16876 	{ "PCIE_FID_VFID", 0x5228, 0 },
16883 		{ "RVF", 0, 8 },
16884 	{ "PCIE_FID_VFID", 0x522c, 0 },
16891 		{ "RVF", 0, 8 },
16892 	{ "PCIE_FID_VFID", 0x5230, 0 },
16899 		{ "RVF", 0, 8 },
16900 	{ "PCIE_FID_VFID", 0x5234, 0 },
16907 		{ "RVF", 0, 8 },
16908 	{ "PCIE_FID_VFID", 0x5238, 0 },
16915 		{ "RVF", 0, 8 },
16916 	{ "PCIE_FID_VFID", 0x523c, 0 },
16923 		{ "RVF", 0, 8 },
16924 	{ "PCIE_FID_VFID", 0x5240, 0 },
16931 		{ "RVF", 0, 8 },
16932 	{ "PCIE_FID_VFID", 0x5244, 0 },
16939 		{ "RVF", 0, 8 },
16940 	{ "PCIE_FID_VFID", 0x5248, 0 },
16947 		{ "RVF", 0, 8 },
16948 	{ "PCIE_FID_VFID", 0x524c, 0 },
16955 		{ "RVF", 0, 8 },
16956 	{ "PCIE_FID_VFID", 0x5250, 0 },
16963 		{ "RVF", 0, 8 },
16964 	{ "PCIE_FID_VFID", 0x5254, 0 },
16971 		{ "RVF", 0, 8 },
16972 	{ "PCIE_FID_VFID", 0x5258, 0 },
16979 		{ "RVF", 0, 8 },
16980 	{ "PCIE_FID_VFID", 0x525c, 0 },
16987 		{ "RVF", 0, 8 },
16988 	{ "PCIE_FID_VFID", 0x5260, 0 },
16995 		{ "RVF", 0, 8 },
16996 	{ "PCIE_FID_VFID", 0x5264, 0 },
17003 		{ "RVF", 0, 8 },
17004 	{ "PCIE_FID_VFID", 0x5268, 0 },
17011 		{ "RVF", 0, 8 },
17012 	{ "PCIE_FID_VFID", 0x526c, 0 },
17019 		{ "RVF", 0, 8 },
17020 	{ "PCIE_FID_VFID", 0x5270, 0 },
17027 		{ "RVF", 0, 8 },
17028 	{ "PCIE_FID_VFID", 0x5274, 0 },
17035 		{ "RVF", 0, 8 },
17036 	{ "PCIE_FID_VFID", 0x5278, 0 },
17043 		{ "RVF", 0, 8 },
17044 	{ "PCIE_FID_VFID", 0x527c, 0 },
17051 		{ "RVF", 0, 8 },
17052 	{ "PCIE_FID_VFID", 0x5280, 0 },
17059 		{ "RVF", 0, 8 },
17060 	{ "PCIE_FID_VFID", 0x5284, 0 },
17067 		{ "RVF", 0, 8 },
17068 	{ "PCIE_FID_VFID", 0x5288, 0 },
17075 		{ "RVF", 0, 8 },
17076 	{ "PCIE_FID_VFID", 0x528c, 0 },
17083 		{ "RVF", 0, 8 },
17084 	{ "PCIE_FID_VFID", 0x5290, 0 },
17091 		{ "RVF", 0, 8 },
17092 	{ "PCIE_FID_VFID", 0x5294, 0 },
17099 		{ "RVF", 0, 8 },
17100 	{ "PCIE_FID_VFID", 0x5298, 0 },
17107 		{ "RVF", 0, 8 },
17108 	{ "PCIE_FID_VFID", 0x529c, 0 },
17115 		{ "RVF", 0, 8 },
17116 	{ "PCIE_FID_VFID", 0x52a0, 0 },
17123 		{ "RVF", 0, 8 },
17124 	{ "PCIE_FID_VFID", 0x52a4, 0 },
17131 		{ "RVF", 0, 8 },
17132 	{ "PCIE_FID_VFID", 0x52a8, 0 },
17139 		{ "RVF", 0, 8 },
17140 	{ "PCIE_FID_VFID", 0x52ac, 0 },
17147 		{ "RVF", 0, 8 },
17148 	{ "PCIE_FID_VFID", 0x52b0, 0 },
17155 		{ "RVF", 0, 8 },
17156 	{ "PCIE_FID_VFID", 0x52b4, 0 },
17163 		{ "RVF", 0, 8 },
17164 	{ "PCIE_FID_VFID", 0x52b8, 0 },
17171 		{ "RVF", 0, 8 },
17172 	{ "PCIE_FID_VFID", 0x52bc, 0 },
17179 		{ "RVF", 0, 8 },
17180 	{ "PCIE_FID_VFID", 0x52c0, 0 },
17187 		{ "RVF", 0, 8 },
17188 	{ "PCIE_FID_VFID", 0x52c4, 0 },
17195 		{ "RVF", 0, 8 },
17196 	{ "PCIE_FID_VFID", 0x52c8, 0 },
17203 		{ "RVF", 0, 8 },
17204 	{ "PCIE_FID_VFID", 0x52cc, 0 },
17211 		{ "RVF", 0, 8 },
17212 	{ "PCIE_FID_VFID", 0x52d0, 0 },
17219 		{ "RVF", 0, 8 },
17220 	{ "PCIE_FID_VFID", 0x52d4, 0 },
17227 		{ "RVF", 0, 8 },
17228 	{ "PCIE_FID_VFID", 0x52d8, 0 },
17235 		{ "RVF", 0, 8 },
17236 	{ "PCIE_FID_VFID", 0x52dc, 0 },
17243 		{ "RVF", 0, 8 },
17244 	{ "PCIE_FID_VFID", 0x52e0, 0 },
17251 		{ "RVF", 0, 8 },
17252 	{ "PCIE_FID_VFID", 0x52e4, 0 },
17259 		{ "RVF", 0, 8 },
17260 	{ "PCIE_FID_VFID", 0x52e8, 0 },
17267 		{ "RVF", 0, 8 },
17268 	{ "PCIE_FID_VFID", 0x52ec, 0 },
17275 		{ "RVF", 0, 8 },
17276 	{ "PCIE_FID_VFID", 0x52f0, 0 },
17283 		{ "RVF", 0, 8 },
17284 	{ "PCIE_FID_VFID", 0x52f4, 0 },
17291 		{ "RVF", 0, 8 },
17292 	{ "PCIE_FID_VFID", 0x52f8, 0 },
17299 		{ "RVF", 0, 8 },
17300 	{ "PCIE_FID_VFID", 0x52fc, 0 },
17307 		{ "RVF", 0, 8 },
17308 	{ "PCIE_FID_VFID", 0x5300, 0 },
17315 		{ "RVF", 0, 8 },
17316 	{ "PCIE_FID_VFID", 0x5304, 0 },
17323 		{ "RVF", 0, 8 },
17324 	{ "PCIE_FID_VFID", 0x5308, 0 },
17331 		{ "RVF", 0, 8 },
17332 	{ "PCIE_FID_VFID", 0x530c, 0 },
17339 		{ "RVF", 0, 8 },
17340 	{ "PCIE_FID_VFID", 0x5310, 0 },
17347 		{ "RVF", 0, 8 },
17348 	{ "PCIE_FID_VFID", 0x5314, 0 },
17355 		{ "RVF", 0, 8 },
17356 	{ "PCIE_FID_VFID", 0x5318, 0 },
17363 		{ "RVF", 0, 8 },
17364 	{ "PCIE_FID_VFID", 0x531c, 0 },
17371 		{ "RVF", 0, 8 },
17372 	{ "PCIE_FID_VFID", 0x5320, 0 },
17379 		{ "RVF", 0, 8 },
17380 	{ "PCIE_FID_VFID", 0x5324, 0 },
17387 		{ "RVF", 0, 8 },
17388 	{ "PCIE_FID_VFID", 0x5328, 0 },
17395 		{ "RVF", 0, 8 },
17396 	{ "PCIE_FID_VFID", 0x532c, 0 },
17403 		{ "RVF", 0, 8 },
17404 	{ "PCIE_FID_VFID", 0x5330, 0 },
17411 		{ "RVF", 0, 8 },
17412 	{ "PCIE_FID_VFID", 0x5334, 0 },
17419 		{ "RVF", 0, 8 },
17420 	{ "PCIE_FID_VFID", 0x5338, 0 },
17427 		{ "RVF", 0, 8 },
17428 	{ "PCIE_FID_VFID", 0x533c, 0 },
17435 		{ "RVF", 0, 8 },
17436 	{ "PCIE_FID_VFID", 0x5340, 0 },
17443 		{ "RVF", 0, 8 },
17444 	{ "PCIE_FID_VFID", 0x5344, 0 },
17451 		{ "RVF", 0, 8 },
17452 	{ "PCIE_FID_VFID", 0x5348, 0 },
17459 		{ "RVF", 0, 8 },
17460 	{ "PCIE_FID_VFID", 0x534c, 0 },
17467 		{ "RVF", 0, 8 },
17468 	{ "PCIE_FID_VFID", 0x5350, 0 },
17475 		{ "RVF", 0, 8 },
17476 	{ "PCIE_FID_VFID", 0x5354, 0 },
17483 		{ "RVF", 0, 8 },
17484 	{ "PCIE_FID_VFID", 0x5358, 0 },
17491 		{ "RVF", 0, 8 },
17492 	{ "PCIE_FID_VFID", 0x535c, 0 },
17499 		{ "RVF", 0, 8 },
17500 	{ "PCIE_FID_VFID", 0x5360, 0 },
17507 		{ "RVF", 0, 8 },
17508 	{ "PCIE_FID_VFID", 0x5364, 0 },
17515 		{ "RVF", 0, 8 },
17516 	{ "PCIE_FID_VFID", 0x5368, 0 },
17523 		{ "RVF", 0, 8 },
17524 	{ "PCIE_FID_VFID", 0x536c, 0 },
17531 		{ "RVF", 0, 8 },
17532 	{ "PCIE_FID_VFID", 0x5370, 0 },
17539 		{ "RVF", 0, 8 },
17540 	{ "PCIE_FID_VFID", 0x5374, 0 },
17547 		{ "RVF", 0, 8 },
17548 	{ "PCIE_FID_VFID", 0x5378, 0 },
17555 		{ "RVF", 0, 8 },
17556 	{ "PCIE_FID_VFID", 0x537c, 0 },
17563 		{ "RVF", 0, 8 },
17564 	{ "PCIE_FID_VFID", 0x5380, 0 },
17571 		{ "RVF", 0, 8 },
17572 	{ "PCIE_FID_VFID", 0x5384, 0 },
17579 		{ "RVF", 0, 8 },
17580 	{ "PCIE_FID_VFID", 0x5388, 0 },
17587 		{ "RVF", 0, 8 },
17588 	{ "PCIE_FID_VFID", 0x538c, 0 },
17595 		{ "RVF", 0, 8 },
17596 	{ "PCIE_FID_VFID", 0x5390, 0 },
17603 		{ "RVF", 0, 8 },
17604 	{ "PCIE_FID_VFID", 0x5394, 0 },
17611 		{ "RVF", 0, 8 },
17612 	{ "PCIE_FID_VFID", 0x5398, 0 },
17619 		{ "RVF", 0, 8 },
17620 	{ "PCIE_FID_VFID", 0x539c, 0 },
17627 		{ "RVF", 0, 8 },
17628 	{ "PCIE_FID_VFID", 0x53a0, 0 },
17635 		{ "RVF", 0, 8 },
17636 	{ "PCIE_FID_VFID", 0x53a4, 0 },
17643 		{ "RVF", 0, 8 },
17644 	{ "PCIE_FID_VFID", 0x53a8, 0 },
17651 		{ "RVF", 0, 8 },
17652 	{ "PCIE_FID_VFID", 0x53ac, 0 },
17659 		{ "RVF", 0, 8 },
17660 	{ "PCIE_FID_VFID", 0x53b0, 0 },
17667 		{ "RVF", 0, 8 },
17668 	{ "PCIE_FID_VFID", 0x53b4, 0 },
17675 		{ "RVF", 0, 8 },
17676 	{ "PCIE_FID_VFID", 0x53b8, 0 },
17683 		{ "RVF", 0, 8 },
17684 	{ "PCIE_FID_VFID", 0x53bc, 0 },
17691 		{ "RVF", 0, 8 },
17692 	{ "PCIE_FID_VFID", 0x53c0, 0 },
17699 		{ "RVF", 0, 8 },
17700 	{ "PCIE_FID_VFID", 0x53c4, 0 },
17707 		{ "RVF", 0, 8 },
17708 	{ "PCIE_FID_VFID", 0x53c8, 0 },
17715 		{ "RVF", 0, 8 },
17716 	{ "PCIE_FID_VFID", 0x53cc, 0 },
17723 		{ "RVF", 0, 8 },
17724 	{ "PCIE_FID_VFID", 0x53d0, 0 },
17731 		{ "RVF", 0, 8 },
17732 	{ "PCIE_FID_VFID", 0x53d4, 0 },
17739 		{ "RVF", 0, 8 },
17740 	{ "PCIE_FID_VFID", 0x53d8, 0 },
17747 		{ "RVF", 0, 8 },
17748 	{ "PCIE_FID_VFID", 0x53dc, 0 },
17755 		{ "RVF", 0, 8 },
17756 	{ "PCIE_FID_VFID", 0x53e0, 0 },
17763 		{ "RVF", 0, 8 },
17764 	{ "PCIE_FID_VFID", 0x53e4, 0 },
17771 		{ "RVF", 0, 8 },
17772 	{ "PCIE_FID_VFID", 0x53e8, 0 },
17779 		{ "RVF", 0, 8 },
17780 	{ "PCIE_FID_VFID", 0x53ec, 0 },
17787 		{ "RVF", 0, 8 },
17788 	{ "PCIE_FID_VFID", 0x53f0, 0 },
17795 		{ "RVF", 0, 8 },
17796 	{ "PCIE_FID_VFID", 0x53f4, 0 },
17803 		{ "RVF", 0, 8 },
17804 	{ "PCIE_FID_VFID", 0x53f8, 0 },
17811 		{ "RVF", 0, 8 },
17812 	{ "PCIE_FID_VFID", 0x53fc, 0 },
17819 		{ "RVF", 0, 8 },
17820 	{ "PCIE_FID_VFID", 0x5400, 0 },
17827 		{ "RVF", 0, 8 },
17828 	{ "PCIE_FID_VFID", 0x5404, 0 },
17835 		{ "RVF", 0, 8 },
17836 	{ "PCIE_FID_VFID", 0x5408, 0 },
17843 		{ "RVF", 0, 8 },
17844 	{ "PCIE_FID_VFID", 0x540c, 0 },
17851 		{ "RVF", 0, 8 },
17852 	{ "PCIE_FID_VFID", 0x5410, 0 },
17859 		{ "RVF", 0, 8 },
17860 	{ "PCIE_FID_VFID", 0x5414, 0 },
17867 		{ "RVF", 0, 8 },
17868 	{ "PCIE_FID_VFID", 0x5418, 0 },
17875 		{ "RVF", 0, 8 },
17876 	{ "PCIE_FID_VFID", 0x541c, 0 },
17883 		{ "RVF", 0, 8 },
17884 	{ "PCIE_FID_VFID", 0x5420, 0 },
17891 		{ "RVF", 0, 8 },
17892 	{ "PCIE_FID_VFID", 0x5424, 0 },
17899 		{ "RVF", 0, 8 },
17900 	{ "PCIE_FID_VFID", 0x5428, 0 },
17907 		{ "RVF", 0, 8 },
17908 	{ "PCIE_FID_VFID", 0x542c, 0 },
17915 		{ "RVF", 0, 8 },
17916 	{ "PCIE_FID_VFID", 0x5430, 0 },
17923 		{ "RVF", 0, 8 },
17924 	{ "PCIE_FID_VFID", 0x5434, 0 },
17931 		{ "RVF", 0, 8 },
17932 	{ "PCIE_FID_VFID", 0x5438, 0 },
17939 		{ "RVF", 0, 8 },
17940 	{ "PCIE_FID_VFID", 0x543c, 0 },
17947 		{ "RVF", 0, 8 },
17948 	{ "PCIE_FID_VFID", 0x5440, 0 },
17955 		{ "RVF", 0, 8 },
17956 	{ "PCIE_FID_VFID", 0x5444, 0 },
17963 		{ "RVF", 0, 8 },
17964 	{ "PCIE_FID_VFID", 0x5448, 0 },
17971 		{ "RVF", 0, 8 },
17972 	{ "PCIE_FID_VFID", 0x544c, 0 },
17979 		{ "RVF", 0, 8 },
17980 	{ "PCIE_FID_VFID", 0x5450, 0 },
17987 		{ "RVF", 0, 8 },
17988 	{ "PCIE_FID_VFID", 0x5454, 0 },
17995 		{ "RVF", 0, 8 },
17996 	{ "PCIE_FID_VFID", 0x5458, 0 },
18003 		{ "RVF", 0, 8 },
18004 	{ "PCIE_FID_VFID", 0x545c, 0 },
18011 		{ "RVF", 0, 8 },
18012 	{ "PCIE_FID_VFID", 0x5460, 0 },
18019 		{ "RVF", 0, 8 },
18020 	{ "PCIE_FID_VFID", 0x5464, 0 },
18027 		{ "RVF", 0, 8 },
18028 	{ "PCIE_FID_VFID", 0x5468, 0 },
18035 		{ "RVF", 0, 8 },
18036 	{ "PCIE_FID_VFID", 0x546c, 0 },
18043 		{ "RVF", 0, 8 },
18044 	{ "PCIE_FID_VFID", 0x5470, 0 },
18051 		{ "RVF", 0, 8 },
18052 	{ "PCIE_FID_VFID", 0x5474, 0 },
18059 		{ "RVF", 0, 8 },
18060 	{ "PCIE_FID_VFID", 0x5478, 0 },
18067 		{ "RVF", 0, 8 },
18068 	{ "PCIE_FID_VFID", 0x547c, 0 },
18075 		{ "RVF", 0, 8 },
18076 	{ "PCIE_FID_VFID", 0x5480, 0 },
18083 		{ "RVF", 0, 8 },
18084 	{ "PCIE_FID_VFID", 0x5484, 0 },
18091 		{ "RVF", 0, 8 },
18092 	{ "PCIE_FID_VFID", 0x5488, 0 },
18099 		{ "RVF", 0, 8 },
18100 	{ "PCIE_FID_VFID", 0x548c, 0 },
18107 		{ "RVF", 0, 8 },
18108 	{ "PCIE_FID_VFID", 0x5490, 0 },
18115 		{ "RVF", 0, 8 },
18116 	{ "PCIE_FID_VFID", 0x5494, 0 },
18123 		{ "RVF", 0, 8 },
18124 	{ "PCIE_FID_VFID", 0x5498, 0 },
18131 		{ "RVF", 0, 8 },
18132 	{ "PCIE_FID_VFID", 0x549c, 0 },
18139 		{ "RVF", 0, 8 },
18140 	{ "PCIE_FID_VFID", 0x54a0, 0 },
18147 		{ "RVF", 0, 8 },
18148 	{ "PCIE_FID_VFID", 0x54a4, 0 },
18155 		{ "RVF", 0, 8 },
18156 	{ "PCIE_FID_VFID", 0x54a8, 0 },
18163 		{ "RVF", 0, 8 },
18164 	{ "PCIE_FID_VFID", 0x54ac, 0 },
18171 		{ "RVF", 0, 8 },
18172 	{ "PCIE_FID_VFID", 0x54b0, 0 },
18179 		{ "RVF", 0, 8 },
18180 	{ "PCIE_FID_VFID", 0x54b4, 0 },
18187 		{ "RVF", 0, 8 },
18188 	{ "PCIE_FID_VFID", 0x54b8, 0 },
18195 		{ "RVF", 0, 8 },
18196 	{ "PCIE_FID_VFID", 0x54bc, 0 },
18203 		{ "RVF", 0, 8 },
18204 	{ "PCIE_FID_VFID", 0x54c0, 0 },
18211 		{ "RVF", 0, 8 },
18212 	{ "PCIE_FID_VFID", 0x54c4, 0 },
18219 		{ "RVF", 0, 8 },
18220 	{ "PCIE_FID_VFID", 0x54c8, 0 },
18227 		{ "RVF", 0, 8 },
18228 	{ "PCIE_FID_VFID", 0x54cc, 0 },
18235 		{ "RVF", 0, 8 },
18236 	{ "PCIE_FID_VFID", 0x54d0, 0 },
18243 		{ "RVF", 0, 8 },
18244 	{ "PCIE_FID_VFID", 0x54d4, 0 },
18251 		{ "RVF", 0, 8 },
18252 	{ "PCIE_FID_VFID", 0x54d8, 0 },
18259 		{ "RVF", 0, 8 },
18260 	{ "PCIE_FID_VFID", 0x54dc, 0 },
18267 		{ "RVF", 0, 8 },
18268 	{ "PCIE_FID_VFID", 0x54e0, 0 },
18275 		{ "RVF", 0, 8 },
18276 	{ "PCIE_FID_VFID", 0x54e4, 0 },
18283 		{ "RVF", 0, 8 },
18284 	{ "PCIE_FID_VFID", 0x54e8, 0 },
18291 		{ "RVF", 0, 8 },
18292 	{ "PCIE_FID_VFID", 0x54ec, 0 },
18299 		{ "RVF", 0, 8 },
18300 	{ "PCIE_FID_VFID", 0x54f0, 0 },
18307 		{ "RVF", 0, 8 },
18308 	{ "PCIE_FID_VFID", 0x54f4, 0 },
18315 		{ "RVF", 0, 8 },
18316 	{ "PCIE_FID_VFID", 0x54f8, 0 },
18323 		{ "RVF", 0, 8 },
18324 	{ "PCIE_FID_VFID", 0x54fc, 0 },
18331 		{ "RVF", 0, 8 },
18332 	{ "PCIE_FID_VFID", 0x5500, 0 },
18339 		{ "RVF", 0, 8 },
18340 	{ "PCIE_FID_VFID", 0x5504, 0 },
18347 		{ "RVF", 0, 8 },
18348 	{ "PCIE_FID_VFID", 0x5508, 0 },
18355 		{ "RVF", 0, 8 },
18356 	{ "PCIE_FID_VFID", 0x550c, 0 },
18363 		{ "RVF", 0, 8 },
18364 	{ "PCIE_FID_VFID", 0x5510, 0 },
18371 		{ "RVF", 0, 8 },
18372 	{ "PCIE_FID_VFID", 0x5514, 0 },
18379 		{ "RVF", 0, 8 },
18380 	{ "PCIE_FID_VFID", 0x5518, 0 },
18387 		{ "RVF", 0, 8 },
18388 	{ "PCIE_FID_VFID", 0x551c, 0 },
18395 		{ "RVF", 0, 8 },
18396 	{ "PCIE_FID_VFID", 0x5520, 0 },
18403 		{ "RVF", 0, 8 },
18404 	{ "PCIE_FID_VFID", 0x5524, 0 },
18411 		{ "RVF", 0, 8 },
18412 	{ "PCIE_FID_VFID", 0x5528, 0 },
18419 		{ "RVF", 0, 8 },
18420 	{ "PCIE_FID_VFID", 0x552c, 0 },
18427 		{ "RVF", 0, 8 },
18428 	{ "PCIE_FID_VFID", 0x5530, 0 },
18435 		{ "RVF", 0, 8 },
18436 	{ "PCIE_FID_VFID", 0x5534, 0 },
18443 		{ "RVF", 0, 8 },
18444 	{ "PCIE_FID_VFID", 0x5538, 0 },
18451 		{ "RVF", 0, 8 },
18452 	{ "PCIE_FID_VFID", 0x553c, 0 },
18459 		{ "RVF", 0, 8 },
18460 	{ "PCIE_FID_VFID", 0x5540, 0 },
18467 		{ "RVF", 0, 8 },
18468 	{ "PCIE_FID_VFID", 0x5544, 0 },
18475 		{ "RVF", 0, 8 },
18476 	{ "PCIE_FID_VFID", 0x5548, 0 },
18483 		{ "RVF", 0, 8 },
18484 	{ "PCIE_FID_VFID", 0x554c, 0 },
18491 		{ "RVF", 0, 8 },
18492 	{ "PCIE_FID_VFID", 0x5550, 0 },
18499 		{ "RVF", 0, 8 },
18500 	{ "PCIE_FID_VFID", 0x5554, 0 },
18507 		{ "RVF", 0, 8 },
18508 	{ "PCIE_FID_VFID", 0x5558, 0 },
18515 		{ "RVF", 0, 8 },
18516 	{ "PCIE_FID_VFID", 0x555c, 0 },
18523 		{ "RVF", 0, 8 },
18524 	{ "PCIE_FID_VFID", 0x5560, 0 },
18531 		{ "RVF", 0, 8 },
18532 	{ "PCIE_FID_VFID", 0x5564, 0 },
18539 		{ "RVF", 0, 8 },
18540 	{ "PCIE_FID_VFID", 0x5568, 0 },
18547 		{ "RVF", 0, 8 },
18548 	{ "PCIE_FID_VFID", 0x556c, 0 },
18555 		{ "RVF", 0, 8 },
18556 	{ "PCIE_FID_VFID", 0x5570, 0 },
18563 		{ "RVF", 0, 8 },
18564 	{ "PCIE_FID_VFID", 0x5574, 0 },
18571 		{ "RVF", 0, 8 },
18572 	{ "PCIE_FID_VFID", 0x5578, 0 },
18579 		{ "RVF", 0, 8 },
18580 	{ "PCIE_FID_VFID", 0x557c, 0 },
18587 		{ "RVF", 0, 8 },
18588 	{ "PCIE_FID_VFID", 0x5580, 0 },
18595 		{ "RVF", 0, 8 },
18596 	{ "PCIE_FID_VFID", 0x5584, 0 },
18603 		{ "RVF", 0, 8 },
18604 	{ "PCIE_FID_VFID", 0x5588, 0 },
18611 		{ "RVF", 0, 8 },
18612 	{ "PCIE_FID_VFID", 0x558c, 0 },
18619 		{ "RVF", 0, 8 },
18620 	{ "PCIE_FID_VFID", 0x5590, 0 },
18627 		{ "RVF", 0, 8 },
18628 	{ "PCIE_FID_VFID", 0x5594, 0 },
18635 		{ "RVF", 0, 8 },
18636 	{ "PCIE_FID_VFID", 0x5598, 0 },
18643 		{ "RVF", 0, 8 },
18644 	{ "PCIE_FID_VFID", 0x559c, 0 },
18651 		{ "RVF", 0, 8 },
18652 	{ "PCIE_FID_VFID", 0x55a0, 0 },
18659 		{ "RVF", 0, 8 },
18660 	{ "PCIE_FID_VFID", 0x55a4, 0 },
18667 		{ "RVF", 0, 8 },
18668 	{ "PCIE_FID_VFID", 0x55a8, 0 },
18675 		{ "RVF", 0, 8 },
18676 	{ "PCIE_FID_VFID", 0x55ac, 0 },
18683 		{ "RVF", 0, 8 },
18684 	{ "PCIE_FID_VFID", 0x55b0, 0 },
18691 		{ "RVF", 0, 8 },
18692 	{ "PCIE_FID_VFID", 0x55b4, 0 },
18699 		{ "RVF", 0, 8 },
18700 	{ "PCIE_FID_VFID", 0x55b8, 0 },
18707 		{ "RVF", 0, 8 },
18708 	{ "PCIE_FID_VFID", 0x55bc, 0 },
18715 		{ "RVF", 0, 8 },
18716 	{ "PCIE_FID_VFID", 0x55c0, 0 },
18723 		{ "RVF", 0, 8 },
18724 	{ "PCIE_FID_VFID", 0x55c4, 0 },
18731 		{ "RVF", 0, 8 },
18732 	{ "PCIE_FID_VFID", 0x55c8, 0 },
18739 		{ "RVF", 0, 8 },
18740 	{ "PCIE_FID_VFID", 0x55cc, 0 },
18747 		{ "RVF", 0, 8 },
18748 	{ "PCIE_FID_VFID", 0x55d0, 0 },
18755 		{ "RVF", 0, 8 },
18756 	{ "PCIE_FID_VFID", 0x55d4, 0 },
18763 		{ "RVF", 0, 8 },
18764 	{ "PCIE_FID_VFID", 0x55d8, 0 },
18771 		{ "RVF", 0, 8 },
18772 	{ "PCIE_FID_VFID", 0x55dc, 0 },
18779 		{ "RVF", 0, 8 },
18780 	{ "PCIE_FID_VFID", 0x55e0, 0 },
18787 		{ "RVF", 0, 8 },
18788 	{ "PCIE_FID_VFID", 0x55e4, 0 },
18795 		{ "RVF", 0, 8 },
18796 	{ "PCIE_FID_VFID", 0x55e8, 0 },
18803 		{ "RVF", 0, 8 },
18804 	{ "PCIE_FID_VFID", 0x55ec, 0 },
18811 		{ "RVF", 0, 8 },
18812 	{ "PCIE_FID_VFID", 0x55f0, 0 },
18819 		{ "RVF", 0, 8 },
18820 	{ "PCIE_FID_VFID", 0x55f4, 0 },
18827 		{ "RVF", 0, 8 },
18828 	{ "PCIE_FID_VFID", 0x55f8, 0 },
18835 		{ "RVF", 0, 8 },
18836 	{ "PCIE_FID_VFID", 0x55fc, 0 },
18843 		{ "RVF", 0, 8 },
18844 	{ "PCIE_COOKIE_STAT", 0x5600, 0 },
18846 		{ "CookieA", 0, 10 },
18847 	{ "PCIE_COOKIE_STAT", 0x5604, 0 },
18849 		{ "CookieA", 0, 10 },
18850 	{ "PCIE_COOKIE_STAT", 0x5608, 0 },
18852 		{ "CookieA", 0, 10 },
18853 	{ "PCIE_COOKIE_STAT", 0x560c, 0 },
18855 		{ "CookieA", 0, 10 },
18856 	{ "PCIE_COOKIE_STAT", 0x5610, 0 },
18858 		{ "CookieA", 0, 10 },
18859 	{ "PCIE_COOKIE_STAT", 0x5614, 0 },
18861 		{ "CookieA", 0, 10 },
18862 	{ "PCIE_COOKIE_STAT", 0x5618, 0 },
18864 		{ "CookieA", 0, 10 },
18865 	{ "PCIE_COOKIE_STAT", 0x561c, 0 },
18867 		{ "CookieA", 0, 10 },
18868 	{ "PCIE_FLR_PIO", 0x5620, 0 },
18872 		{ "ExpdCookie", 0, 8 },
18873 	{ "PCIE_FLR_PIO2", 0x5624, 0 },
18877 		{ "RcvdPIOReqCookie", 0, 8 },
18878 	{ "PCIE_VC0_CDTS0", 0x56cc, 0 },
18881 		{ "PD0", 0, 12 },
18882 	{ "PCIE_VC0_CDTS1", 0x56d0, 0 },
18885 		{ "NPD0", 0, 12 },
18886 	{ "PCIE_VC1_CDTS0", 0x56d4, 0 },
18889 		{ "PD1", 0, 12 },
18890 	{ "PCIE_VC1_CDTS1", 0x56d8, 0 },
18893 		{ "NPD1", 0, 12 },
18894 	{ "PCIE_FLR_PF_STATUS", 0x56dc, 0 },
18895 	{ "PCIE_FLR_VF0_STATUS", 0x56e0, 0 },
18896 	{ "PCIE_FLR_VF1_STATUS", 0x56e4, 0 },
18897 	{ "PCIE_FLR_VF2_STATUS", 0x56e8, 0 },
18898 	{ "PCIE_FLR_VF3_STATUS", 0x56ec, 0 },
18899 	{ "PCIE_STAT", 0x56f4, 0 },
18904 		{ "StateCfgInit", 0, 4 },
18905 	{ "PCIE_CRS", 0x56f8, 0 },
18906 	{ "PCIE_LTSSM", 0x56fc, 0 },
18908 		{ "Enable", 0, 1 },
18909 	{ "PCIE_PF_CFG", 0x1e040, 0 },
18913 		{ "CLIDecEn", 0, 1 },
18914 	{ "PCIE_PF_CLI", 0x1e044, 0 },
18915 	{ "PCIE_PF_EXPROM_OFST", 0x1e04c, 0 },
18917 	{ "PCIE_PF_CFG", 0x1e440, 0 },
18921 		{ "CLIDecEn", 0, 1 },
18922 	{ "PCIE_PF_CLI", 0x1e444, 0 },
18923 	{ "PCIE_PF_EXPROM_OFST", 0x1e44c, 0 },
18925 	{ "PCIE_PF_CFG", 0x1e840, 0 },
18929 		{ "CLIDecEn", 0, 1 },
18930 	{ "PCIE_PF_CLI", 0x1e844, 0 },
18931 	{ "PCIE_PF_EXPROM_OFST", 0x1e84c, 0 },
18933 	{ "PCIE_PF_CFG", 0x1ec40, 0 },
18937 		{ "CLIDecEn", 0, 1 },
18938 	{ "PCIE_PF_CLI", 0x1ec44, 0 },
18939 	{ "PCIE_PF_EXPROM_OFST", 0x1ec4c, 0 },
18941 	{ "PCIE_PF_CFG", 0x1f040, 0 },
18945 		{ "CLIDecEn", 0, 1 },
18946 	{ "PCIE_PF_CLI", 0x1f044, 0 },
18947 	{ "PCIE_PF_EXPROM_OFST", 0x1f04c, 0 },
18949 	{ "PCIE_PF_CFG", 0x1f440, 0 },
18953 		{ "CLIDecEn", 0, 1 },
18954 	{ "PCIE_PF_CLI", 0x1f444, 0 },
18955 	{ "PCIE_PF_EXPROM_OFST", 0x1f44c, 0 },
18957 	{ "PCIE_PF_CFG", 0x1f840, 0 },
18961 		{ "CLIDecEn", 0, 1 },
18962 	{ "PCIE_PF_CLI", 0x1f844, 0 },
18963 	{ "PCIE_PF_EXPROM_OFST", 0x1f84c, 0 },
18965 	{ "PCIE_PF_CFG", 0x1fc40, 0 },
18969 		{ "CLIDecEn", 0, 1 },
18970 	{ "PCIE_PF_CLI", 0x1fc44, 0 },
18971 	{ "PCIE_PF_EXPROM_OFST", 0x1fc4c, 0 },
18973 	{ "PCIE_CORE_ACK_LATENCY_TIMER_REPLAY_TIMER", 0x5700, 0 },
18975 		{ "Ack_Latency_Timer_Limit", 0, 16 },
18976 	{ "PCIE_CORE_VENDOR_SPECIFIC_DLLP", 0x5704, 0 },
18977 	{ "PCIE_CORE_PORT_FORCE_LINK", 0x5708, 0 },
18981 		{ "Link_Number", 0, 8 },
18982 	{ "PCIE_CORE_ACK_FREQUENCY_L0L1_ASPM_CONTROL", 0x570c, 0 },
18988 		{ "Ack_Frequency", 0, 8 },
18989 	{ "PCIE_CORE_PORT_LINK_CONTROL", 0x5710, 0 },
18998 		{ "Vendor_Specific_DLLP_Request", 0, 1 },
18999 	{ "PCIE_CORE_LANE_SKEW", 0x5714, 0 },
19003 		{ "Insert_TxSkew", 0, 24 },
19004 	{ "PCIE_CORE_SYMBOL_NUMBER", 0x5718, 0 },
19007 		{ "MaxFunc", 0, 3 },
19008 	{ "PCIE_CORE_SYMBOL_TIMER_FILTER_MASK1", 0x571c, 0 },
19011 		{ "SKP_Interval", 0, 11 },
19012 	{ "PCIE_CORE_FILTER_MASK2", 0x5720, 0 },
19013 	{ "PCIE_CORE_DEBUG_0", 0x5728, 0 },
19014 	{ "PCIE_CORE_DEBUG_1", 0x572c, 0 },
19015 	{ "PCIE_CORE_TRANSMIT_POSTED_FC_CREDIT_STATUS", 0x5730, 0 },
19017 		{ "TxPD_FC", 0, 12 },
19018 	{ "PCIE_CORE_TRANSMIT_NONPOSTED_FC_CREDIT_STATUS", 0x5734, 0 },
19020 		{ "TxNPD_FC", 0, 12 },
19021 	{ "PCIE_CORE_TRANSMIT_COMPLETION_FC_CREDIT_STATUS", 0x5738, 0 },
19023 		{ "TxCPLD_FC", 0, 12 },
19024 	{ "PCIE_CORE_QUEUE_STATUS", 0x573c, 0 },
19027 		{ "RxTLP_FC_Not_Returned", 0, 1 },
19028 	{ "PCIE_CORE_VC_TRANSMIT_ARBITRATION_1", 0x5740, 0 },
19032 		{ "VC0_WRR", 0, 8 },
19033 	{ "PCIE_CORE_VC_TRANSMIT_ARBITRATION_2", 0x5744, 0 },
19037 		{ "VC4_WRR", 0, 8 },
19038 	{ "PCIE_CORE_VC0_POSTED_RECEIVE_QUEUE_CONTROL", 0x5748, 0 },
19043 		{ "VC0_PD_Credits", 0, 12 },
19044 	{ "PCIE_CORE_VC0_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x574c, 0 },
19047 		{ "VC0_NPD_Credits", 0, 12 },
19048 	{ "PCIE_CORE_VC0_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x5750, 0 },
19051 		{ "VC0_CPLD_Credits", 0, 12 },
19052 	{ "PCIE_CORE_VC1_POSTED_RECEIVE_QUEUE_CONTROL", 0x5754, 0 },
19056 		{ "VC1_PD_Credits", 0, 12 },
19057 	{ "PCIE_CORE_VC1_NONPOSTED_RECEIVE_QUEUE_CONTROL", 0x5758, 0 },
19060 		{ "VC1_NPD_Credits", 0, 12 },
19061 	{ "PCIE_CORE_VC1_COMPLETION_RECEIVE_QUEUE_CONTROL", 0x575c, 0 },
19064 		{ "VC1_CPLD_Credits", 0, 12 },
19065 	{ "PCIE_CORE_LINK_WIDTH_SPEED_CHANGE", 0x580c, 0 },
19072 		{ "NFTS_Gen2_3", 0, 8 },
19073 	{ "PCIE_CORE_PHY_STATUS", 0x5810, 0 },
19074 	{ "PCIE_CORE_PHY_CONTROL", 0x5814, 0 },
19075 	{ "PCIE_CORE_GEN3_CONTROL", 0x5890, 0 },
19083 	{ "PCIE_CORE_GEN3_EQ_FS_LF", 0x5894, 0 },
19085 		{ "Low_Frequency", 0, 6 },
19086 	{ "PCIE_CORE_GEN3_EQ_PRESET_COEFF", 0x5898, 0 },
19089 		{ "PreCursor", 0, 6 },
19090 	{ "PCIE_CORE_GEN3_EQ_PRESET_INDEX", 0x589c, 0 },
19091 	{ "PCIE_CORE_GEN3_EQ_STATUS", 0x58a4, 0 },
19092 	{ "PCIE_CORE_GEN3_EQ_CONTROL", 0x58a8, 0 },
19097 		{ "Feedback_Mode", 0, 4 },
19098 	{ "PCIE_CORE_GEN3_EQ_DIRCHANGE_FEEDBACK", 0x58ac, 0 },
19102 		{ "EQMasterPhase_MinTime", 0, 5 },
19103 	{ "PCIE_CORE_PIPE_CONTROL", 0x58b8, 0 },
19105 	{ "PCIE_CORE_DBI_RO_WE", 0x58bc, 0 },
19106 	{ "PCIE_DMA_CFG", 0x5940, 0 },
19112 		{ "MinTag", 0, 8 },
19113 	{ "PCIE_DMA_STAT", 0x5944, 0 },
19116 		{ "WrReqCnt", 0, 9 },
19117 	{ "PCIE_DMA_STAT2", 0x5948, 0 },
19123 		{ "RdSOPCnt", 0, 8 },
19124 	{ "PCIE_DMA_STAT3", 0x594c, 0 },
19129 		{ "RspSOPCnt", 0, 8 },
19130 	{ "PCIE_DMA_CFG", 0x5950, 0 },
19136 		{ "MinTag", 0, 8 },
19137 	{ "PCIE_DMA_STAT", 0x5954, 0 },
19140 		{ "WrReqCnt", 0, 9 },
19141 	{ "PCIE_DMA_STAT2", 0x5958, 0 },
19147 		{ "RdSOPCnt", 0, 8 },
19148 	{ "PCIE_DMA_STAT3", 0x595c, 0 },
19153 		{ "RspSOPCnt", 0, 8 },
19154 	{ "PCIE_CMD_CFG", 0x5980, 0 },
19158 		{ "MinTag", 0, 8 },
19159 	{ "PCIE_CMD_STAT", 0x5984, 0 },
19162 	{ "PCIE_CMD_STAT2", 0x5988, 0 },
19163 	{ "PCIE_CMD_STAT3", 0x598c, 0 },
19166 		{ "RspSOPCnt", 0, 8 },
19167 	{ "PCIE_HMA_CFG", 0x59b0, 0 },
19173 		{ "MinTag", 0, 8 },
19174 	{ "PCIE_HMA_STAT", 0x59b4, 0 },
19177 		{ "WrReqCnt", 0, 9 },
19178 	{ "PCIE_HMA_STAT2", 0x59b8, 0 },
19183 		{ "RdSOPCnt", 0, 8 },
19184 	{ "PCIE_HMA_STAT3", 0x59bc, 0 },
19187 		{ "RspSOPCnt", 0, 8 },
19188 	{ "PCIE_CGEN", 0x59c0, 0 },
19207 		{ "STI_SleepReq", 0, 1 },
19208 	{ "PCIE_MA_RSP", 0x59c4, 0 },
19211 		{ "TimerEn", 0, 1 },
19212 	{ "PCIE_HPRD", 0x59c8, 0 },
19221 		{ "EnableVC1", 0, 1 },
19222 	{ "PCIE_PERR_GROUP", 0x59d0, 0 },
19246 		{ "PIOCpl_PLMRspPerr", 0, 1 },
19247 	{ "PCIE_RSP_ERR_INT_LOG_EN", 0x59d4, 0 },
19257 		{ "ReqUnderFLRLogEn", 0, 1 },
19258 	{ "PCIE_RSP_ERR_LOG1", 0x59d8, 0 },
19264 		{ "CplStatus", 0, 3 },
19265 	{ "PCIE_RSP_ERR_LOG2", 0x59dc, 0 },
19268 		{ "VFID", 0, 9 },
19269 	{ "PCIE_REVISION", 0x5a00, 0 },
19270 	{ "PCIE_PDEBUG_INDEX", 0x5a04, 0 },
19272 		{ "PDEBUGSelL", 0, 7 },
19273 	{ "PCIE_PDEBUG_DATA_HIGH", 0x5a08, 0 },
19274 	{ "PCIE_PDEBUG_DATA_LOW", 0x5a0c, 0 },
19275 	{ "PCIE_CDEBUG_INDEX", 0x5a10, 0 },
19277 		{ "CDEBUGSelL", 0, 8 },
19278 	{ "PCIE_CDEBUG_DATA_HIGH", 0x5a14, 0 },
19279 	{ "PCIE_CDEBUG_DATA_LOW", 0x5a18, 0 },
19280 	{ "PCIE_BUS_MST_STAT_0", 0x5a60, 0 },
19281 	{ "PCIE_BUS_MST_STAT_1", 0x5a64, 0 },
19282 	{ "PCIE_BUS_MST_STAT_2", 0x5a68, 0 },
19283 	{ "PCIE_BUS_MST_STAT_3", 0x5a6c, 0 },
19284 	{ "PCIE_RSP_ERR_STAT_0", 0x5a80, 0 },
19285 	{ "PCIE_RSP_ERR_STAT_1", 0x5a84, 0 },
19286 	{ "PCIE_RSP_ERR_STAT_2", 0x5a88, 0 },
19287 	{ "PCIE_RSP_ERR_STAT_3", 0x5a8c, 0 },
19288 	{ "PCIE_DBI_TIMEOUT_CTL", 0x5a94, 0 },
19289 	{ "PCIE_DBI_TIMEOUT_STATUS0", 0x5a98, 0 },
19290 	{ "PCIE_DBI_TIMEOUT_STATUS1", 0x5a9c, 0 },
19297 		{ "VF", 0, 8 },
19298 	{ "PCIE_PB_CTL", 0x5b94, 0 },
19301 		{ "PB_Func", 0, 3 },
19302 	{ "PCIE_PB_DATA", 0x5b98, 0 },
19303 	{ "PCIE_CHANGESET", 0x59fc, 0 },
19304 	{ "PCIE_CUR_LINK", 0x5b9c, 0 },
19315 		{ "ActiveLanes", 0, 8 },
19316 	{ "PCIE_PHY_REQRXPWR", 0x5ba0, 0 },
19340 		{ "Req_LnA_RxPwrState", 0, 2 },
19341 	{ "PCIE_PHY_CURRXPWR", 0x5ba4, 0 },
19349 		{ "Cur_LnA_RxPwrState", 0, 3 },
19350 	{ "PCIE_PHY_GEN3_AE0", 0x5ba8, 0 },
19358 		{ "LnA_CMD", 0, 3 },
19359 	{ "PCIE_PHY_GEN3_AE1", 0x5bac, 0 },
19367 		{ "LnE_CMD", 0, 3 },
19368 	{ "PCIE_PHY_FS_LF0", 0x5bb0, 0 },
19372 		{ "Lane0FS", 0, 6 },
19373 	{ "PCIE_PHY_FS_LF1", 0x5bb4, 0 },
19377 		{ "Lane2FS", 0, 6 },
19378 	{ "PCIE_PHY_FS_LF2", 0x5bb8, 0 },
19382 		{ "Lane4FS", 0, 6 },
19383 	{ "PCIE_PHY_FS_LF3", 0x5bbc, 0 },
19387 		{ "Lane6FS", 0, 6 },
19388 	{ "PCIE_PHY_PRESET_REQ", 0x5bc0, 0 },
19391 		{ "CoeffStart", 0, 1 },
19392 	{ "PCIE_PHY_PRESET_COEFF", 0x5bc4, 0 },
19393 	{ "PCIE_PHY_PRESET_COEFF", 0x5bc8, 0 },
19394 	{ "PCIE_PHY_PRESET_COEFF", 0x5bcc, 0 },
19395 	{ "PCIE_PHY_PRESET_COEFF", 0x5bd0, 0 },
19396 	{ "PCIE_PHY_PRESET_COEFF", 0x5bd4, 0 },
19397 	{ "PCIE_PHY_PRESET_COEFF", 0x5bd8, 0 },
19398 	{ "PCIE_PHY_PRESET_COEFF", 0x5bdc, 0 },
19399 	{ "PCIE_PHY_PRESET_COEFF", 0x5be0, 0 },
19400 	{ "PCIE_PHY_PRESET_COEFF", 0x5be4, 0 },
19401 	{ "PCIE_PHY_PRESET_COEFF", 0x5be8, 0 },
19402 	{ "PCIE_PHY_PRESET_COEFF", 0x5bec, 0 },
19403 	{ "PCIE_PHY_INDIR_REQ", 0x5bf0, 0 },
19405 		{ "RegAddr", 0, 16 },
19406 	{ "PCIE_PHY_INDIR_DATA", 0x5bf4, 0 },
19407 	{ "PCIE_STATIC_SPARE1", 0x5bf8, 0 },
19408 	{ "PCIE_STATIC_SPARE2", 0x5bfc, 0 },
19409 	{ "PCIE_KDOORBELL_GTS_PF_BASE_LEN", 0x5c10, 0 },
19411 		{ "KDB_PF_BaseAddr", 0, 20 },
19412 	{ "PCIE_KDOORBELL_GTS_VF_BASE_LEN", 0x5c14, 0 },
19414 		{ "KDB_VF_BaseAddr", 0, 20 },
19415 	{ "PCIE_KDOORBELL_GTS_VF_OFFSET", 0x5c18, 0 },
19416 	{ "PCIE_PHY_REQRXPWR1", 0x5c1c, 0 },
19440 		{ "Req_LnI_RxPwrState", 0, 2 },
19441 	{ "PCIE_PHY_CURRXPWR1", 0x5c20, 0 },
19449 		{ "Cur_LnI_RxPwrState", 0, 3 },
19450 	{ "PCIE_PHY_GEN3_AE2", 0x5c24, 0 },
19458 		{ "LnI_CMD", 0, 3 },
19459 	{ "PCIE_PHY_GEN3_AE3", 0x5c28, 0 },
19467 		{ "LnM_CMD", 0, 3 },
19468 	{ "PCIE_PHY_FS_LF4", 0x5c2c, 0 },
19472 		{ "Lane8FS", 0, 6 },
19473 	{ "PCIE_PHY_FS_LF5", 0x5c30, 0 },
19477 		{ "Lane10FS", 0, 6 },
19478 	{ "PCIE_PHY_FS_LF6", 0x5c34, 0 },
19482 		{ "Lane12FS", 0, 6 },
19483 	{ "PCIE_PHY_FS_LF7", 0x5c38, 0 },
19487 		{ "Lane14FS", 0, 6 },
19488 	{ "PCIE_MULTI_PHY_INDIR_REQ", 0x5c3c, 0 },
19491 		{ "Phy_Reg_RegAddr", 0, 16 },
19492 	{ "PCIE_MULTI_PHY_INDIR_DATA", 0x5c40, 0 },
19493 	{ "PCIE_VF_INT_INDIR_REQ", 0x5c44, 0 },
19496 		{ "VFID", 0, 10 },
19497 	{ "PCIE_VF_INT_INDIR_DATA", 0x5c48, 0 },
19499 		{ "VecBase", 0, 11 },
19500 	{ "PCIE_VF_256_INT_CFG2", 0x5c4c, 0 },
19504 	{ "PCIE_VF_256_INT_CFG2", 0x5c50, 0 },
19508 	{ "PCIE_VF_256_INT_CFG2", 0x5c54, 0 },
19512 	{ "PCIE_VF_256_INT_CFG2", 0x5c58, 0 },
19516 	{ "PCIE_VF_256_INT_CFG2", 0x5c5c, 0 },
19520 	{ "PCIE_VF_256_INT_CFG2", 0x5c60, 0 },
19524 	{ "PCIE_VF_256_INT_CFG2", 0x5c64, 0 },
19528 	{ "PCIE_VF_256_INT_CFG2", 0x5c68, 0 },
19532 	{ "PCIE_VF_256_INT_CFG2", 0x5c6c, 0 },
19536 	{ "PCIE_VF_256_INT_CFG2", 0x5c70, 0 },
19540 	{ "PCIE_VF_256_INT_CFG2", 0x5c74, 0 },
19544 	{ "PCIE_VF_256_INT_CFG2", 0x5c78, 0 },
19548 	{ "PCIE_VF_256_INT_CFG2", 0x5c7c, 0 },
19552 	{ "PCIE_VF_256_INT_CFG2", 0x5c80, 0 },
19556 	{ "PCIE_VF_256_INT_CFG2", 0x5c84, 0 },
19560 	{ "PCIE_VF_256_INT_CFG2", 0x5c88, 0 },
19564 	{ "PCIE_VF_256_INT_CFG2", 0x5c8c, 0 },
19568 	{ "PCIE_VF_256_INT_CFG2", 0x5c90, 0 },
19572 	{ "PCIE_VF_256_INT_CFG2", 0x5c94, 0 },
19576 	{ "PCIE_VF_256_INT_CFG2", 0x5c98, 0 },
19580 	{ "PCIE_VF_256_INT_CFG2", 0x5c9c, 0 },
19584 	{ "PCIE_VF_256_INT_CFG2", 0x5ca0, 0 },
19588 	{ "PCIE_VF_256_INT_CFG2", 0x5ca4, 0 },
19592 	{ "PCIE_VF_256_INT_CFG2", 0x5ca8, 0 },
19596 	{ "PCIE_VF_256_INT_CFG2", 0x5cac, 0 },
19600 	{ "PCIE_VF_256_INT_CFG2", 0x5cb0, 0 },
19604 	{ "PCIE_VF_256_INT_CFG2", 0x5cb4, 0 },
19608 	{ "PCIE_VF_256_INT_CFG2", 0x5cb8, 0 },
19612 	{ "PCIE_VF_256_INT_CFG2", 0x5cbc, 0 },
19616 	{ "PCIE_VF_256_INT_CFG2", 0x5cc0, 0 },
19620 	{ "PCIE_VF_256_INT_CFG2", 0x5cc4, 0 },
19624 	{ "PCIE_VF_256_INT_CFG2", 0x5cc8, 0 },
19628 	{ "PCIE_VF_256_INT_CFG2", 0x5ccc, 0 },
19632 	{ "PCIE_VF_256_INT_CFG2", 0x5cd0, 0 },
19636 	{ "PCIE_VF_256_INT_CFG2", 0x5cd4, 0 },
19640 	{ "PCIE_VF_256_INT_CFG2", 0x5cd8, 0 },
19644 	{ "PCIE_VF_256_INT_CFG2", 0x5cdc, 0 },
19648 	{ "PCIE_VF_256_INT_CFG2", 0x5ce0, 0 },
19652 	{ "PCIE_VF_256_INT_CFG2", 0x5ce4, 0 },
19656 	{ "PCIE_VF_256_INT_CFG2", 0x5ce8, 0 },
19660 	{ "PCIE_VF_256_INT_CFG2", 0x5cec, 0 },
19664 	{ "PCIE_VF_256_INT_CFG2", 0x5cf0, 0 },
19668 	{ "PCIE_VF_256_INT_CFG2", 0x5cf4, 0 },
19672 	{ "PCIE_VF_256_INT_CFG2", 0x5cf8, 0 },
19676 	{ "PCIE_VF_256_INT_CFG2", 0x5cfc, 0 },
19680 	{ "PCIE_VF_256_INT_CFG2", 0x5d00, 0 },
19684 	{ "PCIE_VF_256_INT_CFG2", 0x5d04, 0 },
19688 	{ "PCIE_VF_256_INT_CFG2", 0x5d08, 0 },
19692 	{ "PCIE_VF_256_INT_CFG2", 0x5d0c, 0 },
19696 	{ "PCIE_VF_256_INT_CFG2", 0x5d10, 0 },
19700 	{ "PCIE_VF_256_INT_CFG2", 0x5d14, 0 },
19704 	{ "PCIE_VF_256_INT_CFG2", 0x5d18, 0 },
19708 	{ "PCIE_VF_256_INT_CFG2", 0x5d1c, 0 },
19712 	{ "PCIE_VF_256_INT_CFG2", 0x5d20, 0 },
19716 	{ "PCIE_VF_256_INT_CFG2", 0x5d24, 0 },
19720 	{ "PCIE_VF_256_INT_CFG2", 0x5d28, 0 },
19724 	{ "PCIE_VF_256_INT_CFG2", 0x5d2c, 0 },
19728 	{ "PCIE_VF_256_INT_CFG2", 0x5d30, 0 },
19732 	{ "PCIE_VF_256_INT_CFG2", 0x5d34, 0 },
19736 	{ "PCIE_VF_256_INT_CFG2", 0x5d38, 0 },
19740 	{ "PCIE_VF_256_INT_CFG2", 0x5d3c, 0 },
19744 	{ "PCIE_VF_256_INT_CFG2", 0x5d40, 0 },
19748 	{ "PCIE_VF_256_INT_CFG2", 0x5d44, 0 },
19752 	{ "PCIE_VF_256_INT_CFG2", 0x5d48, 0 },
19756 	{ "PCIE_VF_256_INT_CFG2", 0x5d4c, 0 },
19760 	{ "PCIE_VF_256_INT_CFG2", 0x5d50, 0 },
19764 	{ "PCIE_VF_256_INT_CFG2", 0x5d54, 0 },
19768 	{ "PCIE_VF_256_INT_CFG2", 0x5d58, 0 },
19772 	{ "PCIE_VF_256_INT_CFG2", 0x5d5c, 0 },
19776 	{ "PCIE_VF_256_INT_CFG2", 0x5d60, 0 },
19780 	{ "PCIE_VF_256_INT_CFG2", 0x5d64, 0 },
19784 	{ "PCIE_VF_256_INT_CFG2", 0x5d68, 0 },
19788 	{ "PCIE_VF_256_INT_CFG2", 0x5d6c, 0 },
19792 	{ "PCIE_VF_256_INT_CFG2", 0x5d70, 0 },
19796 	{ "PCIE_VF_256_INT_CFG2", 0x5d74, 0 },
19800 	{ "PCIE_VF_256_INT_CFG2", 0x5d78, 0 },
19804 	{ "PCIE_VF_256_INT_CFG2", 0x5d7c, 0 },
19808 	{ "PCIE_VF_256_INT_CFG2", 0x5d80, 0 },
19812 	{ "PCIE_VF_256_INT_CFG2", 0x5d84, 0 },
19816 	{ "PCIE_VF_256_INT_CFG2", 0x5d88, 0 },
19820 	{ "PCIE_VF_256_INT_CFG2", 0x5d8c, 0 },
19824 	{ "PCIE_VF_256_INT_CFG2", 0x5d90, 0 },
19828 	{ "PCIE_VF_256_INT_CFG2", 0x5d94, 0 },
19832 	{ "PCIE_VF_256_INT_CFG2", 0x5d98, 0 },
19836 	{ "PCIE_VF_256_INT_CFG2", 0x5d9c, 0 },
19840 	{ "PCIE_VF_256_INT_CFG2", 0x5da0, 0 },
19844 	{ "PCIE_VF_256_INT_CFG2", 0x5da4, 0 },
19848 	{ "PCIE_VF_256_INT_CFG2", 0x5da8, 0 },
19852 	{ "PCIE_VF_256_INT_CFG2", 0x5dac, 0 },
19856 	{ "PCIE_VF_256_INT_CFG2", 0x5db0, 0 },
19860 	{ "PCIE_VF_256_INT_CFG2", 0x5db4, 0 },
19864 	{ "PCIE_VF_256_INT_CFG2", 0x5db8, 0 },
19868 	{ "PCIE_VF_256_INT_CFG2", 0x5dbc, 0 },
19872 	{ "PCIE_VF_256_INT_CFG2", 0x5dc0, 0 },
19876 	{ "PCIE_VF_256_INT_CFG2", 0x5dc4, 0 },
19880 	{ "PCIE_VF_256_INT_CFG2", 0x5dc8, 0 },
19884 	{ "PCIE_VF_256_INT_CFG2", 0x5dcc, 0 },
19888 	{ "PCIE_VF_256_INT_CFG2", 0x5dd0, 0 },
19892 	{ "PCIE_VF_256_INT_CFG2", 0x5dd4, 0 },
19896 	{ "PCIE_VF_256_INT_CFG2", 0x5dd8, 0 },
19900 	{ "PCIE_VF_256_INT_CFG2", 0x5ddc, 0 },
19904 	{ "PCIE_VF_256_INT_CFG2", 0x5de0, 0 },
19908 	{ "PCIE_VF_256_INT_CFG2", 0x5de4, 0 },
19912 	{ "PCIE_VF_256_INT_CFG2", 0x5de8, 0 },
19916 	{ "PCIE_VF_256_INT_CFG2", 0x5dec, 0 },
19920 	{ "PCIE_VF_256_INT_CFG2", 0x5df0, 0 },
19924 	{ "PCIE_VF_256_INT_CFG2", 0x5df4, 0 },
19928 	{ "PCIE_VF_256_INT_CFG2", 0x5df8, 0 },
19932 	{ "PCIE_VF_256_INT_CFG2", 0x5dfc, 0 },
19936 	{ "PCIE_VF_256_INT_CFG2", 0x5e00, 0 },
19940 	{ "PCIE_VF_256_INT_CFG2", 0x5e04, 0 },
19944 	{ "PCIE_VF_256_INT_CFG2", 0x5e08, 0 },
19948 	{ "PCIE_VF_256_INT_CFG2", 0x5e0c, 0 },
19952 	{ "PCIE_VF_256_INT_CFG2", 0x5e10, 0 },
19956 	{ "PCIE_VF_256_INT_CFG2", 0x5e14, 0 },
19960 	{ "PCIE_VF_256_INT_CFG2", 0x5e18, 0 },
19964 	{ "PCIE_VF_256_INT_CFG2", 0x5e1c, 0 },
19968 	{ "PCIE_VF_256_INT_CFG2", 0x5e20, 0 },
19972 	{ "PCIE_VF_256_INT_CFG2", 0x5e24, 0 },
19976 	{ "PCIE_VF_256_INT_CFG2", 0x5e28, 0 },
19980 	{ "PCIE_VF_256_INT_CFG2", 0x5e2c, 0 },
19984 	{ "PCIE_VF_256_INT_CFG2", 0x5e30, 0 },
19988 	{ "PCIE_VF_256_INT_CFG2", 0x5e34, 0 },
19992 	{ "PCIE_VF_256_INT_CFG2", 0x5e38, 0 },
19996 	{ "PCIE_VF_256_INT_CFG2", 0x5e3c, 0 },
20000 	{ "PCIE_VF_256_INT_CFG2", 0x5e40, 0 },
20004 	{ "PCIE_VF_256_INT_CFG2", 0x5e44, 0 },
20008 	{ "PCIE_VF_256_INT_CFG2", 0x5e48, 0 },
20012 	{ "PCIE_VF_MSI_EN_4", 0x5e50, 0 },
20013 	{ "PCIE_VF_MSI_EN_5", 0x5e54, 0 },
20014 	{ "PCIE_VF_MSI_EN_6", 0x5e58, 0 },
20015 	{ "PCIE_VF_MSI_EN_7", 0x5e5c, 0 },
20016 	{ "PCIE_VF_MSIX_EN_4", 0x5e60, 0 },
20017 	{ "PCIE_VF_MSIX_EN_5", 0x5e64, 0 },
20018 	{ "PCIE_VF_MSIX_EN_6", 0x5e68, 0 },
20019 	{ "PCIE_VF_MSIX_EN_7", 0x5e6c, 0 },
20020 	{ "PCIE_FLR_VF4_STATUS", 0x5e70, 0 },
20021 	{ "PCIE_FLR_VF5_STATUS", 0x5e74, 0 },
20022 	{ "PCIE_FLR_VF6_STATUS", 0x5e78, 0 },
20023 	{ "PCIE_FLR_VF7_STATUS", 0x5e7c, 0 },
20024 	{ "PCIE_BUS_MST_STAT_4", 0x5e80, 0 },
20025 	{ "PCIE_BUS_MST_STAT_5", 0x5e84, 0 },
20026 	{ "PCIE_BUS_MST_STAT_6", 0x5e88, 0 },
20027 	{ "PCIE_BUS_MST_STAT_7", 0x5e8c, 0 },
20028 	{ "PCIE_BUS_MST_STAT_8", 0x5e90, 0 },
20029 	{ "PCIE_TGT_SKID_FIFO", 0x5e94, 0 },
20031 		{ "DataFreeCnt", 0, 12 },
20032 	{ "PCIE_RSP_ERR_STAT_4", 0x5ea0, 0 },
20033 	{ "PCIE_RSP_ERR_STAT_5", 0x5ea4, 0 },
20034 	{ "PCIE_RSP_ERR_STAT_6", 0x5ea8, 0 },
20035 	{ "PCIE_RSP_ERR_STAT_7", 0x5eac, 0 },
20036 	{ "PCIE_RSP_ERR_STAT_8", 0x5eb0, 0 },
20037 	{ "PCIE_PHY_STAT1", 0x5ec0, 0 },
20040 	{ "PCIE_PHY_CTRL1", 0x5ec4, 0 },
20045 		{ "TxDeemph_gen2_6db", 0, 8 },
20046 	{ "PCIE_PCIE_SPARE0", 0x5ec8, 0 },
20047 	{ "PCIE_RESET_STAT", 0x5ecc, 0 },
20056 		{ "LastResetState", 0, 3 },
20057 	{ "PCIE_FUNC_DSTATE", 0x5ed0, 0 },
20065 		{ "PF0_DState", 0, 3 },
20066 	{ "PCIE_DEBUG_ADDR_RANGE1", 0x5ee0, 0 },
20067 	{ "PCIE_DEBUG_ADDR_RANGE2", 0x5ef0, 0 },
20068 	{ "PCIE_DEBUG_ADDR_RANGE_CNT", 0x5f00, 0 },
20073 	{ "DBG_DBG0_CFG", 0x6000, 0 },
20076 		{ "ClkSelect", 0, 4 },
20077 	{ "DBG_DBG0_EN", 0x6004, 0 },
20080 		{ "PortEn", 0, 1 },
20081 	{ "DBG_DBG1_CFG", 0x6008, 0 },
20084 		{ "ClkSelect", 0, 4 },
20085 	{ "DBG_DBG1_EN", 0x600c, 0 },
20089 		{ "PortEn", 0, 1 },
20090 	{ "DBG_GPIO_EN", 0x6010, 0 },
20122 		{ "GPIO0_Out_Val", 0, 1 },
20123 	{ "DBG_GPIO_IN", 0x6014, 0 },
20155 		{ "GPIO0_IN", 0, 1 },
20156 	{ "DBG_GPIO_EN_NEW", 0x6100, 0 },
20164 		{ "GPIO19_Out_Val", 0, 1 },
20165 	{ "DBG_GPIO_IN_NEW", 0x6104, 0 },
20173 		{ "GPIO16_IN", 0, 1 },
20174 	{ "DBG_INT_ENABLE", 0x6018, 0 },
20202 		{ "GPIO0", 0, 1 },
20203 	{ "DBG_INT_CAUSE", 0x601c, 0 },
20231 		{ "GPIO0", 0, 1 },
20232 	{ "DBG_DBG0_RST_VALUE", 0x6020, 0 },
20233 	{ "DBG_PLL_OCLK_PAD_EN", 0x6028, 0 },
20239 		{ "C_OCLK_En", 0, 1 },
20240 	{ "DBG_PLL_LOCK", 0x602c, 0 },
20246 		{ "C_LOCK", 0, 1 },
20247 	{ "DBG_GPIO_ACT_LOW", 0x6030, 0 },
20273 		{ "GPIO0_ACT_LOW", 0, 1 },
20274 	{ "DBG_EFUSE_BYTE0_3", 0x6034, 0 },
20275 	{ "DBG_EFUSE_BYTE4_7", 0x6038, 0 },
20276 	{ "DBG_EFUSE_BYTE8_11", 0x603c, 0 },
20277 	{ "DBG_EFUSE_BYTE12_15", 0x6040, 0 },
20278 	{ "DBG_EXTRA_STATIC_BITS_CONF", 0x6058, 0 },
20297 	{ "DBG_STATIC_OCLK_MUXSEL_CONF", 0x605c, 0 },
20303 		{ "KR_OCLK_MUXSEL", 0, 3 },
20304 	{ "DBG_TRACE0_CONF_COMPREG0", 0x6060, 0 },
20305 	{ "DBG_TRACE0_CONF_COMPREG1", 0x6064, 0 },
20306 	{ "DBG_TRACE1_CONF_COMPREG0", 0x6068, 0 },
20307 	{ "DBG_TRACE1_CONF_COMPREG1", 0x606c, 0 },
20308 	{ "DBG_TRACE0_CONF_MASKREG0", 0x6070, 0 },
20309 	{ "DBG_TRACE0_CONF_MASKREG1", 0x6074, 0 },
20310 	{ "DBG_TRACE1_CONF_MASKREG0", 0x6078, 0 },
20311 	{ "DBG_TRACE1_CONF_MASKREG1", 0x607c, 0 },
20312 	{ "DBG_TRACE_COUNTER", 0x6080, 0 },
20314 		{ "Counter0", 0, 16 },
20315 	{ "DBG_STATIC_REFCLK_PERIOD", 0x6084, 0 },
20316 	{ "DBG_TRACE_CONF", 0x6088, 0 },
20322 		{ "dbg_operate0_or_1", 0, 1 },
20323 	{ "DBG_TRACE_RDEN", 0x608c, 0 },
20327 		{ "Rd_en0", 0, 1 },
20328 	{ "DBG_TRACE_WRADDR", 0x6090, 0 },
20330 		{ "Wr_pointer_addr0", 0, 9 },
20331 	{ "DBG_TRACE0_DATA_OUT", 0x6094, 0 },
20332 	{ "DBG_TRACE1_DATA_OUT", 0x6098, 0 },
20333 	{ "DBG_FUSE_SENSE_DONE", 0x609c, 0 },
20335 		{ "FUSE_DONE_SENSE", 0, 1 },
20336 	{ "DBG_TVSENSE_EN", 0x60a8, 0 },
20344 		{ "TVSENSE_RATIO", 0, 8 },
20345 	{ "DBG_CUST_EFUSE_OUT_EN", 0x60ac, 0 },
20346 	{ "DBG_CUST_EFUSE_SEL1_EN", 0x60b0, 0 },
20347 	{ "DBG_CUST_EFUSE_SEL2_EN", 0x60b4, 0 },
20355 		{ "DBG_FETIME", 0, 3 },
20356 	{ "DBG_STATIC_M_PLL_CONF1", 0x60b8, 0 },
20358 		{ "STATIC_M_PLL_FFSLEWRATE", 0, 8 },
20359 	{ "DBG_STATIC_M_PLL_CONF2", 0x60bc, 0 },
20368 		{ "STATIC_M_PLL_LOCKTUNE", 0, 5 },
20369 	{ "DBG_STATIC_M_PLL_CONF3", 0x60c0, 0 },
20375 		{ "STATIC_M_PLL_RANGEA", 0, 5 },
20376 	{ "DBG_STATIC_M_PLL_CONF4", 0x60c4, 0 },
20377 	{ "DBG_STATIC_M_PLL_CONF5", 0x60c8, 0 },
20382 		{ "STATIC_M_PLL_MULT", 0, 8 },
20383 	{ "DBG_STATIC_M_PLL_CONF6", 0x60cc, 0 },
20395 		{ "STATIC_SWMC1CfgRst_", 0, 1 },
20396 	{ "DBG_STATIC_C_PLL_CONF1", 0x60d0, 0 },
20398 		{ "STATIC_C_PLL_FFSLEWRATE", 0, 8 },
20399 	{ "DBG_STATIC_C_PLL_CONF2", 0x60d4, 0 },
20409 		{ "STATIC_C_PLL_LOCKTUNE", 0, 5 },
20410 	{ "DBG_STATIC_C_PLL_CONF3", 0x60d8, 0 },
20416 		{ "STATIC_C_PLL_RANGEA", 0, 5 },
20417 	{ "DBG_STATIC_C_PLL_CONF4", 0x60dc, 0 },
20418 	{ "DBG_STATIC_C_PLL_CONF5", 0x60e0, 0 },
20425 		{ "STATIC_C_PLL_MULT", 0, 8 },
20426 	{ "DBG_STATIC_U_PLL_CONF1", 0x60e4, 0 },
20428 		{ "STATIC_U_PLL_FFSLEWRATE", 0, 8 },
20429 	{ "DBG_STATIC_U_PLL_CONF2", 0x60e8, 0 },
20439 		{ "STATIC_U_PLL_LOCKTUNE", 0, 5 },
20440 	{ "DBG_STATIC_U_PLL_CONF3", 0x60ec, 0 },
20446 		{ "STATIC_U_PLL_RANGEA", 0, 5 },
20447 	{ "DBG_STATIC_U_PLL_CONF4", 0x60f0, 0 },
20448 	{ "DBG_STATIC_U_PLL_CONF5", 0x60f4, 0 },
20455 		{ "STATIC_U_PLL_MULT", 0, 8 },
20456 	{ "DBG_STATIC_KR_PLL_CONF1", 0x60f8, 0 },
20469 		{ "STATIC_KR_PLL_N1", 0, 4 },
20470 	{ "DBG_STATIC_KR_PLL_CONF2", 0x60fc, 0 },
20472 		{ "STATIC_KR_PLL_ANALOGTUNE", 0, 11 },
20473 	{ "DBG_STATIC_KX_PLL_CONF1", 0x6108, 0 },
20486 		{ "STATIC_KX_PLL_N1", 0, 4 },
20487 	{ "DBG_STATIC_KX_PLL_CONF2", 0x610c, 0 },
20489 		{ "STATIC_KX_PLL_ANALOGTUNE", 0, 11 },
20490 	{ "DBG_STATIC_C_DFS_CONF", 0x6110, 0 },
20495 		{ "STATIC_C_DFS_ENABLE", 0, 1 },
20496 	{ "DBG_STATIC_U_DFS_CONF", 0x6114, 0 },
20501 		{ "STATIC_U_DFS_ENABLE", 0, 1 },
20502 	{ "DBG_GPIO_PE_EN", 0x6118, 0 },
20522 		{ "GPIO0_PE_En", 0, 1 },
20523 	{ "DBG_GPIO_PS_EN", 0x611c, 0 },
20543 		{ "GPIO0_PS_En", 0, 1 },
20544 	{ "DBG_EFUSE_BYTE16_19", 0x6120, 0 },
20545 	{ "DBG_EFUSE_BYTE20_23", 0x6124, 0 },
20546 	{ "DBG_EFUSE_BYTE24_27", 0x6128, 0 },
20547 	{ "DBG_EFUSE_BYTE28_31", 0x612c, 0 },
20548 	{ "DBG_EFUSE_BYTE32_35", 0x6130, 0 },
20549 	{ "DBG_EFUSE_BYTE36_39", 0x6134, 0 },
20550 	{ "DBG_EFUSE_BYTE40_43", 0x6138, 0 },
20551 	{ "DBG_EFUSE_BYTE44_47", 0x613c, 0 },
20552 	{ "DBG_EFUSE_BYTE48_51", 0x6140, 0 },
20553 	{ "DBG_EFUSE_BYTE52_55", 0x6144, 0 },
20554 	{ "DBG_EFUSE_BYTE56_59", 0x6148, 0 },
20555 	{ "DBG_EFUSE_BYTE60_63", 0x614c, 0 },
20556 	{ "DBG_STATIC_U_PLL_CONF6", 0x6150, 0 },
20557 	{ "DBG_STATIC_C_PLL_CONF6", 0x6154, 0 },
20558 	{ "DBG_CUST_EFUSE_PROGRAM", 0x6158, 0 },
20562 		{ "EFUSE_DIN", 0, 8 },
20563 	{ "DBG_CUST_EFUSE_OUT", 0x615c, 0 },
20565 		{ "EFUSE_DOUT", 0, 8 },
20566 	{ "DBG_CUST_EFUSE_BYTE0_3", 0x6160, 0 },
20567 	{ "DBG_CUST_EFUSE_BYTE4_7", 0x6164, 0 },
20568 	{ "DBG_CUST_EFUSE_BYTE8_11", 0x6168, 0 },
20569 	{ "DBG_CUST_EFUSE_BYTE12_15", 0x616c, 0 },
20570 	{ "DBG_CUST_EFUSE_BYTE16_19", 0x6170, 0 },
20571 	{ "DBG_CUST_EFUSE_BYTE20_23", 0x6174, 0 },
20572 	{ "DBG_CUST_EFUSE_BYTE24_27", 0x6178, 0 },
20573 	{ "DBG_CUST_EFUSE_BYTE28_31", 0x617c, 0 },
20574 	{ "DBG_CUST_EFUSE_BYTE32_35", 0x6180, 0 },
20575 	{ "DBG_CUST_EFUSE_BYTE36_39", 0x6184, 0 },
20576 	{ "DBG_CUST_EFUSE_BYTE40_43", 0x6188, 0 },
20577 	{ "DBG_CUST_EFUSE_BYTE44_47", 0x618c, 0 },
20578 	{ "DBG_CUST_EFUSE_BYTE48_51", 0x6190, 0 },
20579 	{ "DBG_CUST_EFUSE_BYTE52_55", 0x6194, 0 },
20580 	{ "DBG_CUST_EFUSE_BYTE56_59", 0x6198, 0 },
20581 	{ "DBG_CUST_EFUSE_BYTE60_63", 0x619c, 0 },
20586 	{ "MA_CLIENT0_RD_LATENCY_THRESHOLD", 0x7700, 0 },
20590 		{ "THRESHOLD0_EN", 0, 1 },
20591 	{ "MA_CLIENT0_WR_LATENCY_THRESHOLD", 0x7704, 0 },
20595 		{ "THRESHOLD0_EN", 0, 1 },
20596 	{ "MA_CLIENT1_RD_LATENCY_THRESHOLD", 0x7708, 0 },
20600 		{ "THRESHOLD0_EN", 0, 1 },
20601 	{ "MA_CLIENT1_WR_LATENCY_THRESHOLD", 0x770c, 0 },
20605 		{ "THRESHOLD0_EN", 0, 1 },
20606 	{ "MA_CLIENT2_RD_LATENCY_THRESHOLD", 0x7710, 0 },
20610 		{ "THRESHOLD0_EN", 0, 1 },
20611 	{ "MA_CLIENT2_WR_LATENCY_THRESHOLD", 0x7714, 0 },
20615 		{ "THRESHOLD0_EN", 0, 1 },
20616 	{ "MA_CLIENT3_RD_LATENCY_THRESHOLD", 0x7718, 0 },
20620 		{ "THRESHOLD0_EN", 0, 1 },
20621 	{ "MA_CLIENT3_WR_LATENCY_THRESHOLD", 0x771c, 0 },
20625 		{ "THRESHOLD0_EN", 0, 1 },
20626 	{ "MA_CLIENT4_RD_LATENCY_THRESHOLD", 0x7720, 0 },
20630 		{ "THRESHOLD0_EN", 0, 1 },
20631 	{ "MA_CLIENT4_WR_LATENCY_THRESHOLD", 0x7724, 0 },
20635 		{ "THRESHOLD0_EN", 0, 1 },
20636 	{ "MA_CLIENT5_RD_LATENCY_THRESHOLD", 0x7728, 0 },
20640 		{ "THRESHOLD0_EN", 0, 1 },
20641 	{ "MA_CLIENT5_WR_LATENCY_THRESHOLD", 0x772c, 0 },
20645 		{ "THRESHOLD0_EN", 0, 1 },
20646 	{ "MA_CLIENT6_RD_LATENCY_THRESHOLD", 0x7730, 0 },
20650 		{ "THRESHOLD0_EN", 0, 1 },
20651 	{ "MA_CLIENT6_WR_LATENCY_THRESHOLD", 0x7734, 0 },
20655 		{ "THRESHOLD0_EN", 0, 1 },
20656 	{ "MA_CLIENT7_RD_LATENCY_THRESHOLD", 0x7738, 0 },
20660 		{ "THRESHOLD0_EN", 0, 1 },
20661 	{ "MA_CLIENT7_WR_LATENCY_THRESHOLD", 0x773c, 0 },
20665 		{ "THRESHOLD0_EN", 0, 1 },
20666 	{ "MA_CLIENT8_RD_LATENCY_THRESHOLD", 0x7740, 0 },
20670 		{ "THRESHOLD0_EN", 0, 1 },
20671 	{ "MA_CLIENT8_WR_LATENCY_THRESHOLD", 0x7744, 0 },
20675 		{ "THRESHOLD0_EN", 0, 1 },
20676 	{ "MA_CLIENT9_RD_LATENCY_THRESHOLD", 0x7748, 0 },
20680 		{ "THRESHOLD0_EN", 0, 1 },
20681 	{ "MA_CLIENT9_WR_LATENCY_THRESHOLD", 0x774c, 0 },
20685 		{ "THRESHOLD0_EN", 0, 1 },
20686 	{ "MA_CLIENT10_RD_LATENCY_THRESHOLD", 0x7750, 0 },
20690 		{ "THRESHOLD0_EN", 0, 1 },
20691 	{ "MA_CLIENT10_WR_LATENCY_THRESHOLD", 0x7754, 0 },
20695 		{ "THRESHOLD0_EN", 0, 1 },
20696 	{ "MA_CLIENT11_RD_LATENCY_THRESHOLD", 0x7758, 0 },
20700 		{ "THRESHOLD0_EN", 0, 1 },
20701 	{ "MA_CLIENT11_WR_LATENCY_THRESHOLD", 0x775c, 0 },
20705 		{ "THRESHOLD0_EN", 0, 1 },
20706 	{ "MA_CLIENT12_RD_LATENCY_THRESHOLD", 0x7760, 0 },
20710 		{ "THRESHOLD0_EN", 0, 1 },
20711 	{ "MA_CLIENT12_WR_LATENCY_THRESHOLD", 0x7764, 0 },
20715 		{ "THRESHOLD0_EN", 0, 1 },
20716 	{ "MA_SGE_TH0_DEBUG_CNT", 0x7768, 0 },
20720 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20721 	{ "MA_SGE_TH1_DEBUG_CNT", 0x776c, 0 },
20725 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20726 	{ "MA_ULPTX_DEBUG_CNT", 0x7770, 0 },
20730 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20731 	{ "MA_ULPRX_DEBUG_CNT", 0x7774, 0 },
20735 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20736 	{ "MA_ULPTXRX_DEBUG_CNT", 0x7778, 0 },
20740 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20741 	{ "MA_TP_TH0_DEBUG_CNT", 0x777c, 0 },
20745 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20746 	{ "MA_TP_TH1_DEBUG_CNT", 0x7780, 0 },
20750 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20751 	{ "MA_LE_DEBUG_CNT", 0x7784, 0 },
20755 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20756 	{ "MA_CIM_DEBUG_CNT", 0x7788, 0 },
20760 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20761 	{ "MA_PCIE_DEBUG_CNT", 0x778c, 0 },
20765 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20766 	{ "MA_PMTX_DEBUG_CNT", 0x7790, 0 },
20770 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20771 	{ "MA_PMRX_DEBUG_CNT", 0x7794, 0 },
20775 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20776 	{ "MA_HMA_DEBUG_CNT", 0x7798, 0 },
20780 		{ "DBG_WRITE_REQ_CNT", 0, 8 },
20781 	{ "MA_EDRAM0_BAR", 0x77c0, 0 },
20783 		{ "EDRAM0_SIZE", 0, 12 },
20784 	{ "MA_EDRAM1_BAR", 0x77c4, 0 },
20786 		{ "EDRAM1_SIZE", 0, 12 },
20787 	{ "MA_EXT_MEMORY0_BAR", 0x77c8, 0 },
20789 		{ "EXT_MEM0_SIZE", 0, 12 },
20790 	{ "MA_HOST_MEMORY_BAR", 0x77cc, 0 },
20792 		{ "HMA_SIZE", 0, 12 },
20793 	{ "MA_EXT_MEM_PAGE_SIZE", 0x77d0, 0 },
20796 		{ "EXT_MEM_PAGE_SIZE", 0, 3 },
20797 	{ "MA_ARB_CTRL", 0x77d4, 0 },
20810 		{ "DIS_ADV_ARB", 0, 1 },
20811 	{ "MA_TARGET_MEM_ENABLE", 0x77d8, 0 },
20818 		{ "EDRAM0_ENABLE", 0, 1 },
20819 	{ "MA_INT_ENABLE", 0x77dc, 0 },
20822 		{ "MEM_WRAP_INT_ENABLE", 0, 1 },
20823 	{ "MA_INT_CAUSE", 0x77e0, 0 },
20826 		{ "MEM_WRAP_INT_CAUSE", 0, 1 },
20827 	{ "MA_INT_WRAP_STATUS", 0x77e4, 0 },
20829 		{ "MEM_WRAP_CLIENT_NUM", 0, 4 },
20830 	{ "MA_TP_THREAD1_MAPPER", 0x77e8, 0 },
20831 	{ "MA_SGE_THREAD1_MAPPER", 0x77ec, 0 },
20832 	{ "MA_PARITY_ERROR_ENABLE1", 0x77f0, 0 },
20864 		{ "CL0_PAR_RDQUEUE_ERROR_EN", 0, 1 },
20865 	{ "MA_PARITY_ERROR_STATUS1", 0x77f4, 0 },
20897 		{ "CL0_PAR_RDQUEUE_ERROR", 0, 1 },
20898 	{ "MA_SGE_PCIE_COHERANCY_CTRL", 0x77f8, 0 },
20902 		{ "COHERANCY_ENABLE", 0, 1 },
20903 	{ "MA_ERROR_ENABLE", 0x77fc, 0 },
20905 		{ "UE_ENABLE", 0, 1 },
20906 	{ "MA_PARITY_ERROR_ENABLE2", 0x7800, 0 },
20908 		{ "ARB4_PAR_RDQUEUE_ERROR_EN", 0, 1 },
20909 	{ "MA_PARITY_ERROR_STATUS2", 0x7804, 0 },
20911 		{ "ARB4_PAR_RDQUEUE_ERROR", 0, 1 },
20912 	{ "MA_EXT_MEMORY1_BAR", 0x7808, 0 },
20914 		{ "EXT_MEM1_SIZE", 0, 12 },
20915 	{ "MA_PMTX_THROTTLE", 0x780c, 0 },
20917 		{ "FL_LIMIT", 0, 8 },
20918 	{ "MA_PMRX_THROTTLE", 0x7810, 0 },
20920 		{ "FL_LIMIT", 0, 8 },
20921 	{ "MA_SGE_TH0_WRDATA_CNT", 0x7814, 0 },
20922 	{ "MA_SGE_TH1_WRDATA_CNT", 0x7818, 0 },
20923 	{ "MA_ULPTX_WRDATA_CNT", 0x781c, 0 },
20924 	{ "MA_ULPRX_WRDATA_CNT", 0x7820, 0 },
20925 	{ "MA_ULPTXRX_WRDATA_CNT", 0x7824, 0 },
20926 	{ "MA_TP_TH0_WRDATA_CNT", 0x7828, 0 },
20927 	{ "MA_TP_TH1_WRDATA_CNT", 0x782c, 0 },
20928 	{ "MA_LE_WRDATA_CNT", 0x7830, 0 },
20929 	{ "MA_CIM_WRDATA_CNT", 0x7834, 0 },
20930 	{ "MA_PCIE_WRDATA_CNT", 0x7838, 0 },
20931 	{ "MA_PMTX_WRDATA_CNT", 0x783c, 0 },
20932 	{ "MA_PMRX_WRDATA_CNT", 0x7840, 0 },
20933 	{ "MA_HMA_WRDATA_CNT", 0x7844, 0 },
20934 	{ "MA_SGE_TH0_RDDATA_CNT", 0x7848, 0 },
20935 	{ "MA_SGE_TH1_RDDATA_CNT", 0x784c, 0 },
20936 	{ "MA_ULPTX_RDDATA_CNT", 0x7850, 0 },
20937 	{ "MA_ULPRX_RDDATA_CNT", 0x7854, 0 },
20938 	{ "MA_ULPTXRX_RDDATA_CNT", 0x7858, 0 },
20939 	{ "MA_TP_TH0_RDDATA_CNT", 0x785c, 0 },
20940 	{ "MA_TP_TH1_RDDATA_CNT", 0x7860, 0 },
20941 	{ "MA_LE_RDDATA_CNT", 0x7864, 0 },
20942 	{ "MA_CIM_RDDATA_CNT", 0x7868, 0 },
20943 	{ "MA_PCIE_RDDATA_CNT", 0x786c, 0 },
20944 	{ "MA_PMTX_RDDATA_CNT", 0x7870, 0 },
20945 	{ "MA_PMRX_RDDATA_CNT", 0x7874, 0 },
20946 	{ "MA_HMA_RDDATA_CNT", 0x7878, 0 },
20947 	{ "MA_EXIT_ADDR_FAULT", 0x787c, 0 },
20948 	{ "MA_DDR_DEVICE_CFG", 0x7880, 0 },
20950 		{ "DDR_MODE", 0, 1 },
20951 	{ "MA_TIMEOUT_CFG", 0x78cc, 0 },
20958 		{ "DELAY", 0, 16 },
20959 	{ "MA_TIMEOUT_CNT", 0x78d0, 0 },
20963 		{ "CNT_VAL", 0, 16 },
20964 	{ "MA_WRITE_TIMEOUT_ERROR_ENABLE", 0x78d4, 0 },
20992 		{ "CL0_WR_DATA_TO_EN", 0, 1 },
20993 	{ "MA_WRITE_TIMEOUT_ERROR_STATUS", 0x78d8, 0 },
21021 		{ "CL0_WR_DATA_TO_ERROR", 0, 1 },
21022 	{ "MA_READ_TIMEOUT_ERROR_ENABLE", 0x78dc, 0 },
21050 		{ "CL0_RD_DATA_TO_EN", 0, 1 },
21051 	{ "MA_READ_TIMEOUT_ERROR_STATUS", 0x78e0, 0 },
21079 		{ "CL0_RD_DATA_TO_ERROR", 0, 1 },
21080 	{ "MA_BKP_CNT_SEL", 0x78e4, 0 },
21083 	{ "MA_BKP_CNT", 0x78e8, 0 },
21084 	{ "MA_WRT_ARB", 0x78ec, 0 },
21088 		{ "WR_WIN", 0, 8 },
21089 	{ "MA_IF_PARITY_ERROR_ENABLE", 0x78f0, 0 },
21103 		{ "CL0_IF_PAR_EN", 0, 1 },
21104 	{ "MA_IF_PARITY_ERROR_STATUS", 0x78f4, 0 },
21118 		{ "CL0_IF_PAR_ERROR", 0, 1 },
21119 	{ "MA_LOCAL_DEBUG_CFG", 0x78f8, 0 },
21125 		{ "DEBUGSELL", 0, 5 },
21126 	{ "MA_LOCAL_DEBUG_RPT", 0x78fc, 0 },
21131 	{ "CIM_BOOT_CFG", 0x7b00, 0 },
21135 		{ "uPCRst", 0, 1 },
21136 	{ "CIM_BOOT_LEN", 0x7bf0, 0 },
21138 	{ "CIM_FLASH_BASE_ADDR", 0x7b04, 0 },
21140 	{ "CIM_FLASH_ADDR_SIZE", 0x7b08, 0 },
21142 	{ "CIM_EEPROM_BASE_ADDR", 0x7b0c, 0 },
21144 	{ "CIM_EEPROM_ADDR_SIZE", 0x7b10, 0 },
21146 	{ "CIM_SDRAM_BASE_ADDR", 0x7b14, 0 },
21148 	{ "CIM_SDRAM_ADDR_SIZE", 0x7b18, 0 },
21150 	{ "CIM_EXTMEM2_BASE_ADDR", 0x7b1c, 0 },
21152 	{ "CIM_EXTMEM2_ADDR_SIZE", 0x7b20, 0 },
21154 	{ "CIM_UP_SPARE_INT", 0x7b24, 0 },
21157 		{ "uPSpareInt", 0, 3 },
21158 	{ "CIM_HOST_INT_ENABLE", 0x7b28, 0 },
21187 	{ "CIM_HOST_INT_CAUSE", 0x7b2c, 0 },
21215 		{ "uPAccNonZero", 0, 1 },
21216 	{ "CIM_HOST_UPACC_INT_ENABLE", 0x7b30, 0 },
21247 		{ "RsvdSpaceIntEn", 0, 1 },
21248 	{ "CIM_HOST_UPACC_INT_CAUSE", 0x7b34, 0 },
21279 		{ "RsvdSpaceInt", 0, 1 },
21280 	{ "CIM_UP_INT_ENABLE", 0x7b38, 0 },
21310 	{ "CIM_UP_INT_CAUSE", 0x7b3c, 0 },
21339 		{ "uPAccNonZero", 0, 1 },
21340 	{ "CIM_UP_ACC_INT_ENABLE", 0x7b40, 0 },
21371 		{ "RsvdSpaceIntEn", 0, 1 },
21372 	{ "CIM_UP_ACC_INT_CAUSE", 0x7b44, 0 },
21403 		{ "RsvdSpaceInt", 0, 1 },
21404 	{ "CIM_QUEUE_CONFIG_REF", 0x7b48, 0 },
21407 		{ "QueNumSelect", 0, 3 },
21408 	{ "CIM_QUEUE_CONFIG_CTRL", 0x7b4c, 0 },
21413 		{ "QueFullThrsh", 0, 9 },
21414 	{ "CIM_HOST_ACC_CTRL", 0x7b50, 0 },
21417 		{ "HostAddr", 0, 16 },
21418 	{ "CIM_HOST_ACC_DATA", 0x7b54, 0 },
21419 	{ "CIM_CDEBUGDATA", 0x7b58, 0 },
21421 		{ "CDebugDataL", 0, 16 },
21422 	{ "CIM_IBQ_DBG_CFG", 0x7b60, 0 },
21426 		{ "IbqDbgEn", 0, 1 },
21427 	{ "CIM_OBQ_DBG_CFG", 0x7b64, 0 },
21431 		{ "ObqDbgEn", 0, 1 },
21432 	{ "CIM_IBQ_DBG_DATA", 0x7b68, 0 },
21433 	{ "CIM_OBQ_DBG_DATA", 0x7b6c, 0 },
21434 	{ "CIM_DEBUGCFG", 0x7b70, 0 },
21442 		{ "DebugSelL", 0, 5 },
21443 	{ "CIM_DEBUGSTS", 0x7b74, 0 },
21446 		{ "PILADbgWrPtr", 0, 9 },
21447 	{ "CIM_PO_LA_DEBUGDATA", 0x7b78, 0 },
21448 	{ "CIM_PI_LA_DEBUGDATA", 0x7b7c, 0 },
21449 	{ "CIM_PO_LA_MADEBUGDATA", 0x7b80, 0 },
21450 	{ "CIM_PI_LA_MADEBUGDATA", 0x7b84, 0 },
21451 	{ "CIM_PO_LA_PIFSMDEBUGDATA", 0x7b8c, 0 },
21452 	{ "CIM_MEM_ZONE0_VA", 0x7b90, 0 },
21454 	{ "CIM_MEM_ZONE0_BA", 0x7b94, 0 },
21457 		{ "ZONE_DST", 0, 2 },
21458 	{ "CIM_MEM_ZONE0_LEN", 0x7b98, 0 },
21460 	{ "CIM_MEM_ZONE1_VA", 0x7b9c, 0 },
21462 	{ "CIM_MEM_ZONE1_BA", 0x7ba0, 0 },
21465 		{ "ZONE_DST", 0, 2 },
21466 	{ "CIM_MEM_ZONE1_LEN", 0x7ba4, 0 },
21468 	{ "CIM_MEM_ZONE2_VA", 0x7ba8, 0 },
21470 	{ "CIM_MEM_ZONE2_BA", 0x7bac, 0 },
21473 		{ "ZONE_DST", 0, 2 },
21474 	{ "CIM_MEM_ZONE2_LEN", 0x7bb0, 0 },
21476 	{ "CIM_MEM_ZONE3_VA", 0x7bb4, 0 },
21478 	{ "CIM_MEM_ZONE3_BA", 0x7bb8, 0 },
21481 		{ "ZONE_DST", 0, 2 },
21482 	{ "CIM_MEM_ZONE3_LEN", 0x7bbc, 0 },
21484 	{ "CIM_MEM_ZONE4_VA", 0x7bc0, 0 },
21486 	{ "CIM_MEM_ZONE4_BA", 0x7bc4, 0 },
21489 		{ "ZONE_DST", 0, 2 },
21490 	{ "CIM_MEM_ZONE4_LEN", 0x7bc8, 0 },
21492 	{ "CIM_MEM_ZONE5_VA", 0x7bcc, 0 },
21494 	{ "CIM_MEM_ZONE5_BA", 0x7bd0, 0 },
21497 		{ "ZONE_DST", 0, 2 },
21498 	{ "CIM_MEM_ZONE5_LEN", 0x7bd4, 0 },
21500 	{ "CIM_MEM_ZONE6_VA", 0x7bd8, 0 },
21502 	{ "CIM_MEM_ZONE6_BA", 0x7bdc, 0 },
21505 		{ "ZONE_DST", 0, 2 },
21506 	{ "CIM_MEM_ZONE6_LEN", 0x7be0, 0 },
21508 	{ "CIM_MEM_ZONE7_VA", 0x7be4, 0 },
21510 	{ "CIM_MEM_ZONE7_BA", 0x7be8, 0 },
21513 		{ "ZONE_DST", 0, 2 },
21514 	{ "CIM_MEM_ZONE7_LEN", 0x7bec, 0 },
21516 	{ "CIM_GLB_TIMER_CTL", 0x7bf4, 0 },
21520 	{ "CIM_GLB_TIMER", 0x7bf8, 0 },
21521 	{ "CIM_GLB_TIMER_TICK", 0x7bfc, 0 },
21522 	{ "CIM_TIMER0", 0x7c00, 0 },
21523 	{ "CIM_TIMER1", 0x7c04, 0 },
21524 	{ "CIM_DEBUG_ADDR_TIMEOUT", 0x7c08, 0 },
21526 		{ "DAddrTimeOutType", 0, 2 },
21527 	{ "CIM_DEBUG_ADDR_ILLEGAL", 0x7c0c, 0 },
21529 		{ "DAddrIllegalType", 0, 2 },
21530 	{ "CIM_DEBUG_PIF_CAUSE_MASK", 0x7c10, 0 },
21531 	{ "CIM_DEBUG_PIF_UPACC_CAUSE_MASK", 0x7c14, 0 },
21532 	{ "CIM_DEBUG_UP_CAUSE_MASK", 0x7c18, 0 },
21533 	{ "CIM_DEBUG_UP_UPACC_CAUSE_MASK", 0x7c1c, 0 },
21534 	{ "CIM_PERR_INJECT", 0x7c20, 0 },
21536 		{ "InjectDataErr", 0, 1 },
21537 	{ "CIM_PERR_ENABLE", 0x7c24, 0 },
21538 	{ "CIM_EEPROM_BUSY_BIT", 0x7c28, 0 },
21539 	{ "CIM_MA_TIMER_EN", 0x7c2c, 0 },
21541 		{ "ma_timer_enable", 0, 1 },
21542 	{ "CIM_UP_PO_SINGLE_OUTSTANDING", 0x7c30, 0 },
21543 	{ "CIM_CIM_DEBUG_SPARE", 0x7c34, 0 },
21544 	{ "CIM_UP_OPERATION_FREQ", 0x7c38, 0 },
21545 	{ "CIM_CIM_IBQ_ERR_CODE", 0x7c3c, 0 },
21548 		{ "CIM_SGE0_PKT_ERR_CODE", 0, 8 },
21549 	{ "CIM_IBQ_DBG_WAIT_COUNTER", 0x7c40, 0 },
21550 	{ "CIM_PIO_UP_MST_CFG_SEL", 0x7c44, 0 },
21551 	{ "CIM_CGEN", 0x7c48, 0 },
21552 	{ "CIM_QUEUE_FEATURE_DISABLE", 0x7c4c, 0 },
21558 		{ "ibq_skid_fifo_eop_flsh_dsbl", 0, 1 },
21559 	{ "CIM_CGEN_GLOBAL", 0x7c50, 0 },
21560 	{ "CIM_DPSLP_EN", 0x7c54, 0 },
21561 	{ "CIM_PF_MAILBOX_DATA", 0x1e240, 0 },
21562 	{ "CIM_PF_MAILBOX_DATA", 0x1e244, 0 },
21563 	{ "CIM_PF_MAILBOX_DATA", 0x1e248, 0 },
21564 	{ "CIM_PF_MAILBOX_DATA", 0x1e24c, 0 },
21565 	{ "CIM_PF_MAILBOX_DATA", 0x1e250, 0 },
21566 	{ "CIM_PF_MAILBOX_DATA", 0x1e254, 0 },
21567 	{ "CIM_PF_MAILBOX_DATA", 0x1e258, 0 },
21568 	{ "CIM_PF_MAILBOX_DATA", 0x1e25c, 0 },
21569 	{ "CIM_PF_MAILBOX_DATA", 0x1e260, 0 },
21570 	{ "CIM_PF_MAILBOX_DATA", 0x1e264, 0 },
21571 	{ "CIM_PF_MAILBOX_DATA", 0x1e268, 0 },
21572 	{ "CIM_PF_MAILBOX_DATA", 0x1e26c, 0 },
21573 	{ "CIM_PF_MAILBOX_DATA", 0x1e270, 0 },
21574 	{ "CIM_PF_MAILBOX_DATA", 0x1e274, 0 },
21575 	{ "CIM_PF_MAILBOX_DATA", 0x1e278, 0 },
21576 	{ "CIM_PF_MAILBOX_DATA", 0x1e27c, 0 },
21577 	{ "CIM_PF_MAILBOX_CTRL", 0x1e280, 0 },
21581 		{ "MBOwner", 0, 2 },
21582 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1e284, 0 },
21584 	{ "CIM_PF_HOST_INT_ENABLE", 0x1e288, 0 },
21586 	{ "CIM_PF_HOST_INT_CAUSE", 0x1e28c, 0 },
21588 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1e290, 0 },
21592 		{ "MBOwner", 0, 2 },
21593 	{ "CIM_PF_MAILBOX_DATA", 0x1e640, 0 },
21594 	{ "CIM_PF_MAILBOX_DATA", 0x1e644, 0 },
21595 	{ "CIM_PF_MAILBOX_DATA", 0x1e648, 0 },
21596 	{ "CIM_PF_MAILBOX_DATA", 0x1e64c, 0 },
21597 	{ "CIM_PF_MAILBOX_DATA", 0x1e650, 0 },
21598 	{ "CIM_PF_MAILBOX_DATA", 0x1e654, 0 },
21599 	{ "CIM_PF_MAILBOX_DATA", 0x1e658, 0 },
21600 	{ "CIM_PF_MAILBOX_DATA", 0x1e65c, 0 },
21601 	{ "CIM_PF_MAILBOX_DATA", 0x1e660, 0 },
21602 	{ "CIM_PF_MAILBOX_DATA", 0x1e664, 0 },
21603 	{ "CIM_PF_MAILBOX_DATA", 0x1e668, 0 },
21604 	{ "CIM_PF_MAILBOX_DATA", 0x1e66c, 0 },
21605 	{ "CIM_PF_MAILBOX_DATA", 0x1e670, 0 },
21606 	{ "CIM_PF_MAILBOX_DATA", 0x1e674, 0 },
21607 	{ "CIM_PF_MAILBOX_DATA", 0x1e678, 0 },
21608 	{ "CIM_PF_MAILBOX_DATA", 0x1e67c, 0 },
21609 	{ "CIM_PF_MAILBOX_CTRL", 0x1e680, 0 },
21613 		{ "MBOwner", 0, 2 },
21614 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1e684, 0 },
21616 	{ "CIM_PF_HOST_INT_ENABLE", 0x1e688, 0 },
21618 	{ "CIM_PF_HOST_INT_CAUSE", 0x1e68c, 0 },
21620 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1e690, 0 },
21624 		{ "MBOwner", 0, 2 },
21625 	{ "CIM_PF_MAILBOX_DATA", 0x1ea40, 0 },
21626 	{ "CIM_PF_MAILBOX_DATA", 0x1ea44, 0 },
21627 	{ "CIM_PF_MAILBOX_DATA", 0x1ea48, 0 },
21628 	{ "CIM_PF_MAILBOX_DATA", 0x1ea4c, 0 },
21629 	{ "CIM_PF_MAILBOX_DATA", 0x1ea50, 0 },
21630 	{ "CIM_PF_MAILBOX_DATA", 0x1ea54, 0 },
21631 	{ "CIM_PF_MAILBOX_DATA", 0x1ea58, 0 },
21632 	{ "CIM_PF_MAILBOX_DATA", 0x1ea5c, 0 },
21633 	{ "CIM_PF_MAILBOX_DATA", 0x1ea60, 0 },
21634 	{ "CIM_PF_MAILBOX_DATA", 0x1ea64, 0 },
21635 	{ "CIM_PF_MAILBOX_DATA", 0x1ea68, 0 },
21636 	{ "CIM_PF_MAILBOX_DATA", 0x1ea6c, 0 },
21637 	{ "CIM_PF_MAILBOX_DATA", 0x1ea70, 0 },
21638 	{ "CIM_PF_MAILBOX_DATA", 0x1ea74, 0 },
21639 	{ "CIM_PF_MAILBOX_DATA", 0x1ea78, 0 },
21640 	{ "CIM_PF_MAILBOX_DATA", 0x1ea7c, 0 },
21641 	{ "CIM_PF_MAILBOX_CTRL", 0x1ea80, 0 },
21645 		{ "MBOwner", 0, 2 },
21646 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1ea84, 0 },
21648 	{ "CIM_PF_HOST_INT_ENABLE", 0x1ea88, 0 },
21650 	{ "CIM_PF_HOST_INT_CAUSE", 0x1ea8c, 0 },
21652 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1ea90, 0 },
21656 		{ "MBOwner", 0, 2 },
21657 	{ "CIM_PF_MAILBOX_DATA", 0x1ee40, 0 },
21658 	{ "CIM_PF_MAILBOX_DATA", 0x1ee44, 0 },
21659 	{ "CIM_PF_MAILBOX_DATA", 0x1ee48, 0 },
21660 	{ "CIM_PF_MAILBOX_DATA", 0x1ee4c, 0 },
21661 	{ "CIM_PF_MAILBOX_DATA", 0x1ee50, 0 },
21662 	{ "CIM_PF_MAILBOX_DATA", 0x1ee54, 0 },
21663 	{ "CIM_PF_MAILBOX_DATA", 0x1ee58, 0 },
21664 	{ "CIM_PF_MAILBOX_DATA", 0x1ee5c, 0 },
21665 	{ "CIM_PF_MAILBOX_DATA", 0x1ee60, 0 },
21666 	{ "CIM_PF_MAILBOX_DATA", 0x1ee64, 0 },
21667 	{ "CIM_PF_MAILBOX_DATA", 0x1ee68, 0 },
21668 	{ "CIM_PF_MAILBOX_DATA", 0x1ee6c, 0 },
21669 	{ "CIM_PF_MAILBOX_DATA", 0x1ee70, 0 },
21670 	{ "CIM_PF_MAILBOX_DATA", 0x1ee74, 0 },
21671 	{ "CIM_PF_MAILBOX_DATA", 0x1ee78, 0 },
21672 	{ "CIM_PF_MAILBOX_DATA", 0x1ee7c, 0 },
21673 	{ "CIM_PF_MAILBOX_CTRL", 0x1ee80, 0 },
21677 		{ "MBOwner", 0, 2 },
21678 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1ee84, 0 },
21680 	{ "CIM_PF_HOST_INT_ENABLE", 0x1ee88, 0 },
21682 	{ "CIM_PF_HOST_INT_CAUSE", 0x1ee8c, 0 },
21684 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1ee90, 0 },
21688 		{ "MBOwner", 0, 2 },
21689 	{ "CIM_PF_MAILBOX_DATA", 0x1f240, 0 },
21690 	{ "CIM_PF_MAILBOX_DATA", 0x1f244, 0 },
21691 	{ "CIM_PF_MAILBOX_DATA", 0x1f248, 0 },
21692 	{ "CIM_PF_MAILBOX_DATA", 0x1f24c, 0 },
21693 	{ "CIM_PF_MAILBOX_DATA", 0x1f250, 0 },
21694 	{ "CIM_PF_MAILBOX_DATA", 0x1f254, 0 },
21695 	{ "CIM_PF_MAILBOX_DATA", 0x1f258, 0 },
21696 	{ "CIM_PF_MAILBOX_DATA", 0x1f25c, 0 },
21697 	{ "CIM_PF_MAILBOX_DATA", 0x1f260, 0 },
21698 	{ "CIM_PF_MAILBOX_DATA", 0x1f264, 0 },
21699 	{ "CIM_PF_MAILBOX_DATA", 0x1f268, 0 },
21700 	{ "CIM_PF_MAILBOX_DATA", 0x1f26c, 0 },
21701 	{ "CIM_PF_MAILBOX_DATA", 0x1f270, 0 },
21702 	{ "CIM_PF_MAILBOX_DATA", 0x1f274, 0 },
21703 	{ "CIM_PF_MAILBOX_DATA", 0x1f278, 0 },
21704 	{ "CIM_PF_MAILBOX_DATA", 0x1f27c, 0 },
21705 	{ "CIM_PF_MAILBOX_CTRL", 0x1f280, 0 },
21709 		{ "MBOwner", 0, 2 },
21710 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1f284, 0 },
21712 	{ "CIM_PF_HOST_INT_ENABLE", 0x1f288, 0 },
21714 	{ "CIM_PF_HOST_INT_CAUSE", 0x1f28c, 0 },
21716 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1f290, 0 },
21720 		{ "MBOwner", 0, 2 },
21721 	{ "CIM_PF_MAILBOX_DATA", 0x1f640, 0 },
21722 	{ "CIM_PF_MAILBOX_DATA", 0x1f644, 0 },
21723 	{ "CIM_PF_MAILBOX_DATA", 0x1f648, 0 },
21724 	{ "CIM_PF_MAILBOX_DATA", 0x1f64c, 0 },
21725 	{ "CIM_PF_MAILBOX_DATA", 0x1f650, 0 },
21726 	{ "CIM_PF_MAILBOX_DATA", 0x1f654, 0 },
21727 	{ "CIM_PF_MAILBOX_DATA", 0x1f658, 0 },
21728 	{ "CIM_PF_MAILBOX_DATA", 0x1f65c, 0 },
21729 	{ "CIM_PF_MAILBOX_DATA", 0x1f660, 0 },
21730 	{ "CIM_PF_MAILBOX_DATA", 0x1f664, 0 },
21731 	{ "CIM_PF_MAILBOX_DATA", 0x1f668, 0 },
21732 	{ "CIM_PF_MAILBOX_DATA", 0x1f66c, 0 },
21733 	{ "CIM_PF_MAILBOX_DATA", 0x1f670, 0 },
21734 	{ "CIM_PF_MAILBOX_DATA", 0x1f674, 0 },
21735 	{ "CIM_PF_MAILBOX_DATA", 0x1f678, 0 },
21736 	{ "CIM_PF_MAILBOX_DATA", 0x1f67c, 0 },
21737 	{ "CIM_PF_MAILBOX_CTRL", 0x1f680, 0 },
21741 		{ "MBOwner", 0, 2 },
21742 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1f684, 0 },
21744 	{ "CIM_PF_HOST_INT_ENABLE", 0x1f688, 0 },
21746 	{ "CIM_PF_HOST_INT_CAUSE", 0x1f68c, 0 },
21748 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1f690, 0 },
21752 		{ "MBOwner", 0, 2 },
21753 	{ "CIM_PF_MAILBOX_DATA", 0x1fa40, 0 },
21754 	{ "CIM_PF_MAILBOX_DATA", 0x1fa44, 0 },
21755 	{ "CIM_PF_MAILBOX_DATA", 0x1fa48, 0 },
21756 	{ "CIM_PF_MAILBOX_DATA", 0x1fa4c, 0 },
21757 	{ "CIM_PF_MAILBOX_DATA", 0x1fa50, 0 },
21758 	{ "CIM_PF_MAILBOX_DATA", 0x1fa54, 0 },
21759 	{ "CIM_PF_MAILBOX_DATA", 0x1fa58, 0 },
21760 	{ "CIM_PF_MAILBOX_DATA", 0x1fa5c, 0 },
21761 	{ "CIM_PF_MAILBOX_DATA", 0x1fa60, 0 },
21762 	{ "CIM_PF_MAILBOX_DATA", 0x1fa64, 0 },
21763 	{ "CIM_PF_MAILBOX_DATA", 0x1fa68, 0 },
21764 	{ "CIM_PF_MAILBOX_DATA", 0x1fa6c, 0 },
21765 	{ "CIM_PF_MAILBOX_DATA", 0x1fa70, 0 },
21766 	{ "CIM_PF_MAILBOX_DATA", 0x1fa74, 0 },
21767 	{ "CIM_PF_MAILBOX_DATA", 0x1fa78, 0 },
21768 	{ "CIM_PF_MAILBOX_DATA", 0x1fa7c, 0 },
21769 	{ "CIM_PF_MAILBOX_CTRL", 0x1fa80, 0 },
21773 		{ "MBOwner", 0, 2 },
21774 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1fa84, 0 },
21776 	{ "CIM_PF_HOST_INT_ENABLE", 0x1fa88, 0 },
21778 	{ "CIM_PF_HOST_INT_CAUSE", 0x1fa8c, 0 },
21780 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1fa90, 0 },
21784 		{ "MBOwner", 0, 2 },
21785 	{ "CIM_PF_MAILBOX_DATA", 0x1fe40, 0 },
21786 	{ "CIM_PF_MAILBOX_DATA", 0x1fe44, 0 },
21787 	{ "CIM_PF_MAILBOX_DATA", 0x1fe48, 0 },
21788 	{ "CIM_PF_MAILBOX_DATA", 0x1fe4c, 0 },
21789 	{ "CIM_PF_MAILBOX_DATA", 0x1fe50, 0 },
21790 	{ "CIM_PF_MAILBOX_DATA", 0x1fe54, 0 },
21791 	{ "CIM_PF_MAILBOX_DATA", 0x1fe58, 0 },
21792 	{ "CIM_PF_MAILBOX_DATA", 0x1fe5c, 0 },
21793 	{ "CIM_PF_MAILBOX_DATA", 0x1fe60, 0 },
21794 	{ "CIM_PF_MAILBOX_DATA", 0x1fe64, 0 },
21795 	{ "CIM_PF_MAILBOX_DATA", 0x1fe68, 0 },
21796 	{ "CIM_PF_MAILBOX_DATA", 0x1fe6c, 0 },
21797 	{ "CIM_PF_MAILBOX_DATA", 0x1fe70, 0 },
21798 	{ "CIM_PF_MAILBOX_DATA", 0x1fe74, 0 },
21799 	{ "CIM_PF_MAILBOX_DATA", 0x1fe78, 0 },
21800 	{ "CIM_PF_MAILBOX_DATA", 0x1fe7c, 0 },
21801 	{ "CIM_PF_MAILBOX_CTRL", 0x1fe80, 0 },
21805 		{ "MBOwner", 0, 2 },
21806 	{ "CIM_PF_MAILBOX_ACC_STATUS", 0x1fe84, 0 },
21808 	{ "CIM_PF_HOST_INT_ENABLE", 0x1fe88, 0 },
21810 	{ "CIM_PF_HOST_INT_CAUSE", 0x1fe8c, 0 },
21812 	{ "CIM_PF_MAILBOX_CTRL_SHADOW_COPY", 0x1fe90, 0 },
21816 		{ "MBOwner", 0, 2 },
21821 	{ "TP_IN_CONFIG", 0x7d00, 0 },
21853 		{ "CFastDemuxEn", 0, 1 },
21854 	{ "TP_OUT_CONFIG", 0x7d04, 0 },
21877 		{ "CEthernet", 0, 1 },
21878 	{ "TP_GLOBAL_CONFIG", 0x7d08, 0 },
21892 		{ "IPTTL", 0, 8 },
21893 	{ "TP_DB_CONFIG", 0x7d0c, 0 },
21900 		{ "RxMaxOpCnt", 0, 7 },
21901 	{ "TP_CMM_TCB_BASE", 0x7d10, 0 },
21902 	{ "TP_CMM_MM_BASE", 0x7d14, 0 },
21903 	{ "TP_CMM_TIMER_BASE", 0x7d18, 0 },
21904 	{ "TP_CMM_MM_FLST_SIZE", 0x7d1c, 0 },
21906 		{ "TxPoolSize", 0, 16 },
21907 	{ "TP_PMM_TX_BASE", 0x7d20, 0 },
21908 	{ "TP_PMM_DEFRAG_BASE", 0x7d24, 0 },
21909 	{ "TP_PMM_RX_BASE", 0x7d28, 0 },
21910 	{ "TP_PMM_RX_PAGE_SIZE", 0x7d2c, 0 },
21911 	{ "TP_PMM_RX_MAX_PAGE", 0x7d30, 0 },
21913 		{ "PMRxMaxPage", 0, 21 },
21914 	{ "TP_PMM_TX_PAGE_SIZE", 0x7d34, 0 },
21915 	{ "TP_PMM_TX_MAX_PAGE", 0x7d38, 0 },
21917 		{ "PMTxMaxPage", 0, 21 },
21918 	{ "TP_TCP_OPTIONS", 0x7d40, 0 },
21925 		{ "TimestampsMode", 0, 2 },
21926 	{ "TP_DACK_CONFIG", 0x7d44, 0 },
21934 		{ "Mode", 0, 1 },
21935 	{ "TP_PC_CONFIG", 0x7d48, 0 },
21967 		{ "TxDataAckPageEnable", 0, 1 },
21968 	{ "TP_PC_CONFIG2", 0x7d4c, 0 },
22000 		{ "EnableTnlOfdClosed", 0, 1 },
22001 	{ "TP_TCP_BACKOFF_REG0", 0x7d50, 0 },
22005 		{ "TimerBackoffIndex0", 0, 8 },
22006 	{ "TP_TCP_BACKOFF_REG1", 0x7d54, 0 },
22010 		{ "TimerBackoffIndex4", 0, 8 },
22011 	{ "TP_TCP_BACKOFF_REG2", 0x7d58, 0 },
22015 		{ "TimerBackoffIndex8", 0, 8 },
22016 	{ "TP_TCP_BACKOFF_REG3", 0x7d5c, 0 },
22020 		{ "TimerBackoffIndex12", 0, 8 },
22021 	{ "TP_PARA_REG0", 0x7d60, 0 },
22042 		{ "SwsTimer", 0, 1 },
22043 	{ "TP_PARA_REG1", 0x7d64, 0 },
22045 		{ "InitialSSThresh", 0, 16 },
22046 	{ "TP_PARA_REG2", 0x7d68, 0 },
22048 		{ "RxCoalesceSize", 0, 16 },
22049 	{ "TP_PARA_REG3", 0x7d6c, 0 },
22074 		{ "RxCoalescePshEn", 0, 1 },
22075 	{ "TP_PARA_REG4", 0x7d70, 0 },
22091 		{ "ByteCountReno", 0, 1 },
22092 	{ "TP_PARA_REG5", 0x7d74, 0 },
22106 		{ "PushTimerEnable", 0, 1 },
22107 	{ "TP_PARA_REG6", 0x7d78, 0 },
22131 		{ "DisablePDUxmt", 0, 1 },
22132 	{ "TP_PARA_REG7", 0x7d7c, 0 },
22134 		{ "PMMaxXferLen0", 0, 16 },
22135 	{ "TP_ENG_CONFIG", 0x7d80, 0 },
22142 		{ "EngineLatencyBase", 0, 4 },
22143 	{ "TP_PARA_REG8", 0x7d84, 0 },
22146 		{ "EcnSynEct", 0, 1 },
22147 	{ "TP_ERR_CONFIG", 0x7d8c, 0 },
22179 		{ "DropErrorAny", 0, 1 },
22180 	{ "TP_TIMER_RESOLUTION", 0x7d90, 0 },
22183 		{ "DelayedACKResolution", 0, 8 },
22184 	{ "TP_MSL", 0x7d94, 0 },
22185 	{ "TP_RXT_MIN", 0x7d98, 0 },
22186 	{ "TP_RXT_MAX", 0x7d9c, 0 },
22187 	{ "TP_PERS_MIN", 0x7da0, 0 },
22188 	{ "TP_PERS_MAX", 0x7da4, 0 },
22189 	{ "TP_KEEP_IDLE", 0x7da8, 0 },
22190 	{ "TP_KEEP_INTVL", 0x7dac, 0 },
22191 	{ "TP_INIT_SRTT", 0x7db0, 0 },
22193 		{ "InitSrtt", 0, 16 },
22194 	{ "TP_DACK_TIMER", 0x7db4, 0 },
22195 	{ "TP_FINWAIT2_TIMER", 0x7db8, 0 },
22196 	{ "TP_FAST_FINWAIT2_TIMER", 0x7dbc, 0 },
22197 	{ "TP_SHIFT_CNT", 0x7dc0, 0 },
22204 		{ "KeepaliveMaxR2", 0, 4 },
22205 	{ "TP_TM_CONFIG", 0x7dc4, 0 },
22206 	{ "TP_TIME_LO", 0x7dc8, 0 },
22207 	{ "TP_TIME_HI", 0x7dcc, 0 },
22208 	{ "TP_PORT_MTU_0", 0x7dd0, 0 },
22210 		{ "Port0MTUValue", 0, 16 },
22211 	{ "TP_PORT_MTU_1", 0x7dd4, 0 },
22213 		{ "Port2MTUValue", 0, 16 },
22214 	{ "TP_PACE_TABLE", 0x7dd8, 0 },
22215 	{ "TP_CCTRL_TABLE", 0x7ddc, 0 },
22217 		{ "RowValue", 0, 16 },
22218 	{ "TP_MTU_TABLE", 0x7de4, 0 },
22221 		{ "MTUValue", 0, 14 },
22222 	{ "TP_ULP_TABLE", 0x7de8, 0 },
22238 		{ "ULPType0Offset", 0, 3 },
22239 	{ "TP_RSS_LKP_TABLE", 0x7dec, 0 },
22243 		{ "LkpTblQueue0", 0, 10 },
22244 	{ "TP_RSS_CONFIG", 0x7df0, 0 },
22276 		{ "Disable", 0, 1 },
22277 	{ "TP_RSS_CONFIG_TNL", 0x7df4, 0 },
22282 		{ "UseWireCh", 0, 1 },
22283 	{ "TP_RSS_CONFIG_OFD", 0x7df8, 0 },
22288 	{ "TP_RSS_CONFIG_SYN", 0x7dfc, 0 },
22290 		{ "UseWireCh", 0, 1 },
22291 	{ "TP_RSS_CONFIG_VRT", 0x7e00, 0 },
22305 		{ "KeyWrAddr", 0, 4 },
22306 	{ "TP_RSS_CONFIG_CNG", 0x7e04, 0 },
22329 		{ "Queue", 0, 10 },
22330 	{ "TP_LA_TABLE_0", 0x7e10, 0 },
22332 		{ "VirtPort0Table", 0, 16 },
22333 	{ "TP_LA_TABLE_1", 0x7e14, 0 },
22335 		{ "VirtPort2Table", 0, 16 },
22336 	{ "TP_TM_PIO_ADDR", 0x7e18, 0 },
22337 	{ "TP_TM_PIO_DATA", 0x7e1c, 0 },
22338 	{ "TP_MOD_CONFIG", 0x7e24, 0 },
22342 		{ "TxChannelXoffEn", 0, 4 },
22343 	{ "TP_TX_MOD_QUEUE_REQ_MAP", 0x7e28, 0 },
22346 		{ "TX_MOD_QUEUE_REQ_MAP", 0, 16 },
22347 	{ "TP_TX_MOD_QUEUE_WEIGHT1", 0x7e2c, 0 },
22351 		{ "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 },
22352 	{ "TP_TX_MOD_QUEUE_WEIGHT0", 0x7e30, 0 },
22356 		{ "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 },
22357 	{ "TP_TX_MOD_CHANNEL_WEIGHT", 0x7e34, 0 },
22361 		{ "CH0", 0, 8 },
22362 	{ "TP_MOD_RATE_LIMIT", 0x7e38, 0 },
22366 		{ "TX_MOD_RATE_LIMIT_TICK", 0, 8 },
22367 	{ "TP_PIO_ADDR", 0x7e40, 0 },
22368 	{ "TP_PIO_DATA", 0x7e44, 0 },
22369 	{ "TP_RESET", 0x7e4c, 0 },
22371 		{ "TPReset", 0, 1 },
22372 	{ "TP_MIB_INDEX", 0x7e50, 0 },
22373 	{ "TP_MIB_DATA", 0x7e54, 0 },
22374 	{ "TP_SYNC_TIME_HI", 0x7e58, 0 },
22375 	{ "TP_SYNC_TIME_LO", 0x7e5c, 0 },
22376 	{ "TP_CMM_MM_RX_FLST_BASE", 0x7e60, 0 },
22377 	{ "TP_CMM_MM_TX_FLST_BASE", 0x7e64, 0 },
22378 	{ "TP_CMM_MM_PS_FLST_BASE", 0x7e68, 0 },
22379 	{ "TP_CMM_MM_MAX_PSTRUCT", 0x7e6c, 0 },
22380 	{ "TP_INT_ENABLE", 0x7e70, 0 },
22411 		{ "DelInvFifoPerr", 0, 1 },
22412 	{ "TP_INT_CAUSE", 0x7e74, 0 },
22443 		{ "DelInvFifoPerr", 0, 1 },
22444 	{ "TP_PER_ENABLE", 0x7e78, 0 },
22475 		{ "DelInvFifoPerr", 0, 1 },
22476 	{ "TP_FLM_FREE_PS_CNT", 0x7e80, 0 },
22477 	{ "TP_FLM_FREE_RX_CNT", 0x7e84, 0 },
22479 		{ "FreeRxPageCount", 0, 21 },
22480 	{ "TP_FLM_FREE_TX_CNT", 0x7e88, 0 },
22482 		{ "FreeTxPageCount", 0, 21 },
22483 	{ "TP_TM_HEAP_PUSH_CNT", 0x7e8c, 0 },
22484 	{ "TP_TM_HEAP_POP_CNT", 0x7e90, 0 },
22485 	{ "TP_TM_DACK_PUSH_CNT", 0x7e94, 0 },
22486 	{ "TP_TM_DACK_POP_CNT", 0x7e98, 0 },
22487 	{ "TP_TM_MOD_PUSH_CNT", 0x7e9c, 0 },
22488 	{ "TP_MOD_POP_CNT", 0x7ea0, 0 },
22489 	{ "TP_TIMER_SEPARATOR", 0x7ea4, 0 },
22491 		{ "DisableTimeFreeze", 0, 1 },
22492 	{ "TP_STAMP_TIME", 0x7ea8, 0 },
22493 	{ "TP_DEBUG_FLAGS", 0x7eac, 0 },
22519 		{ "TxRcvAdvLtMss", 0, 1 },
22520 	{ "TP_RX_SCHED", 0x7eb0, 0 },
22533 	{ "TP_TX_SCHED", 0x7eb4, 0 },
22545 		{ "CommitLimit0", 0, 6 },
22546 	{ "TP_FX_SCHED", 0x7eb8, 0 },
22564 		{ "RxModXoff0", 0, 1 },
22565 	{ "TP_TX_ORATE", 0x7ebc, 0 },
22569 		{ "OfdRate0", 0, 8 },
22570 	{ "TP_IX_SCHED0", 0x7ec0, 0 },
22571 	{ "TP_IX_SCHED1", 0x7ec4, 0 },
22572 	{ "TP_IX_SCHED2", 0x7ec8, 0 },
22573 	{ "TP_IX_SCHED3", 0x7ecc, 0 },
22574 	{ "TP_TX_TRATE", 0x7ed0, 0 },
22578 		{ "TnlRate0", 0, 8 },
22579 	{ "TP_DBG_LA_CONFIG", 0x7ed4, 0 },
22586 		{ "DbgLaRptr", 0, 7 },
22587 	{ "TP_DBG_LA_DATAL", 0x7ed8, 0 },
22588 	{ "TP_DBG_LA_DATAH", 0x7edc, 0 },
22589 	{ "TP_PROTOCOL_CNTRL", 0x7ee8, 0 },
22594 		{ "RequestDone", 0, 1 },
22595 	{ "TP_PROTOCOL_DATA0", 0x7eec, 0 },
22596 	{ "TP_PROTOCOL_DATA1", 0x7ef0, 0 },
22597 	{ "TP_PROTOCOL_DATA2", 0x7ef4, 0 },
22598 	{ "TP_PROTOCOL_DATA3", 0x7ef8, 0 },
22599 	{ "TP_PROTOCOL_DATA4", 0x7efc, 0 },
22604 	{ "ULP_TX_CONFIG", 0x8dc0, 0 },
22621 		{ "extra_tag_insertion_enable", 0, 1 },
22622 	{ "ULP_TX_PERR_INJECT", 0x8dc4, 0 },
22624 		{ "InjectDataErr", 0, 1 },
22625 	{ "ULP_TX_INT_ENABLE", 0x8dc8, 0 },
22654 	{ "ULP_TX_INT_CAUSE", 0x8dcc, 0 },
22683 	{ "ULP_TX_PERR_ENABLE", 0x8dd0, 0 },
22708 	{ "ULP_TX_TPT_LLIMIT", 0x8dd4, 0 },
22709 	{ "ULP_TX_TPT_ULIMIT", 0x8dd8, 0 },
22710 	{ "ULP_TX_PBL_LLIMIT", 0x8ddc, 0 },
22711 	{ "ULP_TX_PBL_ULIMIT", 0x8de0, 0 },
22712 	{ "ULP_TX_TLS_CTL", 0x8de4, 0 },
22717 		{ "TlsDisable", 0, 1 },
22718 	{ "ULP_TX_CPL_PACK_SIZE1", 0x8df8, 0 },
22722 		{ "Ch0Size1", 0, 8 },
22723 	{ "ULP_TX_CPL_PACK_SIZE2", 0x8dfc, 0 },
22727 		{ "Ch0Size2", 0, 8 },
22728 	{ "ULP_TX_ERR_MSG2CIM", 0x8e00, 0 },
22729 	{ "ULP_TX_ERR_TABLE_BASE", 0x8e04, 0 },
22730 	{ "ULP_TX_ERR_CNT_CH0", 0x8e10, 0 },
22731 	{ "ULP_TX_ERR_CNT_CH1", 0x8e14, 0 },
22732 	{ "ULP_TX_ERR_CNT_CH2", 0x8e18, 0 },
22733 	{ "ULP_TX_ERR_CNT_CH3", 0x8e1c, 0 },
22734 	{ "ULP_TX_FC_SOF", 0x8e20, 0 },
22738 		{ "SOF_2", 0, 8 },
22739 	{ "ULP_TX_FC_EOF", 0x8e24, 0 },
22743 		{ "EOF_2", 0, 8 },
22744 	{ "ULP_TX_CGEN_GLOBAL", 0x8e28, 0 },
22745 	{ "ULP_TX_CGEN", 0x8e2c, 0 },
22748 		{ "ULP_TX_CGEN_Channel", 0, 4 },
22749 	{ "ULP_TX_MEM_CFG", 0x8e30, 0 },
22750 	{ "ULP_TX_PERR_INJECT_2", 0x8e34, 0 },
22752 		{ "InjectDataErr", 0, 1 },
22753 	{ "ULP_TX_FPGA_CMD_CTRL", 0x8e38, 0 },
22754 	{ "ULP_TX_FPGA_CMD_0", 0x8e3c, 0 },
22755 	{ "ULP_TX_FPGA_CMD_1", 0x8e40, 0 },
22756 	{ "ULP_TX_FPGA_CMD_2", 0x8e44, 0 },
22757 	{ "ULP_TX_FPGA_CMD_3", 0x8e48, 0 },
22758 	{ "ULP_TX_FPGA_CMD_4", 0x8e4c, 0 },
22759 	{ "ULP_TX_FPGA_CMD_5", 0x8e50, 0 },
22760 	{ "ULP_TX_FPGA_CMD_6", 0x8e54, 0 },
22761 	{ "ULP_TX_FPGA_CMD_7", 0x8e58, 0 },
22762 	{ "ULP_TX_FPGA_CMD_8", 0x8e5c, 0 },
22763 	{ "ULP_TX_FPGA_CMD_9", 0x8e60, 0 },
22764 	{ "ULP_TX_FPGA_CMD_10", 0x8e64, 0 },
22765 	{ "ULP_TX_FPGA_CMD_11", 0x8e68, 0 },
22766 	{ "ULP_TX_FPGA_CMD_12", 0x8e6c, 0 },
22767 	{ "ULP_TX_FPGA_CMD_13", 0x8e70, 0 },
22768 	{ "ULP_TX_FPGA_CMD_14", 0x8e74, 0 },
22769 	{ "ULP_TX_FPGA_CMD_15", 0x8e78, 0 },
22770 	{ "ULP_TX_INT_ENABLE_2", 0x8e7c, 0 },
22802 		{ "t10_pi_sram_perr_set0", 0, 1 },
22803 	{ "ULP_TX_INT_CAUSE_2", 0x8e80, 0 },
22835 		{ "t10_pi_sram_perr_set0", 0, 1 },
22836 	{ "ULP_TX_PERR_ENABLE_2", 0x8e84, 0 },
22868 		{ "t10_pi_sram_perr_set0", 0, 1 },
22869 	{ "ULP_TX_SE_CNT_ERR", 0x8ea0, 0 },
22873 		{ "ERR_CH0", 0, 4 },
22874 	{ "ULP_TX_SE_CNT_CLR", 0x8ea4, 0 },
22879 		{ "CLR_CH0", 0, 4 },
22880 	{ "ULP_TX_SE_CNT_CH0", 0x8ea8, 0 },
22888 		{ "EOP_CNT_CIM2ULP", 0, 4 },
22889 	{ "ULP_TX_SE_CNT_CH1", 0x8eac, 0 },
22897 		{ "EOP_CNT_CIM2ULP", 0, 4 },
22898 	{ "ULP_TX_SE_CNT_CH2", 0x8eb0, 0 },
22906 		{ "EOP_CNT_CIM2ULP", 0, 4 },
22907 	{ "ULP_TX_SE_CNT_CH3", 0x8eb4, 0 },
22915 		{ "EOP_CNT_CIM2ULP", 0, 4 },
22916 	{ "ULP_TX_DROP_CNT", 0x8eb8, 0 },
22924 		{ "DROP_CH0", 0, 4 },
22925 	{ "ULP_TX_CSU_REVISION", 0x8ebc, 0 },
22926 	{ "ULP_TX_LA_RDPTR_0", 0x8ec0, 0 },
22927 	{ "ULP_TX_LA_RDDATA_0", 0x8ec4, 0 },
22928 	{ "ULP_TX_LA_WRPTR_0", 0x8ec8, 0 },
22929 	{ "ULP_TX_LA_RESERVED_0", 0x8ecc, 0 },
22930 	{ "ULP_TX_LA_RDPTR_1", 0x8ed0, 0 },
22931 	{ "ULP_TX_LA_RDDATA_1", 0x8ed4, 0 },
22932 	{ "ULP_TX_LA_WRPTR_1", 0x8ed8, 0 },
22933 	{ "ULP_TX_LA_RESERVED_1", 0x8edc, 0 },
22934 	{ "ULP_TX_LA_RDPTR_2", 0x8ee0, 0 },
22935 	{ "ULP_TX_LA_RDDATA_2", 0x8ee4, 0 },
22936 	{ "ULP_TX_LA_WRPTR_2", 0x8ee8, 0 },
22937 	{ "ULP_TX_LA_RESERVED_2", 0x8eec, 0 },
22938 	{ "ULP_TX_LA_RDPTR_3", 0x8ef0, 0 },
22939 	{ "ULP_TX_LA_RDDATA_3", 0x8ef4, 0 },
22940 	{ "ULP_TX_LA_WRPTR_3", 0x8ef8, 0 },
22941 	{ "ULP_TX_LA_RESERVED_3", 0x8efc, 0 },
22942 	{ "ULP_TX_LA_RDPTR_4", 0x8f00, 0 },
22943 	{ "ULP_TX_LA_RDDATA_4", 0x8f04, 0 },
22944 	{ "ULP_TX_LA_WRPTR_4", 0x8f08, 0 },
22945 	{ "ULP_TX_LA_RESERVED_4", 0x8f0c, 0 },
22946 	{ "ULP_TX_LA_RDPTR_5", 0x8f10, 0 },
22947 	{ "ULP_TX_LA_RDDATA_5", 0x8f14, 0 },
22948 	{ "ULP_TX_LA_WRPTR_5", 0x8f18, 0 },
22949 	{ "ULP_TX_LA_RESERVED_5", 0x8f1c, 0 },
22950 	{ "ULP_TX_LA_RDPTR_6", 0x8f20, 0 },
22951 	{ "ULP_TX_LA_RDDATA_6", 0x8f24, 0 },
22952 	{ "ULP_TX_LA_WRPTR_6", 0x8f28, 0 },
22953 	{ "ULP_TX_LA_RESERVED_6", 0x8f2c, 0 },
22954 	{ "ULP_TX_LA_RDPTR_7", 0x8f30, 0 },
22955 	{ "ULP_TX_LA_RDDATA_7", 0x8f34, 0 },
22956 	{ "ULP_TX_LA_WRPTR_7", 0x8f38, 0 },
22957 	{ "ULP_TX_LA_RESERVED_7", 0x8f3c, 0 },
22958 	{ "ULP_TX_LA_RDPTR_8", 0x8f40, 0 },
22959 	{ "ULP_TX_LA_RDDATA_8", 0x8f44, 0 },
22960 	{ "ULP_TX_LA_WRPTR_8", 0x8f48, 0 },
22961 	{ "ULP_TX_LA_RESERVED_8", 0x8f4c, 0 },
22962 	{ "ULP_TX_LA_RDPTR_9", 0x8f50, 0 },
22963 	{ "ULP_TX_LA_RDDATA_9", 0x8f54, 0 },
22964 	{ "ULP_TX_LA_WRPTR_9", 0x8f58, 0 },
22965 	{ "ULP_TX_LA_RESERVED_9", 0x8f5c, 0 },
22966 	{ "ULP_TX_LA_RDPTR_10", 0x8f60, 0 },
22967 	{ "ULP_TX_LA_RDDATA_10", 0x8f64, 0 },
22968 	{ "ULP_TX_LA_WRPTR_10", 0x8f68, 0 },
22969 	{ "ULP_TX_LA_RESERVED_10", 0x8f6c, 0 },
22970 	{ "ULP_TX_ASIC_DEBUG_CTRL", 0x8f70, 0 },
22971 	{ "ULP_TX_CPL_TX_DATA_FLAGS_MASK", 0x8f88, 0 },
22992 		{ "shove_last", 0, 1 },
22993 	{ "ULP_TX_TLS_IND_CMD", 0x8fb8, 0 },
22994 	{ "ULP_TX_TLS_IND_DATA", 0x8fbc, 0 },
22995 	{ "ULP_TX_ASIC_DEBUG_0", 0x8f74, 0 },
22996 	{ "ULP_TX_ASIC_DEBUG_1", 0x8f78, 0 },
22997 	{ "ULP_TX_ASIC_DEBUG_2", 0x8f7c, 0 },
22998 	{ "ULP_TX_ASIC_DEBUG_3", 0x8f80, 0 },
22999 	{ "ULP_TX_ASIC_DEBUG_4", 0x8f84, 0 },
23004 	{ "PM_RX_CFG", 0x8fc0, 0 },
23010 		{ "strobe0", 0, 1 },
23011 	{ "PM_RX_MODE", 0x8fc4, 0 },
23015 		{ "prefetch_enable", 0, 1 },
23016 	{ "PM_RX_STAT_CONFIG", 0x8fc8, 0 },
23017 	{ "PM_RX_STAT_COUNT", 0x8fcc, 0 },
23018 	{ "PM_RX_DBG_CTRL", 0x8fd0, 0 },
23021 		{ "PMDbgAddr", 0, 17 },
23022 	{ "PM_RX_DBG_DATA", 0x8fd4, 0 },
23023 	{ "PM_RX_INT_ENABLE", 0x8fd8, 0 },
23052 		{ "e_pcmd_par_error", 0, 1 },
23053 	{ "PM_RX_INT_CAUSE", 0x8fdc, 0 },
23082 		{ "e_pcmd_par_error", 0, 1 },
23087 	{ "PM_TX_CFG", 0x8fe0, 0 },
23095 		{ "strobe0", 0, 1 },
23096 	{ "PM_TX_MODE", 0x8fe4, 0 },
23103 		{ "prefetch_enable", 0, 1 },
23104 	{ "PM_TX_STAT_CONFIG", 0x8fe8, 0 },
23105 	{ "PM_TX_STAT_COUNT", 0x8fec, 0 },
23106 	{ "PM_TX_DBG_CTRL", 0x8ff0, 0 },
23109 		{ "PMDbgAddr", 0, 17 },
23110 	{ "PM_TX_DBG_DATA", 0x8ff4, 0 },
23111 	{ "PM_TX_INT_ENABLE", 0x8ff8, 0 },
23143 		{ "c_pcmd_par_error", 0, 1 },
23144 	{ "PM_TX_INT_CAUSE", 0x8ffc, 0 },
23176 		{ "c_pcmd_par_error", 0, 1 },
23181 	{ "MPS_CMN_CTL", 0x9000, 0 },
23188 		{ "NumPorts", 0, 2 },
23189 	{ "MPS_INT_ENABLE", 0x9004, 0 },
23195 		{ "PLIntEnb", 0, 1 },
23196 	{ "MPS_INT_CAUSE", 0x9008, 0 },
23202 		{ "PLInt", 0, 1 },
23203 	{ "MPS_CGEN_GLOBAL", 0x900c, 0 },
23204 	{ "MPS_VF_TX_CTL_31_0", 0x9010, 0 },
23205 	{ "MPS_VF_TX_CTL_63_32", 0x9014, 0 },
23206 	{ "MPS_VF_TX_CTL_95_64", 0x9018, 0 },
23207 	{ "MPS_VF_TX_CTL_127_96", 0x901c, 0 },
23208 	{ "MPS_VF_TX_CTL_159_128", 0x9100, 0 },
23209 	{ "MPS_VF_TX_CTL_191_160", 0x9104, 0 },
23210 	{ "MPS_VF_TX_CTL_223_192", 0x9108, 0 },
23211 	{ "MPS_VF_TX_CTL_255_224", 0x910c, 0 },
23212 	{ "MPS_VF_RX_CTL_31_0", 0x9020, 0 },
23213 	{ "MPS_VF_RX_CTL_63_32", 0x9024, 0 },
23214 	{ "MPS_VF_RX_CTL_95_64", 0x9028, 0 },
23215 	{ "MPS_VF_RX_CTL_127_96", 0x902c, 0 },
23216 	{ "MPS_VF_RX_CTL_159_128", 0x9110, 0 },
23217 	{ "MPS_VF_RX_CTL_191_160", 0x9114, 0 },
23218 	{ "MPS_VF_RX_CTL_223_192", 0x9118, 0 },
23219 	{ "MPS_VF_RX_CTL_255_224", 0x911c, 0 },
23220 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP0", 0x9030, 0 },
23221 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP1", 0x9034, 0 },
23222 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP2", 0x9038, 0 },
23223 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP3", 0x903c, 0 },
23224 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP0", 0x9040, 0 },
23225 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP1", 0x9044, 0 },
23226 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP2", 0x9048, 0 },
23227 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP3", 0x904c, 0 },
23228 	{ "MPS_TP_CSIDE_MUX_CTL_P0", 0x9050, 0 },
23229 	{ "MPS_TP_CSIDE_MUX_CTL_P1", 0x9054, 0 },
23230 	{ "MPS_WOL_CTL_MODE", 0x9058, 0 },
23231 	{ "MPS_FPGA_DEBUG", 0x9060, 0 },
23235 		{ "CH_MAP0", 0, 2 },
23236 	{ "MPS_DEBUG_CTL", 0x9068, 0 },
23240 		{ "DbgSel_L", 0, 5 },
23241 	{ "MPS_DEBUG_DATA_REG_L", 0x906c, 0 },
23242 	{ "MPS_DEBUG_DATA_REG_H", 0x9070, 0 },
23243 	{ "MPS_TOP_SPARE", 0x9074, 0 },
23252 		{ "oVlanSelMac0", 0, 1 },
23253 	{ "MPS_BUILD_REVISION", 0x9078, 0 },
23254 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH0", 0x907c, 0 },
23255 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH1", 0x9080, 0 },
23256 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH2", 0x9084, 0 },
23257 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH3", 0x9088, 0 },
23258 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH4", 0x908c, 0 },
23259 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH5", 0x9090, 0 },
23260 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH6", 0x9094, 0 },
23261 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH7", 0x9098, 0 },
23262 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH8", 0x909c, 0 },
23263 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH9", 0x90a0, 0 },
23264 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH10", 0x90a4, 0 },
23265 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH11", 0x90a8, 0 },
23266 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH12", 0x90ac, 0 },
23267 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH13", 0x90b0, 0 },
23268 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH14", 0x90b4, 0 },
23269 	{ "MPS_TX_PAUSE_DURATION_BUF_GRP_TH15", 0x90b8, 0 },
23270 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH0", 0x90bc, 0 },
23271 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH1", 0x90c0, 0 },
23272 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH2", 0x90c4, 0 },
23273 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH3", 0x90c8, 0 },
23274 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH4", 0x90cc, 0 },
23275 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH5", 0x90d0, 0 },
23276 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH6", 0x90d4, 0 },
23277 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH7", 0x90d8, 0 },
23278 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH8", 0x90dc, 0 },
23279 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH9", 0x90e0, 0 },
23280 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH10", 0x90e4, 0 },
23281 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH11", 0x90e8, 0 },
23282 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH12", 0x90ec, 0 },
23283 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH13", 0x90f0, 0 },
23284 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH14", 0x90f4, 0 },
23285 	{ "MPS_TX_PAUSE_RETRANS_BUF_GRP_TH15", 0x90f8, 0 },
23286 	{ "MPS_FPGA_BIST_CFG_P0", 0x9120, 0 },
23288 		{ "BaseAddr", 0, 16 },
23289 	{ "MPS_FPGA_BIST_CFG_P1", 0x9124, 0 },
23291 		{ "BaseAddr", 0, 16 },
23292 	{ "MPS_PORT_CTL", 0x30000, 0 },
23300 	{ "MPS_PORT_PAUSE_CTL", 0x30004, 0 },
23301 	{ "MPS_PORT_TX_PAUSE_CTL", 0x30008, 0 },
23305 		{ "RxSendEn", 0, 8 },
23306 	{ "MPS_PORT_TX_PAUSE_CTL2", 0x3000c, 0 },
23307 	{ "MPS_PORT_RX_PAUSE_CTL", 0x30010, 0 },
23309 		{ "RxHaltEn", 0, 8 },
23310 	{ "MPS_PORT_TX_PAUSE_STATUS", 0x30014, 0 },
23313 		{ "RxSending", 0, 8 },
23314 	{ "MPS_PORT_RX_PAUSE_STATUS", 0x30018, 0 },
23316 		{ "RxHalted", 0, 8 },
23317 	{ "MPS_PORT_TX_PAUSE_DEST_L", 0x3001c, 0 },
23318 	{ "MPS_PORT_TX_PAUSE_DEST_H", 0x30020, 0 },
23319 	{ "MPS_PORT_TX_PAUSE_SOURCE_L", 0x30024, 0 },
23320 	{ "MPS_PORT_TX_PAUSE_SOURCE_H", 0x30028, 0 },
23321 	{ "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3002c, 0 },
23329 		{ "Prty0", 0, 2 },
23330 	{ "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x30030, 0 },
23338 		{ "Prty0", 0, 4 },
23339 	{ "MPS_PORT_CTL", 0x34000, 0 },
23347 	{ "MPS_PORT_PAUSE_CTL", 0x34004, 0 },
23348 	{ "MPS_PORT_TX_PAUSE_CTL", 0x34008, 0 },
23352 		{ "RxSendEn", 0, 8 },
23353 	{ "MPS_PORT_TX_PAUSE_CTL2", 0x3400c, 0 },
23354 	{ "MPS_PORT_RX_PAUSE_CTL", 0x34010, 0 },
23356 		{ "RxHaltEn", 0, 8 },
23357 	{ "MPS_PORT_TX_PAUSE_STATUS", 0x34014, 0 },
23360 		{ "RxSending", 0, 8 },
23361 	{ "MPS_PORT_RX_PAUSE_STATUS", 0x34018, 0 },
23363 		{ "RxHalted", 0, 8 },
23364 	{ "MPS_PORT_TX_PAUSE_DEST_L", 0x3401c, 0 },
23365 	{ "MPS_PORT_TX_PAUSE_DEST_H", 0x34020, 0 },
23366 	{ "MPS_PORT_TX_PAUSE_SOURCE_L", 0x34024, 0 },
23367 	{ "MPS_PORT_TX_PAUSE_SOURCE_H", 0x34028, 0 },
23368 	{ "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x3402c, 0 },
23376 		{ "Prty0", 0, 2 },
23377 	{ "MPS_PORT_PRTY_BUFFER_GROUP_TH_MAP", 0x34030, 0 },
23385 		{ "Prty0", 0, 4 },
23386 	{ "MPS_PF_CTL", 0x1e2c0, 0 },
23388 		{ "RxEn", 0, 1 },
23389 	{ "MPS_PF_CTL", 0x1e6c0, 0 },
23391 		{ "RxEn", 0, 1 },
23392 	{ "MPS_PF_CTL", 0x1eac0, 0 },
23394 		{ "RxEn", 0, 1 },
23395 	{ "MPS_PF_CTL", 0x1eec0, 0 },
23397 		{ "RxEn", 0, 1 },
23398 	{ "MPS_PF_CTL", 0x1f2c0, 0 },
23400 		{ "RxEn", 0, 1 },
23401 	{ "MPS_PF_CTL", 0x1f6c0, 0 },
23403 		{ "RxEn", 0, 1 },
23404 	{ "MPS_PF_CTL", 0x1fac0, 0 },
23406 		{ "RxEn", 0, 1 },
23407 	{ "MPS_PF_CTL", 0x1fec0, 0 },
23409 		{ "RxEn", 0, 1 },
23410 	{ "MPS_RX_CTL", 0x11000, 0 },
23415 		{ "SNF", 0, 8 },
23416 	{ "MPS_RX_PORT_MUX_CTL", 0x11004, 0 },
23418 		{ "CTL_P0", 0, 4 },
23419 	{ "MPS_RX_FIFO_0_CTL", 0x11008, 0 },
23420 	{ "MPS_RX_FIFO_1_CTL", 0x1100c, 0 },
23421 	{ "MPS_RX_FIFO_2_CTL", 0x11010, 0 },
23422 	{ "MPS_RX_FIFO_3_CTL", 0x11014, 0 },
23423 	{ "MPS_RX_PG_HYST_BG0", 0x11048, 0 },
23425 		{ "TH", 0, 11 },
23426 	{ "MPS_RX_PG_HYST_BG1", 0x1104c, 0 },
23428 		{ "TH", 0, 11 },
23429 	{ "MPS_RX_PG_HYST_BG2", 0x11050, 0 },
23431 		{ "TH", 0, 11 },
23432 	{ "MPS_RX_PG_HYST_BG3", 0x11054, 0 },
23434 		{ "TH", 0, 11 },
23435 	{ "MPS_RX_OCH_CTL", 0x11058, 0 },
23440 		{ "STOP", 0, 5 },
23441 	{ "MPS_RX_LPBK_BP0", 0x1105c, 0 },
23442 	{ "MPS_RX_LPBK_BP1", 0x11060, 0 },
23443 	{ "MPS_RX_LPBK_BP2", 0x11064, 0 },
23444 	{ "MPS_RX_LPBK_BP3", 0x11068, 0 },
23445 	{ "MPS_RX_PORT_GAP", 0x1106c, 0 },
23446 	{ "MPS_RX_PERR_INT_CAUSE", 0x11074, 0 },
23453 	{ "MPS_RX_PERR_INT_ENABLE", 0x11078, 0 },
23460 	{ "MPS_RX_PERR_ENABLE", 0x1107c, 0 },
23467 	{ "MPS_RX_PERR_INJECT", 0x11080, 0 },
23469 		{ "InjectDataErr", 0, 1 },
23470 	{ "MPS_RX_FUNC_INT_CAUSE", 0x11084, 0 },
23486 		{ "PG_TH_INT0", 0, 1 },
23487 	{ "MPS_RX_FUNC_INT_ENABLE", 0x11088, 0 },
23503 		{ "PG_TH_INT0", 0, 1 },
23504 	{ "MPS_RX_REPL_CTL", 0x11098, 0 },
23505 	{ "MPS_RX_PPP_ATRB", 0x1109c, 0 },
23507 		{ "OPCODE", 0, 16 },
23508 	{ "MPS_RX_QFC0_ATRB", 0x110a0, 0 },
23510 		{ "DA", 0, 16 },
23511 	{ "MPS_RX_QFC1_ATRB", 0x110a4, 0 },
23512 	{ "MPS_RX_PT_ARB0", 0x110a8, 0 },
23514 		{ "MAC_WT", 0, 14 },
23515 	{ "MPS_RX_PT_ARB1", 0x110ac, 0 },
23517 		{ "MAC_WT", 0, 14 },
23518 	{ "MPS_RX_PT_ARB2", 0x110b0, 0 },
23520 		{ "MAC_WT", 0, 14 },
23521 	{ "MPS_PF_OUT_EN", 0x110b4, 0 },
23522 	{ "MPS_BMC_MTU", 0x110b8, 0 },
23523 	{ "MPS_BMC_PKT_CNT", 0x110bc, 0 },
23524 	{ "MPS_BMC_BYTE_CNT", 0x110c0, 0 },
23525 	{ "MPS_PFVF_ATRB_CTL", 0x110c4, 0 },
23527 		{ "PFVF", 0, 9 },
23528 	{ "MPS_PFVF_ATRB", 0x110c8, 0 },
23534 		{ "MTU", 0, 14 },
23535 	{ "MPS_PFVF_ATRB_FLTR0", 0x110cc, 0 },
23537 		{ "VLAN_ID", 0, 12 },
23538 	{ "MPS_PFVF_ATRB_FLTR1", 0x110d0, 0 },
23540 		{ "VLAN_ID", 0, 12 },
23541 	{ "MPS_PFVF_ATRB_FLTR2", 0x110d4, 0 },
23543 		{ "VLAN_ID", 0, 12 },
23544 	{ "MPS_PFVF_ATRB_FLTR3", 0x110d8, 0 },
23546 		{ "VLAN_ID", 0, 12 },
23547 	{ "MPS_PFVF_ATRB_FLTR4", 0x110dc, 0 },
23549 		{ "VLAN_ID", 0, 12 },
23550 	{ "MPS_PFVF_ATRB_FLTR5", 0x110e0, 0 },
23552 		{ "VLAN_ID", 0, 12 },
23553 	{ "MPS_PFVF_ATRB_FLTR6", 0x110e4, 0 },
23555 		{ "VLAN_ID", 0, 12 },
23556 	{ "MPS_PFVF_ATRB_FLTR7", 0x110e8, 0 },
23558 		{ "VLAN_ID", 0, 12 },
23559 	{ "MPS_PFVF_ATRB_FLTR8", 0x110ec, 0 },
23561 		{ "VLAN_ID", 0, 12 },
23562 	{ "MPS_PFVF_ATRB_FLTR9", 0x110f0, 0 },
23564 		{ "VLAN_ID", 0, 12 },
23565 	{ "MPS_PFVF_ATRB_FLTR10", 0x110f4, 0 },
23567 		{ "VLAN_ID", 0, 12 },
23568 	{ "MPS_PFVF_ATRB_FLTR11", 0x110f8, 0 },
23570 		{ "VLAN_ID", 0, 12 },
23571 	{ "MPS_PFVF_ATRB_FLTR12", 0x110fc, 0 },
23573 		{ "VLAN_ID", 0, 12 },
23574 	{ "MPS_PFVF_ATRB_FLTR13", 0x11100, 0 },
23576 		{ "VLAN_ID", 0, 12 },
23577 	{ "MPS_PFVF_ATRB_FLTR14", 0x11104, 0 },
23579 		{ "VLAN_ID", 0, 12 },
23580 	{ "MPS_PFVF_ATRB_FLTR15", 0x11108, 0 },
23582 		{ "VLAN_ID", 0, 12 },
23583 	{ "MPS_RPLC_MAP_CTL", 0x1110c, 0 },
23585 		{ "ADDR", 0, 10 },
23586 	{ "MPS_PF_RPLCT_MAP", 0x11110, 0 },
23587 	{ "MPS_VF_RPLCT_MAP0", 0x11114, 0 },
23588 	{ "MPS_VF_RPLCT_MAP1", 0x11118, 0 },
23589 	{ "MPS_VF_RPLCT_MAP2", 0x1111c, 0 },
23590 	{ "MPS_VF_RPLCT_MAP3", 0x11120, 0 },
23591 	{ "MPS_VF_RPLCT_MAP4", 0x11300, 0 },
23592 	{ "MPS_VF_RPLCT_MAP5", 0x11304, 0 },
23593 	{ "MPS_VF_RPLCT_MAP6", 0x11308, 0 },
23594 	{ "MPS_VF_RPLCT_MAP7", 0x1130c, 0 },
23595 	{ "MPS_MEM_DBG_CTL", 0x1112c, 0 },
23598 		{ "ADDR", 0, 16 },
23599 	{ "MPS_PKD_MEM_DATA0", 0x11130, 0 },
23600 	{ "MPS_PKD_MEM_DATA1", 0x11134, 0 },
23601 	{ "MPS_PKD_MEM_DATA2", 0x11138, 0 },
23602 	{ "MPS_PGD_MEM_DATA", 0x1113c, 0 },
23603 	{ "MPS_RX_SE_CNT_ERR", 0x11140, 0 },
23604 	{ "MPS_RX_SE_CNT_CLR", 0x11144, 0 },
23605 	{ "MPS_RX_SE_CNT_IN0", 0x11148, 0 },
23609 		{ "EOP_CNT_IN", 0, 8 },
23610 	{ "MPS_RX_SE_CNT_IN1", 0x1114c, 0 },
23614 		{ "EOP_CNT_IN", 0, 8 },
23615 	{ "MPS_RX_SE_CNT_IN2", 0x11150, 0 },
23619 		{ "EOP_CNT_IN", 0, 8 },
23620 	{ "MPS_RX_SE_CNT_IN3", 0x11154, 0 },
23624 		{ "EOP_CNT_IN", 0, 8 },
23625 	{ "MPS_RX_SE_CNT_IN4", 0x11158, 0 },
23629 		{ "EOP_CNT_IN", 0, 8 },
23630 	{ "MPS_RX_SE_CNT_IN5", 0x1115c, 0 },
23634 		{ "EOP_CNT_IN", 0, 8 },
23635 	{ "MPS_RX_SE_CNT_IN6", 0x11160, 0 },
23639 		{ "EOP_CNT_IN", 0, 8 },
23640 	{ "MPS_RX_SE_CNT_IN7", 0x11164, 0 },
23644 		{ "EOP_CNT_IN", 0, 8 },
23645 	{ "MPS_RX_SE_CNT_OUT01", 0x11168, 0 },
23649 		{ "EOP_CNT_0", 0, 8 },
23650 	{ "MPS_RX_SE_CNT_OUT23", 0x1116c, 0 },
23654 		{ "EOP_CNT_2", 0, 8 },
23655 	{ "MPS_RX_SPI_ERR", 0x11170, 0 },
23657 		{ "ERR", 0, 21 },
23658 	{ "MPS_RX_IN_BUS_STATE", 0x11174, 0 },
23662 		{ "ST0", 0, 8 },
23663 	{ "MPS_RX_OUT_BUS_STATE", 0x11178, 0 },
23665 		{ "ST_TP", 0, 23 },
23666 	{ "MPS_RX_DBG_CTL", 0x1117c, 0 },
23671 		{ "IN_DBG_CHNL", 0, 3 },
23672 	{ "MPS_RX_SPARE", 0x11190, 0 },
23673 	{ "MPS_RX_PTP_ETYPE", 0x11194, 0 },
23675 		{ "PETYPE1", 0, 16 },
23676 	{ "MPS_RX_PTP_TCP", 0x11198, 0 },
23678 		{ "PTCPORT1", 0, 16 },
23679 	{ "MPS_RX_PTP_UDP", 0x1119c, 0 },
23681 		{ "PUDPORT1", 0, 16 },
23682 	{ "MPS_RX_PTP_CTL", 0x111a0, 0 },
23689 		{ "PETYPE1EN", 0, 4 },
23690 	{ "MPS_RX_PAUSE_GEN_TH_0_0", 0x111a4, 0 },
23692 		{ "TH_LOW", 0, 16 },
23693 	{ "MPS_RX_PAUSE_GEN_TH_0_1", 0x111a8, 0 },
23695 		{ "TH_LOW", 0, 16 },
23696 	{ "MPS_RX_PAUSE_GEN_TH_0_2", 0x111ac, 0 },
23698 		{ "TH_LOW", 0, 16 },
23699 	{ "MPS_RX_PAUSE_GEN_TH_0_3", 0x111b0, 0 },
23701 		{ "TH_LOW", 0, 16 },
23702 	{ "MPS_RX_PAUSE_GEN_TH_1_0", 0x111b4, 0 },
23704 		{ "TH_LOW", 0, 16 },
23705 	{ "MPS_RX_PAUSE_GEN_TH_1_1", 0x111b8, 0 },
23707 		{ "TH_LOW", 0, 16 },
23708 	{ "MPS_RX_PAUSE_GEN_TH_1_2", 0x111bc, 0 },
23710 		{ "TH_LOW", 0, 16 },
23711 	{ "MPS_RX_PAUSE_GEN_TH_1_3", 0x111c0, 0 },
23713 		{ "TH_LOW", 0, 16 },
23714 	{ "MPS_RX_PAUSE_GEN_TH_2_0", 0x111c4, 0 },
23716 		{ "TH_LOW", 0, 16 },
23717 	{ "MPS_RX_PAUSE_GEN_TH_2_1", 0x111c8, 0 },
23719 		{ "TH_LOW", 0, 16 },
23720 	{ "MPS_RX_PAUSE_GEN_TH_2_2", 0x111cc, 0 },
23722 		{ "TH_LOW", 0, 16 },
23723 	{ "MPS_RX_PAUSE_GEN_TH_2_3", 0x111d0, 0 },
23725 		{ "TH_LOW", 0, 16 },
23726 	{ "MPS_RX_PAUSE_GEN_TH_3_0", 0x111d4, 0 },
23728 		{ "TH_LOW", 0, 16 },
23729 	{ "MPS_RX_PAUSE_GEN_TH_3_1", 0x111d8, 0 },
23731 		{ "TH_LOW", 0, 16 },
23732 	{ "MPS_RX_PAUSE_GEN_TH_3_2", 0x111dc, 0 },
23734 		{ "TH_LOW", 0, 16 },
23735 	{ "MPS_RX_PAUSE_GEN_TH_3_3", 0x111e0, 0 },
23737 		{ "TH_LOW", 0, 16 },
23738 	{ "MPS_RX_MAC_CLS_DROP_CNT0", 0x111e4, 0 },
23739 	{ "MPS_RX_MAC_CLS_DROP_CNT1", 0x111e8, 0 },
23740 	{ "MPS_RX_MAC_CLS_DROP_CNT2", 0x111ec, 0 },
23741 	{ "MPS_RX_MAC_CLS_DROP_CNT3", 0x111f0, 0 },
23742 	{ "MPS_RX_LPBK_CLS_DROP_CNT0", 0x111f4, 0 },
23743 	{ "MPS_RX_LPBK_CLS_DROP_CNT1", 0x111f8, 0 },
23744 	{ "MPS_RX_LPBK_CLS_DROP_CNT2", 0x111fc, 0 },
23745 	{ "MPS_RX_LPBK_CLS_DROP_CNT3", 0x11200, 0 },
23746 	{ "MPS_RX_CGEN", 0x11204, 0 },
23750 		{ "MPS_RX_CGEN_MAC_IN", 0, 4 },
23751 	{ "MPS_RX_MAC_BG_PG_CNT0", 0x11208, 0 },
23753 		{ "MAC_ALLOC", 0, 11 },
23754 	{ "MPS_RX_MAC_BG_PG_CNT1", 0x1120c, 0 },
23756 		{ "MAC_ALLOC", 0, 11 },
23757 	{ "MPS_RX_MAC_BG_PG_CNT2", 0x11210, 0 },
23759 		{ "MAC_ALLOC", 0, 11 },
23760 	{ "MPS_RX_MAC_BG_PG_CNT3", 0x11214, 0 },
23762 		{ "MAC_ALLOC", 0, 11 },
23763 	{ "MPS_RX_LPBK_BG_PG_CNT0", 0x11218, 0 },
23765 		{ "LPBK_ALLOC", 0, 11 },
23766 	{ "MPS_RX_LPBK_BG_PG_CNT1", 0x1121c, 0 },
23768 		{ "LPBK_ALLOC", 0, 11 },
23769 	{ "MPS_RX_CONGESTION_THRESHOLD_BG0", 0x11220, 0 },
23771 		{ "CONG_TH", 0, 20 },
23772 	{ "MPS_RX_CONGESTION_THRESHOLD_BG1", 0x11224, 0 },
23774 		{ "CONG_TH", 0, 20 },
23775 	{ "MPS_RX_CONGESTION_THRESHOLD_BG2", 0x11228, 0 },
23777 		{ "CONG_TH", 0, 20 },
23778 	{ "MPS_RX_CONGESTION_THRESHOLD_BG3", 0x1122c, 0 },
23780 		{ "CONG_TH", 0, 20 },
23781 	{ "MPS_RX_GRE_PROT_TYPE", 0x11230, 0 },
23784 		{ "GRE", 0, 8 },
23785 	{ "MPS_RX_VXLAN_TYPE", 0x11234, 0 },
23787 		{ "VXLAN", 0, 16 },
23788 	{ "MPS_RX_GENEVE_TYPE", 0x11238, 0 },
23790 		{ "GENEVE", 0, 16 },
23791 	{ "MPS_RX_INNER_HDR_IVLAN", 0x1123c, 0 },
23793 		{ "IVLAN_ETYPE", 0, 16 },
23794 	{ "MPS_RX_ENCAP_NVGRE", 0x11240, 0 },
23796 		{ "ETYPE", 0, 16 },
23797 	{ "MPS_RX_ENCAP_GENEVE", 0x11244, 0 },
23799 		{ "ETYPE", 0, 16 },
23800 	{ "MPS_RX_TCP", 0x11248, 0 },
23802 		{ "PROT_TYPE", 0, 8 },
23803 	{ "MPS_RX_UDP", 0x1124c, 0 },
23805 		{ "PROT_TYPE", 0, 8 },
23806 	{ "MPS_RX_PAUSE", 0x11250, 0 },
23807 	{ "MPS_RX_LENGTH", 0x11254, 0 },
23809 		{ "LENGTH_ETYPE", 0, 16 },
23810 	{ "MPS_RX_CTL_ORG", 0x11258, 0 },
23812 		{ "ORG_VALUE", 0, 24 },
23813 	{ "MPS_RX_IPV4", 0x1125c, 0 },
23814 	{ "MPS_RX_IPV6", 0x11260, 0 },
23815 	{ "MPS_RX_TTL", 0x11264, 0 },
23819 		{ "TTL_CHK_EN_IPV6", 0, 1 },
23820 	{ "MPS_RX_DEFAULT_VNI", 0x11268, 0 },
23821 	{ "MPS_RX_PRS_CTL", 0x1126c, 0 },
23833 	{ "MPS_RX_PRS_CTL_2", 0x11270, 0 },
23838 		{ "IPV6_UDP_CSUM_COMPAT", 0, 1 },
23839 	{ "MPS_RX_MPS2NCSI_CNT", 0x11274, 0 },
23840 	{ "MPS_RX_MAX_TNL_HDR_LEN", 0x11278, 0 },
23841 	{ "MPS_RX_PAUSE_DA_H", 0x1127c, 0 },
23842 	{ "MPS_RX_PAUSE_DA_L", 0x11280, 0 },
23843 	{ "MPS_RX_CNT_NVGRE_PKT_MAC0", 0x11284, 0 },
23844 	{ "MPS_RX_CNT_VXLAN_PKT_MAC0", 0x11288, 0 },
23845 	{ "MPS_RX_CNT_GENEVE_PKT_MAC0", 0x1128c, 0 },
23846 	{ "MPS_RX_CNT_TNL_ERR_PKT_MAC0", 0x11290, 0 },
23847 	{ "MPS_RX_CNT_NVGRE_PKT_MAC1", 0x11294, 0 },
23848 	{ "MPS_RX_CNT_VXLAN_PKT_MAC1", 0x11298, 0 },
23849 	{ "MPS_RX_CNT_GENEVE_PKT_MAC1", 0x1129c, 0 },
23850 	{ "MPS_RX_CNT_TNL_ERR_PKT_MAC1", 0x112a0, 0 },
23851 	{ "MPS_RX_CNT_NVGRE_PKT_LPBK0", 0x112a4, 0 },
23852 	{ "MPS_RX_CNT_VXLAN_PKT_LPBK0", 0x112a8, 0 },
23853 	{ "MPS_RX_CNT_GENEVE_PKT_LPBK0", 0x112ac, 0 },
23854 	{ "MPS_RX_CNT_TNL_ERR_PKT_LPBK0", 0x112b0, 0 },
23855 	{ "MPS_RX_CNT_NVGRE_PKT_LPBK1", 0x112b4, 0 },
23856 	{ "MPS_RX_CNT_VXLAN_PKT_LPBK1", 0x112b8, 0 },
23857 	{ "MPS_RX_CNT_GENEVE_PKT_LPBK1", 0x112bc, 0 },
23858 	{ "MPS_RX_CNT_TNL_ERR_PKT_LPBK1", 0x112c0, 0 },
23859 	{ "MPS_RX_CNT_NVGRE_PKT_TO_TP0", 0x112c4, 0 },
23860 	{ "MPS_RX_CNT_VXLAN_PKT_TO_TP0", 0x112c8, 0 },
23861 	{ "MPS_RX_CNT_GENEVE_PKT_TO_TP0", 0x112cc, 0 },
23862 	{ "MPS_RX_CNT_TNL_ERR_PKT_TO_TP0", 0x112d0, 0 },
23863 	{ "MPS_RX_CNT_NVGRE_PKT_TO_TP1", 0x112d4, 0 },
23864 	{ "MPS_RX_CNT_VXLAN_PKT_TO_TP1", 0x112d8, 0 },
23865 	{ "MPS_RX_CNT_GENEVE_PKT_TO_TP1", 0x112dc, 0 },
23866 	{ "MPS_RX_CNT_TNL_ERR_PKT_TO_TP1", 0x112e0, 0 },
23867 	{ "MPS_PORT_RX_CTL", 0x30100, 0 },
23892 		{ "OVLAN_EN0", 0, 1 },
23893 	{ "MPS_PORT_RX_MTU", 0x30104, 0 },
23894 	{ "MPS_PORT_RX_PF_MAP", 0x30108, 0 },
23895 	{ "MPS_PORT_RX_VF_MAP0", 0x3010c, 0 },
23896 	{ "MPS_PORT_RX_VF_MAP1", 0x30110, 0 },
23897 	{ "MPS_PORT_RX_VF_MAP2", 0x30114, 0 },
23898 	{ "MPS_PORT_RX_VF_MAP3", 0x30118, 0 },
23899 	{ "MPS_PORT_RX_VF_MAP4", 0x30150, 0 },
23900 	{ "MPS_PORT_RX_VF_MAP5", 0x30154, 0 },
23901 	{ "MPS_PORT_RX_VF_MAP6", 0x30158, 0 },
23902 	{ "MPS_PORT_RX_VF_MAP7", 0x3015c, 0 },
23903 	{ "MPS_PORT_RX_IVLAN", 0x3011c, 0 },
23904 	{ "MPS_PORT_RX_OVLAN0", 0x30120, 0 },
23906 		{ "OVLAN_ETYPE", 0, 16 },
23907 	{ "MPS_PORT_RX_OVLAN1", 0x30124, 0 },
23909 		{ "OVLAN_ETYPE", 0, 16 },
23910 	{ "MPS_PORT_RX_OVLAN2", 0x30128, 0 },
23912 		{ "OVLAN_ETYPE", 0, 16 },
23913 	{ "MPS_PORT_RX_OVLAN3", 0x3012c, 0 },
23915 		{ "OVLAN_ETYPE", 0, 16 },
23916 	{ "MPS_PORT_RX_RSS_HASH", 0x30130, 0 },
23917 	{ "MPS_PORT_RX_RSS_CONTROL", 0x30134, 0 },
23919 		{ "QUE_NUM", 0, 16 },
23920 	{ "MPS_PORT_RX_CTL1", 0x30138, 0 },
23926 		{ "FIXED_VF", 0, 8 },
23927 	{ "MPS_PORT_RX_SPARE", 0x3013c, 0 },
23928 	{ "MPS_PORT_RX_PTP_RSS_HASH", 0x30140, 0 },
23929 	{ "MPS_PORT_RX_PTP_RSS_CONTROL", 0x30144, 0 },
23931 		{ "QUE_NUM", 0, 16 },
23932 	{ "MPS_PORT_RX_TS_VLD", 0x30148, 0 },
23933 	{ "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3014c, 0 },
23934 	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x30160, 0 },
23960 	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x30164, 0 },
23985 	{ "MPS_PORT_RX_REPL_VECT_SEL", 0x30168, 0 },
23987 		{ "REPL_VECT_SEL", 0, 4 },
23988 	{ "MPS_PORT_RX_CTL", 0x34100, 0 },
24013 		{ "OVLAN_EN0", 0, 1 },
24014 	{ "MPS_PORT_RX_MTU", 0x34104, 0 },
24015 	{ "MPS_PORT_RX_PF_MAP", 0x34108, 0 },
24016 	{ "MPS_PORT_RX_VF_MAP0", 0x3410c, 0 },
24017 	{ "MPS_PORT_RX_VF_MAP1", 0x34110, 0 },
24018 	{ "MPS_PORT_RX_VF_MAP2", 0x34114, 0 },
24019 	{ "MPS_PORT_RX_VF_MAP3", 0x34118, 0 },
24020 	{ "MPS_PORT_RX_VF_MAP4", 0x34150, 0 },
24021 	{ "MPS_PORT_RX_VF_MAP5", 0x34154, 0 },
24022 	{ "MPS_PORT_RX_VF_MAP6", 0x34158, 0 },
24023 	{ "MPS_PORT_RX_VF_MAP7", 0x3415c, 0 },
24024 	{ "MPS_PORT_RX_IVLAN", 0x3411c, 0 },
24025 	{ "MPS_PORT_RX_OVLAN0", 0x34120, 0 },
24027 		{ "OVLAN_ETYPE", 0, 16 },
24028 	{ "MPS_PORT_RX_OVLAN1", 0x34124, 0 },
24030 		{ "OVLAN_ETYPE", 0, 16 },
24031 	{ "MPS_PORT_RX_OVLAN2", 0x34128, 0 },
24033 		{ "OVLAN_ETYPE", 0, 16 },
24034 	{ "MPS_PORT_RX_OVLAN3", 0x3412c, 0 },
24036 		{ "OVLAN_ETYPE", 0, 16 },
24037 	{ "MPS_PORT_RX_RSS_HASH", 0x34130, 0 },
24038 	{ "MPS_PORT_RX_RSS_CONTROL", 0x34134, 0 },
24040 		{ "QUE_NUM", 0, 16 },
24041 	{ "MPS_PORT_RX_CTL1", 0x34138, 0 },
24047 		{ "FIXED_VF", 0, 8 },
24048 	{ "MPS_PORT_RX_SPARE", 0x3413c, 0 },
24049 	{ "MPS_PORT_RX_PTP_RSS_HASH", 0x34140, 0 },
24050 	{ "MPS_PORT_RX_PTP_RSS_CONTROL", 0x34144, 0 },
24052 		{ "QUE_NUM", 0, 16 },
24053 	{ "MPS_PORT_RX_TS_VLD", 0x34148, 0 },
24054 	{ "MPS_PORT_RX_TNL_LKP_INNER_SEL", 0x3414c, 0 },
24055 	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_MAC", 0x34160, 0 },
24081 	{ "MPS_PORT_RX_PRS_DEBUG_FLAG_LPBK", 0x34164, 0 },
24106 	{ "MPS_PORT_RX_REPL_VECT_SEL", 0x34168, 0 },
24108 		{ "REPL_VECT_SEL", 0, 4 },
24109 	{ "MPS_TX_PRTY_SEL", 0x9400, 0 },
24114 		{ "NCSI_Source", 0, 2 },
24115 	{ "MPS_TX_INT_ENABLE", 0x9404, 0 },
24123 		{ "TP", 0, 4 },
24124 	{ "MPS_TX_INT_CAUSE", 0x9408, 0 },
24132 		{ "TP", 0, 4 },
24133 	{ "MPS_TX_NCSI2MPS_CNT", 0x940c, 0 },
24134 	{ "MPS_TX_PERR_ENABLE", 0x9410, 0 },
24138 		{ "TP", 0, 4 },
24139 	{ "MPS_TX_PERR_INJECT", 0x9414, 0 },
24141 		{ "InjectDataErr", 0, 1 },
24142 	{ "MPS_TX_SE_CNT_TP01", 0x9418, 0 },
24146 		{ "EOP_CNT_0", 0, 8 },
24147 	{ "MPS_TX_SE_CNT_TP23", 0x941c, 0 },
24151 		{ "EOP_CNT_2", 0, 8 },
24152 	{ "MPS_TX_SE_CNT_MAC01", 0x9420, 0 },
24156 		{ "EOP_CNT_0", 0, 8 },
24157 	{ "MPS_TX_SE_CNT_MAC23", 0x9424, 0 },
24161 		{ "EOP_CNT_2", 0, 8 },
24162 	{ "MPS_TX_SECNT_SPI_BUBBLE_ERR", 0x9428, 0 },
24165 		{ "SeCnt", 0, 8 },
24166 	{ "MPS_TX_SECNT_BUBBLE_CLR", 0x942c, 0 },
24170 		{ "SeCnt", 0, 8 },
24171 	{ "MPS_TX_PORT_ERR", 0x9430, 0 },
24179 		{ "pt0", 0, 1 },
24180 	{ "MPS_TX_LPBK_DROP_BP_CTL_CH0", 0x9434, 0 },
24182 		{ "DropEn", 0, 1 },
24183 	{ "MPS_TX_LPBK_DROP_BP_CTL_CH1", 0x9438, 0 },
24185 		{ "DropEn", 0, 1 },
24186 	{ "MPS_TX_LPBK_DROP_BP_CTL_CH2", 0x943c, 0 },
24188 		{ "DropEn", 0, 1 },
24189 	{ "MPS_TX_LPBK_DROP_BP_CTL_CH3", 0x9440, 0 },
24191 		{ "DropEn", 0, 1 },
24192 	{ "MPS_TX_DEBUG_REG_TP2TX_10", 0x9444, 0 },
24206 		{ "DataCh0", 0, 8 },
24207 	{ "MPS_TX_DEBUG_REG_TP2TX_32", 0x9448, 0 },
24221 		{ "DataCh2", 0, 8 },
24222 	{ "MPS_TX_DEBUG_REG_TX2MAC_10", 0x944c, 0 },
24236 		{ "DataPt0", 0, 8 },
24237 	{ "MPS_TX_DEBUG_REG_TX2MAC_32", 0x9450, 0 },
24251 		{ "DataPt2", 0, 8 },
24252 	{ "MPS_TX_SGE_CH_PAUSE_IGNR", 0x9454, 0 },
24253 	{ "MPS_TX_DEBUG_SUBPART_SEL", 0x9458, 0 },
24257 		{ "PortL", 0, 3 },
24258 	{ "MPS_TX_PAD_CTL", 0x945c, 0 },
24266 		{ "MacPadEnPt0", 0, 1 },
24267 	{ "MPS_TX_PFVF_PORT_DROP_TP", 0x9460, 0 },
24269 		{ "TP2MPS_Ch0", 0, 8 },
24270 	{ "MPS_TX_PFVF_PORT_DROP_NCSI", 0x9464, 0 },
24271 	{ "MPS_TX_PFVF_PORT_DROP_CTL", 0x9468, 0 },
24275 		{ "TP2MPS_Ch0_CLR", 0, 1 },
24276 	{ "MPS_TX_CGEN", 0x946c, 0 },
24298 	{ "MPS_TX_CGEN_DYNAMIC", 0x9470, 0 },
24320 	{ "MPS_PF_TX_QINQ_VLAN", 0x1e2e0, 0 },
24324 		{ "Tag", 0, 12 },
24325 	{ "MPS_PF_TX_QINQ_VLAN", 0x1e6e0, 0 },
24329 		{ "Tag", 0, 12 },
24330 	{ "MPS_PF_TX_QINQ_VLAN", 0x1eae0, 0 },
24334 		{ "Tag", 0, 12 },
24335 	{ "MPS_PF_TX_QINQ_VLAN", 0x1eee0, 0 },
24339 		{ "Tag", 0, 12 },
24340 	{ "MPS_PF_TX_QINQ_VLAN", 0x1f2e0, 0 },
24344 		{ "Tag", 0, 12 },
24345 	{ "MPS_PF_TX_QINQ_VLAN", 0x1f6e0, 0 },
24349 		{ "Tag", 0, 12 },
24350 	{ "MPS_PF_TX_QINQ_VLAN", 0x1fae0, 0 },
24354 		{ "Tag", 0, 12 },
24355 	{ "MPS_PF_TX_QINQ_VLAN", 0x1fee0, 0 },
24359 		{ "Tag", 0, 12 },
24360 	{ "MPS_PORT_TX_MAC_RELOAD_CH0", 0x30190, 0 },
24361 	{ "MPS_PORT_TX_MAC_RELOAD_CH1", 0x30194, 0 },
24362 	{ "MPS_PORT_TX_MAC_RELOAD_CH2", 0x30198, 0 },
24363 	{ "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3019c, 0 },
24364 	{ "MPS_PORT_TX_MAC_RELOAD_CH4", 0x301a0, 0 },
24365 	{ "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x301a8, 0 },
24366 	{ "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x301ac, 0 },
24367 	{ "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x301b0, 0 },
24368 	{ "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x301b4, 0 },
24369 	{ "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x301b8, 0 },
24370 	{ "MPS_PORT_TX_FIFO_CTL", 0x301c4, 0 },
24375 		{ "MaxPktCnt", 0, 4 },
24376 	{ "MPS_PORT_FPGA_PAUSE_CTL", 0x301c8, 0 },
24377 	{ "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x301d0, 0 },
24379 		{ "on_pending", 0, 8 },
24380 	{ "MPS_PORT_TX_MAC_RELOAD_CH0", 0x34190, 0 },
24381 	{ "MPS_PORT_TX_MAC_RELOAD_CH1", 0x34194, 0 },
24382 	{ "MPS_PORT_TX_MAC_RELOAD_CH2", 0x34198, 0 },
24383 	{ "MPS_PORT_TX_MAC_RELOAD_CH3", 0x3419c, 0 },
24384 	{ "MPS_PORT_TX_MAC_RELOAD_CH4", 0x341a0, 0 },
24385 	{ "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x341a8, 0 },
24386 	{ "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x341ac, 0 },
24387 	{ "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x341b0, 0 },
24388 	{ "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x341b4, 0 },
24389 	{ "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x341b8, 0 },
24390 	{ "MPS_PORT_TX_FIFO_CTL", 0x341c4, 0 },
24395 		{ "MaxPktCnt", 0, 4 },
24396 	{ "MPS_PORT_FPGA_PAUSE_CTL", 0x341c8, 0 },
24397 	{ "MPS_PORT_TX_PAUSE_PENDING_STATUS", 0x341d0, 0 },
24399 		{ "on_pending", 0, 8 },
24400 	{ "MPS_TRC_CFG", 0x9800, 0 },
24406 		{ "TrcMultiFilter", 0, 1 },
24407 	{ "MPS_TRC_FILTER0_RSS_HASH", 0x9804, 0 },
24408 	{ "MPS_TRC_FILTER0_RSS_CONTROL", 0x9808, 0 },
24410 		{ "QueueNumber", 0, 16 },
24411 	{ "MPS_TRC_FILTER1_RSS_HASH", 0x9ff0, 0 },
24412 	{ "MPS_TRC_FILTER1_RSS_CONTROL", 0x9ff4, 0 },
24414 		{ "QueueNumber", 0, 16 },
24415 	{ "MPS_TRC_FILTER2_RSS_HASH", 0x9ff8, 0 },
24416 	{ "MPS_TRC_FILTER2_RSS_CONTROL", 0x9ffc, 0 },
24418 		{ "QueueNumber", 0, 16 },
24419 	{ "MPS_TRC_FILTER3_RSS_HASH", 0xa000, 0 },
24420 	{ "MPS_TRC_FILTER3_RSS_CONTROL", 0xa004, 0 },
24422 		{ "QueueNumber", 0, 16 },
24423 	{ "MPS_TRC_RSS_HASH", 0xa008, 0 },
24424 	{ "MPS_TRC_RSS_CONTROL", 0xa00c, 0 },
24426 		{ "QueueNumber", 0, 16 },
24427 	{ "MPS_TRC_VF_OFF_FILTER_0", 0xa010, 0 },
24436 		{ "VfFiltData", 0, 8 },
24437 	{ "MPS_TRC_VF_OFF_FILTER_1", 0xa014, 0 },
24446 		{ "VfFiltData", 0, 8 },
24447 	{ "MPS_TRC_VF_OFF_FILTER_2", 0xa018, 0 },
24456 		{ "VfFiltData", 0, 8 },
24457 	{ "MPS_TRC_VF_OFF_FILTER_3", 0xa01c, 0 },
24466 		{ "VfFiltData", 0, 8 },
24467 	{ "MPS_TRC_CGEN", 0xa020, 0 },
24468 	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0x9810, 0 },
24478 		{ "TfOffset", 0, 5 },
24479 	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0x9814, 0 },
24489 		{ "TfOffset", 0, 5 },
24490 	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0x9818, 0 },
24500 		{ "TfOffset", 0, 5 },
24501 	{ "MPS_TRC_FILTER_MATCH_CTL_A", 0x981c, 0 },
24511 		{ "TfOffset", 0, 5 },
24512 	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0x9820, 0 },
24514 		{ "TfCaptureMax", 0, 14 },
24515 	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0x9824, 0 },
24517 		{ "TfCaptureMax", 0, 14 },
24518 	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0x9828, 0 },
24520 		{ "TfCaptureMax", 0, 14 },
24521 	{ "MPS_TRC_FILTER_MATCH_CTL_B", 0x982c, 0 },
24523 		{ "TfCaptureMax", 0, 14 },
24524 	{ "MPS_TRC_FILTER_RUNT_CTL", 0x9830, 0 },
24525 	{ "MPS_TRC_FILTER_RUNT_CTL", 0x9834, 0 },
24526 	{ "MPS_TRC_FILTER_RUNT_CTL", 0x9838, 0 },
24527 	{ "MPS_TRC_FILTER_RUNT_CTL", 0x983c, 0 },
24528 	{ "MPS_TRC_FILTER_DROP", 0x9840, 0 },
24530 		{ "TfDropBufferCount", 0, 16 },
24531 	{ "MPS_TRC_FILTER_DROP", 0x9844, 0 },
24533 		{ "TfDropBufferCount", 0, 16 },
24534 	{ "MPS_TRC_FILTER_DROP", 0x9848, 0 },
24536 		{ "TfDropBufferCount", 0, 16 },
24537 	{ "MPS_TRC_FILTER_DROP", 0x984c, 0 },
24539 		{ "TfDropBufferCount", 0, 16 },
24540 	{ "MPS_TRC_PERR_INJECT", 0x9850, 0 },
24542 		{ "InjectDataErr", 0, 1 },
24543 	{ "MPS_TRC_PERR_ENABLE", 0x9854, 0 },
24546 		{ "FiltMem", 0, 4 },
24547 	{ "MPS_TRC_INT_ENABLE", 0x9858, 0 },
24551 		{ "FiltMem", 0, 4 },
24552 	{ "MPS_TRC_INT_CAUSE", 0x985c, 0 },
24556 		{ "FiltMem", 0, 4 },
24557 	{ "MPS_TRC_TIMESTAMP_L", 0x9860, 0 },
24558 	{ "MPS_TRC_TIMESTAMP_H", 0x9864, 0 },
24559 	{ "MPS_TRC_FILTER0_MATCH", 0x9c00, 0 },
24560 	{ "MPS_TRC_FILTER0_MATCH", 0x9c04, 0 },
24561 	{ "MPS_TRC_FILTER0_MATCH", 0x9c08, 0 },
24562 	{ "MPS_TRC_FILTER0_MATCH", 0x9c0c, 0 },
24563 	{ "MPS_TRC_FILTER0_MATCH", 0x9c10, 0 },
24564 	{ "MPS_TRC_FILTER0_MATCH", 0x9c14, 0 },
24565 	{ "MPS_TRC_FILTER0_MATCH", 0x9c18, 0 },
24566 	{ "MPS_TRC_FILTER0_MATCH", 0x9c1c, 0 },
24567 	{ "MPS_TRC_FILTER0_MATCH", 0x9c20, 0 },
24568 	{ "MPS_TRC_FILTER0_MATCH", 0x9c24, 0 },
24569 	{ "MPS_TRC_FILTER0_MATCH", 0x9c28, 0 },
24570 	{ "MPS_TRC_FILTER0_MATCH", 0x9c2c, 0 },
24571 	{ "MPS_TRC_FILTER0_MATCH", 0x9c30, 0 },
24572 	{ "MPS_TRC_FILTER0_MATCH", 0x9c34, 0 },
24573 	{ "MPS_TRC_FILTER0_MATCH", 0x9c38, 0 },
24574 	{ "MPS_TRC_FILTER0_MATCH", 0x9c3c, 0 },
24575 	{ "MPS_TRC_FILTER0_MATCH", 0x9c40, 0 },
24576 	{ "MPS_TRC_FILTER0_MATCH", 0x9c44, 0 },
24577 	{ "MPS_TRC_FILTER0_MATCH", 0x9c48, 0 },
24578 	{ "MPS_TRC_FILTER0_MATCH", 0x9c4c, 0 },
24579 	{ "MPS_TRC_FILTER0_MATCH", 0x9c50, 0 },
24580 	{ "MPS_TRC_FILTER0_MATCH", 0x9c54, 0 },
24581 	{ "MPS_TRC_FILTER0_MATCH", 0x9c58, 0 },
24582 	{ "MPS_TRC_FILTER0_MATCH", 0x9c5c, 0 },
24583 	{ "MPS_TRC_FILTER0_MATCH", 0x9c60, 0 },
24584 	{ "MPS_TRC_FILTER0_MATCH", 0x9c64, 0 },
24585 	{ "MPS_TRC_FILTER0_MATCH", 0x9c68, 0 },
24586 	{ "MPS_TRC_FILTER0_MATCH", 0x9c6c, 0 },
24587 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c80, 0 },
24588 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c84, 0 },
24589 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c88, 0 },
24590 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c8c, 0 },
24591 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c90, 0 },
24592 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c94, 0 },
24593 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c98, 0 },
24594 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9c9c, 0 },
24595 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ca0, 0 },
24596 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ca4, 0 },
24597 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ca8, 0 },
24598 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cac, 0 },
24599 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cb0, 0 },
24600 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cb4, 0 },
24601 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cb8, 0 },
24602 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cbc, 0 },
24603 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cc0, 0 },
24604 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cc4, 0 },
24605 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cc8, 0 },
24606 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ccc, 0 },
24607 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cd0, 0 },
24608 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cd4, 0 },
24609 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cd8, 0 },
24610 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cdc, 0 },
24611 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ce0, 0 },
24612 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ce4, 0 },
24613 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9ce8, 0 },
24614 	{ "MPS_TRC_FILTER0_DONT_CARE", 0x9cec, 0 },
24615 	{ "MPS_TRC_FILTER1_MATCH", 0x9d00, 0 },
24616 	{ "MPS_TRC_FILTER1_MATCH", 0x9d04, 0 },
24617 	{ "MPS_TRC_FILTER1_MATCH", 0x9d08, 0 },
24618 	{ "MPS_TRC_FILTER1_MATCH", 0x9d0c, 0 },
24619 	{ "MPS_TRC_FILTER1_MATCH", 0x9d10, 0 },
24620 	{ "MPS_TRC_FILTER1_MATCH", 0x9d14, 0 },
24621 	{ "MPS_TRC_FILTER1_MATCH", 0x9d18, 0 },
24622 	{ "MPS_TRC_FILTER1_MATCH", 0x9d1c, 0 },
24623 	{ "MPS_TRC_FILTER1_MATCH", 0x9d20, 0 },
24624 	{ "MPS_TRC_FILTER1_MATCH", 0x9d24, 0 },
24625 	{ "MPS_TRC_FILTER1_MATCH", 0x9d28, 0 },
24626 	{ "MPS_TRC_FILTER1_MATCH", 0x9d2c, 0 },
24627 	{ "MPS_TRC_FILTER1_MATCH", 0x9d30, 0 },
24628 	{ "MPS_TRC_FILTER1_MATCH", 0x9d34, 0 },
24629 	{ "MPS_TRC_FILTER1_MATCH", 0x9d38, 0 },
24630 	{ "MPS_TRC_FILTER1_MATCH", 0x9d3c, 0 },
24631 	{ "MPS_TRC_FILTER1_MATCH", 0x9d40, 0 },
24632 	{ "MPS_TRC_FILTER1_MATCH", 0x9d44, 0 },
24633 	{ "MPS_TRC_FILTER1_MATCH", 0x9d48, 0 },
24634 	{ "MPS_TRC_FILTER1_MATCH", 0x9d4c, 0 },
24635 	{ "MPS_TRC_FILTER1_MATCH", 0x9d50, 0 },
24636 	{ "MPS_TRC_FILTER1_MATCH", 0x9d54, 0 },
24637 	{ "MPS_TRC_FILTER1_MATCH", 0x9d58, 0 },
24638 	{ "MPS_TRC_FILTER1_MATCH", 0x9d5c, 0 },
24639 	{ "MPS_TRC_FILTER1_MATCH", 0x9d60, 0 },
24640 	{ "MPS_TRC_FILTER1_MATCH", 0x9d64, 0 },
24641 	{ "MPS_TRC_FILTER1_MATCH", 0x9d68, 0 },
24642 	{ "MPS_TRC_FILTER1_MATCH", 0x9d6c, 0 },
24643 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d80, 0 },
24644 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d84, 0 },
24645 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d88, 0 },
24646 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d8c, 0 },
24647 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d90, 0 },
24648 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d94, 0 },
24649 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d98, 0 },
24650 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9d9c, 0 },
24651 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9da0, 0 },
24652 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9da4, 0 },
24653 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9da8, 0 },
24654 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dac, 0 },
24655 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9db0, 0 },
24656 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9db4, 0 },
24657 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9db8, 0 },
24658 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dbc, 0 },
24659 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dc0, 0 },
24660 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dc4, 0 },
24661 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dc8, 0 },
24662 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dcc, 0 },
24663 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dd0, 0 },
24664 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dd4, 0 },
24665 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dd8, 0 },
24666 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9ddc, 0 },
24667 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9de0, 0 },
24668 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9de4, 0 },
24669 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9de8, 0 },
24670 	{ "MPS_TRC_FILTER1_DONT_CARE", 0x9dec, 0 },
24671 	{ "MPS_TRC_FILTER2_MATCH", 0x9e00, 0 },
24672 	{ "MPS_TRC_FILTER2_MATCH", 0x9e04, 0 },
24673 	{ "MPS_TRC_FILTER2_MATCH", 0x9e08, 0 },
24674 	{ "MPS_TRC_FILTER2_MATCH", 0x9e0c, 0 },
24675 	{ "MPS_TRC_FILTER2_MATCH", 0x9e10, 0 },
24676 	{ "MPS_TRC_FILTER2_MATCH", 0x9e14, 0 },
24677 	{ "MPS_TRC_FILTER2_MATCH", 0x9e18, 0 },
24678 	{ "MPS_TRC_FILTER2_MATCH", 0x9e1c, 0 },
24679 	{ "MPS_TRC_FILTER2_MATCH", 0x9e20, 0 },
24680 	{ "MPS_TRC_FILTER2_MATCH", 0x9e24, 0 },
24681 	{ "MPS_TRC_FILTER2_MATCH", 0x9e28, 0 },
24682 	{ "MPS_TRC_FILTER2_MATCH", 0x9e2c, 0 },
24683 	{ "MPS_TRC_FILTER2_MATCH", 0x9e30, 0 },
24684 	{ "MPS_TRC_FILTER2_MATCH", 0x9e34, 0 },
24685 	{ "MPS_TRC_FILTER2_MATCH", 0x9e38, 0 },
24686 	{ "MPS_TRC_FILTER2_MATCH", 0x9e3c, 0 },
24687 	{ "MPS_TRC_FILTER2_MATCH", 0x9e40, 0 },
24688 	{ "MPS_TRC_FILTER2_MATCH", 0x9e44, 0 },
24689 	{ "MPS_TRC_FILTER2_MATCH", 0x9e48, 0 },
24690 	{ "MPS_TRC_FILTER2_MATCH", 0x9e4c, 0 },
24691 	{ "MPS_TRC_FILTER2_MATCH", 0x9e50, 0 },
24692 	{ "MPS_TRC_FILTER2_MATCH", 0x9e54, 0 },
24693 	{ "MPS_TRC_FILTER2_MATCH", 0x9e58, 0 },
24694 	{ "MPS_TRC_FILTER2_MATCH", 0x9e5c, 0 },
24695 	{ "MPS_TRC_FILTER2_MATCH", 0x9e60, 0 },
24696 	{ "MPS_TRC_FILTER2_MATCH", 0x9e64, 0 },
24697 	{ "MPS_TRC_FILTER2_MATCH", 0x9e68, 0 },
24698 	{ "MPS_TRC_FILTER2_MATCH", 0x9e6c, 0 },
24699 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e80, 0 },
24700 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e84, 0 },
24701 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e88, 0 },
24702 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e8c, 0 },
24703 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e90, 0 },
24704 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e94, 0 },
24705 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e98, 0 },
24706 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9e9c, 0 },
24707 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ea0, 0 },
24708 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ea4, 0 },
24709 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ea8, 0 },
24710 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eac, 0 },
24711 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eb0, 0 },
24712 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eb4, 0 },
24713 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eb8, 0 },
24714 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ebc, 0 },
24715 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ec0, 0 },
24716 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ec4, 0 },
24717 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ec8, 0 },
24718 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ecc, 0 },
24719 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ed0, 0 },
24720 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ed4, 0 },
24721 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ed8, 0 },
24722 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9edc, 0 },
24723 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ee0, 0 },
24724 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ee4, 0 },
24725 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9ee8, 0 },
24726 	{ "MPS_TRC_FILTER2_DONT_CARE", 0x9eec, 0 },
24727 	{ "MPS_TRC_FILTER3_MATCH", 0x9f00, 0 },
24728 	{ "MPS_TRC_FILTER3_MATCH", 0x9f04, 0 },
24729 	{ "MPS_TRC_FILTER3_MATCH", 0x9f08, 0 },
24730 	{ "MPS_TRC_FILTER3_MATCH", 0x9f0c, 0 },
24731 	{ "MPS_TRC_FILTER3_MATCH", 0x9f10, 0 },
24732 	{ "MPS_TRC_FILTER3_MATCH", 0x9f14, 0 },
24733 	{ "MPS_TRC_FILTER3_MATCH", 0x9f18, 0 },
24734 	{ "MPS_TRC_FILTER3_MATCH", 0x9f1c, 0 },
24735 	{ "MPS_TRC_FILTER3_MATCH", 0x9f20, 0 },
24736 	{ "MPS_TRC_FILTER3_MATCH", 0x9f24, 0 },
24737 	{ "MPS_TRC_FILTER3_MATCH", 0x9f28, 0 },
24738 	{ "MPS_TRC_FILTER3_MATCH", 0x9f2c, 0 },
24739 	{ "MPS_TRC_FILTER3_MATCH", 0x9f30, 0 },
24740 	{ "MPS_TRC_FILTER3_MATCH", 0x9f34, 0 },
24741 	{ "MPS_TRC_FILTER3_MATCH", 0x9f38, 0 },
24742 	{ "MPS_TRC_FILTER3_MATCH", 0x9f3c, 0 },
24743 	{ "MPS_TRC_FILTER3_MATCH", 0x9f40, 0 },
24744 	{ "MPS_TRC_FILTER3_MATCH", 0x9f44, 0 },
24745 	{ "MPS_TRC_FILTER3_MATCH", 0x9f48, 0 },
24746 	{ "MPS_TRC_FILTER3_MATCH", 0x9f4c, 0 },
24747 	{ "MPS_TRC_FILTER3_MATCH", 0x9f50, 0 },
24748 	{ "MPS_TRC_FILTER3_MATCH", 0x9f54, 0 },
24749 	{ "MPS_TRC_FILTER3_MATCH", 0x9f58, 0 },
24750 	{ "MPS_TRC_FILTER3_MATCH", 0x9f5c, 0 },
24751 	{ "MPS_TRC_FILTER3_MATCH", 0x9f60, 0 },
24752 	{ "MPS_TRC_FILTER3_MATCH", 0x9f64, 0 },
24753 	{ "MPS_TRC_FILTER3_MATCH", 0x9f68, 0 },
24754 	{ "MPS_TRC_FILTER3_MATCH", 0x9f6c, 0 },
24755 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f80, 0 },
24756 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f84, 0 },
24757 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f88, 0 },
24758 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f8c, 0 },
24759 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f90, 0 },
24760 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f94, 0 },
24761 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f98, 0 },
24762 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9f9c, 0 },
24763 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fa0, 0 },
24764 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fa4, 0 },
24765 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fa8, 0 },
24766 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fac, 0 },
24767 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fb0, 0 },
24768 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fb4, 0 },
24769 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fb8, 0 },
24770 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fbc, 0 },
24771 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fc0, 0 },
24772 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fc4, 0 },
24773 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fc8, 0 },
24774 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fcc, 0 },
24775 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fd0, 0 },
24776 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fd4, 0 },
24777 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fd8, 0 },
24778 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fdc, 0 },
24779 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fe0, 0 },
24780 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fe4, 0 },
24781 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fe8, 0 },
24782 	{ "MPS_TRC_FILTER3_DONT_CARE", 0x9fec, 0 },
24783 	{ "MPS_STAT_CTL", 0x9600, 0 },
24794 		{ "LpbkErrStat", 0, 1 },
24795 	{ "MPS_STAT_INT_ENABLE", 0x9608, 0 },
24796 	{ "MPS_STAT_INT_CAUSE", 0x960c, 0 },
24797 	{ "MPS_STAT_PERR_INT_ENABLE_SRAM", 0x9610, 0 },
24803 		{ "Txport", 0, 6 },
24804 	{ "MPS_STAT_PERR_INT_CAUSE_SRAM", 0x9614, 0 },
24810 		{ "Txport", 0, 6 },
24811 	{ "MPS_STAT_PERR_ENABLE_SRAM", 0x9618, 0 },
24817 		{ "Txport", 0, 6 },
24818 	{ "MPS_STAT_PERR_INT_ENABLE_TX_FIFO", 0x961c, 0 },
24822 		{ "Drop", 0, 8 },
24823 	{ "MPS_STAT_PERR_INT_CAUSE_TX_FIFO", 0x9620, 0 },
24827 		{ "Drop", 0, 8 },
24828 	{ "MPS_STAT_PERR_ENABLE_TX_FIFO", 0x9624, 0 },
24832 		{ "Drop", 0, 8 },
24833 	{ "MPS_STAT_PERR_INT_ENABLE_RX_FIFO", 0x9628, 0 },
24838 		{ "Mac", 0, 4 },
24839 	{ "MPS_STAT_PERR_INT_CAUSE_RX_FIFO", 0x962c, 0 },
24844 		{ "Mac", 0, 4 },
24845 	{ "MPS_STAT_PERR_ENABLE_RX_FIFO", 0x9630, 0 },
24850 		{ "Mac", 0, 4 },
24851 	{ "MPS_STAT_PERR_INJECT", 0x9634, 0 },
24853 		{ "InjectDataErr", 0, 1 },
24854 	{ "MPS_STAT_DEBUG_SUB_SEL", 0x9638, 0 },
24856 		{ "SubPrtL", 0, 5 },
24857 	{ "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L", 0x9640, 0 },
24858 	{ "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_H", 0x9644, 0 },
24859 	{ "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_L", 0x9648, 0 },
24860 	{ "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_H", 0x964c, 0 },
24861 	{ "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_L", 0x9650, 0 },
24862 	{ "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_H", 0x9654, 0 },
24863 	{ "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_L", 0x9658, 0 },
24864 	{ "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_H", 0x965c, 0 },
24865 	{ "MPS_STAT_RX_BG_0_LB_DROP_FRAME_L", 0x9660, 0 },
24866 	{ "MPS_STAT_RX_BG_0_LB_DROP_FRAME_H", 0x9664, 0 },
24867 	{ "MPS_STAT_RX_BG_1_LB_DROP_FRAME_L", 0x9668, 0 },
24868 	{ "MPS_STAT_RX_BG_1_LB_DROP_FRAME_H", 0x966c, 0 },
24869 	{ "MPS_STAT_RX_BG_2_LB_DROP_FRAME_L", 0x9670, 0 },
24870 	{ "MPS_STAT_RX_BG_2_LB_DROP_FRAME_H", 0x9674, 0 },
24871 	{ "MPS_STAT_RX_BG_3_LB_DROP_FRAME_L", 0x9678, 0 },
24872 	{ "MPS_STAT_RX_BG_3_LB_DROP_FRAME_H", 0x967c, 0 },
24873 	{ "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L", 0x9680, 0 },
24874 	{ "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_H", 0x9684, 0 },
24875 	{ "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_L", 0x9688, 0 },
24876 	{ "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_H", 0x968c, 0 },
24877 	{ "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_L", 0x9690, 0 },
24878 	{ "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_H", 0x9694, 0 },
24879 	{ "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_L", 0x9698, 0 },
24880 	{ "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_H", 0x969c, 0 },
24881 	{ "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_L", 0x96a0, 0 },
24882 	{ "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_H", 0x96a4, 0 },
24883 	{ "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_L", 0x96a8, 0 },
24884 	{ "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_H", 0x96ac, 0 },
24885 	{ "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_L", 0x96b0, 0 },
24886 	{ "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_H", 0x96b4, 0 },
24887 	{ "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_L", 0x96b8, 0 },
24888 	{ "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_H", 0x96bc, 0 },
24889 	{ "MPS_STAT_PERR_INT_ENABLE_SRAM1", 0x96c0, 0 },
24891 		{ "Txvf", 0, 5 },
24892 	{ "MPS_STAT_PERR_INT_CAUSE_SRAM1", 0x96c4, 0 },
24894 		{ "Txvf", 0, 5 },
24895 	{ "MPS_STAT_PERR_ENABLE_SRAM1", 0x96c8, 0 },
24897 		{ "Txvf", 0, 5 },
24898 	{ "MPS_STAT_STOP_UPD_BG", 0x96cc, 0 },
24899 	{ "MPS_STAT_STOP_UPD_PORT", 0x96d0, 0 },
24902 		{ "PtRx", 0, 4 },
24903 	{ "MPS_STAT_STOP_UPD_PF", 0x96d4, 0 },
24905 		{ "PFRx", 0, 8 },
24906 	{ "MPS_STAT_STOP_UPD_TX_VF_0_31", 0x96d8, 0 },
24907 	{ "MPS_STAT_STOP_UPD_TX_VF_32_63", 0x96dc, 0 },
24908 	{ "MPS_STAT_STOP_UPD_TX_VF_64_95", 0x96e0, 0 },
24909 	{ "MPS_STAT_STOP_UPD_TX_VF_96_127", 0x96e4, 0 },
24910 	{ "MPS_STAT_STOP_UPD_TX_VF_128_159", 0x9710, 0 },
24911 	{ "MPS_STAT_STOP_UPD_TX_VF_160_191", 0x9714, 0 },
24912 	{ "MPS_STAT_STOP_UPD_TX_VF_192_223", 0x9718, 0 },
24913 	{ "MPS_STAT_STOP_UPD_TX_VF_224_255", 0x971c, 0 },
24914 	{ "MPS_STAT_STOP_UPD_RX_VF_0_31", 0x96e8, 0 },
24915 	{ "MPS_STAT_STOP_UPD_RX_VF_32_63", 0x96ec, 0 },
24916 	{ "MPS_STAT_STOP_UPD_RX_VF_64_95", 0x96f0, 0 },
24917 	{ "MPS_STAT_STOP_UPD_RX_VF_96_127", 0x96f4, 0 },
24918 	{ "MPS_STAT_STOP_UPD_RX_VF_128_159", 0x96f8, 0 },
24919 	{ "MPS_STAT_STOP_UPD_RX_VF_160_191", 0x96fc, 0 },
24920 	{ "MPS_STAT_STOP_UPD_RX_VF_192_223", 0x9700, 0 },
24921 	{ "MPS_STAT_STOP_UPD_RX_VF_224_255", 0x9704, 0 },
24922 	{ "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x30400, 0 },
24923 	{ "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x30404, 0 },
24924 	{ "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x30408, 0 },
24925 	{ "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3040c, 0 },
24926 	{ "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x30410, 0 },
24927 	{ "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x30414, 0 },
24928 	{ "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x30418, 0 },
24929 	{ "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3041c, 0 },
24930 	{ "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x30420, 0 },
24931 	{ "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x30424, 0 },
24932 	{ "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x30428, 0 },
24933 	{ "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3042c, 0 },
24934 	{ "MPS_PORT_STAT_TX_PORT_64B_L", 0x30430, 0 },
24935 	{ "MPS_PORT_STAT_TX_PORT_64B_H", 0x30434, 0 },
24936 	{ "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x30438, 0 },
24937 	{ "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3043c, 0 },
24938 	{ "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x30440, 0 },
24939 	{ "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x30444, 0 },
24940 	{ "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x30448, 0 },
24941 	{ "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3044c, 0 },
24942 	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x30450, 0 },
24943 	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x30454, 0 },
24944 	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x30458, 0 },
24945 	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3045c, 0 },
24946 	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x30460, 0 },
24947 	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x30464, 0 },
24948 	{ "MPS_PORT_STAT_TX_PORT_DROP_L", 0x30468, 0 },
24949 	{ "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3046c, 0 },
24950 	{ "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x30470, 0 },
24951 	{ "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x30474, 0 },
24952 	{ "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x30478, 0 },
24953 	{ "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3047c, 0 },
24954 	{ "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x30480, 0 },
24955 	{ "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x30484, 0 },
24956 	{ "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x30488, 0 },
24957 	{ "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3048c, 0 },
24958 	{ "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x30490, 0 },
24959 	{ "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x30494, 0 },
24960 	{ "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x30498, 0 },
24961 	{ "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3049c, 0 },
24962 	{ "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x304a0, 0 },
24963 	{ "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x304a4, 0 },
24964 	{ "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x304a8, 0 },
24965 	{ "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x304ac, 0 },
24966 	{ "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x304b0, 0 },
24967 	{ "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x304b4, 0 },
24968 	{ "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x304c0, 0 },
24969 	{ "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x304c4, 0 },
24970 	{ "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x304c8, 0 },
24971 	{ "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x304cc, 0 },
24972 	{ "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x304d0, 0 },
24973 	{ "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x304d4, 0 },
24974 	{ "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x304d8, 0 },
24975 	{ "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x304dc, 0 },
24976 	{ "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x304e0, 0 },
24977 	{ "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x304e4, 0 },
24978 	{ "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x304e8, 0 },
24979 	{ "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x304ec, 0 },
24980 	{ "MPS_PORT_STAT_LB_PORT_64B_L", 0x304f0, 0 },
24981 	{ "MPS_PORT_STAT_LB_PORT_64B_H", 0x304f4, 0 },
24982 	{ "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x304f8, 0 },
24983 	{ "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x304fc, 0 },
24984 	{ "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x30500, 0 },
24985 	{ "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x30504, 0 },
24986 	{ "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x30508, 0 },
24987 	{ "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3050c, 0 },
24988 	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x30510, 0 },
24989 	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x30514, 0 },
24990 	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x30518, 0 },
24991 	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3051c, 0 },
24992 	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x30520, 0 },
24993 	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x30524, 0 },
24994 	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x30528, 0 },
24995 	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3052c, 0 },
24996 	{ "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x30540, 0 },
24997 	{ "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x30544, 0 },
24998 	{ "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x30548, 0 },
24999 	{ "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3054c, 0 },
25000 	{ "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x30550, 0 },
25001 	{ "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x30554, 0 },
25002 	{ "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x30558, 0 },
25003 	{ "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3055c, 0 },
25004 	{ "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x30560, 0 },
25005 	{ "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x30564, 0 },
25006 	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x30568, 0 },
25007 	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3056c, 0 },
25008 	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x30570, 0 },
25009 	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x30574, 0 },
25010 	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x30578, 0 },
25011 	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3057c, 0 },
25012 	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x30580, 0 },
25013 	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x30584, 0 },
25014 	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x30588, 0 },
25015 	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3058c, 0 },
25016 	{ "MPS_PORT_STAT_RX_PORT_64B_L", 0x30590, 0 },
25017 	{ "MPS_PORT_STAT_RX_PORT_64B_H", 0x30594, 0 },
25018 	{ "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x30598, 0 },
25019 	{ "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3059c, 0 },
25020 	{ "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x305a0, 0 },
25021 	{ "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x305a4, 0 },
25022 	{ "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x305a8, 0 },
25023 	{ "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x305ac, 0 },
25024 	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x305b0, 0 },
25025 	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x305b4, 0 },
25026 	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x305b8, 0 },
25027 	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x305bc, 0 },
25028 	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x305c0, 0 },
25029 	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x305c4, 0 },
25030 	{ "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x305c8, 0 },
25031 	{ "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x305cc, 0 },
25032 	{ "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x305d0, 0 },
25033 	{ "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x305d4, 0 },
25034 	{ "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x305d8, 0 },
25035 	{ "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x305dc, 0 },
25036 	{ "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x305e0, 0 },
25037 	{ "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x305e4, 0 },
25038 	{ "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x305e8, 0 },
25039 	{ "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x305ec, 0 },
25040 	{ "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x305f0, 0 },
25041 	{ "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x305f4, 0 },
25042 	{ "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x305f8, 0 },
25043 	{ "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x305fc, 0 },
25044 	{ "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x30600, 0 },
25045 	{ "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x30604, 0 },
25046 	{ "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x30608, 0 },
25047 	{ "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3060c, 0 },
25048 	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x30610, 0 },
25049 	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x30614, 0 },
25050 	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x30618, 0 },
25051 	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3061c, 0 },
25052 	{ "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x34400, 0 },
25053 	{ "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x34404, 0 },
25054 	{ "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x34408, 0 },
25055 	{ "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x3440c, 0 },
25056 	{ "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x34410, 0 },
25057 	{ "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x34414, 0 },
25058 	{ "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x34418, 0 },
25059 	{ "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x3441c, 0 },
25060 	{ "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x34420, 0 },
25061 	{ "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x34424, 0 },
25062 	{ "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x34428, 0 },
25063 	{ "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x3442c, 0 },
25064 	{ "MPS_PORT_STAT_TX_PORT_64B_L", 0x34430, 0 },
25065 	{ "MPS_PORT_STAT_TX_PORT_64B_H", 0x34434, 0 },
25066 	{ "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x34438, 0 },
25067 	{ "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x3443c, 0 },
25068 	{ "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x34440, 0 },
25069 	{ "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x34444, 0 },
25070 	{ "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x34448, 0 },
25071 	{ "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x3444c, 0 },
25072 	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x34450, 0 },
25073 	{ "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x34454, 0 },
25074 	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x34458, 0 },
25075 	{ "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x3445c, 0 },
25076 	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x34460, 0 },
25077 	{ "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x34464, 0 },
25078 	{ "MPS_PORT_STAT_TX_PORT_DROP_L", 0x34468, 0 },
25079 	{ "MPS_PORT_STAT_TX_PORT_DROP_H", 0x3446c, 0 },
25080 	{ "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x34470, 0 },
25081 	{ "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x34474, 0 },
25082 	{ "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x34478, 0 },
25083 	{ "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x3447c, 0 },
25084 	{ "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x34480, 0 },
25085 	{ "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x34484, 0 },
25086 	{ "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x34488, 0 },
25087 	{ "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x3448c, 0 },
25088 	{ "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x34490, 0 },
25089 	{ "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x34494, 0 },
25090 	{ "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x34498, 0 },
25091 	{ "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x3449c, 0 },
25092 	{ "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x344a0, 0 },
25093 	{ "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x344a4, 0 },
25094 	{ "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x344a8, 0 },
25095 	{ "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x344ac, 0 },
25096 	{ "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x344b0, 0 },
25097 	{ "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x344b4, 0 },
25098 	{ "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x344c0, 0 },
25099 	{ "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x344c4, 0 },
25100 	{ "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x344c8, 0 },
25101 	{ "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x344cc, 0 },
25102 	{ "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x344d0, 0 },
25103 	{ "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x344d4, 0 },
25104 	{ "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x344d8, 0 },
25105 	{ "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x344dc, 0 },
25106 	{ "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x344e0, 0 },
25107 	{ "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x344e4, 0 },
25108 	{ "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x344e8, 0 },
25109 	{ "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x344ec, 0 },
25110 	{ "MPS_PORT_STAT_LB_PORT_64B_L", 0x344f0, 0 },
25111 	{ "MPS_PORT_STAT_LB_PORT_64B_H", 0x344f4, 0 },
25112 	{ "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x344f8, 0 },
25113 	{ "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x344fc, 0 },
25114 	{ "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x34500, 0 },
25115 	{ "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x34504, 0 },
25116 	{ "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x34508, 0 },
25117 	{ "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x3450c, 0 },
25118 	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x34510, 0 },
25119 	{ "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x34514, 0 },
25120 	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x34518, 0 },
25121 	{ "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x3451c, 0 },
25122 	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x34520, 0 },
25123 	{ "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x34524, 0 },
25124 	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_L", 0x34528, 0 },
25125 	{ "MPS_PORT_STAT_LB_PORT_DROP_FRAMES_H", 0x3452c, 0 },
25126 	{ "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x34540, 0 },
25127 	{ "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x34544, 0 },
25128 	{ "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x34548, 0 },
25129 	{ "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x3454c, 0 },
25130 	{ "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x34550, 0 },
25131 	{ "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x34554, 0 },
25132 	{ "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x34558, 0 },
25133 	{ "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x3455c, 0 },
25134 	{ "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x34560, 0 },
25135 	{ "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x34564, 0 },
25136 	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x34568, 0 },
25137 	{ "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x3456c, 0 },
25138 	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x34570, 0 },
25139 	{ "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x34574, 0 },
25140 	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x34578, 0 },
25141 	{ "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x3457c, 0 },
25142 	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x34580, 0 },
25143 	{ "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x34584, 0 },
25144 	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x34588, 0 },
25145 	{ "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x3458c, 0 },
25146 	{ "MPS_PORT_STAT_RX_PORT_64B_L", 0x34590, 0 },
25147 	{ "MPS_PORT_STAT_RX_PORT_64B_H", 0x34594, 0 },
25148 	{ "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x34598, 0 },
25149 	{ "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x3459c, 0 },
25150 	{ "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x345a0, 0 },
25151 	{ "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x345a4, 0 },
25152 	{ "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x345a8, 0 },
25153 	{ "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x345ac, 0 },
25154 	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x345b0, 0 },
25155 	{ "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x345b4, 0 },
25156 	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x345b8, 0 },
25157 	{ "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x345bc, 0 },
25158 	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x345c0, 0 },
25159 	{ "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x345c4, 0 },
25160 	{ "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x345c8, 0 },
25161 	{ "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x345cc, 0 },
25162 	{ "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x345d0, 0 },
25163 	{ "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x345d4, 0 },
25164 	{ "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x345d8, 0 },
25165 	{ "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x345dc, 0 },
25166 	{ "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x345e0, 0 },
25167 	{ "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x345e4, 0 },
25168 	{ "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x345e8, 0 },
25169 	{ "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x345ec, 0 },
25170 	{ "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x345f0, 0 },
25171 	{ "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x345f4, 0 },
25172 	{ "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x345f8, 0 },
25173 	{ "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x345fc, 0 },
25174 	{ "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x34600, 0 },
25175 	{ "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x34604, 0 },
25176 	{ "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x34608, 0 },
25177 	{ "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x3460c, 0 },
25178 	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x34610, 0 },
25179 	{ "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x34614, 0 },
25180 	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_L", 0x34618, 0 },
25181 	{ "MPS_PORT_STAT_RX_PORT_MAC_ERROR_H", 0x3461c, 0 },
25182 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e300, 0 },
25183 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e304, 0 },
25184 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e308, 0 },
25185 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e30c, 0 },
25186 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e310, 0 },
25187 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e314, 0 },
25188 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e318, 0 },
25189 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e31c, 0 },
25190 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e320, 0 },
25191 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e324, 0 },
25192 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e328, 0 },
25193 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e32c, 0 },
25194 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e330, 0 },
25195 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e334, 0 },
25196 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e338, 0 },
25197 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e33c, 0 },
25198 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e340, 0 },
25199 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e344, 0 },
25200 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e348, 0 },
25201 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e34c, 0 },
25202 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e350, 0 },
25203 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e354, 0 },
25204 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e358, 0 },
25205 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e35c, 0 },
25206 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e360, 0 },
25207 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e364, 0 },
25208 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e368, 0 },
25209 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e36c, 0 },
25210 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e370, 0 },
25211 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e374, 0 },
25212 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e378, 0 },
25213 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e37c, 0 },
25214 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1e380, 0 },
25215 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1e384, 0 },
25216 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e700, 0 },
25217 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e704, 0 },
25218 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e708, 0 },
25219 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e70c, 0 },
25220 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e710, 0 },
25221 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e714, 0 },
25222 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e718, 0 },
25223 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e71c, 0 },
25224 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e720, 0 },
25225 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e724, 0 },
25226 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e728, 0 },
25227 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e72c, 0 },
25228 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e730, 0 },
25229 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e734, 0 },
25230 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e738, 0 },
25231 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e73c, 0 },
25232 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e740, 0 },
25233 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e744, 0 },
25234 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e748, 0 },
25235 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e74c, 0 },
25236 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e750, 0 },
25237 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e754, 0 },
25238 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e758, 0 },
25239 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e75c, 0 },
25240 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e760, 0 },
25241 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e764, 0 },
25242 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e768, 0 },
25243 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e76c, 0 },
25244 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e770, 0 },
25245 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e774, 0 },
25246 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e778, 0 },
25247 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e77c, 0 },
25248 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1e780, 0 },
25249 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1e784, 0 },
25250 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1eb00, 0 },
25251 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1eb04, 0 },
25252 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1eb08, 0 },
25253 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1eb0c, 0 },
25254 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1eb10, 0 },
25255 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1eb14, 0 },
25256 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1eb18, 0 },
25257 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1eb1c, 0 },
25258 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1eb20, 0 },
25259 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1eb24, 0 },
25260 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1eb28, 0 },
25261 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1eb2c, 0 },
25262 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1eb30, 0 },
25263 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1eb34, 0 },
25264 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1eb38, 0 },
25265 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1eb3c, 0 },
25266 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1eb40, 0 },
25267 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1eb44, 0 },
25268 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1eb48, 0 },
25269 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1eb4c, 0 },
25270 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1eb50, 0 },
25271 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1eb54, 0 },
25272 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1eb58, 0 },
25273 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1eb5c, 0 },
25274 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1eb60, 0 },
25275 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1eb64, 0 },
25276 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1eb68, 0 },
25277 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1eb6c, 0 },
25278 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1eb70, 0 },
25279 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1eb74, 0 },
25280 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1eb78, 0 },
25281 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1eb7c, 0 },
25282 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1eb80, 0 },
25283 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1eb84, 0 },
25284 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ef00, 0 },
25285 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ef04, 0 },
25286 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ef08, 0 },
25287 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ef0c, 0 },
25288 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ef10, 0 },
25289 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ef14, 0 },
25290 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ef18, 0 },
25291 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ef1c, 0 },
25292 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ef20, 0 },
25293 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ef24, 0 },
25294 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ef28, 0 },
25295 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ef2c, 0 },
25296 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ef30, 0 },
25297 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ef34, 0 },
25298 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ef38, 0 },
25299 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ef3c, 0 },
25300 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ef40, 0 },
25301 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ef44, 0 },
25302 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ef48, 0 },
25303 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ef4c, 0 },
25304 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ef50, 0 },
25305 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ef54, 0 },
25306 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ef58, 0 },
25307 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ef5c, 0 },
25308 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ef60, 0 },
25309 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ef64, 0 },
25310 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ef68, 0 },
25311 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ef6c, 0 },
25312 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ef70, 0 },
25313 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ef74, 0 },
25314 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ef78, 0 },
25315 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ef7c, 0 },
25316 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1ef80, 0 },
25317 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1ef84, 0 },
25318 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f300, 0 },
25319 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f304, 0 },
25320 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f308, 0 },
25321 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f30c, 0 },
25322 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f310, 0 },
25323 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f314, 0 },
25324 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f318, 0 },
25325 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f31c, 0 },
25326 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f320, 0 },
25327 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f324, 0 },
25328 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f328, 0 },
25329 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f32c, 0 },
25330 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f330, 0 },
25331 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f334, 0 },
25332 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f338, 0 },
25333 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f33c, 0 },
25334 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f340, 0 },
25335 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f344, 0 },
25336 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f348, 0 },
25337 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f34c, 0 },
25338 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f350, 0 },
25339 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f354, 0 },
25340 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f358, 0 },
25341 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f35c, 0 },
25342 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f360, 0 },
25343 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f364, 0 },
25344 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f368, 0 },
25345 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f36c, 0 },
25346 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f370, 0 },
25347 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f374, 0 },
25348 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f378, 0 },
25349 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f37c, 0 },
25350 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1f380, 0 },
25351 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1f384, 0 },
25352 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f700, 0 },
25353 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f704, 0 },
25354 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f708, 0 },
25355 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f70c, 0 },
25356 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f710, 0 },
25357 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f714, 0 },
25358 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f718, 0 },
25359 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f71c, 0 },
25360 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f720, 0 },
25361 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f724, 0 },
25362 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f728, 0 },
25363 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f72c, 0 },
25364 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f730, 0 },
25365 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f734, 0 },
25366 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f738, 0 },
25367 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f73c, 0 },
25368 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f740, 0 },
25369 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f744, 0 },
25370 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f748, 0 },
25371 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f74c, 0 },
25372 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f750, 0 },
25373 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f754, 0 },
25374 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f758, 0 },
25375 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f75c, 0 },
25376 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f760, 0 },
25377 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f764, 0 },
25378 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f768, 0 },
25379 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f76c, 0 },
25380 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f770, 0 },
25381 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f774, 0 },
25382 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f778, 0 },
25383 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f77c, 0 },
25384 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1f780, 0 },
25385 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1f784, 0 },
25386 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1fb00, 0 },
25387 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1fb04, 0 },
25388 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1fb08, 0 },
25389 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1fb0c, 0 },
25390 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1fb10, 0 },
25391 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1fb14, 0 },
25392 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1fb18, 0 },
25393 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1fb1c, 0 },
25394 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1fb20, 0 },
25395 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1fb24, 0 },
25396 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1fb28, 0 },
25397 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1fb2c, 0 },
25398 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1fb30, 0 },
25399 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1fb34, 0 },
25400 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1fb38, 0 },
25401 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1fb3c, 0 },
25402 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1fb40, 0 },
25403 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1fb44, 0 },
25404 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1fb48, 0 },
25405 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1fb4c, 0 },
25406 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1fb50, 0 },
25407 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1fb54, 0 },
25408 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1fb58, 0 },
25409 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1fb5c, 0 },
25410 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1fb60, 0 },
25411 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1fb64, 0 },
25412 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1fb68, 0 },
25413 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1fb6c, 0 },
25414 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1fb70, 0 },
25415 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1fb74, 0 },
25416 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1fb78, 0 },
25417 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1fb7c, 0 },
25418 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1fb80, 0 },
25419 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1fb84, 0 },
25420 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ff00, 0 },
25421 	{ "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ff04, 0 },
25422 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ff08, 0 },
25423 	{ "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ff0c, 0 },
25424 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ff10, 0 },
25425 	{ "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ff14, 0 },
25426 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ff18, 0 },
25427 	{ "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ff1c, 0 },
25428 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ff20, 0 },
25429 	{ "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ff24, 0 },
25430 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ff28, 0 },
25431 	{ "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ff2c, 0 },
25432 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ff30, 0 },
25433 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ff34, 0 },
25434 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ff38, 0 },
25435 	{ "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ff3c, 0 },
25436 	{ "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ff40, 0 },
25437 	{ "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ff44, 0 },
25438 	{ "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ff48, 0 },
25439 	{ "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ff4c, 0 },
25440 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ff50, 0 },
25441 	{ "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ff54, 0 },
25442 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ff58, 0 },
25443 	{ "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ff5c, 0 },
25444 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ff60, 0 },
25445 	{ "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ff64, 0 },
25446 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ff68, 0 },
25447 	{ "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ff6c, 0 },
25448 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ff70, 0 },
25449 	{ "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ff74, 0 },
25450 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ff78, 0 },
25451 	{ "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ff7c, 0 },
25452 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1ff80, 0 },
25453 	{ "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1ff84, 0 },
25454 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30200, 0 },
25464 		{ "VF", 0, 8 },
25465 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30204, 0 },
25475 		{ "VF", 0, 8 },
25476 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30208, 0 },
25486 		{ "VF", 0, 8 },
25487 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3020c, 0 },
25497 		{ "VF", 0, 8 },
25498 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30210, 0 },
25508 		{ "VF", 0, 8 },
25509 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30214, 0 },
25519 		{ "VF", 0, 8 },
25520 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30218, 0 },
25530 		{ "VF", 0, 8 },
25531 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3021c, 0 },
25541 		{ "VF", 0, 8 },
25542 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30220, 0 },
25552 		{ "VF", 0, 8 },
25553 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30224, 0 },
25563 		{ "VF", 0, 8 },
25564 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30228, 0 },
25574 		{ "VF", 0, 8 },
25575 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3022c, 0 },
25585 		{ "VF", 0, 8 },
25586 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30230, 0 },
25596 		{ "VF", 0, 8 },
25597 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30234, 0 },
25607 		{ "VF", 0, 8 },
25608 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30238, 0 },
25618 		{ "VF", 0, 8 },
25619 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3023c, 0 },
25629 		{ "VF", 0, 8 },
25630 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30240, 0 },
25640 		{ "VF", 0, 8 },
25641 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30244, 0 },
25651 		{ "VF", 0, 8 },
25652 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30248, 0 },
25662 		{ "VF", 0, 8 },
25663 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3024c, 0 },
25673 		{ "VF", 0, 8 },
25674 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30250, 0 },
25684 		{ "VF", 0, 8 },
25685 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30254, 0 },
25695 		{ "VF", 0, 8 },
25696 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30258, 0 },
25706 		{ "VF", 0, 8 },
25707 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3025c, 0 },
25717 		{ "VF", 0, 8 },
25718 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30260, 0 },
25728 		{ "VF", 0, 8 },
25729 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30264, 0 },
25739 		{ "VF", 0, 8 },
25740 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30268, 0 },
25750 		{ "VF", 0, 8 },
25751 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3026c, 0 },
25761 		{ "VF", 0, 8 },
25762 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30270, 0 },
25772 		{ "VF", 0, 8 },
25773 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30274, 0 },
25783 		{ "VF", 0, 8 },
25784 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30278, 0 },
25794 		{ "VF", 0, 8 },
25795 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3027c, 0 },
25805 		{ "VF", 0, 8 },
25806 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30280, 0 },
25816 		{ "VF", 0, 8 },
25817 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30284, 0 },
25827 		{ "VF", 0, 8 },
25828 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30288, 0 },
25838 		{ "VF", 0, 8 },
25839 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3028c, 0 },
25849 		{ "VF", 0, 8 },
25850 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30290, 0 },
25860 		{ "VF", 0, 8 },
25861 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30294, 0 },
25871 		{ "VF", 0, 8 },
25872 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30298, 0 },
25882 		{ "VF", 0, 8 },
25883 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3029c, 0 },
25893 		{ "VF", 0, 8 },
25894 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302a0, 0 },
25904 		{ "VF", 0, 8 },
25905 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302a4, 0 },
25915 		{ "VF", 0, 8 },
25916 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302a8, 0 },
25926 		{ "VF", 0, 8 },
25927 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302ac, 0 },
25937 		{ "VF", 0, 8 },
25938 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302b0, 0 },
25948 		{ "VF", 0, 8 },
25949 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302b4, 0 },
25959 		{ "VF", 0, 8 },
25960 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302b8, 0 },
25970 		{ "VF", 0, 8 },
25971 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302bc, 0 },
25981 		{ "VF", 0, 8 },
25982 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302c0, 0 },
25992 		{ "VF", 0, 8 },
25993 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302c4, 0 },
26003 		{ "VF", 0, 8 },
26004 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302c8, 0 },
26014 		{ "VF", 0, 8 },
26015 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302cc, 0 },
26025 		{ "VF", 0, 8 },
26026 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302d0, 0 },
26036 		{ "VF", 0, 8 },
26037 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302d4, 0 },
26047 		{ "VF", 0, 8 },
26048 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302d8, 0 },
26058 		{ "VF", 0, 8 },
26059 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302dc, 0 },
26069 		{ "VF", 0, 8 },
26070 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302e0, 0 },
26080 		{ "VF", 0, 8 },
26081 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302e4, 0 },
26091 		{ "VF", 0, 8 },
26092 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302e8, 0 },
26102 		{ "VF", 0, 8 },
26103 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302ec, 0 },
26113 		{ "VF", 0, 8 },
26114 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302f0, 0 },
26124 		{ "VF", 0, 8 },
26125 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302f4, 0 },
26135 		{ "VF", 0, 8 },
26136 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302f8, 0 },
26146 		{ "VF", 0, 8 },
26147 	{ "MPS_PORT_CLS_HASH_SRAM", 0x302fc, 0 },
26157 		{ "VF", 0, 8 },
26158 	{ "MPS_PORT_CLS_HASH_SRAM", 0x30300, 0 },
26168 		{ "VF", 0, 8 },
26169 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34200, 0 },
26179 		{ "VF", 0, 8 },
26180 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34204, 0 },
26190 		{ "VF", 0, 8 },
26191 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34208, 0 },
26201 		{ "VF", 0, 8 },
26202 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3420c, 0 },
26212 		{ "VF", 0, 8 },
26213 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34210, 0 },
26223 		{ "VF", 0, 8 },
26224 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34214, 0 },
26234 		{ "VF", 0, 8 },
26235 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34218, 0 },
26245 		{ "VF", 0, 8 },
26246 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3421c, 0 },
26256 		{ "VF", 0, 8 },
26257 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34220, 0 },
26267 		{ "VF", 0, 8 },
26268 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34224, 0 },
26278 		{ "VF", 0, 8 },
26279 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34228, 0 },
26289 		{ "VF", 0, 8 },
26290 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3422c, 0 },
26300 		{ "VF", 0, 8 },
26301 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34230, 0 },
26311 		{ "VF", 0, 8 },
26312 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34234, 0 },
26322 		{ "VF", 0, 8 },
26323 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34238, 0 },
26333 		{ "VF", 0, 8 },
26334 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3423c, 0 },
26344 		{ "VF", 0, 8 },
26345 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34240, 0 },
26355 		{ "VF", 0, 8 },
26356 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34244, 0 },
26366 		{ "VF", 0, 8 },
26367 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34248, 0 },
26377 		{ "VF", 0, 8 },
26378 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3424c, 0 },
26388 		{ "VF", 0, 8 },
26389 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34250, 0 },
26399 		{ "VF", 0, 8 },
26400 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34254, 0 },
26410 		{ "VF", 0, 8 },
26411 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34258, 0 },
26421 		{ "VF", 0, 8 },
26422 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3425c, 0 },
26432 		{ "VF", 0, 8 },
26433 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34260, 0 },
26443 		{ "VF", 0, 8 },
26444 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34264, 0 },
26454 		{ "VF", 0, 8 },
26455 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34268, 0 },
26465 		{ "VF", 0, 8 },
26466 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3426c, 0 },
26476 		{ "VF", 0, 8 },
26477 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34270, 0 },
26487 		{ "VF", 0, 8 },
26488 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34274, 0 },
26498 		{ "VF", 0, 8 },
26499 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34278, 0 },
26509 		{ "VF", 0, 8 },
26510 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3427c, 0 },
26520 		{ "VF", 0, 8 },
26521 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34280, 0 },
26531 		{ "VF", 0, 8 },
26532 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34284, 0 },
26542 		{ "VF", 0, 8 },
26543 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34288, 0 },
26553 		{ "VF", 0, 8 },
26554 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3428c, 0 },
26564 		{ "VF", 0, 8 },
26565 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34290, 0 },
26575 		{ "VF", 0, 8 },
26576 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34294, 0 },
26586 		{ "VF", 0, 8 },
26587 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34298, 0 },
26597 		{ "VF", 0, 8 },
26598 	{ "MPS_PORT_CLS_HASH_SRAM", 0x3429c, 0 },
26608 		{ "VF", 0, 8 },
26609 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342a0, 0 },
26619 		{ "VF", 0, 8 },
26620 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342a4, 0 },
26630 		{ "VF", 0, 8 },
26631 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342a8, 0 },
26641 		{ "VF", 0, 8 },
26642 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342ac, 0 },
26652 		{ "VF", 0, 8 },
26653 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342b0, 0 },
26663 		{ "VF", 0, 8 },
26664 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342b4, 0 },
26674 		{ "VF", 0, 8 },
26675 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342b8, 0 },
26685 		{ "VF", 0, 8 },
26686 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342bc, 0 },
26696 		{ "VF", 0, 8 },
26697 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342c0, 0 },
26707 		{ "VF", 0, 8 },
26708 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342c4, 0 },
26718 		{ "VF", 0, 8 },
26719 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342c8, 0 },
26729 		{ "VF", 0, 8 },
26730 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342cc, 0 },
26740 		{ "VF", 0, 8 },
26741 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342d0, 0 },
26751 		{ "VF", 0, 8 },
26752 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342d4, 0 },
26762 		{ "VF", 0, 8 },
26763 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342d8, 0 },
26773 		{ "VF", 0, 8 },
26774 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342dc, 0 },
26784 		{ "VF", 0, 8 },
26785 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342e0, 0 },
26795 		{ "VF", 0, 8 },
26796 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342e4, 0 },
26806 		{ "VF", 0, 8 },
26807 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342e8, 0 },
26817 		{ "VF", 0, 8 },
26818 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342ec, 0 },
26828 		{ "VF", 0, 8 },
26829 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342f0, 0 },
26839 		{ "VF", 0, 8 },
26840 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342f4, 0 },
26850 		{ "VF", 0, 8 },
26851 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342f8, 0 },
26861 		{ "VF", 0, 8 },
26862 	{ "MPS_PORT_CLS_HASH_SRAM", 0x342fc, 0 },
26872 		{ "VF", 0, 8 },
26873 	{ "MPS_PORT_CLS_HASH_SRAM", 0x34300, 0 },
26883 		{ "VF", 0, 8 },
26884 	{ "MPS_PORT_CLS_HASH_CTL", 0x30304, 0 },
26886 	{ "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x30308, 0 },
26893 		{ "VF", 0, 8 },
26894 	{ "MPS_PORT_CLS_BMC_MAC_ADDR_L", 0x3030c, 0 },
26895 	{ "MPS_PORT_CLS_BMC_MAC_ADDR_H", 0x30310, 0 },
26899 		{ "DA", 0, 16 },
26900 	{ "MPS_PORT_CLS_BMC_VLAN", 0x30314, 0 },
26903 		{ "VLAN_ID", 0, 12 },
26904 	{ "MPS_PORT_CLS_CTL", 0x30318, 0 },
26915 		{ "PF_VLAN_SEL", 0, 1 },
26916 	{ "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3031c, 0 },
26918 		{ "EthType2", 0, 16 },
26919 	{ "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x30320, 0 },
26921 		{ "EN2", 0, 1 },
26922 	{ "MPS_PORT_CLS_HASH_CTL", 0x34304, 0 },
26924 	{ "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x34308, 0 },
26931 		{ "VF", 0, 8 },
26932 	{ "MPS_PORT_CLS_BMC_MAC_ADDR_L", 0x3430c, 0 },
26933 	{ "MPS_PORT_CLS_BMC_MAC_ADDR_H", 0x34310, 0 },
26937 		{ "DA", 0, 16 },
26938 	{ "MPS_PORT_CLS_BMC_VLAN", 0x34314, 0 },
26941 		{ "VLAN_ID", 0, 12 },
26942 	{ "MPS_PORT_CLS_CTL", 0x34318, 0 },
26953 		{ "PF_VLAN_SEL", 0, 1 },
26954 	{ "MPS_PORT_CLS_NCSI_ETH_TYPE", 0x3431c, 0 },
26956 		{ "EthType2", 0, 16 },
26957 	{ "MPS_PORT_CLS_NCSI_ETH_TYPE_EN", 0x34320, 0 },
26959 		{ "EN2", 0, 1 },
26960 	{ "MPS_CLS_CTL", 0xd000, 0 },
26968 		{ "VlanClsEn", 0, 1 },
26969 	{ "MPS_CLS_ARB_WEIGHT", 0xd004, 0 },
26972 		{ "LpbkWeight", 0, 5 },
26973 	{ "MPS_CLS_NCSI_ETH_TYPE", 0xd008, 0 },
26975 		{ "EthType2", 0, 16 },
26976 	{ "MPS_CLS_NCSI_ETH_TYPE_EN", 0xd00c, 0 },
26978 		{ "EN2", 0, 1 },
26979 	{ "MPS_CLS_BMC_MAC_ADDR_L", 0xd010, 0 },
26980 	{ "MPS_CLS_BMC_MAC_ADDR_H", 0xd014, 0 },
26984 		{ "DA", 0, 16 },
26985 	{ "MPS_CLS_BMC_VLAN", 0xd018, 0 },
26987 		{ "VLAN_ID", 0, 12 },
26988 	{ "MPS_CLS_PERR_INJECT", 0xd01c, 0 },
26990 		{ "InjectDataErr", 0, 1 },
26991 	{ "MPS_CLS_PERR_ENABLE", 0xd020, 0 },
26994 		{ "MatchSRAM", 0, 1 },
26995 	{ "MPS_CLS_INT_ENABLE", 0xd024, 0 },
26999 		{ "MatchSRAM", 0, 1 },
27000 	{ "MPS_CLS_INT_CAUSE", 0xd028, 0 },
27004 		{ "MatchSRAM", 0, 1 },
27005 	{ "MPS_CLS_PL_TEST_DATA_L", 0xd02c, 0 },
27006 	{ "MPS_CLS_PL_TEST_DATA_H", 0xd030, 0 },
27007 	{ "MPS_CLS_PL_TEST_RES_DATA", 0xd034, 0 },
27015 		{ "Cls_Match", 0, 3 },
27016 	{ "MPS_CLS_PL_TEST_CTL", 0xd038, 0 },
27017 	{ "MPS_CLS_PORT_BMC_CTL", 0xd03c, 0 },
27018 	{ "MPS_CLS_MATCH_CNT_TCAM", 0xd100, 0 },
27019 	{ "MPS_CLS_MATCH_CNT_HASH", 0xd104, 0 },
27020 	{ "MPS_CLS_MATCH_CNT_BCAST", 0xd108, 0 },
27021 	{ "MPS_CLS_MATCH_CNT_BMC", 0xd10c, 0 },
27022 	{ "MPS_CLS_MATCH_CNT_PROM", 0xd110, 0 },
27023 	{ "MPS_CLS_MATCH_CNT_HPROM", 0xd114, 0 },
27024 	{ "MPS_CLS_MISS_CNT", 0xd118, 0 },
27025 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd200, 0 },
27026 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd220, 0 },
27027 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd240, 0 },
27028 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd260, 0 },
27029 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd280, 0 },
27030 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2a0, 0 },
27031 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2c0, 0 },
27032 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_L", 0xd2e0, 0 },
27033 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd204, 0 },
27034 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd224, 0 },
27035 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd244, 0 },
27036 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd264, 0 },
27037 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd284, 0 },
27038 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2a4, 0 },
27039 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2c4, 0 },
27040 	{ "MPS_CLS_REQUEST_TRACE_MAC_DA_H", 0xd2e4, 0 },
27041 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd208, 0 },
27042 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd228, 0 },
27043 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd248, 0 },
27044 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd268, 0 },
27045 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd288, 0 },
27046 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2a8, 0 },
27047 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2c8, 0 },
27048 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_L", 0xd2e8, 0 },
27049 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd20c, 0 },
27050 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd22c, 0 },
27051 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd24c, 0 },
27052 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd26c, 0 },
27053 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd28c, 0 },
27054 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2ac, 0 },
27055 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2cc, 0 },
27056 	{ "MPS_CLS_REQUEST_TRACE_MAC_SA_H", 0xd2ec, 0 },
27057 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd210, 0 },
27060 		{ "ClsTrcReqPort", 0, 4 },
27061 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd230, 0 },
27064 		{ "ClsTrcReqPort", 0, 4 },
27065 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd250, 0 },
27068 		{ "ClsTrcReqPort", 0, 4 },
27069 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd270, 0 },
27072 		{ "ClsTrcReqPort", 0, 4 },
27073 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd290, 0 },
27076 		{ "ClsTrcReqPort", 0, 4 },
27077 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2b0, 0 },
27080 		{ "ClsTrcReqPort", 0, 4 },
27081 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2d0, 0 },
27084 		{ "ClsTrcReqPort", 0, 4 },
27085 	{ "MPS_CLS_REQUEST_TRACE_PORT_VLAN", 0xd2f0, 0 },
27088 		{ "ClsTrcReqPort", 0, 4 },
27089 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd214, 0 },
27092 		{ "ClsTrcVNI", 0, 24 },
27093 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd234, 0 },
27096 		{ "ClsTrcVNI", 0, 24 },
27097 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd254, 0 },
27100 		{ "ClsTrcVNI", 0, 24 },
27101 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd274, 0 },
27104 		{ "ClsTrcVNI", 0, 24 },
27105 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd294, 0 },
27108 		{ "ClsTrcVNI", 0, 24 },
27109 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2b4, 0 },
27112 		{ "ClsTrcVNI", 0, 24 },
27113 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2d4, 0 },
27116 		{ "ClsTrcVNI", 0, 24 },
27117 	{ "MPS_CLS_REQUEST_TRACE_ENCAP", 0xd2f4, 0 },
27120 		{ "ClsTrcVNI", 0, 24 },
27121 	{ "MPS_CLS_RESULT_TRACE", 0xd300, 0 },
27131 		{ "ClsTrcVF", 0, 3 },
27132 	{ "MPS_CLS_RESULT_TRACE", 0xd304, 0 },
27142 		{ "ClsTrcVF", 0, 3 },
27143 	{ "MPS_CLS_RESULT_TRACE", 0xd308, 0 },
27153 		{ "ClsTrcVF", 0, 3 },
27154 	{ "MPS_CLS_RESULT_TRACE", 0xd30c, 0 },
27164 		{ "ClsTrcVF", 0, 3 },
27165 	{ "MPS_CLS_RESULT_TRACE", 0xd310, 0 },
27175 		{ "ClsTrcVF", 0, 3 },
27176 	{ "MPS_CLS_RESULT_TRACE", 0xd314, 0 },
27186 		{ "ClsTrcVF", 0, 3 },
27187 	{ "MPS_CLS_RESULT_TRACE", 0xd318, 0 },
27197 		{ "ClsTrcVF", 0, 3 },
27198 	{ "MPS_CLS_RESULT_TRACE", 0xd31c, 0 },
27208 		{ "ClsTrcVF", 0, 3 },
27209 	{ "MPS_CLS_VLAN_TABLE", 0xdfc0, 0 },
27213 		{ "VLAN_ID", 0, 12 },
27214 	{ "MPS_CLS_VLAN_TABLE", 0xdfc4, 0 },
27218 		{ "VLAN_ID", 0, 12 },
27219 	{ "MPS_CLS_VLAN_TABLE", 0xdfc8, 0 },
27223 		{ "VLAN_ID", 0, 12 },
27224 	{ "MPS_CLS_VLAN_TABLE", 0xdfcc, 0 },
27228 		{ "VLAN_ID", 0, 12 },
27229 	{ "MPS_CLS_VLAN_TABLE", 0xdfd0, 0 },
27233 		{ "VLAN_ID", 0, 12 },
27234 	{ "MPS_CLS_VLAN_TABLE", 0xdfd4, 0 },
27238 		{ "VLAN_ID", 0, 12 },
27239 	{ "MPS_CLS_VLAN_TABLE", 0xdfd8, 0 },
27243 		{ "VLAN_ID", 0, 12 },
27244 	{ "MPS_CLS_VLAN_TABLE", 0xdfdc, 0 },
27248 		{ "VLAN_ID", 0, 12 },
27249 	{ "MPS_CLS_VLAN_TABLE", 0xdfe0, 0 },
27253 		{ "VLAN_ID", 0, 12 },
27254 	{ "MPS_CLS_DIPIPV4_ID_TABLE", 0x12000, 0 },
27255 	{ "MPS_CLS_DIPIPV4_ID_TABLE", 0x12008, 0 },
27256 	{ "MPS_CLS_DIPIPV4_ID_TABLE", 0x12010, 0 },
27257 	{ "MPS_CLS_DIPIPV4_ID_TABLE", 0x12018, 0 },
27258 	{ "MPS_CLS_DIPIPV4_MASK_TABLE", 0x12004, 0 },
27259 	{ "MPS_CLS_DIPIPV4_MASK_TABLE", 0x1200c, 0 },
27260 	{ "MPS_CLS_DIPIPV4_MASK_TABLE", 0x12014, 0 },
27261 	{ "MPS_CLS_DIPIPV4_MASK_TABLE", 0x1201c, 0 },
27262 	{ "MPS_CLS_DIPIPV6ID_0_TABLE", 0x12020, 0 },
27263 	{ "MPS_CLS_DIPIPV6ID_0_TABLE", 0x12040, 0 },
27264 	{ "MPS_CLS_DIPIPV6ID_1_TABLE", 0x12024, 0 },
27265 	{ "MPS_CLS_DIPIPV6ID_1_TABLE", 0x12044, 0 },
27266 	{ "MPS_CLS_DIPIPV6ID_2_TABLE", 0x12028, 0 },
27267 	{ "MPS_CLS_DIPIPV6ID_2_TABLE", 0x12048, 0 },
27268 	{ "MPS_CLS_DIPIPV6ID_3_TABLE", 0x1202c, 0 },
27269 	{ "MPS_CLS_DIPIPV6ID_3_TABLE", 0x1204c, 0 },
27270 	{ "MPS_CLS_DIPIPV6MASK_0_TABLE", 0x12030, 0 },
27271 	{ "MPS_CLS_DIPIPV6MASK_0_TABLE", 0x12050, 0 },
27272 	{ "MPS_CLS_DIPIPV6MASK_1_TABLE", 0x12034, 0 },
27273 	{ "MPS_CLS_DIPIPV6MASK_1_TABLE", 0x12054, 0 },
27274 	{ "MPS_CLS_DIPIPV6MASK_2_TABLE", 0x12038, 0 },
27275 	{ "MPS_CLS_DIPIPV6MASK_2_TABLE", 0x12058, 0 },
27276 	{ "MPS_CLS_DIPIPV6MASK_3_TABLE", 0x1203c, 0 },
27277 	{ "MPS_CLS_DIPIPV6MASK_3_TABLE", 0x1205c, 0 },
27278 	{ "MPS_RX_HASH_LKP_TABLE", 0x12060, 0 },
27279 	{ "MPS_RX_HASH_LKP_TABLE", 0x12064, 0 },
27280 	{ "MPS_RX_HASH_LKP_TABLE", 0x12068, 0 },
27281 	{ "MPS_RX_HASH_LKP_TABLE", 0x1206c, 0 },
27282 	{ "MPS_CLS_SRAM_L", 0xe000, 0 },
27297 		{ "VF", 0, 8 },
27298 	{ "MPS_CLS_SRAM_L", 0xe008, 0 },
27313 		{ "VF", 0, 8 },
27314 	{ "MPS_CLS_SRAM_L", 0xe010, 0 },
27329 		{ "VF", 0, 8 },
27330 	{ "MPS_CLS_SRAM_L", 0xe018, 0 },
27345 		{ "VF", 0, 8 },
27346 	{ "MPS_CLS_SRAM_L", 0xe020, 0 },
27361 		{ "VF", 0, 8 },
27362 	{ "MPS_CLS_SRAM_L", 0xe028, 0 },
27377 		{ "VF", 0, 8 },
27378 	{ "MPS_CLS_SRAM_L", 0xe030, 0 },
27393 		{ "VF", 0, 8 },
27394 	{ "MPS_CLS_SRAM_L", 0xe038, 0 },
27409 		{ "VF", 0, 8 },
27410 	{ "MPS_CLS_SRAM_L", 0xe040, 0 },
27425 		{ "VF", 0, 8 },
27426 	{ "MPS_CLS_SRAM_L", 0xe048, 0 },
27441 		{ "VF", 0, 8 },
27442 	{ "MPS_CLS_SRAM_L", 0xe050, 0 },
27457 		{ "VF", 0, 8 },
27458 	{ "MPS_CLS_SRAM_L", 0xe058, 0 },
27473 		{ "VF", 0, 8 },
27474 	{ "MPS_CLS_SRAM_L", 0xe060, 0 },
27489 		{ "VF", 0, 8 },
27490 	{ "MPS_CLS_SRAM_L", 0xe068, 0 },
27505 		{ "VF", 0, 8 },
27506 	{ "MPS_CLS_SRAM_L", 0xe070, 0 },
27521 		{ "VF", 0, 8 },
27522 	{ "MPS_CLS_SRAM_L", 0xe078, 0 },
27537 		{ "VF", 0, 8 },
27538 	{ "MPS_CLS_SRAM_L", 0xe080, 0 },
27553 		{ "VF", 0, 8 },
27554 	{ "MPS_CLS_SRAM_L", 0xe088, 0 },
27569 		{ "VF", 0, 8 },
27570 	{ "MPS_CLS_SRAM_L", 0xe090, 0 },
27585 		{ "VF", 0, 8 },
27586 	{ "MPS_CLS_SRAM_L", 0xe098, 0 },
27601 		{ "VF", 0, 8 },
27602 	{ "MPS_CLS_SRAM_L", 0xe0a0, 0 },
27617 		{ "VF", 0, 8 },
27618 	{ "MPS_CLS_SRAM_L", 0xe0a8, 0 },
27633 		{ "VF", 0, 8 },
27634 	{ "MPS_CLS_SRAM_L", 0xe0b0, 0 },
27649 		{ "VF", 0, 8 },
27650 	{ "MPS_CLS_SRAM_L", 0xe0b8, 0 },
27665 		{ "VF", 0, 8 },
27666 	{ "MPS_CLS_SRAM_L", 0xe0c0, 0 },
27681 		{ "VF", 0, 8 },
27682 	{ "MPS_CLS_SRAM_L", 0xe0c8, 0 },
27697 		{ "VF", 0, 8 },
27698 	{ "MPS_CLS_SRAM_L", 0xe0d0, 0 },
27713 		{ "VF", 0, 8 },
27714 	{ "MPS_CLS_SRAM_L", 0xe0d8, 0 },
27729 		{ "VF", 0, 8 },
27730 	{ "MPS_CLS_SRAM_L", 0xe0e0, 0 },
27745 		{ "VF", 0, 8 },
27746 	{ "MPS_CLS_SRAM_L", 0xe0e8, 0 },
27761 		{ "VF", 0, 8 },
27762 	{ "MPS_CLS_SRAM_L", 0xe0f0, 0 },
27777 		{ "VF", 0, 8 },
27778 	{ "MPS_CLS_SRAM_L", 0xe0f8, 0 },
27793 		{ "VF", 0, 8 },
27794 	{ "MPS_CLS_SRAM_L", 0xe100, 0 },
27809 		{ "VF", 0, 8 },
27810 	{ "MPS_CLS_SRAM_L", 0xe108, 0 },
27825 		{ "VF", 0, 8 },
27826 	{ "MPS_CLS_SRAM_L", 0xe110, 0 },
27841 		{ "VF", 0, 8 },
27842 	{ "MPS_CLS_SRAM_L", 0xe118, 0 },
27857 		{ "VF", 0, 8 },
27858 	{ "MPS_CLS_SRAM_L", 0xe120, 0 },
27873 		{ "VF", 0, 8 },
27874 	{ "MPS_CLS_SRAM_L", 0xe128, 0 },
27889 		{ "VF", 0, 8 },
27890 	{ "MPS_CLS_SRAM_L", 0xe130, 0 },
27905 		{ "VF", 0, 8 },
27906 	{ "MPS_CLS_SRAM_L", 0xe138, 0 },
27921 		{ "VF", 0, 8 },
27922 	{ "MPS_CLS_SRAM_L", 0xe140, 0 },
27937 		{ "VF", 0, 8 },
27938 	{ "MPS_CLS_SRAM_L", 0xe148, 0 },
27953 		{ "VF", 0, 8 },
27954 	{ "MPS_CLS_SRAM_L", 0xe150, 0 },
27969 		{ "VF", 0, 8 },
27970 	{ "MPS_CLS_SRAM_L", 0xe158, 0 },
27985 		{ "VF", 0, 8 },
27986 	{ "MPS_CLS_SRAM_L", 0xe160, 0 },
28001 		{ "VF", 0, 8 },
28002 	{ "MPS_CLS_SRAM_L", 0xe168, 0 },
28017 		{ "VF", 0, 8 },
28018 	{ "MPS_CLS_SRAM_L", 0xe170, 0 },
28033 		{ "VF", 0, 8 },
28034 	{ "MPS_CLS_SRAM_L", 0xe178, 0 },
28049 		{ "VF", 0, 8 },
28050 	{ "MPS_CLS_SRAM_L", 0xe180, 0 },
28065 		{ "VF", 0, 8 },
28066 	{ "MPS_CLS_SRAM_L", 0xe188, 0 },
28081 		{ "VF", 0, 8 },
28082 	{ "MPS_CLS_SRAM_L", 0xe190, 0 },
28097 		{ "VF", 0, 8 },
28098 	{ "MPS_CLS_SRAM_L", 0xe198, 0 },
28113 		{ "VF", 0, 8 },
28114 	{ "MPS_CLS_SRAM_L", 0xe1a0, 0 },
28129 		{ "VF", 0, 8 },
28130 	{ "MPS_CLS_SRAM_L", 0xe1a8, 0 },
28145 		{ "VF", 0, 8 },
28146 	{ "MPS_CLS_SRAM_L", 0xe1b0, 0 },
28161 		{ "VF", 0, 8 },
28162 	{ "MPS_CLS_SRAM_L", 0xe1b8, 0 },
28177 		{ "VF", 0, 8 },
28178 	{ "MPS_CLS_SRAM_L", 0xe1c0, 0 },
28193 		{ "VF", 0, 8 },
28194 	{ "MPS_CLS_SRAM_L", 0xe1c8, 0 },
28209 		{ "VF", 0, 8 },
28210 	{ "MPS_CLS_SRAM_L", 0xe1d0, 0 },
28225 		{ "VF", 0, 8 },
28226 	{ "MPS_CLS_SRAM_L", 0xe1d8, 0 },
28241 		{ "VF", 0, 8 },
28242 	{ "MPS_CLS_SRAM_L", 0xe1e0, 0 },
28257 		{ "VF", 0, 8 },
28258 	{ "MPS_CLS_SRAM_L", 0xe1e8, 0 },
28273 		{ "VF", 0, 8 },
28274 	{ "MPS_CLS_SRAM_L", 0xe1f0, 0 },
28289 		{ "VF", 0, 8 },
28290 	{ "MPS_CLS_SRAM_L", 0xe1f8, 0 },
28305 		{ "VF", 0, 8 },
28306 	{ "MPS_CLS_SRAM_L", 0xe200, 0 },
28321 		{ "VF", 0, 8 },
28322 	{ "MPS_CLS_SRAM_L", 0xe208, 0 },
28337 		{ "VF", 0, 8 },
28338 	{ "MPS_CLS_SRAM_L", 0xe210, 0 },
28353 		{ "VF", 0, 8 },
28354 	{ "MPS_CLS_SRAM_L", 0xe218, 0 },
28369 		{ "VF", 0, 8 },
28370 	{ "MPS_CLS_SRAM_L", 0xe220, 0 },
28385 		{ "VF", 0, 8 },
28386 	{ "MPS_CLS_SRAM_L", 0xe228, 0 },
28401 		{ "VF", 0, 8 },
28402 	{ "MPS_CLS_SRAM_L", 0xe230, 0 },
28417 		{ "VF", 0, 8 },
28418 	{ "MPS_CLS_SRAM_L", 0xe238, 0 },
28433 		{ "VF", 0, 8 },
28434 	{ "MPS_CLS_SRAM_L", 0xe240, 0 },
28449 		{ "VF", 0, 8 },
28450 	{ "MPS_CLS_SRAM_L", 0xe248, 0 },
28465 		{ "VF", 0, 8 },
28466 	{ "MPS_CLS_SRAM_L", 0xe250, 0 },
28481 		{ "VF", 0, 8 },
28482 	{ "MPS_CLS_SRAM_L", 0xe258, 0 },
28497 		{ "VF", 0, 8 },
28498 	{ "MPS_CLS_SRAM_L", 0xe260, 0 },
28513 		{ "VF", 0, 8 },
28514 	{ "MPS_CLS_SRAM_L", 0xe268, 0 },
28529 		{ "VF", 0, 8 },
28530 	{ "MPS_CLS_SRAM_L", 0xe270, 0 },
28545 		{ "VF", 0, 8 },
28546 	{ "MPS_CLS_SRAM_L", 0xe278, 0 },
28561 		{ "VF", 0, 8 },
28562 	{ "MPS_CLS_SRAM_L", 0xe280, 0 },
28577 		{ "VF", 0, 8 },
28578 	{ "MPS_CLS_SRAM_L", 0xe288, 0 },
28593 		{ "VF", 0, 8 },
28594 	{ "MPS_CLS_SRAM_L", 0xe290, 0 },
28609 		{ "VF", 0, 8 },
28610 	{ "MPS_CLS_SRAM_L", 0xe298, 0 },
28625 		{ "VF", 0, 8 },
28626 	{ "MPS_CLS_SRAM_L", 0xe2a0, 0 },
28641 		{ "VF", 0, 8 },
28642 	{ "MPS_CLS_SRAM_L", 0xe2a8, 0 },
28657 		{ "VF", 0, 8 },
28658 	{ "MPS_CLS_SRAM_L", 0xe2b0, 0 },
28673 		{ "VF", 0, 8 },
28674 	{ "MPS_CLS_SRAM_L", 0xe2b8, 0 },
28689 		{ "VF", 0, 8 },
28690 	{ "MPS_CLS_SRAM_L", 0xe2c0, 0 },
28705 		{ "VF", 0, 8 },
28706 	{ "MPS_CLS_SRAM_L", 0xe2c8, 0 },
28721 		{ "VF", 0, 8 },
28722 	{ "MPS_CLS_SRAM_L", 0xe2d0, 0 },
28737 		{ "VF", 0, 8 },
28738 	{ "MPS_CLS_SRAM_L", 0xe2d8, 0 },
28753 		{ "VF", 0, 8 },
28754 	{ "MPS_CLS_SRAM_L", 0xe2e0, 0 },
28769 		{ "VF", 0, 8 },
28770 	{ "MPS_CLS_SRAM_L", 0xe2e8, 0 },
28785 		{ "VF", 0, 8 },
28786 	{ "MPS_CLS_SRAM_L", 0xe2f0, 0 },
28801 		{ "VF", 0, 8 },
28802 	{ "MPS_CLS_SRAM_L", 0xe2f8, 0 },
28817 		{ "VF", 0, 8 },
28818 	{ "MPS_CLS_SRAM_L", 0xe300, 0 },
28833 		{ "VF", 0, 8 },
28834 	{ "MPS_CLS_SRAM_L", 0xe308, 0 },
28849 		{ "VF", 0, 8 },
28850 	{ "MPS_CLS_SRAM_L", 0xe310, 0 },
28865 		{ "VF", 0, 8 },
28866 	{ "MPS_CLS_SRAM_L", 0xe318, 0 },
28881 		{ "VF", 0, 8 },
28882 	{ "MPS_CLS_SRAM_L", 0xe320, 0 },
28897 		{ "VF", 0, 8 },
28898 	{ "MPS_CLS_SRAM_L", 0xe328, 0 },
28913 		{ "VF", 0, 8 },
28914 	{ "MPS_CLS_SRAM_L", 0xe330, 0 },
28929 		{ "VF", 0, 8 },
28930 	{ "MPS_CLS_SRAM_L", 0xe338, 0 },
28945 		{ "VF", 0, 8 },
28946 	{ "MPS_CLS_SRAM_L", 0xe340, 0 },
28961 		{ "VF", 0, 8 },
28962 	{ "MPS_CLS_SRAM_L", 0xe348, 0 },
28977 		{ "VF", 0, 8 },
28978 	{ "MPS_CLS_SRAM_L", 0xe350, 0 },
28993 		{ "VF", 0, 8 },
28994 	{ "MPS_CLS_SRAM_L", 0xe358, 0 },
29009 		{ "VF", 0, 8 },
29010 	{ "MPS_CLS_SRAM_L", 0xe360, 0 },
29025 		{ "VF", 0, 8 },
29026 	{ "MPS_CLS_SRAM_L", 0xe368, 0 },
29041 		{ "VF", 0, 8 },
29042 	{ "MPS_CLS_SRAM_L", 0xe370, 0 },
29057 		{ "VF", 0, 8 },
29058 	{ "MPS_CLS_SRAM_L", 0xe378, 0 },
29073 		{ "VF", 0, 8 },
29074 	{ "MPS_CLS_SRAM_L", 0xe380, 0 },
29089 		{ "VF", 0, 8 },
29090 	{ "MPS_CLS_SRAM_L", 0xe388, 0 },
29105 		{ "VF", 0, 8 },
29106 	{ "MPS_CLS_SRAM_L", 0xe390, 0 },
29121 		{ "VF", 0, 8 },
29122 	{ "MPS_CLS_SRAM_L", 0xe398, 0 },
29137 		{ "VF", 0, 8 },
29138 	{ "MPS_CLS_SRAM_L", 0xe3a0, 0 },
29153 		{ "VF", 0, 8 },
29154 	{ "MPS_CLS_SRAM_L", 0xe3a8, 0 },
29169 		{ "VF", 0, 8 },
29170 	{ "MPS_CLS_SRAM_L", 0xe3b0, 0 },
29185 		{ "VF", 0, 8 },
29186 	{ "MPS_CLS_SRAM_L", 0xe3b8, 0 },
29201 		{ "VF", 0, 8 },
29202 	{ "MPS_CLS_SRAM_L", 0xe3c0, 0 },
29217 		{ "VF", 0, 8 },
29218 	{ "MPS_CLS_SRAM_L", 0xe3c8, 0 },
29233 		{ "VF", 0, 8 },
29234 	{ "MPS_CLS_SRAM_L", 0xe3d0, 0 },
29249 		{ "VF", 0, 8 },
29250 	{ "MPS_CLS_SRAM_L", 0xe3d8, 0 },
29265 		{ "VF", 0, 8 },
29266 	{ "MPS_CLS_SRAM_L", 0xe3e0, 0 },
29281 		{ "VF", 0, 8 },
29282 	{ "MPS_CLS_SRAM_L", 0xe3e8, 0 },
29297 		{ "VF", 0, 8 },
29298 	{ "MPS_CLS_SRAM_L", 0xe3f0, 0 },
29313 		{ "VF", 0, 8 },
29314 	{ "MPS_CLS_SRAM_L", 0xe3f8, 0 },
29329 		{ "VF", 0, 8 },
29330 	{ "MPS_CLS_SRAM_L", 0xe400, 0 },
29345 		{ "VF", 0, 8 },
29346 	{ "MPS_CLS_SRAM_L", 0xe408, 0 },
29361 		{ "VF", 0, 8 },
29362 	{ "MPS_CLS_SRAM_L", 0xe410, 0 },
29377 		{ "VF", 0, 8 },
29378 	{ "MPS_CLS_SRAM_L", 0xe418, 0 },
29393 		{ "VF", 0, 8 },
29394 	{ "MPS_CLS_SRAM_L", 0xe420, 0 },
29409 		{ "VF", 0, 8 },
29410 	{ "MPS_CLS_SRAM_L", 0xe428, 0 },
29425 		{ "VF", 0, 8 },
29426 	{ "MPS_CLS_SRAM_L", 0xe430, 0 },
29441 		{ "VF", 0, 8 },
29442 	{ "MPS_CLS_SRAM_L", 0xe438, 0 },
29457 		{ "VF", 0, 8 },
29458 	{ "MPS_CLS_SRAM_L", 0xe440, 0 },
29473 		{ "VF", 0, 8 },
29474 	{ "MPS_CLS_SRAM_L", 0xe448, 0 },
29489 		{ "VF", 0, 8 },
29490 	{ "MPS_CLS_SRAM_L", 0xe450, 0 },
29505 		{ "VF", 0, 8 },
29506 	{ "MPS_CLS_SRAM_L", 0xe458, 0 },
29521 		{ "VF", 0, 8 },
29522 	{ "MPS_CLS_SRAM_L", 0xe460, 0 },
29537 		{ "VF", 0, 8 },
29538 	{ "MPS_CLS_SRAM_L", 0xe468, 0 },
29553 		{ "VF", 0, 8 },
29554 	{ "MPS_CLS_SRAM_L", 0xe470, 0 },
29569 		{ "VF", 0, 8 },
29570 	{ "MPS_CLS_SRAM_L", 0xe478, 0 },
29585 		{ "VF", 0, 8 },
29586 	{ "MPS_CLS_SRAM_L", 0xe480, 0 },
29601 		{ "VF", 0, 8 },
29602 	{ "MPS_CLS_SRAM_L", 0xe488, 0 },
29617 		{ "VF", 0, 8 },
29618 	{ "MPS_CLS_SRAM_L", 0xe490, 0 },
29633 		{ "VF", 0, 8 },
29634 	{ "MPS_CLS_SRAM_L", 0xe498, 0 },
29649 		{ "VF", 0, 8 },
29650 	{ "MPS_CLS_SRAM_L", 0xe4a0, 0 },
29665 		{ "VF", 0, 8 },
29666 	{ "MPS_CLS_SRAM_L", 0xe4a8, 0 },
29681 		{ "VF", 0, 8 },
29682 	{ "MPS_CLS_SRAM_L", 0xe4b0, 0 },
29697 		{ "VF", 0, 8 },
29698 	{ "MPS_CLS_SRAM_L", 0xe4b8, 0 },
29713 		{ "VF", 0, 8 },
29714 	{ "MPS_CLS_SRAM_L", 0xe4c0, 0 },
29729 		{ "VF", 0, 8 },
29730 	{ "MPS_CLS_SRAM_L", 0xe4c8, 0 },
29745 		{ "VF", 0, 8 },
29746 	{ "MPS_CLS_SRAM_L", 0xe4d0, 0 },
29761 		{ "VF", 0, 8 },
29762 	{ "MPS_CLS_SRAM_L", 0xe4d8, 0 },
29777 		{ "VF", 0, 8 },
29778 	{ "MPS_CLS_SRAM_L", 0xe4e0, 0 },
29793 		{ "VF", 0, 8 },
29794 	{ "MPS_CLS_SRAM_L", 0xe4e8, 0 },
29809 		{ "VF", 0, 8 },
29810 	{ "MPS_CLS_SRAM_L", 0xe4f0, 0 },
29825 		{ "VF", 0, 8 },
29826 	{ "MPS_CLS_SRAM_L", 0xe4f8, 0 },
29841 		{ "VF", 0, 8 },
29842 	{ "MPS_CLS_SRAM_L", 0xe500, 0 },
29857 		{ "VF", 0, 8 },
29858 	{ "MPS_CLS_SRAM_L", 0xe508, 0 },
29873 		{ "VF", 0, 8 },
29874 	{ "MPS_CLS_SRAM_L", 0xe510, 0 },
29889 		{ "VF", 0, 8 },
29890 	{ "MPS_CLS_SRAM_L", 0xe518, 0 },
29905 		{ "VF", 0, 8 },
29906 	{ "MPS_CLS_SRAM_L", 0xe520, 0 },
29921 		{ "VF", 0, 8 },
29922 	{ "MPS_CLS_SRAM_L", 0xe528, 0 },
29937 		{ "VF", 0, 8 },
29938 	{ "MPS_CLS_SRAM_L", 0xe530, 0 },
29953 		{ "VF", 0, 8 },
29954 	{ "MPS_CLS_SRAM_L", 0xe538, 0 },
29969 		{ "VF", 0, 8 },
29970 	{ "MPS_CLS_SRAM_L", 0xe540, 0 },
29985 		{ "VF", 0, 8 },
29986 	{ "MPS_CLS_SRAM_L", 0xe548, 0 },
30001 		{ "VF", 0, 8 },
30002 	{ "MPS_CLS_SRAM_L", 0xe550, 0 },
30017 		{ "VF", 0, 8 },
30018 	{ "MPS_CLS_SRAM_L", 0xe558, 0 },
30033 		{ "VF", 0, 8 },
30034 	{ "MPS_CLS_SRAM_L", 0xe560, 0 },
30049 		{ "VF", 0, 8 },
30050 	{ "MPS_CLS_SRAM_L", 0xe568, 0 },
30065 		{ "VF", 0, 8 },
30066 	{ "MPS_CLS_SRAM_L", 0xe570, 0 },
30081 		{ "VF", 0, 8 },
30082 	{ "MPS_CLS_SRAM_L", 0xe578, 0 },
30097 		{ "VF", 0, 8 },
30098 	{ "MPS_CLS_SRAM_L", 0xe580, 0 },
30113 		{ "VF", 0, 8 },
30114 	{ "MPS_CLS_SRAM_L", 0xe588, 0 },
30129 		{ "VF", 0, 8 },
30130 	{ "MPS_CLS_SRAM_L", 0xe590, 0 },
30145 		{ "VF", 0, 8 },
30146 	{ "MPS_CLS_SRAM_L", 0xe598, 0 },
30161 		{ "VF", 0, 8 },
30162 	{ "MPS_CLS_SRAM_L", 0xe5a0, 0 },
30177 		{ "VF", 0, 8 },
30178 	{ "MPS_CLS_SRAM_L", 0xe5a8, 0 },
30193 		{ "VF", 0, 8 },
30194 	{ "MPS_CLS_SRAM_L", 0xe5b0, 0 },
30209 		{ "VF", 0, 8 },
30210 	{ "MPS_CLS_SRAM_L", 0xe5b8, 0 },
30225 		{ "VF", 0, 8 },
30226 	{ "MPS_CLS_SRAM_L", 0xe5c0, 0 },
30241 		{ "VF", 0, 8 },
30242 	{ "MPS_CLS_SRAM_L", 0xe5c8, 0 },
30257 		{ "VF", 0, 8 },
30258 	{ "MPS_CLS_SRAM_L", 0xe5d0, 0 },
30273 		{ "VF", 0, 8 },
30274 	{ "MPS_CLS_SRAM_L", 0xe5d8, 0 },
30289 		{ "VF", 0, 8 },
30290 	{ "MPS_CLS_SRAM_L", 0xe5e0, 0 },
30305 		{ "VF", 0, 8 },
30306 	{ "MPS_CLS_SRAM_L", 0xe5e8, 0 },
30321 		{ "VF", 0, 8 },
30322 	{ "MPS_CLS_SRAM_L", 0xe5f0, 0 },
30337 		{ "VF", 0, 8 },
30338 	{ "MPS_CLS_SRAM_L", 0xe5f8, 0 },
30353 		{ "VF", 0, 8 },
30354 	{ "MPS_CLS_SRAM_L", 0xe600, 0 },
30369 		{ "VF", 0, 8 },
30370 	{ "MPS_CLS_SRAM_L", 0xe608, 0 },
30385 		{ "VF", 0, 8 },
30386 	{ "MPS_CLS_SRAM_L", 0xe610, 0 },
30401 		{ "VF", 0, 8 },
30402 	{ "MPS_CLS_SRAM_L", 0xe618, 0 },
30417 		{ "VF", 0, 8 },
30418 	{ "MPS_CLS_SRAM_L", 0xe620, 0 },
30433 		{ "VF", 0, 8 },
30434 	{ "MPS_CLS_SRAM_L", 0xe628, 0 },
30449 		{ "VF", 0, 8 },
30450 	{ "MPS_CLS_SRAM_L", 0xe630, 0 },
30465 		{ "VF", 0, 8 },
30466 	{ "MPS_CLS_SRAM_L", 0xe638, 0 },
30481 		{ "VF", 0, 8 },
30482 	{ "MPS_CLS_SRAM_L", 0xe640, 0 },
30497 		{ "VF", 0, 8 },
30498 	{ "MPS_CLS_SRAM_L", 0xe648, 0 },
30513 		{ "VF", 0, 8 },
30514 	{ "MPS_CLS_SRAM_L", 0xe650, 0 },
30529 		{ "VF", 0, 8 },
30530 	{ "MPS_CLS_SRAM_L", 0xe658, 0 },
30545 		{ "VF", 0, 8 },
30546 	{ "MPS_CLS_SRAM_L", 0xe660, 0 },
30561 		{ "VF", 0, 8 },
30562 	{ "MPS_CLS_SRAM_L", 0xe668, 0 },
30577 		{ "VF", 0, 8 },
30578 	{ "MPS_CLS_SRAM_L", 0xe670, 0 },
30593 		{ "VF", 0, 8 },
30594 	{ "MPS_CLS_SRAM_L", 0xe678, 0 },
30609 		{ "VF", 0, 8 },
30610 	{ "MPS_CLS_SRAM_L", 0xe680, 0 },
30625 		{ "VF", 0, 8 },
30626 	{ "MPS_CLS_SRAM_L", 0xe688, 0 },
30641 		{ "VF", 0, 8 },
30642 	{ "MPS_CLS_SRAM_L", 0xe690, 0 },
30657 		{ "VF", 0, 8 },
30658 	{ "MPS_CLS_SRAM_L", 0xe698, 0 },
30673 		{ "VF", 0, 8 },
30674 	{ "MPS_CLS_SRAM_L", 0xe6a0, 0 },
30689 		{ "VF", 0, 8 },
30690 	{ "MPS_CLS_SRAM_L", 0xe6a8, 0 },
30705 		{ "VF", 0, 8 },
30706 	{ "MPS_CLS_SRAM_L", 0xe6b0, 0 },
30721 		{ "VF", 0, 8 },
30722 	{ "MPS_CLS_SRAM_L", 0xe6b8, 0 },
30737 		{ "VF", 0, 8 },
30738 	{ "MPS_CLS_SRAM_L", 0xe6c0, 0 },
30753 		{ "VF", 0, 8 },
30754 	{ "MPS_CLS_SRAM_L", 0xe6c8, 0 },
30769 		{ "VF", 0, 8 },
30770 	{ "MPS_CLS_SRAM_L", 0xe6d0, 0 },
30785 		{ "VF", 0, 8 },
30786 	{ "MPS_CLS_SRAM_L", 0xe6d8, 0 },
30801 		{ "VF", 0, 8 },
30802 	{ "MPS_CLS_SRAM_L", 0xe6e0, 0 },
30817 		{ "VF", 0, 8 },
30818 	{ "MPS_CLS_SRAM_L", 0xe6e8, 0 },
30833 		{ "VF", 0, 8 },
30834 	{ "MPS_CLS_SRAM_L", 0xe6f0, 0 },
30849 		{ "VF", 0, 8 },
30850 	{ "MPS_CLS_SRAM_L", 0xe6f8, 0 },
30865 		{ "VF", 0, 8 },
30866 	{ "MPS_CLS_SRAM_L", 0xe700, 0 },
30881 		{ "VF", 0, 8 },
30882 	{ "MPS_CLS_SRAM_L", 0xe708, 0 },
30897 		{ "VF", 0, 8 },
30898 	{ "MPS_CLS_SRAM_L", 0xe710, 0 },
30913 		{ "VF", 0, 8 },
30914 	{ "MPS_CLS_SRAM_L", 0xe718, 0 },
30929 		{ "VF", 0, 8 },
30930 	{ "MPS_CLS_SRAM_L", 0xe720, 0 },
30945 		{ "VF", 0, 8 },
30946 	{ "MPS_CLS_SRAM_L", 0xe728, 0 },
30961 		{ "VF", 0, 8 },
30962 	{ "MPS_CLS_SRAM_L", 0xe730, 0 },
30977 		{ "VF", 0, 8 },
30978 	{ "MPS_CLS_SRAM_L", 0xe738, 0 },
30993 		{ "VF", 0, 8 },
30994 	{ "MPS_CLS_SRAM_L", 0xe740, 0 },
31009 		{ "VF", 0, 8 },
31010 	{ "MPS_CLS_SRAM_L", 0xe748, 0 },
31025 		{ "VF", 0, 8 },
31026 	{ "MPS_CLS_SRAM_L", 0xe750, 0 },
31041 		{ "VF", 0, 8 },
31042 	{ "MPS_CLS_SRAM_L", 0xe758, 0 },
31057 		{ "VF", 0, 8 },
31058 	{ "MPS_CLS_SRAM_L", 0xe760, 0 },
31073 		{ "VF", 0, 8 },
31074 	{ "MPS_CLS_SRAM_L", 0xe768, 0 },
31089 		{ "VF", 0, 8 },
31090 	{ "MPS_CLS_SRAM_L", 0xe770, 0 },
31105 		{ "VF", 0, 8 },
31106 	{ "MPS_CLS_SRAM_L", 0xe778, 0 },
31121 		{ "VF", 0, 8 },
31122 	{ "MPS_CLS_SRAM_L", 0xe780, 0 },
31137 		{ "VF", 0, 8 },
31138 	{ "MPS_CLS_SRAM_L", 0xe788, 0 },
31153 		{ "VF", 0, 8 },
31154 	{ "MPS_CLS_SRAM_L", 0xe790, 0 },
31169 		{ "VF", 0, 8 },
31170 	{ "MPS_CLS_SRAM_L", 0xe798, 0 },
31185 		{ "VF", 0, 8 },
31186 	{ "MPS_CLS_SRAM_L", 0xe7a0, 0 },
31201 		{ "VF", 0, 8 },
31202 	{ "MPS_CLS_SRAM_L", 0xe7a8, 0 },
31217 		{ "VF", 0, 8 },
31218 	{ "MPS_CLS_SRAM_L", 0xe7b0, 0 },
31233 		{ "VF", 0, 8 },
31234 	{ "MPS_CLS_SRAM_L", 0xe7b8, 0 },
31249 		{ "VF", 0, 8 },
31250 	{ "MPS_CLS_SRAM_L", 0xe7c0, 0 },
31265 		{ "VF", 0, 8 },
31266 	{ "MPS_CLS_SRAM_L", 0xe7c8, 0 },
31281 		{ "VF", 0, 8 },
31282 	{ "MPS_CLS_SRAM_L", 0xe7d0, 0 },
31297 		{ "VF", 0, 8 },
31298 	{ "MPS_CLS_SRAM_L", 0xe7d8, 0 },
31313 		{ "VF", 0, 8 },
31314 	{ "MPS_CLS_SRAM_L", 0xe7e0, 0 },
31329 		{ "VF", 0, 8 },
31330 	{ "MPS_CLS_SRAM_L", 0xe7e8, 0 },
31345 		{ "VF", 0, 8 },
31346 	{ "MPS_CLS_SRAM_L", 0xe7f0, 0 },
31361 		{ "VF", 0, 8 },
31362 	{ "MPS_CLS_SRAM_L", 0xe7f8, 0 },
31377 		{ "VF", 0, 8 },
31378 	{ "MPS_CLS_SRAM_L", 0xe800, 0 },
31393 		{ "VF", 0, 8 },
31394 	{ "MPS_CLS_SRAM_L", 0xe808, 0 },
31409 		{ "VF", 0, 8 },
31410 	{ "MPS_CLS_SRAM_L", 0xe810, 0 },
31425 		{ "VF", 0, 8 },
31426 	{ "MPS_CLS_SRAM_L", 0xe818, 0 },
31441 		{ "VF", 0, 8 },
31442 	{ "MPS_CLS_SRAM_L", 0xe820, 0 },
31457 		{ "VF", 0, 8 },
31458 	{ "MPS_CLS_SRAM_L", 0xe828, 0 },
31473 		{ "VF", 0, 8 },
31474 	{ "MPS_CLS_SRAM_L", 0xe830, 0 },
31489 		{ "VF", 0, 8 },
31490 	{ "MPS_CLS_SRAM_L", 0xe838, 0 },
31505 		{ "VF", 0, 8 },
31506 	{ "MPS_CLS_SRAM_L", 0xe840, 0 },
31521 		{ "VF", 0, 8 },
31522 	{ "MPS_CLS_SRAM_L", 0xe848, 0 },
31537 		{ "VF", 0, 8 },
31538 	{ "MPS_CLS_SRAM_L", 0xe850, 0 },
31553 		{ "VF", 0, 8 },
31554 	{ "MPS_CLS_SRAM_L", 0xe858, 0 },
31569 		{ "VF", 0, 8 },
31570 	{ "MPS_CLS_SRAM_L", 0xe860, 0 },
31585 		{ "VF", 0, 8 },
31586 	{ "MPS_CLS_SRAM_L", 0xe868, 0 },
31601 		{ "VF", 0, 8 },
31602 	{ "MPS_CLS_SRAM_L", 0xe870, 0 },
31617 		{ "VF", 0, 8 },
31618 	{ "MPS_CLS_SRAM_L", 0xe878, 0 },
31633 		{ "VF", 0, 8 },
31634 	{ "MPS_CLS_SRAM_L", 0xe880, 0 },
31649 		{ "VF", 0, 8 },
31650 	{ "MPS_CLS_SRAM_L", 0xe888, 0 },
31665 		{ "VF", 0, 8 },
31666 	{ "MPS_CLS_SRAM_L", 0xe890, 0 },
31681 		{ "VF", 0, 8 },
31682 	{ "MPS_CLS_SRAM_L", 0xe898, 0 },
31697 		{ "VF", 0, 8 },
31698 	{ "MPS_CLS_SRAM_L", 0xe8a0, 0 },
31713 		{ "VF", 0, 8 },
31714 	{ "MPS_CLS_SRAM_L", 0xe8a8, 0 },
31729 		{ "VF", 0, 8 },
31730 	{ "MPS_CLS_SRAM_L", 0xe8b0, 0 },
31745 		{ "VF", 0, 8 },
31746 	{ "MPS_CLS_SRAM_L", 0xe8b8, 0 },
31761 		{ "VF", 0, 8 },
31762 	{ "MPS_CLS_SRAM_L", 0xe8c0, 0 },
31777 		{ "VF", 0, 8 },
31778 	{ "MPS_CLS_SRAM_L", 0xe8c8, 0 },
31793 		{ "VF", 0, 8 },
31794 	{ "MPS_CLS_SRAM_L", 0xe8d0, 0 },
31809 		{ "VF", 0, 8 },
31810 	{ "MPS_CLS_SRAM_L", 0xe8d8, 0 },
31825 		{ "VF", 0, 8 },
31826 	{ "MPS_CLS_SRAM_L", 0xe8e0, 0 },
31841 		{ "VF", 0, 8 },
31842 	{ "MPS_CLS_SRAM_L", 0xe8e8, 0 },
31857 		{ "VF", 0, 8 },
31858 	{ "MPS_CLS_SRAM_L", 0xe8f0, 0 },
31873 		{ "VF", 0, 8 },
31874 	{ "MPS_CLS_SRAM_L", 0xe8f8, 0 },
31889 		{ "VF", 0, 8 },
31890 	{ "MPS_CLS_SRAM_L", 0xe900, 0 },
31905 		{ "VF", 0, 8 },
31906 	{ "MPS_CLS_SRAM_L", 0xe908, 0 },
31921 		{ "VF", 0, 8 },
31922 	{ "MPS_CLS_SRAM_L", 0xe910, 0 },
31937 		{ "VF", 0, 8 },
31938 	{ "MPS_CLS_SRAM_L", 0xe918, 0 },
31953 		{ "VF", 0, 8 },
31954 	{ "MPS_CLS_SRAM_L", 0xe920, 0 },
31969 		{ "VF", 0, 8 },
31970 	{ "MPS_CLS_SRAM_L", 0xe928, 0 },
31985 		{ "VF", 0, 8 },
31986 	{ "MPS_CLS_SRAM_L", 0xe930, 0 },
32001 		{ "VF", 0, 8 },
32002 	{ "MPS_CLS_SRAM_L", 0xe938, 0 },
32017 		{ "VF", 0, 8 },
32018 	{ "MPS_CLS_SRAM_L", 0xe940, 0 },
32033 		{ "VF", 0, 8 },
32034 	{ "MPS_CLS_SRAM_L", 0xe948, 0 },
32049 		{ "VF", 0, 8 },
32050 	{ "MPS_CLS_SRAM_L", 0xe950, 0 },
32065 		{ "VF", 0, 8 },
32066 	{ "MPS_CLS_SRAM_L", 0xe958, 0 },
32081 		{ "VF", 0, 8 },
32082 	{ "MPS_CLS_SRAM_L", 0xe960, 0 },
32097 		{ "VF", 0, 8 },
32098 	{ "MPS_CLS_SRAM_L", 0xe968, 0 },
32113 		{ "VF", 0, 8 },
32114 	{ "MPS_CLS_SRAM_L", 0xe970, 0 },
32129 		{ "VF", 0, 8 },
32130 	{ "MPS_CLS_SRAM_L", 0xe978, 0 },
32145 		{ "VF", 0, 8 },
32146 	{ "MPS_CLS_SRAM_L", 0xe980, 0 },
32161 		{ "VF", 0, 8 },
32162 	{ "MPS_CLS_SRAM_L", 0xe988, 0 },
32177 		{ "VF", 0, 8 },
32178 	{ "MPS_CLS_SRAM_L", 0xe990, 0 },
32193 		{ "VF", 0, 8 },
32194 	{ "MPS_CLS_SRAM_L", 0xe998, 0 },
32209 		{ "VF", 0, 8 },
32210 	{ "MPS_CLS_SRAM_L", 0xe9a0, 0 },
32225 		{ "VF", 0, 8 },
32226 	{ "MPS_CLS_SRAM_L", 0xe9a8, 0 },
32241 		{ "VF", 0, 8 },
32242 	{ "MPS_CLS_SRAM_L", 0xe9b0, 0 },
32257 		{ "VF", 0, 8 },
32258 	{ "MPS_CLS_SRAM_L", 0xe9b8, 0 },
32273 		{ "VF", 0, 8 },
32274 	{ "MPS_CLS_SRAM_L", 0xe9c0, 0 },
32289 		{ "VF", 0, 8 },
32290 	{ "MPS_CLS_SRAM_L", 0xe9c8, 0 },
32305 		{ "VF", 0, 8 },
32306 	{ "MPS_CLS_SRAM_L", 0xe9d0, 0 },
32321 		{ "VF", 0, 8 },
32322 	{ "MPS_CLS_SRAM_L", 0xe9d8, 0 },
32337 		{ "VF", 0, 8 },
32338 	{ "MPS_CLS_SRAM_L", 0xe9e0, 0 },
32353 		{ "VF", 0, 8 },
32354 	{ "MPS_CLS_SRAM_L", 0xe9e8, 0 },
32369 		{ "VF", 0, 8 },
32370 	{ "MPS_CLS_SRAM_L", 0xe9f0, 0 },
32385 		{ "VF", 0, 8 },
32386 	{ "MPS_CLS_SRAM_L", 0xe9f8, 0 },
32401 		{ "VF", 0, 8 },
32402 	{ "MPS_CLS_SRAM_L", 0xea00, 0 },
32417 		{ "VF", 0, 8 },
32418 	{ "MPS_CLS_SRAM_L", 0xea08, 0 },
32433 		{ "VF", 0, 8 },
32434 	{ "MPS_CLS_SRAM_L", 0xea10, 0 },
32449 		{ "VF", 0, 8 },
32450 	{ "MPS_CLS_SRAM_L", 0xea18, 0 },
32465 		{ "VF", 0, 8 },
32466 	{ "MPS_CLS_SRAM_L", 0xea20, 0 },
32481 		{ "VF", 0, 8 },
32482 	{ "MPS_CLS_SRAM_L", 0xea28, 0 },
32497 		{ "VF", 0, 8 },
32498 	{ "MPS_CLS_SRAM_L", 0xea30, 0 },
32513 		{ "VF", 0, 8 },
32514 	{ "MPS_CLS_SRAM_L", 0xea38, 0 },
32529 		{ "VF", 0, 8 },
32530 	{ "MPS_CLS_SRAM_L", 0xea40, 0 },
32545 		{ "VF", 0, 8 },
32546 	{ "MPS_CLS_SRAM_L", 0xea48, 0 },
32561 		{ "VF", 0, 8 },
32562 	{ "MPS_CLS_SRAM_L", 0xea50, 0 },
32577 		{ "VF", 0, 8 },
32578 	{ "MPS_CLS_SRAM_L", 0xea58, 0 },
32593 		{ "VF", 0, 8 },
32594 	{ "MPS_CLS_SRAM_L", 0xea60, 0 },
32609 		{ "VF", 0, 8 },
32610 	{ "MPS_CLS_SRAM_L", 0xea68, 0 },
32625 		{ "VF", 0, 8 },
32626 	{ "MPS_CLS_SRAM_L", 0xea70, 0 },
32641 		{ "VF", 0, 8 },
32642 	{ "MPS_CLS_SRAM_L", 0xea78, 0 },
32657 		{ "VF", 0, 8 },
32658 	{ "MPS_CLS_SRAM_L", 0xea80, 0 },
32673 		{ "VF", 0, 8 },
32674 	{ "MPS_CLS_SRAM_L", 0xea88, 0 },
32689 		{ "VF", 0, 8 },
32690 	{ "MPS_CLS_SRAM_L", 0xea90, 0 },
32705 		{ "VF", 0, 8 },
32706 	{ "MPS_CLS_SRAM_L", 0xea98, 0 },
32721 		{ "VF", 0, 8 },
32722 	{ "MPS_CLS_SRAM_L", 0xeaa0, 0 },
32737 		{ "VF", 0, 8 },
32738 	{ "MPS_CLS_SRAM_L", 0xeaa8, 0 },
32753 		{ "VF", 0, 8 },
32754 	{ "MPS_CLS_SRAM_L", 0xeab0, 0 },
32769 		{ "VF", 0, 8 },
32770 	{ "MPS_CLS_SRAM_L", 0xeab8, 0 },
32785 		{ "VF", 0, 8 },
32786 	{ "MPS_CLS_SRAM_L", 0xeac0, 0 },
32801 		{ "VF", 0, 8 },
32802 	{ "MPS_CLS_SRAM_L", 0xeac8, 0 },
32817 		{ "VF", 0, 8 },
32818 	{ "MPS_CLS_SRAM_L", 0xead0, 0 },
32833 		{ "VF", 0, 8 },
32834 	{ "MPS_CLS_SRAM_L", 0xead8, 0 },
32849 		{ "VF", 0, 8 },
32850 	{ "MPS_CLS_SRAM_L", 0xeae0, 0 },
32865 		{ "VF", 0, 8 },
32866 	{ "MPS_CLS_SRAM_L", 0xeae8, 0 },
32881 		{ "VF", 0, 8 },
32882 	{ "MPS_CLS_SRAM_L", 0xeaf0, 0 },
32897 		{ "VF", 0, 8 },
32898 	{ "MPS_CLS_SRAM_L", 0xeaf8, 0 },
32913 		{ "VF", 0, 8 },
32914 	{ "MPS_CLS_SRAM_L", 0xeb00, 0 },
32929 		{ "VF", 0, 8 },
32930 	{ "MPS_CLS_SRAM_L", 0xeb08, 0 },
32945 		{ "VF", 0, 8 },
32946 	{ "MPS_CLS_SRAM_L", 0xeb10, 0 },
32961 		{ "VF", 0, 8 },
32962 	{ "MPS_CLS_SRAM_L", 0xeb18, 0 },
32977 		{ "VF", 0, 8 },
32978 	{ "MPS_CLS_SRAM_L", 0xeb20, 0 },
32993 		{ "VF", 0, 8 },
32994 	{ "MPS_CLS_SRAM_L", 0xeb28, 0 },
33009 		{ "VF", 0, 8 },
33010 	{ "MPS_CLS_SRAM_L", 0xeb30, 0 },
33025 		{ "VF", 0, 8 },
33026 	{ "MPS_CLS_SRAM_L", 0xeb38, 0 },
33041 		{ "VF", 0, 8 },
33042 	{ "MPS_CLS_SRAM_L", 0xeb40, 0 },
33057 		{ "VF", 0, 8 },
33058 	{ "MPS_CLS_SRAM_L", 0xeb48, 0 },
33073 		{ "VF", 0, 8 },
33074 	{ "MPS_CLS_SRAM_L", 0xeb50, 0 },
33089 		{ "VF", 0, 8 },
33090 	{ "MPS_CLS_SRAM_L", 0xeb58, 0 },
33105 		{ "VF", 0, 8 },
33106 	{ "MPS_CLS_SRAM_L", 0xeb60, 0 },
33121 		{ "VF", 0, 8 },
33122 	{ "MPS_CLS_SRAM_L", 0xeb68, 0 },
33137 		{ "VF", 0, 8 },
33138 	{ "MPS_CLS_SRAM_L", 0xeb70, 0 },
33153 		{ "VF", 0, 8 },
33154 	{ "MPS_CLS_SRAM_L", 0xeb78, 0 },
33169 		{ "VF", 0, 8 },
33170 	{ "MPS_CLS_SRAM_L", 0xeb80, 0 },
33185 		{ "VF", 0, 8 },
33186 	{ "MPS_CLS_SRAM_L", 0xeb88, 0 },
33201 		{ "VF", 0, 8 },
33202 	{ "MPS_CLS_SRAM_L", 0xeb90, 0 },
33217 		{ "VF", 0, 8 },
33218 	{ "MPS_CLS_SRAM_L", 0xeb98, 0 },
33233 		{ "VF", 0, 8 },
33234 	{ "MPS_CLS_SRAM_L", 0xeba0, 0 },
33249 		{ "VF", 0, 8 },
33250 	{ "MPS_CLS_SRAM_L", 0xeba8, 0 },
33265 		{ "VF", 0, 8 },
33266 	{ "MPS_CLS_SRAM_L", 0xebb0, 0 },
33281 		{ "VF", 0, 8 },
33282 	{ "MPS_CLS_SRAM_L", 0xebb8, 0 },
33297 		{ "VF", 0, 8 },
33298 	{ "MPS_CLS_SRAM_L", 0xebc0, 0 },
33313 		{ "VF", 0, 8 },
33314 	{ "MPS_CLS_SRAM_L", 0xebc8, 0 },
33329 		{ "VF", 0, 8 },
33330 	{ "MPS_CLS_SRAM_L", 0xebd0, 0 },
33345 		{ "VF", 0, 8 },
33346 	{ "MPS_CLS_SRAM_L", 0xebd8, 0 },
33361 		{ "VF", 0, 8 },
33362 	{ "MPS_CLS_SRAM_L", 0xebe0, 0 },
33377 		{ "VF", 0, 8 },
33378 	{ "MPS_CLS_SRAM_L", 0xebe8, 0 },
33393 		{ "VF", 0, 8 },
33394 	{ "MPS_CLS_SRAM_L", 0xebf0, 0 },
33409 		{ "VF", 0, 8 },
33410 	{ "MPS_CLS_SRAM_L", 0xebf8, 0 },
33425 		{ "VF", 0, 8 },
33426 	{ "MPS_CLS_SRAM_L", 0xec00, 0 },
33441 		{ "VF", 0, 8 },
33442 	{ "MPS_CLS_SRAM_L", 0xec08, 0 },
33457 		{ "VF", 0, 8 },
33458 	{ "MPS_CLS_SRAM_L", 0xec10, 0 },
33473 		{ "VF", 0, 8 },
33474 	{ "MPS_CLS_SRAM_L", 0xec18, 0 },
33489 		{ "VF", 0, 8 },
33490 	{ "MPS_CLS_SRAM_L", 0xec20, 0 },
33505 		{ "VF", 0, 8 },
33506 	{ "MPS_CLS_SRAM_L", 0xec28, 0 },
33521 		{ "VF", 0, 8 },
33522 	{ "MPS_CLS_SRAM_L", 0xec30, 0 },
33537 		{ "VF", 0, 8 },
33538 	{ "MPS_CLS_SRAM_L", 0xec38, 0 },
33553 		{ "VF", 0, 8 },
33554 	{ "MPS_CLS_SRAM_L", 0xec40, 0 },
33569 		{ "VF", 0, 8 },
33570 	{ "MPS_CLS_SRAM_L", 0xec48, 0 },
33585 		{ "VF", 0, 8 },
33586 	{ "MPS_CLS_SRAM_L", 0xec50, 0 },
33601 		{ "VF", 0, 8 },
33602 	{ "MPS_CLS_SRAM_L", 0xec58, 0 },
33617 		{ "VF", 0, 8 },
33618 	{ "MPS_CLS_SRAM_L", 0xec60, 0 },
33633 		{ "VF", 0, 8 },
33634 	{ "MPS_CLS_SRAM_L", 0xec68, 0 },
33649 		{ "VF", 0, 8 },
33650 	{ "MPS_CLS_SRAM_L", 0xec70, 0 },
33665 		{ "VF", 0, 8 },
33666 	{ "MPS_CLS_SRAM_L", 0xec78, 0 },
33681 		{ "VF", 0, 8 },
33682 	{ "MPS_CLS_SRAM_L", 0xec80, 0 },
33697 		{ "VF", 0, 8 },
33698 	{ "MPS_CLS_SRAM_L", 0xec88, 0 },
33713 		{ "VF", 0, 8 },
33714 	{ "MPS_CLS_SRAM_L", 0xec90, 0 },
33729 		{ "VF", 0, 8 },
33730 	{ "MPS_CLS_SRAM_L", 0xec98, 0 },
33745 		{ "VF", 0, 8 },
33746 	{ "MPS_CLS_SRAM_L", 0xeca0, 0 },
33761 		{ "VF", 0, 8 },
33762 	{ "MPS_CLS_SRAM_L", 0xeca8, 0 },
33777 		{ "VF", 0, 8 },
33778 	{ "MPS_CLS_SRAM_L", 0xecb0, 0 },
33793 		{ "VF", 0, 8 },
33794 	{ "MPS_CLS_SRAM_L", 0xecb8, 0 },
33809 		{ "VF", 0, 8 },
33810 	{ "MPS_CLS_SRAM_L", 0xecc0, 0 },
33825 		{ "VF", 0, 8 },
33826 	{ "MPS_CLS_SRAM_L", 0xecc8, 0 },
33841 		{ "VF", 0, 8 },
33842 	{ "MPS_CLS_SRAM_L", 0xecd0, 0 },
33857 		{ "VF", 0, 8 },
33858 	{ "MPS_CLS_SRAM_L", 0xecd8, 0 },
33873 		{ "VF", 0, 8 },
33874 	{ "MPS_CLS_SRAM_L", 0xece0, 0 },
33889 		{ "VF", 0, 8 },
33890 	{ "MPS_CLS_SRAM_L", 0xece8, 0 },
33905 		{ "VF", 0, 8 },
33906 	{ "MPS_CLS_SRAM_L", 0xecf0, 0 },
33921 		{ "VF", 0, 8 },
33922 	{ "MPS_CLS_SRAM_L", 0xecf8, 0 },
33937 		{ "VF", 0, 8 },
33938 	{ "MPS_CLS_SRAM_L", 0xed00, 0 },
33953 		{ "VF", 0, 8 },
33954 	{ "MPS_CLS_SRAM_L", 0xed08, 0 },
33969 		{ "VF", 0, 8 },
33970 	{ "MPS_CLS_SRAM_L", 0xed10, 0 },
33985 		{ "VF", 0, 8 },
33986 	{ "MPS_CLS_SRAM_L", 0xed18, 0 },
34001 		{ "VF", 0, 8 },
34002 	{ "MPS_CLS_SRAM_L", 0xed20, 0 },
34017 		{ "VF", 0, 8 },
34018 	{ "MPS_CLS_SRAM_L", 0xed28, 0 },
34033 		{ "VF", 0, 8 },
34034 	{ "MPS_CLS_SRAM_L", 0xed30, 0 },
34049 		{ "VF", 0, 8 },
34050 	{ "MPS_CLS_SRAM_L", 0xed38, 0 },
34065 		{ "VF", 0, 8 },
34066 	{ "MPS_CLS_SRAM_L", 0xed40, 0 },
34081 		{ "VF", 0, 8 },
34082 	{ "MPS_CLS_SRAM_L", 0xed48, 0 },
34097 		{ "VF", 0, 8 },
34098 	{ "MPS_CLS_SRAM_L", 0xed50, 0 },
34113 		{ "VF", 0, 8 },
34114 	{ "MPS_CLS_SRAM_L", 0xed58, 0 },
34129 		{ "VF", 0, 8 },
34130 	{ "MPS_CLS_SRAM_L", 0xed60, 0 },
34145 		{ "VF", 0, 8 },
34146 	{ "MPS_CLS_SRAM_L", 0xed68, 0 },
34161 		{ "VF", 0, 8 },
34162 	{ "MPS_CLS_SRAM_L", 0xed70, 0 },
34177 		{ "VF", 0, 8 },
34178 	{ "MPS_CLS_SRAM_L", 0xed78, 0 },
34193 		{ "VF", 0, 8 },
34194 	{ "MPS_CLS_SRAM_L", 0xed80, 0 },
34209 		{ "VF", 0, 8 },
34210 	{ "MPS_CLS_SRAM_L", 0xed88, 0 },
34225 		{ "VF", 0, 8 },
34226 	{ "MPS_CLS_SRAM_L", 0xed90, 0 },
34241 		{ "VF", 0, 8 },
34242 	{ "MPS_CLS_SRAM_L", 0xed98, 0 },
34257 		{ "VF", 0, 8 },
34258 	{ "MPS_CLS_SRAM_L", 0xeda0, 0 },
34273 		{ "VF", 0, 8 },
34274 	{ "MPS_CLS_SRAM_L", 0xeda8, 0 },
34289 		{ "VF", 0, 8 },
34290 	{ "MPS_CLS_SRAM_L", 0xedb0, 0 },
34305 		{ "VF", 0, 8 },
34306 	{ "MPS_CLS_SRAM_L", 0xedb8, 0 },
34321 		{ "VF", 0, 8 },
34322 	{ "MPS_CLS_SRAM_L", 0xedc0, 0 },
34337 		{ "VF", 0, 8 },
34338 	{ "MPS_CLS_SRAM_L", 0xedc8, 0 },
34353 		{ "VF", 0, 8 },
34354 	{ "MPS_CLS_SRAM_L", 0xedd0, 0 },
34369 		{ "VF", 0, 8 },
34370 	{ "MPS_CLS_SRAM_L", 0xedd8, 0 },
34385 		{ "VF", 0, 8 },
34386 	{ "MPS_CLS_SRAM_L", 0xede0, 0 },
34401 		{ "VF", 0, 8 },
34402 	{ "MPS_CLS_SRAM_L", 0xede8, 0 },
34417 		{ "VF", 0, 8 },
34418 	{ "MPS_CLS_SRAM_L", 0xedf0, 0 },
34433 		{ "VF", 0, 8 },
34434 	{ "MPS_CLS_SRAM_L", 0xedf8, 0 },
34449 		{ "VF", 0, 8 },
34450 	{ "MPS_CLS_SRAM_L", 0xee00, 0 },
34465 		{ "VF", 0, 8 },
34466 	{ "MPS_CLS_SRAM_L", 0xee08, 0 },
34481 		{ "VF", 0, 8 },
34482 	{ "MPS_CLS_SRAM_L", 0xee10, 0 },
34497 		{ "VF", 0, 8 },
34498 	{ "MPS_CLS_SRAM_L", 0xee18, 0 },
34513 		{ "VF", 0, 8 },
34514 	{ "MPS_CLS_SRAM_L", 0xee20, 0 },
34529 		{ "VF", 0, 8 },
34530 	{ "MPS_CLS_SRAM_L", 0xee28, 0 },
34545 		{ "VF", 0, 8 },
34546 	{ "MPS_CLS_SRAM_L", 0xee30, 0 },
34561 		{ "VF", 0, 8 },
34562 	{ "MPS_CLS_SRAM_L", 0xee38, 0 },
34577 		{ "VF", 0, 8 },
34578 	{ "MPS_CLS_SRAM_L", 0xee40, 0 },
34593 		{ "VF", 0, 8 },
34594 	{ "MPS_CLS_SRAM_L", 0xee48, 0 },
34609 		{ "VF", 0, 8 },
34610 	{ "MPS_CLS_SRAM_L", 0xee50, 0 },
34625 		{ "VF", 0, 8 },
34626 	{ "MPS_CLS_SRAM_L", 0xee58, 0 },
34641 		{ "VF", 0, 8 },
34642 	{ "MPS_CLS_SRAM_L", 0xee60, 0 },
34657 		{ "VF", 0, 8 },
34658 	{ "MPS_CLS_SRAM_L", 0xee68, 0 },
34673 		{ "VF", 0, 8 },
34674 	{ "MPS_CLS_SRAM_L", 0xee70, 0 },
34689 		{ "VF", 0, 8 },
34690 	{ "MPS_CLS_SRAM_L", 0xee78, 0 },
34705 		{ "VF", 0, 8 },
34706 	{ "MPS_CLS_SRAM_L", 0xee80, 0 },
34721 		{ "VF", 0, 8 },
34722 	{ "MPS_CLS_SRAM_L", 0xee88, 0 },
34737 		{ "VF", 0, 8 },
34738 	{ "MPS_CLS_SRAM_L", 0xee90, 0 },
34753 		{ "VF", 0, 8 },
34754 	{ "MPS_CLS_SRAM_L", 0xee98, 0 },
34769 		{ "VF", 0, 8 },
34770 	{ "MPS_CLS_SRAM_L", 0xeea0, 0 },
34785 		{ "VF", 0, 8 },
34786 	{ "MPS_CLS_SRAM_L", 0xeea8, 0 },
34801 		{ "VF", 0, 8 },
34802 	{ "MPS_CLS_SRAM_L", 0xeeb0, 0 },
34817 		{ "VF", 0, 8 },
34818 	{ "MPS_CLS_SRAM_L", 0xeeb8, 0 },
34833 		{ "VF", 0, 8 },
34834 	{ "MPS_CLS_SRAM_L", 0xeec0, 0 },
34849 		{ "VF", 0, 8 },
34850 	{ "MPS_CLS_SRAM_L", 0xeec8, 0 },
34865 		{ "VF", 0, 8 },
34866 	{ "MPS_CLS_SRAM_L", 0xeed0, 0 },
34881 		{ "VF", 0, 8 },
34882 	{ "MPS_CLS_SRAM_L", 0xeed8, 0 },
34897 		{ "VF", 0, 8 },
34898 	{ "MPS_CLS_SRAM_L", 0xeee0, 0 },
34913 		{ "VF", 0, 8 },
34914 	{ "MPS_CLS_SRAM_L", 0xeee8, 0 },
34929 		{ "VF", 0, 8 },
34930 	{ "MPS_CLS_SRAM_L", 0xeef0, 0 },
34945 		{ "VF", 0, 8 },
34946 	{ "MPS_CLS_SRAM_L", 0xeef8, 0 },
34961 		{ "VF", 0, 8 },
34962 	{ "MPS_CLS_SRAM_L", 0xef00, 0 },
34977 		{ "VF", 0, 8 },
34978 	{ "MPS_CLS_SRAM_L", 0xef08, 0 },
34993 		{ "VF", 0, 8 },
34994 	{ "MPS_CLS_SRAM_L", 0xef10, 0 },
35009 		{ "VF", 0, 8 },
35010 	{ "MPS_CLS_SRAM_L", 0xef18, 0 },
35025 		{ "VF", 0, 8 },
35026 	{ "MPS_CLS_SRAM_L", 0xef20, 0 },
35041 		{ "VF", 0, 8 },
35042 	{ "MPS_CLS_SRAM_L", 0xef28, 0 },
35057 		{ "VF", 0, 8 },
35058 	{ "MPS_CLS_SRAM_L", 0xef30, 0 },
35073 		{ "VF", 0, 8 },
35074 	{ "MPS_CLS_SRAM_L", 0xef38, 0 },
35089 		{ "VF", 0, 8 },
35090 	{ "MPS_CLS_SRAM_L", 0xef40, 0 },
35105 		{ "VF", 0, 8 },
35106 	{ "MPS_CLS_SRAM_L", 0xef48, 0 },
35121 		{ "VF", 0, 8 },
35122 	{ "MPS_CLS_SRAM_L", 0xef50, 0 },
35137 		{ "VF", 0, 8 },
35138 	{ "MPS_CLS_SRAM_L", 0xef58, 0 },
35153 		{ "VF", 0, 8 },
35154 	{ "MPS_CLS_SRAM_L", 0xef60, 0 },
35169 		{ "VF", 0, 8 },
35170 	{ "MPS_CLS_SRAM_L", 0xef68, 0 },
35185 		{ "VF", 0, 8 },
35186 	{ "MPS_CLS_SRAM_L", 0xef70, 0 },
35201 		{ "VF", 0, 8 },
35202 	{ "MPS_CLS_SRAM_L", 0xef78, 0 },
35217 		{ "VF", 0, 8 },
35218 	{ "MPS_CLS_SRAM_L", 0xef80, 0 },
35233 		{ "VF", 0, 8 },
35234 	{ "MPS_CLS_SRAM_L", 0xef88, 0 },
35249 		{ "VF", 0, 8 },
35250 	{ "MPS_CLS_SRAM_L", 0xef90, 0 },
35265 		{ "VF", 0, 8 },
35266 	{ "MPS_CLS_SRAM_L", 0xef98, 0 },
35281 		{ "VF", 0, 8 },
35282 	{ "MPS_CLS_SRAM_L", 0xefa0, 0 },
35297 		{ "VF", 0, 8 },
35298 	{ "MPS_CLS_SRAM_L", 0xefa8, 0 },
35313 		{ "VF", 0, 8 },
35314 	{ "MPS_CLS_SRAM_L", 0xefb0, 0 },
35329 		{ "VF", 0, 8 },
35330 	{ "MPS_CLS_SRAM_L", 0xefb8, 0 },
35345 		{ "VF", 0, 8 },
35346 	{ "MPS_CLS_SRAM_L", 0xefc0, 0 },
35361 		{ "VF", 0, 8 },
35362 	{ "MPS_CLS_SRAM_L", 0xefc8, 0 },
35377 		{ "VF", 0, 8 },
35378 	{ "MPS_CLS_SRAM_L", 0xefd0, 0 },
35393 		{ "VF", 0, 8 },
35394 	{ "MPS_CLS_SRAM_L", 0xefd8, 0 },
35409 		{ "VF", 0, 8 },
35410 	{ "MPS_CLS_SRAM_L", 0xefe0, 0 },
35425 		{ "VF", 0, 8 },
35426 	{ "MPS_CLS_SRAM_L", 0xefe8, 0 },
35441 		{ "VF", 0, 8 },
35442 	{ "MPS_CLS_SRAM_L", 0xeff0, 0 },
35457 		{ "VF", 0, 8 },
35458 	{ "MPS_CLS_SRAM_L", 0xeff8, 0 },
35473 		{ "VF", 0, 8 },
35474 	{ "MPS_CLS_SRAM_H", 0xe004, 0 },
35479 		{ "PortMap", 0, 4 },
35480 	{ "MPS_CLS_SRAM_H", 0xe00c, 0 },
35485 		{ "PortMap", 0, 4 },
35486 	{ "MPS_CLS_SRAM_H", 0xe014, 0 },
35491 		{ "PortMap", 0, 4 },
35492 	{ "MPS_CLS_SRAM_H", 0xe01c, 0 },
35497 		{ "PortMap", 0, 4 },
35498 	{ "MPS_CLS_SRAM_H", 0xe024, 0 },
35503 		{ "PortMap", 0, 4 },
35504 	{ "MPS_CLS_SRAM_H", 0xe02c, 0 },
35509 		{ "PortMap", 0, 4 },
35510 	{ "MPS_CLS_SRAM_H", 0xe034, 0 },
35515 		{ "PortMap", 0, 4 },
35516 	{ "MPS_CLS_SRAM_H", 0xe03c, 0 },
35521 		{ "PortMap", 0, 4 },
35522 	{ "MPS_CLS_SRAM_H", 0xe044, 0 },
35527 		{ "PortMap", 0, 4 },
35528 	{ "MPS_CLS_SRAM_H", 0xe04c, 0 },
35533 		{ "PortMap", 0, 4 },
35534 	{ "MPS_CLS_SRAM_H", 0xe054, 0 },
35539 		{ "PortMap", 0, 4 },
35540 	{ "MPS_CLS_SRAM_H", 0xe05c, 0 },
35545 		{ "PortMap", 0, 4 },
35546 	{ "MPS_CLS_SRAM_H", 0xe064, 0 },
35551 		{ "PortMap", 0, 4 },
35552 	{ "MPS_CLS_SRAM_H", 0xe06c, 0 },
35557 		{ "PortMap", 0, 4 },
35558 	{ "MPS_CLS_SRAM_H", 0xe074, 0 },
35563 		{ "PortMap", 0, 4 },
35564 	{ "MPS_CLS_SRAM_H", 0xe07c, 0 },
35569 		{ "PortMap", 0, 4 },
35570 	{ "MPS_CLS_SRAM_H", 0xe084, 0 },
35575 		{ "PortMap", 0, 4 },
35576 	{ "MPS_CLS_SRAM_H", 0xe08c, 0 },
35581 		{ "PortMap", 0, 4 },
35582 	{ "MPS_CLS_SRAM_H", 0xe094, 0 },
35587 		{ "PortMap", 0, 4 },
35588 	{ "MPS_CLS_SRAM_H", 0xe09c, 0 },
35593 		{ "PortMap", 0, 4 },
35594 	{ "MPS_CLS_SRAM_H", 0xe0a4, 0 },
35599 		{ "PortMap", 0, 4 },
35600 	{ "MPS_CLS_SRAM_H", 0xe0ac, 0 },
35605 		{ "PortMap", 0, 4 },
35606 	{ "MPS_CLS_SRAM_H", 0xe0b4, 0 },
35611 		{ "PortMap", 0, 4 },
35612 	{ "MPS_CLS_SRAM_H", 0xe0bc, 0 },
35617 		{ "PortMap", 0, 4 },
35618 	{ "MPS_CLS_SRAM_H", 0xe0c4, 0 },
35623 		{ "PortMap", 0, 4 },
35624 	{ "MPS_CLS_SRAM_H", 0xe0cc, 0 },
35629 		{ "PortMap", 0, 4 },
35630 	{ "MPS_CLS_SRAM_H", 0xe0d4, 0 },
35635 		{ "PortMap", 0, 4 },
35636 	{ "MPS_CLS_SRAM_H", 0xe0dc, 0 },
35641 		{ "PortMap", 0, 4 },
35642 	{ "MPS_CLS_SRAM_H", 0xe0e4, 0 },
35647 		{ "PortMap", 0, 4 },
35648 	{ "MPS_CLS_SRAM_H", 0xe0ec, 0 },
35653 		{ "PortMap", 0, 4 },
35654 	{ "MPS_CLS_SRAM_H", 0xe0f4, 0 },
35659 		{ "PortMap", 0, 4 },
35660 	{ "MPS_CLS_SRAM_H", 0xe0fc, 0 },
35665 		{ "PortMap", 0, 4 },
35666 	{ "MPS_CLS_SRAM_H", 0xe104, 0 },
35671 		{ "PortMap", 0, 4 },
35672 	{ "MPS_CLS_SRAM_H", 0xe10c, 0 },
35677 		{ "PortMap", 0, 4 },
35678 	{ "MPS_CLS_SRAM_H", 0xe114, 0 },
35683 		{ "PortMap", 0, 4 },
35684 	{ "MPS_CLS_SRAM_H", 0xe11c, 0 },
35689 		{ "PortMap", 0, 4 },
35690 	{ "MPS_CLS_SRAM_H", 0xe124, 0 },
35695 		{ "PortMap", 0, 4 },
35696 	{ "MPS_CLS_SRAM_H", 0xe12c, 0 },
35701 		{ "PortMap", 0, 4 },
35702 	{ "MPS_CLS_SRAM_H", 0xe134, 0 },
35707 		{ "PortMap", 0, 4 },
35708 	{ "MPS_CLS_SRAM_H", 0xe13c, 0 },
35713 		{ "PortMap", 0, 4 },
35714 	{ "MPS_CLS_SRAM_H", 0xe144, 0 },
35719 		{ "PortMap", 0, 4 },
35720 	{ "MPS_CLS_SRAM_H", 0xe14c, 0 },
35725 		{ "PortMap", 0, 4 },
35726 	{ "MPS_CLS_SRAM_H", 0xe154, 0 },
35731 		{ "PortMap", 0, 4 },
35732 	{ "MPS_CLS_SRAM_H", 0xe15c, 0 },
35737 		{ "PortMap", 0, 4 },
35738 	{ "MPS_CLS_SRAM_H", 0xe164, 0 },
35743 		{ "PortMap", 0, 4 },
35744 	{ "MPS_CLS_SRAM_H", 0xe16c, 0 },
35749 		{ "PortMap", 0, 4 },
35750 	{ "MPS_CLS_SRAM_H", 0xe174, 0 },
35755 		{ "PortMap", 0, 4 },
35756 	{ "MPS_CLS_SRAM_H", 0xe17c, 0 },
35761 		{ "PortMap", 0, 4 },
35762 	{ "MPS_CLS_SRAM_H", 0xe184, 0 },
35767 		{ "PortMap", 0, 4 },
35768 	{ "MPS_CLS_SRAM_H", 0xe18c, 0 },
35773 		{ "PortMap", 0, 4 },
35774 	{ "MPS_CLS_SRAM_H", 0xe194, 0 },
35779 		{ "PortMap", 0, 4 },
35780 	{ "MPS_CLS_SRAM_H", 0xe19c, 0 },
35785 		{ "PortMap", 0, 4 },
35786 	{ "MPS_CLS_SRAM_H", 0xe1a4, 0 },
35791 		{ "PortMap", 0, 4 },
35792 	{ "MPS_CLS_SRAM_H", 0xe1ac, 0 },
35797 		{ "PortMap", 0, 4 },
35798 	{ "MPS_CLS_SRAM_H", 0xe1b4, 0 },
35803 		{ "PortMap", 0, 4 },
35804 	{ "MPS_CLS_SRAM_H", 0xe1bc, 0 },
35809 		{ "PortMap", 0, 4 },
35810 	{ "MPS_CLS_SRAM_H", 0xe1c4, 0 },
35815 		{ "PortMap", 0, 4 },
35816 	{ "MPS_CLS_SRAM_H", 0xe1cc, 0 },
35821 		{ "PortMap", 0, 4 },
35822 	{ "MPS_CLS_SRAM_H", 0xe1d4, 0 },
35827 		{ "PortMap", 0, 4 },
35828 	{ "MPS_CLS_SRAM_H", 0xe1dc, 0 },
35833 		{ "PortMap", 0, 4 },
35834 	{ "MPS_CLS_SRAM_H", 0xe1e4, 0 },
35839 		{ "PortMap", 0, 4 },
35840 	{ "MPS_CLS_SRAM_H", 0xe1ec, 0 },
35845 		{ "PortMap", 0, 4 },
35846 	{ "MPS_CLS_SRAM_H", 0xe1f4, 0 },
35851 		{ "PortMap", 0, 4 },
35852 	{ "MPS_CLS_SRAM_H", 0xe1fc, 0 },
35857 		{ "PortMap", 0, 4 },
35858 	{ "MPS_CLS_SRAM_H", 0xe204, 0 },
35863 		{ "PortMap", 0, 4 },
35864 	{ "MPS_CLS_SRAM_H", 0xe20c, 0 },
35869 		{ "PortMap", 0, 4 },
35870 	{ "MPS_CLS_SRAM_H", 0xe214, 0 },
35875 		{ "PortMap", 0, 4 },
35876 	{ "MPS_CLS_SRAM_H", 0xe21c, 0 },
35881 		{ "PortMap", 0, 4 },
35882 	{ "MPS_CLS_SRAM_H", 0xe224, 0 },
35887 		{ "PortMap", 0, 4 },
35888 	{ "MPS_CLS_SRAM_H", 0xe22c, 0 },
35893 		{ "PortMap", 0, 4 },
35894 	{ "MPS_CLS_SRAM_H", 0xe234, 0 },
35899 		{ "PortMap", 0, 4 },
35900 	{ "MPS_CLS_SRAM_H", 0xe23c, 0 },
35905 		{ "PortMap", 0, 4 },
35906 	{ "MPS_CLS_SRAM_H", 0xe244, 0 },
35911 		{ "PortMap", 0, 4 },
35912 	{ "MPS_CLS_SRAM_H", 0xe24c, 0 },
35917 		{ "PortMap", 0, 4 },
35918 	{ "MPS_CLS_SRAM_H", 0xe254, 0 },
35923 		{ "PortMap", 0, 4 },
35924 	{ "MPS_CLS_SRAM_H", 0xe25c, 0 },
35929 		{ "PortMap", 0, 4 },
35930 	{ "MPS_CLS_SRAM_H", 0xe264, 0 },
35935 		{ "PortMap", 0, 4 },
35936 	{ "MPS_CLS_SRAM_H", 0xe26c, 0 },
35941 		{ "PortMap", 0, 4 },
35942 	{ "MPS_CLS_SRAM_H", 0xe274, 0 },
35947 		{ "PortMap", 0, 4 },
35948 	{ "MPS_CLS_SRAM_H", 0xe27c, 0 },
35953 		{ "PortMap", 0, 4 },
35954 	{ "MPS_CLS_SRAM_H", 0xe284, 0 },
35959 		{ "PortMap", 0, 4 },
35960 	{ "MPS_CLS_SRAM_H", 0xe28c, 0 },
35965 		{ "PortMap", 0, 4 },
35966 	{ "MPS_CLS_SRAM_H", 0xe294, 0 },
35971 		{ "PortMap", 0, 4 },
35972 	{ "MPS_CLS_SRAM_H", 0xe29c, 0 },
35977 		{ "PortMap", 0, 4 },
35978 	{ "MPS_CLS_SRAM_H", 0xe2a4, 0 },
35983 		{ "PortMap", 0, 4 },
35984 	{ "MPS_CLS_SRAM_H", 0xe2ac, 0 },
35989 		{ "PortMap", 0, 4 },
35990 	{ "MPS_CLS_SRAM_H", 0xe2b4, 0 },
35995 		{ "PortMap", 0, 4 },
35996 	{ "MPS_CLS_SRAM_H", 0xe2bc, 0 },
36001 		{ "PortMap", 0, 4 },
36002 	{ "MPS_CLS_SRAM_H", 0xe2c4, 0 },
36007 		{ "PortMap", 0, 4 },
36008 	{ "MPS_CLS_SRAM_H", 0xe2cc, 0 },
36013 		{ "PortMap", 0, 4 },
36014 	{ "MPS_CLS_SRAM_H", 0xe2d4, 0 },
36019 		{ "PortMap", 0, 4 },
36020 	{ "MPS_CLS_SRAM_H", 0xe2dc, 0 },
36025 		{ "PortMap", 0, 4 },
36026 	{ "MPS_CLS_SRAM_H", 0xe2e4, 0 },
36031 		{ "PortMap", 0, 4 },
36032 	{ "MPS_CLS_SRAM_H", 0xe2ec, 0 },
36037 		{ "PortMap", 0, 4 },
36038 	{ "MPS_CLS_SRAM_H", 0xe2f4, 0 },
36043 		{ "PortMap", 0, 4 },
36044 	{ "MPS_CLS_SRAM_H", 0xe2fc, 0 },
36049 		{ "PortMap", 0, 4 },
36050 	{ "MPS_CLS_SRAM_H", 0xe304, 0 },
36055 		{ "PortMap", 0, 4 },
36056 	{ "MPS_CLS_SRAM_H", 0xe30c, 0 },
36061 		{ "PortMap", 0, 4 },
36062 	{ "MPS_CLS_SRAM_H", 0xe314, 0 },
36067 		{ "PortMap", 0, 4 },
36068 	{ "MPS_CLS_SRAM_H", 0xe31c, 0 },
36073 		{ "PortMap", 0, 4 },
36074 	{ "MPS_CLS_SRAM_H", 0xe324, 0 },
36079 		{ "PortMap", 0, 4 },
36080 	{ "MPS_CLS_SRAM_H", 0xe32c, 0 },
36085 		{ "PortMap", 0, 4 },
36086 	{ "MPS_CLS_SRAM_H", 0xe334, 0 },
36091 		{ "PortMap", 0, 4 },
36092 	{ "MPS_CLS_SRAM_H", 0xe33c, 0 },
36097 		{ "PortMap", 0, 4 },
36098 	{ "MPS_CLS_SRAM_H", 0xe344, 0 },
36103 		{ "PortMap", 0, 4 },
36104 	{ "MPS_CLS_SRAM_H", 0xe34c, 0 },
36109 		{ "PortMap", 0, 4 },
36110 	{ "MPS_CLS_SRAM_H", 0xe354, 0 },
36115 		{ "PortMap", 0, 4 },
36116 	{ "MPS_CLS_SRAM_H", 0xe35c, 0 },
36121 		{ "PortMap", 0, 4 },
36122 	{ "MPS_CLS_SRAM_H", 0xe364, 0 },
36127 		{ "PortMap", 0, 4 },
36128 	{ "MPS_CLS_SRAM_H", 0xe36c, 0 },
36133 		{ "PortMap", 0, 4 },
36134 	{ "MPS_CLS_SRAM_H", 0xe374, 0 },
36139 		{ "PortMap", 0, 4 },
36140 	{ "MPS_CLS_SRAM_H", 0xe37c, 0 },
36145 		{ "PortMap", 0, 4 },
36146 	{ "MPS_CLS_SRAM_H", 0xe384, 0 },
36151 		{ "PortMap", 0, 4 },
36152 	{ "MPS_CLS_SRAM_H", 0xe38c, 0 },
36157 		{ "PortMap", 0, 4 },
36158 	{ "MPS_CLS_SRAM_H", 0xe394, 0 },
36163 		{ "PortMap", 0, 4 },
36164 	{ "MPS_CLS_SRAM_H", 0xe39c, 0 },
36169 		{ "PortMap", 0, 4 },
36170 	{ "MPS_CLS_SRAM_H", 0xe3a4, 0 },
36175 		{ "PortMap", 0, 4 },
36176 	{ "MPS_CLS_SRAM_H", 0xe3ac, 0 },
36181 		{ "PortMap", 0, 4 },
36182 	{ "MPS_CLS_SRAM_H", 0xe3b4, 0 },
36187 		{ "PortMap", 0, 4 },
36188 	{ "MPS_CLS_SRAM_H", 0xe3bc, 0 },
36193 		{ "PortMap", 0, 4 },
36194 	{ "MPS_CLS_SRAM_H", 0xe3c4, 0 },
36199 		{ "PortMap", 0, 4 },
36200 	{ "MPS_CLS_SRAM_H", 0xe3cc, 0 },
36205 		{ "PortMap", 0, 4 },
36206 	{ "MPS_CLS_SRAM_H", 0xe3d4, 0 },
36211 		{ "PortMap", 0, 4 },
36212 	{ "MPS_CLS_SRAM_H", 0xe3dc, 0 },
36217 		{ "PortMap", 0, 4 },
36218 	{ "MPS_CLS_SRAM_H", 0xe3e4, 0 },
36223 		{ "PortMap", 0, 4 },
36224 	{ "MPS_CLS_SRAM_H", 0xe3ec, 0 },
36229 		{ "PortMap", 0, 4 },
36230 	{ "MPS_CLS_SRAM_H", 0xe3f4, 0 },
36235 		{ "PortMap", 0, 4 },
36236 	{ "MPS_CLS_SRAM_H", 0xe3fc, 0 },
36241 		{ "PortMap", 0, 4 },
36242 	{ "MPS_CLS_SRAM_H", 0xe404, 0 },
36247 		{ "PortMap", 0, 4 },
36248 	{ "MPS_CLS_SRAM_H", 0xe40c, 0 },
36253 		{ "PortMap", 0, 4 },
36254 	{ "MPS_CLS_SRAM_H", 0xe414, 0 },
36259 		{ "PortMap", 0, 4 },
36260 	{ "MPS_CLS_SRAM_H", 0xe41c, 0 },
36265 		{ "PortMap", 0, 4 },
36266 	{ "MPS_CLS_SRAM_H", 0xe424, 0 },
36271 		{ "PortMap", 0, 4 },
36272 	{ "MPS_CLS_SRAM_H", 0xe42c, 0 },
36277 		{ "PortMap", 0, 4 },
36278 	{ "MPS_CLS_SRAM_H", 0xe434, 0 },
36283 		{ "PortMap", 0, 4 },
36284 	{ "MPS_CLS_SRAM_H", 0xe43c, 0 },
36289 		{ "PortMap", 0, 4 },
36290 	{ "MPS_CLS_SRAM_H", 0xe444, 0 },
36295 		{ "PortMap", 0, 4 },
36296 	{ "MPS_CLS_SRAM_H", 0xe44c, 0 },
36301 		{ "PortMap", 0, 4 },
36302 	{ "MPS_CLS_SRAM_H", 0xe454, 0 },
36307 		{ "PortMap", 0, 4 },
36308 	{ "MPS_CLS_SRAM_H", 0xe45c, 0 },
36313 		{ "PortMap", 0, 4 },
36314 	{ "MPS_CLS_SRAM_H", 0xe464, 0 },
36319 		{ "PortMap", 0, 4 },
36320 	{ "MPS_CLS_SRAM_H", 0xe46c, 0 },
36325 		{ "PortMap", 0, 4 },
36326 	{ "MPS_CLS_SRAM_H", 0xe474, 0 },
36331 		{ "PortMap", 0, 4 },
36332 	{ "MPS_CLS_SRAM_H", 0xe47c, 0 },
36337 		{ "PortMap", 0, 4 },
36338 	{ "MPS_CLS_SRAM_H", 0xe484, 0 },
36343 		{ "PortMap", 0, 4 },
36344 	{ "MPS_CLS_SRAM_H", 0xe48c, 0 },
36349 		{ "PortMap", 0, 4 },
36350 	{ "MPS_CLS_SRAM_H", 0xe494, 0 },
36355 		{ "PortMap", 0, 4 },
36356 	{ "MPS_CLS_SRAM_H", 0xe49c, 0 },
36361 		{ "PortMap", 0, 4 },
36362 	{ "MPS_CLS_SRAM_H", 0xe4a4, 0 },
36367 		{ "PortMap", 0, 4 },
36368 	{ "MPS_CLS_SRAM_H", 0xe4ac, 0 },
36373 		{ "PortMap", 0, 4 },
36374 	{ "MPS_CLS_SRAM_H", 0xe4b4, 0 },
36379 		{ "PortMap", 0, 4 },
36380 	{ "MPS_CLS_SRAM_H", 0xe4bc, 0 },
36385 		{ "PortMap", 0, 4 },
36386 	{ "MPS_CLS_SRAM_H", 0xe4c4, 0 },
36391 		{ "PortMap", 0, 4 },
36392 	{ "MPS_CLS_SRAM_H", 0xe4cc, 0 },
36397 		{ "PortMap", 0, 4 },
36398 	{ "MPS_CLS_SRAM_H", 0xe4d4, 0 },
36403 		{ "PortMap", 0, 4 },
36404 	{ "MPS_CLS_SRAM_H", 0xe4dc, 0 },
36409 		{ "PortMap", 0, 4 },
36410 	{ "MPS_CLS_SRAM_H", 0xe4e4, 0 },
36415 		{ "PortMap", 0, 4 },
36416 	{ "MPS_CLS_SRAM_H", 0xe4ec, 0 },
36421 		{ "PortMap", 0, 4 },
36422 	{ "MPS_CLS_SRAM_H", 0xe4f4, 0 },
36427 		{ "PortMap", 0, 4 },
36428 	{ "MPS_CLS_SRAM_H", 0xe4fc, 0 },
36433 		{ "PortMap", 0, 4 },
36434 	{ "MPS_CLS_SRAM_H", 0xe504, 0 },
36439 		{ "PortMap", 0, 4 },
36440 	{ "MPS_CLS_SRAM_H", 0xe50c, 0 },
36445 		{ "PortMap", 0, 4 },
36446 	{ "MPS_CLS_SRAM_H", 0xe514, 0 },
36451 		{ "PortMap", 0, 4 },
36452 	{ "MPS_CLS_SRAM_H", 0xe51c, 0 },
36457 		{ "PortMap", 0, 4 },
36458 	{ "MPS_CLS_SRAM_H", 0xe524, 0 },
36463 		{ "PortMap", 0, 4 },
36464 	{ "MPS_CLS_SRAM_H", 0xe52c, 0 },
36469 		{ "PortMap", 0, 4 },
36470 	{ "MPS_CLS_SRAM_H", 0xe534, 0 },
36475 		{ "PortMap", 0, 4 },
36476 	{ "MPS_CLS_SRAM_H", 0xe53c, 0 },
36481 		{ "PortMap", 0, 4 },
36482 	{ "MPS_CLS_SRAM_H", 0xe544, 0 },
36487 		{ "PortMap", 0, 4 },
36488 	{ "MPS_CLS_SRAM_H", 0xe54c, 0 },
36493 		{ "PortMap", 0, 4 },
36494 	{ "MPS_CLS_SRAM_H", 0xe554, 0 },
36499 		{ "PortMap", 0, 4 },
36500 	{ "MPS_CLS_SRAM_H", 0xe55c, 0 },
36505 		{ "PortMap", 0, 4 },
36506 	{ "MPS_CLS_SRAM_H", 0xe564, 0 },
36511 		{ "PortMap", 0, 4 },
36512 	{ "MPS_CLS_SRAM_H", 0xe56c, 0 },
36517 		{ "PortMap", 0, 4 },
36518 	{ "MPS_CLS_SRAM_H", 0xe574, 0 },
36523 		{ "PortMap", 0, 4 },
36524 	{ "MPS_CLS_SRAM_H", 0xe57c, 0 },
36529 		{ "PortMap", 0, 4 },
36530 	{ "MPS_CLS_SRAM_H", 0xe584, 0 },
36535 		{ "PortMap", 0, 4 },
36536 	{ "MPS_CLS_SRAM_H", 0xe58c, 0 },
36541 		{ "PortMap", 0, 4 },
36542 	{ "MPS_CLS_SRAM_H", 0xe594, 0 },
36547 		{ "PortMap", 0, 4 },
36548 	{ "MPS_CLS_SRAM_H", 0xe59c, 0 },
36553 		{ "PortMap", 0, 4 },
36554 	{ "MPS_CLS_SRAM_H", 0xe5a4, 0 },
36559 		{ "PortMap", 0, 4 },
36560 	{ "MPS_CLS_SRAM_H", 0xe5ac, 0 },
36565 		{ "PortMap", 0, 4 },
36566 	{ "MPS_CLS_SRAM_H", 0xe5b4, 0 },
36571 		{ "PortMap", 0, 4 },
36572 	{ "MPS_CLS_SRAM_H", 0xe5bc, 0 },
36577 		{ "PortMap", 0, 4 },
36578 	{ "MPS_CLS_SRAM_H", 0xe5c4, 0 },
36583 		{ "PortMap", 0, 4 },
36584 	{ "MPS_CLS_SRAM_H", 0xe5cc, 0 },
36589 		{ "PortMap", 0, 4 },
36590 	{ "MPS_CLS_SRAM_H", 0xe5d4, 0 },
36595 		{ "PortMap", 0, 4 },
36596 	{ "MPS_CLS_SRAM_H", 0xe5dc, 0 },
36601 		{ "PortMap", 0, 4 },
36602 	{ "MPS_CLS_SRAM_H", 0xe5e4, 0 },
36607 		{ "PortMap", 0, 4 },
36608 	{ "MPS_CLS_SRAM_H", 0xe5ec, 0 },
36613 		{ "PortMap", 0, 4 },
36614 	{ "MPS_CLS_SRAM_H", 0xe5f4, 0 },
36619 		{ "PortMap", 0, 4 },
36620 	{ "MPS_CLS_SRAM_H", 0xe5fc, 0 },
36625 		{ "PortMap", 0, 4 },
36626 	{ "MPS_CLS_SRAM_H", 0xe604, 0 },
36631 		{ "PortMap", 0, 4 },
36632 	{ "MPS_CLS_SRAM_H", 0xe60c, 0 },
36637 		{ "PortMap", 0, 4 },
36638 	{ "MPS_CLS_SRAM_H", 0xe614, 0 },
36643 		{ "PortMap", 0, 4 },
36644 	{ "MPS_CLS_SRAM_H", 0xe61c, 0 },
36649 		{ "PortMap", 0, 4 },
36650 	{ "MPS_CLS_SRAM_H", 0xe624, 0 },
36655 		{ "PortMap", 0, 4 },
36656 	{ "MPS_CLS_SRAM_H", 0xe62c, 0 },
36661 		{ "PortMap", 0, 4 },
36662 	{ "MPS_CLS_SRAM_H", 0xe634, 0 },
36667 		{ "PortMap", 0, 4 },
36668 	{ "MPS_CLS_SRAM_H", 0xe63c, 0 },
36673 		{ "PortMap", 0, 4 },
36674 	{ "MPS_CLS_SRAM_H", 0xe644, 0 },
36679 		{ "PortMap", 0, 4 },
36680 	{ "MPS_CLS_SRAM_H", 0xe64c, 0 },
36685 		{ "PortMap", 0, 4 },
36686 	{ "MPS_CLS_SRAM_H", 0xe654, 0 },
36691 		{ "PortMap", 0, 4 },
36692 	{ "MPS_CLS_SRAM_H", 0xe65c, 0 },
36697 		{ "PortMap", 0, 4 },
36698 	{ "MPS_CLS_SRAM_H", 0xe664, 0 },
36703 		{ "PortMap", 0, 4 },
36704 	{ "MPS_CLS_SRAM_H", 0xe66c, 0 },
36709 		{ "PortMap", 0, 4 },
36710 	{ "MPS_CLS_SRAM_H", 0xe674, 0 },
36715 		{ "PortMap", 0, 4 },
36716 	{ "MPS_CLS_SRAM_H", 0xe67c, 0 },
36721 		{ "PortMap", 0, 4 },
36722 	{ "MPS_CLS_SRAM_H", 0xe684, 0 },
36727 		{ "PortMap", 0, 4 },
36728 	{ "MPS_CLS_SRAM_H", 0xe68c, 0 },
36733 		{ "PortMap", 0, 4 },
36734 	{ "MPS_CLS_SRAM_H", 0xe694, 0 },
36739 		{ "PortMap", 0, 4 },
36740 	{ "MPS_CLS_SRAM_H", 0xe69c, 0 },
36745 		{ "PortMap", 0, 4 },
36746 	{ "MPS_CLS_SRAM_H", 0xe6a4, 0 },
36751 		{ "PortMap", 0, 4 },
36752 	{ "MPS_CLS_SRAM_H", 0xe6ac, 0 },
36757 		{ "PortMap", 0, 4 },
36758 	{ "MPS_CLS_SRAM_H", 0xe6b4, 0 },
36763 		{ "PortMap", 0, 4 },
36764 	{ "MPS_CLS_SRAM_H", 0xe6bc, 0 },
36769 		{ "PortMap", 0, 4 },
36770 	{ "MPS_CLS_SRAM_H", 0xe6c4, 0 },
36775 		{ "PortMap", 0, 4 },
36776 	{ "MPS_CLS_SRAM_H", 0xe6cc, 0 },
36781 		{ "PortMap", 0, 4 },
36782 	{ "MPS_CLS_SRAM_H", 0xe6d4, 0 },
36787 		{ "PortMap", 0, 4 },
36788 	{ "MPS_CLS_SRAM_H", 0xe6dc, 0 },
36793 		{ "PortMap", 0, 4 },
36794 	{ "MPS_CLS_SRAM_H", 0xe6e4, 0 },
36799 		{ "PortMap", 0, 4 },
36800 	{ "MPS_CLS_SRAM_H", 0xe6ec, 0 },
36805 		{ "PortMap", 0, 4 },
36806 	{ "MPS_CLS_SRAM_H", 0xe6f4, 0 },
36811 		{ "PortMap", 0, 4 },
36812 	{ "MPS_CLS_SRAM_H", 0xe6fc, 0 },
36817 		{ "PortMap", 0, 4 },
36818 	{ "MPS_CLS_SRAM_H", 0xe704, 0 },
36823 		{ "PortMap", 0, 4 },
36824 	{ "MPS_CLS_SRAM_H", 0xe70c, 0 },
36829 		{ "PortMap", 0, 4 },
36830 	{ "MPS_CLS_SRAM_H", 0xe714, 0 },
36835 		{ "PortMap", 0, 4 },
36836 	{ "MPS_CLS_SRAM_H", 0xe71c, 0 },
36841 		{ "PortMap", 0, 4 },
36842 	{ "MPS_CLS_SRAM_H", 0xe724, 0 },
36847 		{ "PortMap", 0, 4 },
36848 	{ "MPS_CLS_SRAM_H", 0xe72c, 0 },
36853 		{ "PortMap", 0, 4 },
36854 	{ "MPS_CLS_SRAM_H", 0xe734, 0 },
36859 		{ "PortMap", 0, 4 },
36860 	{ "MPS_CLS_SRAM_H", 0xe73c, 0 },
36865 		{ "PortMap", 0, 4 },
36866 	{ "MPS_CLS_SRAM_H", 0xe744, 0 },
36871 		{ "PortMap", 0, 4 },
36872 	{ "MPS_CLS_SRAM_H", 0xe74c, 0 },
36877 		{ "PortMap", 0, 4 },
36878 	{ "MPS_CLS_SRAM_H", 0xe754, 0 },
36883 		{ "PortMap", 0, 4 },
36884 	{ "MPS_CLS_SRAM_H", 0xe75c, 0 },
36889 		{ "PortMap", 0, 4 },
36890 	{ "MPS_CLS_SRAM_H", 0xe764, 0 },
36895 		{ "PortMap", 0, 4 },
36896 	{ "MPS_CLS_SRAM_H", 0xe76c, 0 },
36901 		{ "PortMap", 0, 4 },
36902 	{ "MPS_CLS_SRAM_H", 0xe774, 0 },
36907 		{ "PortMap", 0, 4 },
36908 	{ "MPS_CLS_SRAM_H", 0xe77c, 0 },
36913 		{ "PortMap", 0, 4 },
36914 	{ "MPS_CLS_SRAM_H", 0xe784, 0 },
36919 		{ "PortMap", 0, 4 },
36920 	{ "MPS_CLS_SRAM_H", 0xe78c, 0 },
36925 		{ "PortMap", 0, 4 },
36926 	{ "MPS_CLS_SRAM_H", 0xe794, 0 },
36931 		{ "PortMap", 0, 4 },
36932 	{ "MPS_CLS_SRAM_H", 0xe79c, 0 },
36937 		{ "PortMap", 0, 4 },
36938 	{ "MPS_CLS_SRAM_H", 0xe7a4, 0 },
36943 		{ "PortMap", 0, 4 },
36944 	{ "MPS_CLS_SRAM_H", 0xe7ac, 0 },
36949 		{ "PortMap", 0, 4 },
36950 	{ "MPS_CLS_SRAM_H", 0xe7b4, 0 },
36955 		{ "PortMap", 0, 4 },
36956 	{ "MPS_CLS_SRAM_H", 0xe7bc, 0 },
36961 		{ "PortMap", 0, 4 },
36962 	{ "MPS_CLS_SRAM_H", 0xe7c4, 0 },
36967 		{ "PortMap", 0, 4 },
36968 	{ "MPS_CLS_SRAM_H", 0xe7cc, 0 },
36973 		{ "PortMap", 0, 4 },
36974 	{ "MPS_CLS_SRAM_H", 0xe7d4, 0 },
36979 		{ "PortMap", 0, 4 },
36980 	{ "MPS_CLS_SRAM_H", 0xe7dc, 0 },
36985 		{ "PortMap", 0, 4 },
36986 	{ "MPS_CLS_SRAM_H", 0xe7e4, 0 },
36991 		{ "PortMap", 0, 4 },
36992 	{ "MPS_CLS_SRAM_H", 0xe7ec, 0 },
36997 		{ "PortMap", 0, 4 },
36998 	{ "MPS_CLS_SRAM_H", 0xe7f4, 0 },
37003 		{ "PortMap", 0, 4 },
37004 	{ "MPS_CLS_SRAM_H", 0xe7fc, 0 },
37009 		{ "PortMap", 0, 4 },
37010 	{ "MPS_CLS_SRAM_H", 0xe804, 0 },
37015 		{ "PortMap", 0, 4 },
37016 	{ "MPS_CLS_SRAM_H", 0xe80c, 0 },
37021 		{ "PortMap", 0, 4 },
37022 	{ "MPS_CLS_SRAM_H", 0xe814, 0 },
37027 		{ "PortMap", 0, 4 },
37028 	{ "MPS_CLS_SRAM_H", 0xe81c, 0 },
37033 		{ "PortMap", 0, 4 },
37034 	{ "MPS_CLS_SRAM_H", 0xe824, 0 },
37039 		{ "PortMap", 0, 4 },
37040 	{ "MPS_CLS_SRAM_H", 0xe82c, 0 },
37045 		{ "PortMap", 0, 4 },
37046 	{ "MPS_CLS_SRAM_H", 0xe834, 0 },
37051 		{ "PortMap", 0, 4 },
37052 	{ "MPS_CLS_SRAM_H", 0xe83c, 0 },
37057 		{ "PortMap", 0, 4 },
37058 	{ "MPS_CLS_SRAM_H", 0xe844, 0 },
37063 		{ "PortMap", 0, 4 },
37064 	{ "MPS_CLS_SRAM_H", 0xe84c, 0 },
37069 		{ "PortMap", 0, 4 },
37070 	{ "MPS_CLS_SRAM_H", 0xe854, 0 },
37075 		{ "PortMap", 0, 4 },
37076 	{ "MPS_CLS_SRAM_H", 0xe85c, 0 },
37081 		{ "PortMap", 0, 4 },
37082 	{ "MPS_CLS_SRAM_H", 0xe864, 0 },
37087 		{ "PortMap", 0, 4 },
37088 	{ "MPS_CLS_SRAM_H", 0xe86c, 0 },
37093 		{ "PortMap", 0, 4 },
37094 	{ "MPS_CLS_SRAM_H", 0xe874, 0 },
37099 		{ "PortMap", 0, 4 },
37100 	{ "MPS_CLS_SRAM_H", 0xe87c, 0 },
37105 		{ "PortMap", 0, 4 },
37106 	{ "MPS_CLS_SRAM_H", 0xe884, 0 },
37111 		{ "PortMap", 0, 4 },
37112 	{ "MPS_CLS_SRAM_H", 0xe88c, 0 },
37117 		{ "PortMap", 0, 4 },
37118 	{ "MPS_CLS_SRAM_H", 0xe894, 0 },
37123 		{ "PortMap", 0, 4 },
37124 	{ "MPS_CLS_SRAM_H", 0xe89c, 0 },
37129 		{ "PortMap", 0, 4 },
37130 	{ "MPS_CLS_SRAM_H", 0xe8a4, 0 },
37135 		{ "PortMap", 0, 4 },
37136 	{ "MPS_CLS_SRAM_H", 0xe8ac, 0 },
37141 		{ "PortMap", 0, 4 },
37142 	{ "MPS_CLS_SRAM_H", 0xe8b4, 0 },
37147 		{ "PortMap", 0, 4 },
37148 	{ "MPS_CLS_SRAM_H", 0xe8bc, 0 },
37153 		{ "PortMap", 0, 4 },
37154 	{ "MPS_CLS_SRAM_H", 0xe8c4, 0 },
37159 		{ "PortMap", 0, 4 },
37160 	{ "MPS_CLS_SRAM_H", 0xe8cc, 0 },
37165 		{ "PortMap", 0, 4 },
37166 	{ "MPS_CLS_SRAM_H", 0xe8d4, 0 },
37171 		{ "PortMap", 0, 4 },
37172 	{ "MPS_CLS_SRAM_H", 0xe8dc, 0 },
37177 		{ "PortMap", 0, 4 },
37178 	{ "MPS_CLS_SRAM_H", 0xe8e4, 0 },
37183 		{ "PortMap", 0, 4 },
37184 	{ "MPS_CLS_SRAM_H", 0xe8ec, 0 },
37189 		{ "PortMap", 0, 4 },
37190 	{ "MPS_CLS_SRAM_H", 0xe8f4, 0 },
37195 		{ "PortMap", 0, 4 },
37196 	{ "MPS_CLS_SRAM_H", 0xe8fc, 0 },
37201 		{ "PortMap", 0, 4 },
37202 	{ "MPS_CLS_SRAM_H", 0xe904, 0 },
37207 		{ "PortMap", 0, 4 },
37208 	{ "MPS_CLS_SRAM_H", 0xe90c, 0 },
37213 		{ "PortMap", 0, 4 },
37214 	{ "MPS_CLS_SRAM_H", 0xe914, 0 },
37219 		{ "PortMap", 0, 4 },
37220 	{ "MPS_CLS_SRAM_H", 0xe91c, 0 },
37225 		{ "PortMap", 0, 4 },
37226 	{ "MPS_CLS_SRAM_H", 0xe924, 0 },
37231 		{ "PortMap", 0, 4 },
37232 	{ "MPS_CLS_SRAM_H", 0xe92c, 0 },
37237 		{ "PortMap", 0, 4 },
37238 	{ "MPS_CLS_SRAM_H", 0xe934, 0 },
37243 		{ "PortMap", 0, 4 },
37244 	{ "MPS_CLS_SRAM_H", 0xe93c, 0 },
37249 		{ "PortMap", 0, 4 },
37250 	{ "MPS_CLS_SRAM_H", 0xe944, 0 },
37255 		{ "PortMap", 0, 4 },
37256 	{ "MPS_CLS_SRAM_H", 0xe94c, 0 },
37261 		{ "PortMap", 0, 4 },
37262 	{ "MPS_CLS_SRAM_H", 0xe954, 0 },
37267 		{ "PortMap", 0, 4 },
37268 	{ "MPS_CLS_SRAM_H", 0xe95c, 0 },
37273 		{ "PortMap", 0, 4 },
37274 	{ "MPS_CLS_SRAM_H", 0xe964, 0 },
37279 		{ "PortMap", 0, 4 },
37280 	{ "MPS_CLS_SRAM_H", 0xe96c, 0 },
37285 		{ "PortMap", 0, 4 },
37286 	{ "MPS_CLS_SRAM_H", 0xe974, 0 },
37291 		{ "PortMap", 0, 4 },
37292 	{ "MPS_CLS_SRAM_H", 0xe97c, 0 },
37297 		{ "PortMap", 0, 4 },
37298 	{ "MPS_CLS_SRAM_H", 0xe984, 0 },
37303 		{ "PortMap", 0, 4 },
37304 	{ "MPS_CLS_SRAM_H", 0xe98c, 0 },
37309 		{ "PortMap", 0, 4 },
37310 	{ "MPS_CLS_SRAM_H", 0xe994, 0 },
37315 		{ "PortMap", 0, 4 },
37316 	{ "MPS_CLS_SRAM_H", 0xe99c, 0 },
37321 		{ "PortMap", 0, 4 },
37322 	{ "MPS_CLS_SRAM_H", 0xe9a4, 0 },
37327 		{ "PortMap", 0, 4 },
37328 	{ "MPS_CLS_SRAM_H", 0xe9ac, 0 },
37333 		{ "PortMap", 0, 4 },
37334 	{ "MPS_CLS_SRAM_H", 0xe9b4, 0 },
37339 		{ "PortMap", 0, 4 },
37340 	{ "MPS_CLS_SRAM_H", 0xe9bc, 0 },
37345 		{ "PortMap", 0, 4 },
37346 	{ "MPS_CLS_SRAM_H", 0xe9c4, 0 },
37351 		{ "PortMap", 0, 4 },
37352 	{ "MPS_CLS_SRAM_H", 0xe9cc, 0 },
37357 		{ "PortMap", 0, 4 },
37358 	{ "MPS_CLS_SRAM_H", 0xe9d4, 0 },
37363 		{ "PortMap", 0, 4 },
37364 	{ "MPS_CLS_SRAM_H", 0xe9dc, 0 },
37369 		{ "PortMap", 0, 4 },
37370 	{ "MPS_CLS_SRAM_H", 0xe9e4, 0 },
37375 		{ "PortMap", 0, 4 },
37376 	{ "MPS_CLS_SRAM_H", 0xe9ec, 0 },
37381 		{ "PortMap", 0, 4 },
37382 	{ "MPS_CLS_SRAM_H", 0xe9f4, 0 },
37387 		{ "PortMap", 0, 4 },
37388 	{ "MPS_CLS_SRAM_H", 0xe9fc, 0 },
37393 		{ "PortMap", 0, 4 },
37394 	{ "MPS_CLS_SRAM_H", 0xea04, 0 },
37399 		{ "PortMap", 0, 4 },
37400 	{ "MPS_CLS_SRAM_H", 0xea0c, 0 },
37405 		{ "PortMap", 0, 4 },
37406 	{ "MPS_CLS_SRAM_H", 0xea14, 0 },
37411 		{ "PortMap", 0, 4 },
37412 	{ "MPS_CLS_SRAM_H", 0xea1c, 0 },
37417 		{ "PortMap", 0, 4 },
37418 	{ "MPS_CLS_SRAM_H", 0xea24, 0 },
37423 		{ "PortMap", 0, 4 },
37424 	{ "MPS_CLS_SRAM_H", 0xea2c, 0 },
37429 		{ "PortMap", 0, 4 },
37430 	{ "MPS_CLS_SRAM_H", 0xea34, 0 },
37435 		{ "PortMap", 0, 4 },
37436 	{ "MPS_CLS_SRAM_H", 0xea3c, 0 },
37441 		{ "PortMap", 0, 4 },
37442 	{ "MPS_CLS_SRAM_H", 0xea44, 0 },
37447 		{ "PortMap", 0, 4 },
37448 	{ "MPS_CLS_SRAM_H", 0xea4c, 0 },
37453 		{ "PortMap", 0, 4 },
37454 	{ "MPS_CLS_SRAM_H", 0xea54, 0 },
37459 		{ "PortMap", 0, 4 },
37460 	{ "MPS_CLS_SRAM_H", 0xea5c, 0 },
37465 		{ "PortMap", 0, 4 },
37466 	{ "MPS_CLS_SRAM_H", 0xea64, 0 },
37471 		{ "PortMap", 0, 4 },
37472 	{ "MPS_CLS_SRAM_H", 0xea6c, 0 },
37477 		{ "PortMap", 0, 4 },
37478 	{ "MPS_CLS_SRAM_H", 0xea74, 0 },
37483 		{ "PortMap", 0, 4 },
37484 	{ "MPS_CLS_SRAM_H", 0xea7c, 0 },
37489 		{ "PortMap", 0, 4 },
37490 	{ "MPS_CLS_SRAM_H", 0xea84, 0 },
37495 		{ "PortMap", 0, 4 },
37496 	{ "MPS_CLS_SRAM_H", 0xea8c, 0 },
37501 		{ "PortMap", 0, 4 },
37502 	{ "MPS_CLS_SRAM_H", 0xea94, 0 },
37507 		{ "PortMap", 0, 4 },
37508 	{ "MPS_CLS_SRAM_H", 0xea9c, 0 },
37513 		{ "PortMap", 0, 4 },
37514 	{ "MPS_CLS_SRAM_H", 0xeaa4, 0 },
37519 		{ "PortMap", 0, 4 },
37520 	{ "MPS_CLS_SRAM_H", 0xeaac, 0 },
37525 		{ "PortMap", 0, 4 },
37526 	{ "MPS_CLS_SRAM_H", 0xeab4, 0 },
37531 		{ "PortMap", 0, 4 },
37532 	{ "MPS_CLS_SRAM_H", 0xeabc, 0 },
37537 		{ "PortMap", 0, 4 },
37538 	{ "MPS_CLS_SRAM_H", 0xeac4, 0 },
37543 		{ "PortMap", 0, 4 },
37544 	{ "MPS_CLS_SRAM_H", 0xeacc, 0 },
37549 		{ "PortMap", 0, 4 },
37550 	{ "MPS_CLS_SRAM_H", 0xead4, 0 },
37555 		{ "PortMap", 0, 4 },
37556 	{ "MPS_CLS_SRAM_H", 0xeadc, 0 },
37561 		{ "PortMap", 0, 4 },
37562 	{ "MPS_CLS_SRAM_H", 0xeae4, 0 },
37567 		{ "PortMap", 0, 4 },
37568 	{ "MPS_CLS_SRAM_H", 0xeaec, 0 },
37573 		{ "PortMap", 0, 4 },
37574 	{ "MPS_CLS_SRAM_H", 0xeaf4, 0 },
37579 		{ "PortMap", 0, 4 },
37580 	{ "MPS_CLS_SRAM_H", 0xeafc, 0 },
37585 		{ "PortMap", 0, 4 },
37586 	{ "MPS_CLS_SRAM_H", 0xeb04, 0 },
37591 		{ "PortMap", 0, 4 },
37592 	{ "MPS_CLS_SRAM_H", 0xeb0c, 0 },
37597 		{ "PortMap", 0, 4 },
37598 	{ "MPS_CLS_SRAM_H", 0xeb14, 0 },
37603 		{ "PortMap", 0, 4 },
37604 	{ "MPS_CLS_SRAM_H", 0xeb1c, 0 },
37609 		{ "PortMap", 0, 4 },
37610 	{ "MPS_CLS_SRAM_H", 0xeb24, 0 },
37615 		{ "PortMap", 0, 4 },
37616 	{ "MPS_CLS_SRAM_H", 0xeb2c, 0 },
37621 		{ "PortMap", 0, 4 },
37622 	{ "MPS_CLS_SRAM_H", 0xeb34, 0 },
37627 		{ "PortMap", 0, 4 },
37628 	{ "MPS_CLS_SRAM_H", 0xeb3c, 0 },
37633 		{ "PortMap", 0, 4 },
37634 	{ "MPS_CLS_SRAM_H", 0xeb44, 0 },
37639 		{ "PortMap", 0, 4 },
37640 	{ "MPS_CLS_SRAM_H", 0xeb4c, 0 },
37645 		{ "PortMap", 0, 4 },
37646 	{ "MPS_CLS_SRAM_H", 0xeb54, 0 },
37651 		{ "PortMap", 0, 4 },
37652 	{ "MPS_CLS_SRAM_H", 0xeb5c, 0 },
37657 		{ "PortMap", 0, 4 },
37658 	{ "MPS_CLS_SRAM_H", 0xeb64, 0 },
37663 		{ "PortMap", 0, 4 },
37664 	{ "MPS_CLS_SRAM_H", 0xeb6c, 0 },
37669 		{ "PortMap", 0, 4 },
37670 	{ "MPS_CLS_SRAM_H", 0xeb74, 0 },
37675 		{ "PortMap", 0, 4 },
37676 	{ "MPS_CLS_SRAM_H", 0xeb7c, 0 },
37681 		{ "PortMap", 0, 4 },
37682 	{ "MPS_CLS_SRAM_H", 0xeb84, 0 },
37687 		{ "PortMap", 0, 4 },
37688 	{ "MPS_CLS_SRAM_H", 0xeb8c, 0 },
37693 		{ "PortMap", 0, 4 },
37694 	{ "MPS_CLS_SRAM_H", 0xeb94, 0 },
37699 		{ "PortMap", 0, 4 },
37700 	{ "MPS_CLS_SRAM_H", 0xeb9c, 0 },
37705 		{ "PortMap", 0, 4 },
37706 	{ "MPS_CLS_SRAM_H", 0xeba4, 0 },
37711 		{ "PortMap", 0, 4 },
37712 	{ "MPS_CLS_SRAM_H", 0xebac, 0 },
37717 		{ "PortMap", 0, 4 },
37718 	{ "MPS_CLS_SRAM_H", 0xebb4, 0 },
37723 		{ "PortMap", 0, 4 },
37724 	{ "MPS_CLS_SRAM_H", 0xebbc, 0 },
37729 		{ "PortMap", 0, 4 },
37730 	{ "MPS_CLS_SRAM_H", 0xebc4, 0 },
37735 		{ "PortMap", 0, 4 },
37736 	{ "MPS_CLS_SRAM_H", 0xebcc, 0 },
37741 		{ "PortMap", 0, 4 },
37742 	{ "MPS_CLS_SRAM_H", 0xebd4, 0 },
37747 		{ "PortMap", 0, 4 },
37748 	{ "MPS_CLS_SRAM_H", 0xebdc, 0 },
37753 		{ "PortMap", 0, 4 },
37754 	{ "MPS_CLS_SRAM_H", 0xebe4, 0 },
37759 		{ "PortMap", 0, 4 },
37760 	{ "MPS_CLS_SRAM_H", 0xebec, 0 },
37765 		{ "PortMap", 0, 4 },
37766 	{ "MPS_CLS_SRAM_H", 0xebf4, 0 },
37771 		{ "PortMap", 0, 4 },
37772 	{ "MPS_CLS_SRAM_H", 0xebfc, 0 },
37777 		{ "PortMap", 0, 4 },
37778 	{ "MPS_CLS_SRAM_H", 0xec04, 0 },
37783 		{ "PortMap", 0, 4 },
37784 	{ "MPS_CLS_SRAM_H", 0xec0c, 0 },
37789 		{ "PortMap", 0, 4 },
37790 	{ "MPS_CLS_SRAM_H", 0xec14, 0 },
37795 		{ "PortMap", 0, 4 },
37796 	{ "MPS_CLS_SRAM_H", 0xec1c, 0 },
37801 		{ "PortMap", 0, 4 },
37802 	{ "MPS_CLS_SRAM_H", 0xec24, 0 },
37807 		{ "PortMap", 0, 4 },
37808 	{ "MPS_CLS_SRAM_H", 0xec2c, 0 },
37813 		{ "PortMap", 0, 4 },
37814 	{ "MPS_CLS_SRAM_H", 0xec34, 0 },
37819 		{ "PortMap", 0, 4 },
37820 	{ "MPS_CLS_SRAM_H", 0xec3c, 0 },
37825 		{ "PortMap", 0, 4 },
37826 	{ "MPS_CLS_SRAM_H", 0xec44, 0 },
37831 		{ "PortMap", 0, 4 },
37832 	{ "MPS_CLS_SRAM_H", 0xec4c, 0 },
37837 		{ "PortMap", 0, 4 },
37838 	{ "MPS_CLS_SRAM_H", 0xec54, 0 },
37843 		{ "PortMap", 0, 4 },
37844 	{ "MPS_CLS_SRAM_H", 0xec5c, 0 },
37849 		{ "PortMap", 0, 4 },
37850 	{ "MPS_CLS_SRAM_H", 0xec64, 0 },
37855 		{ "PortMap", 0, 4 },
37856 	{ "MPS_CLS_SRAM_H", 0xec6c, 0 },
37861 		{ "PortMap", 0, 4 },
37862 	{ "MPS_CLS_SRAM_H", 0xec74, 0 },
37867 		{ "PortMap", 0, 4 },
37868 	{ "MPS_CLS_SRAM_H", 0xec7c, 0 },
37873 		{ "PortMap", 0, 4 },
37874 	{ "MPS_CLS_SRAM_H", 0xec84, 0 },
37879 		{ "PortMap", 0, 4 },
37880 	{ "MPS_CLS_SRAM_H", 0xec8c, 0 },
37885 		{ "PortMap", 0, 4 },
37886 	{ "MPS_CLS_SRAM_H", 0xec94, 0 },
37891 		{ "PortMap", 0, 4 },
37892 	{ "MPS_CLS_SRAM_H", 0xec9c, 0 },
37897 		{ "PortMap", 0, 4 },
37898 	{ "MPS_CLS_SRAM_H", 0xeca4, 0 },
37903 		{ "PortMap", 0, 4 },
37904 	{ "MPS_CLS_SRAM_H", 0xecac, 0 },
37909 		{ "PortMap", 0, 4 },
37910 	{ "MPS_CLS_SRAM_H", 0xecb4, 0 },
37915 		{ "PortMap", 0, 4 },
37916 	{ "MPS_CLS_SRAM_H", 0xecbc, 0 },
37921 		{ "PortMap", 0, 4 },
37922 	{ "MPS_CLS_SRAM_H", 0xecc4, 0 },
37927 		{ "PortMap", 0, 4 },
37928 	{ "MPS_CLS_SRAM_H", 0xeccc, 0 },
37933 		{ "PortMap", 0, 4 },
37934 	{ "MPS_CLS_SRAM_H", 0xecd4, 0 },
37939 		{ "PortMap", 0, 4 },
37940 	{ "MPS_CLS_SRAM_H", 0xecdc, 0 },
37945 		{ "PortMap", 0, 4 },
37946 	{ "MPS_CLS_SRAM_H", 0xece4, 0 },
37951 		{ "PortMap", 0, 4 },
37952 	{ "MPS_CLS_SRAM_H", 0xecec, 0 },
37957 		{ "PortMap", 0, 4 },
37958 	{ "MPS_CLS_SRAM_H", 0xecf4, 0 },
37963 		{ "PortMap", 0, 4 },
37964 	{ "MPS_CLS_SRAM_H", 0xecfc, 0 },
37969 		{ "PortMap", 0, 4 },
37970 	{ "MPS_CLS_SRAM_H", 0xed04, 0 },
37975 		{ "PortMap", 0, 4 },
37976 	{ "MPS_CLS_SRAM_H", 0xed0c, 0 },
37981 		{ "PortMap", 0, 4 },
37982 	{ "MPS_CLS_SRAM_H", 0xed14, 0 },
37987 		{ "PortMap", 0, 4 },
37988 	{ "MPS_CLS_SRAM_H", 0xed1c, 0 },
37993 		{ "PortMap", 0, 4 },
37994 	{ "MPS_CLS_SRAM_H", 0xed24, 0 },
37999 		{ "PortMap", 0, 4 },
38000 	{ "MPS_CLS_SRAM_H", 0xed2c, 0 },
38005 		{ "PortMap", 0, 4 },
38006 	{ "MPS_CLS_SRAM_H", 0xed34, 0 },
38011 		{ "PortMap", 0, 4 },
38012 	{ "MPS_CLS_SRAM_H", 0xed3c, 0 },
38017 		{ "PortMap", 0, 4 },
38018 	{ "MPS_CLS_SRAM_H", 0xed44, 0 },
38023 		{ "PortMap", 0, 4 },
38024 	{ "MPS_CLS_SRAM_H", 0xed4c, 0 },
38029 		{ "PortMap", 0, 4 },
38030 	{ "MPS_CLS_SRAM_H", 0xed54, 0 },
38035 		{ "PortMap", 0, 4 },
38036 	{ "MPS_CLS_SRAM_H", 0xed5c, 0 },
38041 		{ "PortMap", 0, 4 },
38042 	{ "MPS_CLS_SRAM_H", 0xed64, 0 },
38047 		{ "PortMap", 0, 4 },
38048 	{ "MPS_CLS_SRAM_H", 0xed6c, 0 },
38053 		{ "PortMap", 0, 4 },
38054 	{ "MPS_CLS_SRAM_H", 0xed74, 0 },
38059 		{ "PortMap", 0, 4 },
38060 	{ "MPS_CLS_SRAM_H", 0xed7c, 0 },
38065 		{ "PortMap", 0, 4 },
38066 	{ "MPS_CLS_SRAM_H", 0xed84, 0 },
38071 		{ "PortMap", 0, 4 },
38072 	{ "MPS_CLS_SRAM_H", 0xed8c, 0 },
38077 		{ "PortMap", 0, 4 },
38078 	{ "MPS_CLS_SRAM_H", 0xed94, 0 },
38083 		{ "PortMap", 0, 4 },
38084 	{ "MPS_CLS_SRAM_H", 0xed9c, 0 },
38089 		{ "PortMap", 0, 4 },
38090 	{ "MPS_CLS_SRAM_H", 0xeda4, 0 },
38095 		{ "PortMap", 0, 4 },
38096 	{ "MPS_CLS_SRAM_H", 0xedac, 0 },
38101 		{ "PortMap", 0, 4 },
38102 	{ "MPS_CLS_SRAM_H", 0xedb4, 0 },
38107 		{ "PortMap", 0, 4 },
38108 	{ "MPS_CLS_SRAM_H", 0xedbc, 0 },
38113 		{ "PortMap", 0, 4 },
38114 	{ "MPS_CLS_SRAM_H", 0xedc4, 0 },
38119 		{ "PortMap", 0, 4 },
38120 	{ "MPS_CLS_SRAM_H", 0xedcc, 0 },
38125 		{ "PortMap", 0, 4 },
38126 	{ "MPS_CLS_SRAM_H", 0xedd4, 0 },
38131 		{ "PortMap", 0, 4 },
38132 	{ "MPS_CLS_SRAM_H", 0xeddc, 0 },
38137 		{ "PortMap", 0, 4 },
38138 	{ "MPS_CLS_SRAM_H", 0xede4, 0 },
38143 		{ "PortMap", 0, 4 },
38144 	{ "MPS_CLS_SRAM_H", 0xedec, 0 },
38149 		{ "PortMap", 0, 4 },
38150 	{ "MPS_CLS_SRAM_H", 0xedf4, 0 },
38155 		{ "PortMap", 0, 4 },
38156 	{ "MPS_CLS_SRAM_H", 0xedfc, 0 },
38161 		{ "PortMap", 0, 4 },
38162 	{ "MPS_CLS_SRAM_H", 0xee04, 0 },
38167 		{ "PortMap", 0, 4 },
38168 	{ "MPS_CLS_SRAM_H", 0xee0c, 0 },
38173 		{ "PortMap", 0, 4 },
38174 	{ "MPS_CLS_SRAM_H", 0xee14, 0 },
38179 		{ "PortMap", 0, 4 },
38180 	{ "MPS_CLS_SRAM_H", 0xee1c, 0 },
38185 		{ "PortMap", 0, 4 },
38186 	{ "MPS_CLS_SRAM_H", 0xee24, 0 },
38191 		{ "PortMap", 0, 4 },
38192 	{ "MPS_CLS_SRAM_H", 0xee2c, 0 },
38197 		{ "PortMap", 0, 4 },
38198 	{ "MPS_CLS_SRAM_H", 0xee34, 0 },
38203 		{ "PortMap", 0, 4 },
38204 	{ "MPS_CLS_SRAM_H", 0xee3c, 0 },
38209 		{ "PortMap", 0, 4 },
38210 	{ "MPS_CLS_SRAM_H", 0xee44, 0 },
38215 		{ "PortMap", 0, 4 },
38216 	{ "MPS_CLS_SRAM_H", 0xee4c, 0 },
38221 		{ "PortMap", 0, 4 },
38222 	{ "MPS_CLS_SRAM_H", 0xee54, 0 },
38227 		{ "PortMap", 0, 4 },
38228 	{ "MPS_CLS_SRAM_H", 0xee5c, 0 },
38233 		{ "PortMap", 0, 4 },
38234 	{ "MPS_CLS_SRAM_H", 0xee64, 0 },
38239 		{ "PortMap", 0, 4 },
38240 	{ "MPS_CLS_SRAM_H", 0xee6c, 0 },
38245 		{ "PortMap", 0, 4 },
38246 	{ "MPS_CLS_SRAM_H", 0xee74, 0 },
38251 		{ "PortMap", 0, 4 },
38252 	{ "MPS_CLS_SRAM_H", 0xee7c, 0 },
38257 		{ "PortMap", 0, 4 },
38258 	{ "MPS_CLS_SRAM_H", 0xee84, 0 },
38263 		{ "PortMap", 0, 4 },
38264 	{ "MPS_CLS_SRAM_H", 0xee8c, 0 },
38269 		{ "PortMap", 0, 4 },
38270 	{ "MPS_CLS_SRAM_H", 0xee94, 0 },
38275 		{ "PortMap", 0, 4 },
38276 	{ "MPS_CLS_SRAM_H", 0xee9c, 0 },
38281 		{ "PortMap", 0, 4 },
38282 	{ "MPS_CLS_SRAM_H", 0xeea4, 0 },
38287 		{ "PortMap", 0, 4 },
38288 	{ "MPS_CLS_SRAM_H", 0xeeac, 0 },
38293 		{ "PortMap", 0, 4 },
38294 	{ "MPS_CLS_SRAM_H", 0xeeb4, 0 },
38299 		{ "PortMap", 0, 4 },
38300 	{ "MPS_CLS_SRAM_H", 0xeebc, 0 },
38305 		{ "PortMap", 0, 4 },
38306 	{ "MPS_CLS_SRAM_H", 0xeec4, 0 },
38311 		{ "PortMap", 0, 4 },
38312 	{ "MPS_CLS_SRAM_H", 0xeecc, 0 },
38317 		{ "PortMap", 0, 4 },
38318 	{ "MPS_CLS_SRAM_H", 0xeed4, 0 },
38323 		{ "PortMap", 0, 4 },
38324 	{ "MPS_CLS_SRAM_H", 0xeedc, 0 },
38329 		{ "PortMap", 0, 4 },
38330 	{ "MPS_CLS_SRAM_H", 0xeee4, 0 },
38335 		{ "PortMap", 0, 4 },
38336 	{ "MPS_CLS_SRAM_H", 0xeeec, 0 },
38341 		{ "PortMap", 0, 4 },
38342 	{ "MPS_CLS_SRAM_H", 0xeef4, 0 },
38347 		{ "PortMap", 0, 4 },
38348 	{ "MPS_CLS_SRAM_H", 0xeefc, 0 },
38353 		{ "PortMap", 0, 4 },
38354 	{ "MPS_CLS_SRAM_H", 0xef04, 0 },
38359 		{ "PortMap", 0, 4 },
38360 	{ "MPS_CLS_SRAM_H", 0xef0c, 0 },
38365 		{ "PortMap", 0, 4 },
38366 	{ "MPS_CLS_SRAM_H", 0xef14, 0 },
38371 		{ "PortMap", 0, 4 },
38372 	{ "MPS_CLS_SRAM_H", 0xef1c, 0 },
38377 		{ "PortMap", 0, 4 },
38378 	{ "MPS_CLS_SRAM_H", 0xef24, 0 },
38383 		{ "PortMap", 0, 4 },
38384 	{ "MPS_CLS_SRAM_H", 0xef2c, 0 },
38389 		{ "PortMap", 0, 4 },
38390 	{ "MPS_CLS_SRAM_H", 0xef34, 0 },
38395 		{ "PortMap", 0, 4 },
38396 	{ "MPS_CLS_SRAM_H", 0xef3c, 0 },
38401 		{ "PortMap", 0, 4 },
38402 	{ "MPS_CLS_SRAM_H", 0xef44, 0 },
38407 		{ "PortMap", 0, 4 },
38408 	{ "MPS_CLS_SRAM_H", 0xef4c, 0 },
38413 		{ "PortMap", 0, 4 },
38414 	{ "MPS_CLS_SRAM_H", 0xef54, 0 },
38419 		{ "PortMap", 0, 4 },
38420 	{ "MPS_CLS_SRAM_H", 0xef5c, 0 },
38425 		{ "PortMap", 0, 4 },
38426 	{ "MPS_CLS_SRAM_H", 0xef64, 0 },
38431 		{ "PortMap", 0, 4 },
38432 	{ "MPS_CLS_SRAM_H", 0xef6c, 0 },
38437 		{ "PortMap", 0, 4 },
38438 	{ "MPS_CLS_SRAM_H", 0xef74, 0 },
38443 		{ "PortMap", 0, 4 },
38444 	{ "MPS_CLS_SRAM_H", 0xef7c, 0 },
38449 		{ "PortMap", 0, 4 },
38450 	{ "MPS_CLS_SRAM_H", 0xef84, 0 },
38455 		{ "PortMap", 0, 4 },
38456 	{ "MPS_CLS_SRAM_H", 0xef8c, 0 },
38461 		{ "PortMap", 0, 4 },
38462 	{ "MPS_CLS_SRAM_H", 0xef94, 0 },
38467 		{ "PortMap", 0, 4 },
38468 	{ "MPS_CLS_SRAM_H", 0xef9c, 0 },
38473 		{ "PortMap", 0, 4 },
38474 	{ "MPS_CLS_SRAM_H", 0xefa4, 0 },
38479 		{ "PortMap", 0, 4 },
38480 	{ "MPS_CLS_SRAM_H", 0xefac, 0 },
38485 		{ "PortMap", 0, 4 },
38486 	{ "MPS_CLS_SRAM_H", 0xefb4, 0 },
38491 		{ "PortMap", 0, 4 },
38492 	{ "MPS_CLS_SRAM_H", 0xefbc, 0 },
38497 		{ "PortMap", 0, 4 },
38498 	{ "MPS_CLS_SRAM_H", 0xefc4, 0 },
38503 		{ "PortMap", 0, 4 },
38504 	{ "MPS_CLS_SRAM_H", 0xefcc, 0 },
38509 		{ "PortMap", 0, 4 },
38510 	{ "MPS_CLS_SRAM_H", 0xefd4, 0 },
38515 		{ "PortMap", 0, 4 },
38516 	{ "MPS_CLS_SRAM_H", 0xefdc, 0 },
38521 		{ "PortMap", 0, 4 },
38522 	{ "MPS_CLS_SRAM_H", 0xefe4, 0 },
38527 		{ "PortMap", 0, 4 },
38528 	{ "MPS_CLS_SRAM_H", 0xefec, 0 },
38533 		{ "PortMap", 0, 4 },
38534 	{ "MPS_CLS_SRAM_H", 0xeff4, 0 },
38539 		{ "PortMap", 0, 4 },
38540 	{ "MPS_CLS_SRAM_H", 0xeffc, 0 },
38545 		{ "PortMap", 0, 4 },
38546 	{ "MPS_CLS_TCAM_DATA0", 0xf000, 0 },
38547 	{ "MPS_CLS_TCAM_DATA1", 0xf004, 0 },
38549 		{ "DMACH", 0, 16 },
38550 	{ "MPS_CLS_TCAM_DATA2_CTL", 0xf008, 0 },
38560 		{ "DataVIDH1", 0, 7 },
38561 	{ "MPS_CLS_TCAM_RDATA0_REQ_ID0", 0xf010, 0 },
38562 	{ "MPS_CLS_TCAM_RDATA1_REQ_ID0", 0xf014, 0 },
38564 		{ "DMACH", 0, 16 },
38565 	{ "MPS_CLS_TCAM_RDATA2_REQ_ID0", 0xf018, 0 },
38570 		{ "DataVIDH1", 0, 7 },
38571 	{ "MPS_CLS_TCAM_RDATA0_REQ_ID1", 0xf020, 0 },
38572 	{ "MPS_CLS_TCAM_RDATA1_REQ_ID1", 0xf024, 0 },
38574 		{ "DMACH", 0, 16 },
38575 	{ "MPS_CLS_TCAM_RDATA2_REQ_ID1", 0xf028, 0 },
38580 		{ "DataVIDH1", 0, 7 },
38585 	{ "CPL_SWITCH_CNTRL", 0x19040, 0 },
38593 		{ "cim_enable", 0, 1 },
38594 	{ "CPL_SWITCH_TBL_IDX", 0x19044, 0 },
38595 	{ "CPL_SWITCH_TBL_DATA", 0x19048, 0 },
38596 	{ "CPL_SWITCH_ZERO_ERROR", 0x1904c, 0 },
38598 		{ "zero_cmd_ch0", 0, 8 },
38599 	{ "CPL_INTR_ENABLE", 0x19050, 0 },
38607 		{ "zero_switch_error", 0, 1 },
38608 	{ "CPL_INTR_CAUSE", 0x19054, 0 },
38616 		{ "zero_switch_error", 0, 1 },
38617 	{ "CPL_MAP_TBL_IDX", 0x19058, 0 },
38619 		{ "cpl_map_tbl_idx", 0, 8 },
38620 	{ "CPL_MAP_TBL_DATA", 0x1905c, 0 },
38625 	{ "SMB_GLOBAL_TIME_CFG", 0x19060, 0 },
38627 		{ "MicroCntCfg", 0, 8 },
38628 	{ "SMB_MST_TIMEOUT_CFG", 0x19064, 0 },
38629 	{ "SMB_MST_CTL_CFG", 0x19068, 0 },
38635 		{ "MstCtlEn", 0, 1 },
38636 	{ "SMB_MST_CTL_STS", 0x1906c, 0 },
38639 		{ "MstBusySts", 0, 1 },
38640 	{ "SMB_MST_TX_FIFO_RDWR", 0x19070, 0 },
38641 	{ "SMB_MST_RX_FIFO_RDWR", 0x19074, 0 },
38642 	{ "SMB_SLV_TIMEOUT_CFG", 0x19078, 0 },
38643 	{ "SMB_SLV_CTL_CFG", 0x1907c, 0 },
38653 		{ "SlvCtlEn", 0, 1 },
38654 	{ "SMB_SLV_CTL_STS", 0x19080, 0 },
38658 		{ "SlvBusySts", 0, 1 },
38659 	{ "SMB_SLV_FIFO_RDWR", 0x19084, 0 },
38660 	{ "SMB_INT_ENABLE", 0x1908c, 0 },
38682 		{ "MstDoneIntEn", 0, 1 },
38683 	{ "SMB_INT_CAUSE", 0x19090, 0 },
38705 		{ "MstDoneInt", 0, 1 },
38706 	{ "SMB_DEBUG_DATA", 0x19094, 0 },
38708 		{ "DebugDataL", 0, 16 },
38709 	{ "SMB_PERR_EN", 0x19098, 0 },
38715 		{ "SlvFifoPerrEn", 0, 1 },
38716 	{ "SMB_PERR_INJ", 0x1909c, 0 },
38720 		{ "FifoInjDataErrEn", 0, 1 },
38721 	{ "SMB_SLV_ARP_CTL", 0x190a0, 0 },
38724 		{ "ArpAddrVal", 0, 1 },
38725 	{ "SMB_ARP_UDID0", 0x190a4, 0 },
38726 	{ "SMB_ARP_UDID1", 0x190a8, 0 },
38728 		{ "SubsystemDeviceID", 0, 16 },
38729 	{ "SMB_ARP_UDID2", 0x190ac, 0 },
38731 		{ "Interface", 0, 16 },
38732 	{ "SMB_ARP_UDID3", 0x190b0, 0 },
38735 		{ "VendorID", 0, 16 },
38736 	{ "SMB_SLV_AUX_ADDR0", 0x190b4, 0 },
38738 		{ "AuxAddr0", 0, 6 },
38739 	{ "SMB_SLV_AUX_ADDR1", 0x190b8, 0 },
38741 		{ "AuxAddr1", 0, 6 },
38742 	{ "SMB_SLV_AUX_ADDR2", 0x190bc, 0 },
38744 		{ "AuxAddr2", 0, 6 },
38745 	{ "SMB_SLV_AUX_ADDR3", 0x190c0, 0 },
38747 		{ "AuxAddr3", 0, 6 },
38748 	{ "SMB_COMMAND_CODE0", 0x190c4, 0 },
38749 	{ "SMB_COMMAND_CODE1", 0x190c8, 0 },
38750 	{ "SMB_COMMAND_CODE2", 0x190cc, 0 },
38751 	{ "SMB_COMMAND_CODE3", 0x190d0, 0 },
38752 	{ "SMB_COMMAND_CODE4", 0x190d4, 0 },
38753 	{ "SMB_COMMAND_CODE5", 0x190d8, 0 },
38754 	{ "SMB_COMMAND_CODE6", 0x190dc, 0 },
38755 	{ "SMB_COMMAND_CODE7", 0x190e0, 0 },
38756 	{ "SMB_MICRO_CNT_CLK_CFG", 0x190e4, 0 },
38758 		{ "MicroCntClkCfg", 0, 8 },
38759 	{ "SMB_CTL_STATUS", 0x190e8, 0 },
38762 		{ "BusBusy", 0, 1 },
38767 	{ "I2CM_CFG", 0x190f0, 0 },
38768 	{ "I2CM_DATA", 0x190f4, 0 },
38769 	{ "I2CM_OP", 0x190f8, 0 },
38773 		{ "Op", 0, 1 },
38778 	{ "MI_CFG", 0x19100, 0 },
38784 		{ "MDIO_1P2V_Sel", 0, 1 },
38785 	{ "MI_ADDR", 0x19104, 0 },
38787 		{ "RegAddr", 0, 5 },
38788 	{ "MI_DATA", 0x19108, 0 },
38789 	{ "MI_OP", 0x1910c, 0 },
38793 		{ "Op", 0, 2 },
38798 	{ "UART_CONFIG", 0x19110, 0 },
38802 		{ "ClkDiv", 0, 12 },
38807 	{ "PMU_PART_CG_PWRMODE", 0x19120, 0 },
38817 		{ "InitPowerMode", 0, 2 },
38818 	{ "PMU_SLEEPMODE_WAKEUP", 0x19124, 0 },
38825 		{ "WakeUp", 0, 1 },
38830 	{ "ULP_RX_CTL", 0x19150, 0 },
38844 		{ "TddpTagTcb", 0, 1 },
38845 	{ "ULP_RX_INT_ENABLE", 0x19154, 0 },
38872 		{ "ENABLE_MPARC_0", 0, 1 },
38873 	{ "ULP_RX_INT_CAUSE", 0x19158, 0 },
38900 		{ "CAUSE_MPARC_0", 0, 1 },
38901 	{ "ULP_RX_ISCSI_LLIMIT", 0x1915c, 0 },
38903 	{ "ULP_RX_ISCSI_ULIMIT", 0x19160, 0 },
38905 	{ "ULP_RX_ISCSI_TAGMASK", 0x19164, 0 },
38907 	{ "ULP_RX_ISCSI_PSZ", 0x19168, 0 },
38911 		{ "Hpz0", 0, 4 },
38912 	{ "ULP_RX_TDDP_LLIMIT", 0x1916c, 0 },
38914 	{ "ULP_RX_TDDP_ULIMIT", 0x19170, 0 },
38916 	{ "ULP_RX_TDDP_TAGMASK", 0x19174, 0 },
38918 	{ "ULP_RX_TDDP_PSZ", 0x19178, 0 },
38922 		{ "Hpz0", 0, 4 },
38923 	{ "ULP_RX_STAG_LLIMIT", 0x1917c, 0 },
38924 	{ "ULP_RX_STAG_ULIMIT", 0x19180, 0 },
38925 	{ "ULP_RX_RQ_LLIMIT", 0x19184, 0 },
38926 	{ "ULP_RX_RQ_ULIMIT", 0x19188, 0 },
38927 	{ "ULP_RX_PBL_LLIMIT", 0x1918c, 0 },
38928 	{ "ULP_RX_PBL_ULIMIT", 0x19190, 0 },
38929 	{ "ULP_RX_CTX_BASE", 0x19194, 0 },
38930 	{ "ULP_RX_PERR_ENABLE", 0x1919c, 0 },
38957 		{ "PERR_ENABLE_MPARC_0", 0, 1 },
38958 	{ "ULP_RX_PERR_INJECT", 0x191a0, 0 },
38960 		{ "InjectDataErr", 0, 1 },
38961 	{ "ULP_RX_RQUDP_LLIMIT", 0x191a4, 0 },
38962 	{ "ULP_RX_RQUDP_ULIMIT", 0x191a8, 0 },
38963 	{ "ULP_RX_CTX_ACC_CH0", 0x191ac, 0 },
38966 		{ "TID", 0, 20 },
38967 	{ "ULP_RX_CTX_ACC_CH1", 0x191b0, 0 },
38970 		{ "TID", 0, 20 },
38971 	{ "ULP_RX_SE_CNT_ERR", 0x191d0, 0 },
38973 		{ "ERR_CH0", 0, 4 },
38974 	{ "ULP_RX_SE_CNT_CLR", 0x191d4, 0 },
38976 		{ "CLR_CH1", 0, 4 },
38977 	{ "ULP_RX_SE_CNT_CH0", 0x191d8, 0 },
38985 		{ "EOP_CNT_IN0", 0, 4 },
38986 	{ "ULP_RX_SE_CNT_CH1", 0x191dc, 0 },
38994 		{ "EOP_CNT_IN1", 0, 4 },
38995 	{ "ULP_RX_DBG_CTL", 0x191e0, 0 },
38999 		{ "SEL_L", 0, 8 },
39000 	{ "ULP_RX_DBG_DATAH", 0x191e4, 0 },
39001 	{ "ULP_RX_DBG_DATAL", 0x191e8, 0 },
39002 	{ "ULP_RX_LA_CHNL", 0x19238, 0 },
39003 	{ "ULP_RX_LA_CTL", 0x1923c, 0 },
39004 	{ "ULP_RX_LA_RDPTR", 0x19240, 0 },
39005 	{ "ULP_RX_LA_RDDATA", 0x19244, 0 },
39006 	{ "ULP_RX_LA_WRPTR", 0x19248, 0 },
39007 	{ "ULP_RX_LA_RESERVED", 0x1924c, 0 },
39008 	{ "ULP_RX_CQE_GEN_EN", 0x19250, 0 },
39010 		{ "Terminate_with_err", 0, 1 },
39011 	{ "ULP_RX_ATOMIC_OPCODES", 0x19254, 0 },
39019 		{ "immediate_with_se_opcode", 0, 4 },
39020 	{ "ULP_RX_T10_CRC_ENDIAN_SWITCHING", 0x19258, 0 },
39021 	{ "ULP_RX_MISC_FEATURE_ENABLE", 0x1925c, 0 },
39043 		{ "sdc_crc_prot_en", 0, 1 },
39044 	{ "ULP_RX_CH0_CGEN", 0x19260, 0 },
39052 		{ "Rdma_DataPath_CGEN", 0, 1 },
39053 	{ "ULP_RX_CH1_CGEN", 0x19264, 0 },
39061 		{ "Rdma_DataPath_CGEN", 0, 1 },
39062 	{ "ULP_RX_RFE_DISABLE", 0x19268, 0 },
39063 	{ "ULP_RX_INT_ENABLE_2", 0x1926c, 0 },
39072 		{ "DDP_HINT_0", 0, 1 },
39073 	{ "ULP_RX_INT_CAUSE_2", 0x19270, 0 },
39082 		{ "DDP_HINT_0", 0, 1 },
39083 	{ "ULP_RX_PERR_ENABLE_2", 0x19274, 0 },
39092 		{ "ENABLE_DDP_HINT_0", 0, 1 },
39093 	{ "ULP_RX_RQE_PBL_MULTIPLE_OUTSTANDING_CNT", 0x19278, 0 },
39094 	{ "ULP_RX_ATOMIC_LEN", 0x1927c, 0 },
39097 		{ "atomic_immediate_len", 0, 8 },
39098 	{ "ULP_RX_CGEN_GLOBAL", 0x19280, 0 },
39099 	{ "ULP_RX_CTX_SKIP_MA_REQ", 0x19284, 0 },
39103 		{ "skip_ma_req_en0", 0, 1 },
39104 	{ "ULP_RX_CHNL0_CTX_ERROR_COUNT_PER_TID", 0x19288, 0 },
39105 	{ "ULP_RX_CHNL1_CTX_ERROR_COUNT_PER_TID", 0x1928c, 0 },
39106 	{ "ULP_RX_MSN_CHECK_ENABLE", 0x19290, 0 },
39109 		{ "send_msn_check_enable", 0, 1 },
39110 	{ "ULP_RX_TLS_PP_LLIMIT", 0x192a4, 0 },
39112 	{ "ULP_RX_TLS_PP_ULIMIT", 0x192a8, 0 },
39114 	{ "ULP_RX_TLS_KEY_LLIMIT", 0x192ac, 0 },
39116 	{ "ULP_RX_TLS_KEY_ULIMIT", 0x192b0, 0 },
39118 	{ "ULP_RX_TLS_CTL", 0x192bc, 0 },
39122 		{ "TlsDisable", 0, 1 },
39123 	{ "ULP_RX_TLS_IND_CMD", 0x19348, 0 },
39124 	{ "ULP_RX_TLS_IND_DATA", 0x1934c, 0 },
39129 	{ "SF_DATA", 0x193f8, 0 },
39130 	{ "SF_OP", 0x193fc, 0 },
39135 		{ "Op", 0, 1 },
39140 	{ "PL_PF_INT_CAUSE", 0x1e3c0, 0 },
39143 		{ "MPS", 0, 1 },
39144 	{ "PL_PF_INT_ENABLE", 0x1e3c4, 0 },
39147 		{ "MPS", 0, 1 },
39148 	{ "PL_PF_CTL", 0x1e3c8, 0 },
39149 	{ "PL_PF_INT_CAUSE", 0x1e7c0, 0 },
39152 		{ "MPS", 0, 1 },
39153 	{ "PL_PF_INT_ENABLE", 0x1e7c4, 0 },
39156 		{ "MPS", 0, 1 },
39157 	{ "PL_PF_CTL", 0x1e7c8, 0 },
39158 	{ "PL_PF_INT_CAUSE", 0x1ebc0, 0 },
39161 		{ "MPS", 0, 1 },
39162 	{ "PL_PF_INT_ENABLE", 0x1ebc4, 0 },
39165 		{ "MPS", 0, 1 },
39166 	{ "PL_PF_CTL", 0x1ebc8, 0 },
39167 	{ "PL_PF_INT_CAUSE", 0x1efc0, 0 },
39170 		{ "MPS", 0, 1 },
39171 	{ "PL_PF_INT_ENABLE", 0x1efc4, 0 },
39174 		{ "MPS", 0, 1 },
39175 	{ "PL_PF_CTL", 0x1efc8, 0 },
39176 	{ "PL_PF_INT_CAUSE", 0x1f3c0, 0 },
39179 		{ "MPS", 0, 1 },
39180 	{ "PL_PF_INT_ENABLE", 0x1f3c4, 0 },
39183 		{ "MPS", 0, 1 },
39184 	{ "PL_PF_CTL", 0x1f3c8, 0 },
39185 	{ "PL_PF_INT_CAUSE", 0x1f7c0, 0 },
39188 		{ "MPS", 0, 1 },
39189 	{ "PL_PF_INT_ENABLE", 0x1f7c4, 0 },
39192 		{ "MPS", 0, 1 },
39193 	{ "PL_PF_CTL", 0x1f7c8, 0 },
39194 	{ "PL_PF_INT_CAUSE", 0x1fbc0, 0 },
39197 		{ "MPS", 0, 1 },
39198 	{ "PL_PF_INT_ENABLE", 0x1fbc4, 0 },
39201 		{ "MPS", 0, 1 },
39202 	{ "PL_PF_CTL", 0x1fbc8, 0 },
39203 	{ "PL_PF_INT_CAUSE", 0x1ffc0, 0 },
39206 		{ "MPS", 0, 1 },
39207 	{ "PL_PF_INT_ENABLE", 0x1ffc4, 0 },
39210 		{ "MPS", 0, 1 },
39211 	{ "PL_PF_CTL", 0x1ffc8, 0 },
39212 	{ "PL_WHOAMI", 0x19400, 0 },
39217 		{ "VFID", 0, 8 },
39218 	{ "PL_PERR_CAUSE", 0x19404, 0 },
39244 		{ "CIM", 0, 1 },
39245 	{ "PL_PERR_ENABLE", 0x19408, 0 },
39271 		{ "CIM", 0, 1 },
39272 	{ "PL_INT_CAUSE", 0x1940c, 0 },
39301 		{ "CIM", 0, 1 },
39302 	{ "PL_INT_ENABLE", 0x19410, 0 },
39331 		{ "CIM", 0, 1 },
39332 	{ "PL_INT_MAP0", 0x19414, 0 },
39334 		{ "MapDefault", 0, 9 },
39335 	{ "PL_INT_MAP1", 0x19418, 0 },
39337 		{ "MapMAC0", 0, 9 },
39338 	{ "PL_INT_MAP3", 0x19420, 0 },
39340 		{ "MapSMB", 0, 9 },
39341 	{ "PL_INT_MAP4", 0x19424, 0 },
39343 		{ "MapI2CM", 0, 9 },
39344 	{ "PL_RST", 0x19428, 0 },
39349 		{ "PIORstMode", 0, 1 },
39350 	{ "PL_PL_INT_CAUSE", 0x19430, 0 },
39356 	{ "PL_PL_INT_ENABLE", 0x19434, 0 },
39362 	{ "PL_PL_PERR_ENABLE", 0x19438, 0 },
39364 	{ "PL_REV", 0x1943c, 0 },
39366 		{ "Rev", 0, 4 },
39367 	{ "PL_PCIE_LINK", 0x19440, 0 },
39376 		{ "LTSSM", 0, 6 },
39377 	{ "PL_PCIE_CTL_STAT", 0x19444, 0 },
39379 		{ "Control", 0, 16 },
39380 	{ "PL_SEMAPHORE_CTL", 0x1944c, 0 },
39383 		{ "EnablePF", 0, 8 },
39384 	{ "PL_SEMAPHORE_LOCK", 0x19450, 0 },
39387 		{ "SourcePF", 0, 3 },
39388 	{ "PL_SEMAPHORE_LOCK", 0x19454, 0 },
39391 		{ "SourcePF", 0, 3 },
39392 	{ "PL_SEMAPHORE_LOCK", 0x19458, 0 },
39395 		{ "SourcePF", 0, 3 },
39396 	{ "PL_SEMAPHORE_LOCK", 0x1945c, 0 },
39399 		{ "SourcePF", 0, 3 },
39400 	{ "PL_SEMAPHORE_LOCK", 0x19460, 0 },
39403 		{ "SourcePF", 0, 3 },
39404 	{ "PL_SEMAPHORE_LOCK", 0x19464, 0 },
39407 		{ "SourcePF", 0, 3 },
39408 	{ "PL_SEMAPHORE_LOCK", 0x19468, 0 },
39411 		{ "SourcePF", 0, 3 },
39412 	{ "PL_SEMAPHORE_LOCK", 0x1946c, 0 },
39415 		{ "SourcePF", 0, 3 },
39416 	{ "PL_PORTX_MAP", 0x19474, 0 },
39424 		{ "MAP0", 0, 3 },
39425 	{ "PL_VF_SLICE_L", 0x19490, 0 },
39427 		{ "BaseAddr", 0, 10 },
39428 	{ "PL_VF_SLICE_L", 0x19498, 0 },
39430 		{ "BaseAddr", 0, 10 },
39431 	{ "PL_VF_SLICE_L", 0x194a0, 0 },
39433 		{ "BaseAddr", 0, 10 },
39434 	{ "PL_VF_SLICE_L", 0x194a8, 0 },
39436 		{ "BaseAddr", 0, 10 },
39437 	{ "PL_VF_SLICE_L", 0x194b0, 0 },
39439 		{ "BaseAddr", 0, 10 },
39440 	{ "PL_VF_SLICE_L", 0x194b8, 0 },
39442 		{ "BaseAddr", 0, 10 },
39443 	{ "PL_VF_SLICE_L", 0x194c0, 0 },
39445 		{ "BaseAddr", 0, 10 },
39446 	{ "PL_VF_SLICE_L", 0x194c8, 0 },
39448 		{ "BaseAddr", 0, 10 },
39449 	{ "PL_VF_SLICE_H", 0x19494, 0 },
39451 		{ "ModOffset", 0, 10 },
39452 	{ "PL_VF_SLICE_H", 0x1949c, 0 },
39454 		{ "ModOffset", 0, 10 },
39455 	{ "PL_VF_SLICE_H", 0x194a4, 0 },
39457 		{ "ModOffset", 0, 10 },
39458 	{ "PL_VF_SLICE_H", 0x194ac, 0 },
39460 		{ "ModOffset", 0, 10 },
39461 	{ "PL_VF_SLICE_H", 0x194b4, 0 },
39463 		{ "ModOffset", 0, 10 },
39464 	{ "PL_VF_SLICE_H", 0x194bc, 0 },
39466 		{ "ModOffset", 0, 10 },
39467 	{ "PL_VF_SLICE_H", 0x194c4, 0 },
39469 		{ "ModOffset", 0, 10 },
39470 	{ "PL_VF_SLICE_H", 0x194cc, 0 },
39472 		{ "ModOffset", 0, 10 },
39473 	{ "PL_TIMEOUT_CTL", 0x194f0, 0 },
39475 		{ "Timeout", 0, 16 },
39476 	{ "PL_TIMEOUT_STATUS0", 0x194f4, 0 },
39478 	{ "PL_TIMEOUT_STATUS1", 0x194f8, 0 },
39484 		{ "VFID", 0, 9 },
39489 	{ "LE_DB_ID", 0x19c00, 0 },
39490 	{ "LE_DB_CONFIG", 0x19c04, 0 },
39505 		{ "REGION_EN", 0, 4 },
39506 	{ "LE_DB_EXEC_CTRL", 0x19c08, 0 },
39510 		{ "CMDLIMIT", 0, 8 },
39511 	{ "LE_DB_PS_CTRL", 0x19c0c, 0 },
39520 	{ "LE_DB_ACTIVE_TABLE_START_INDEX", 0x19c10, 0 },
39521 	{ "LE_DB_NORM_FILT_TABLE_START_INDEX", 0x19c14, 0 },
39522 	{ "LE_DB_SRVR_START_INDEX", 0x19c18, 0 },
39523 	{ "LE_DB_HPRI_FILT_TABLE_START_INDEX", 0x19c1c, 0 },
39524 	{ "LE_DB_ACT_CNT_IPV4", 0x19c20, 0 },
39525 	{ "LE_DB_ACT_CNT_IPV6", 0x19c24, 0 },
39526 	{ "LE_DB_ACT_CNT_IPV4_TCAM", 0x19c94, 0 },
39527 	{ "LE_DB_ACT_CNT_IPV6_TCAM", 0x19c98, 0 },
39528 	{ "LE_DB_REQ_RSP_CNT", 0x19ce4, 0 },
39530 		{ "ReqCnt", 0, 16 },
39531 	{ "LE_HASH_COLLISION", 0x19fc4, 0 },
39532 	{ "LE_GLOBAL_COLLISION", 0x19fc8, 0 },
39533 	{ "LE_DB_HASH_CONFIG", 0x19c28, 0 },
39536 	{ "LE_DB_MIN_NUM_ACTV_TCAM_ENTRIES", 0x19c2c, 0 },
39537 	{ "LE_DB_MAX_NUM_HASH_ENTRIES", 0x19c70, 0 },
39538 	{ "LE_DB_RSP_CODE_0", 0x19c74, 0 },
39544 		{ "TCAM_ACTV_HIT", 0, 5 },
39545 	{ "LE_DB_RSP_CODE_1", 0x19c78, 0 },
39551 		{ "ACTV_FULL_ERR", 0, 5 },
39552 	{ "LE_DB_RSP_CODE_2", 0x19c7c, 0 },
39558 		{ "INTERNAL_ERR", 0, 5 },
39559 	{ "LE_DB_RSP_CODE_3", 0x19c80, 0 },
39564 	{ "LE_DB_HASH_TBL_BASE_ADDR", 0x19c30, 0 },
39566 	{ "LE_TCAM_SIZE", 0x19c34, 0 },
39567 	{ "LE_DB_INT_ENABLE", 0x19c38, 0 },
39597 		{ "PipelineErr", 0, 1 },
39598 	{ "LE_DB_INT_CAUSE", 0x19c3c, 0 },
39628 		{ "PipelineErr", 0, 1 },
39629 	{ "LE_PERR_ENABLE", 0x19cf8, 0 },
39647 		{ "PipelineErr", 0, 1 },
39648 	{ "LE_DB_ERR_CMD_TID", 0x19c48, 0 },
39651 		{ "ERR_TID", 0, 20 },
39652 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c50, 0 },
39653 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c54, 0 },
39654 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c58, 0 },
39655 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c5c, 0 },
39656 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c60, 0 },
39657 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c64, 0 },
39658 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c68, 0 },
39659 	{ "LE_DB_DBG_MATCH_DATA_MASK", 0x19c6c, 0 },
39660 	{ "LE_DB_DBG_MATCH_DATA", 0x19ca0, 0 },
39661 	{ "LE_DB_DBG_MATCH_DATA", 0x19ca4, 0 },
39662 	{ "LE_DB_DBG_MATCH_DATA", 0x19ca8, 0 },
39663 	{ "LE_DB_DBG_MATCH_DATA", 0x19cac, 0 },
39664 	{ "LE_DB_DBG_MATCH_DATA", 0x19cb0, 0 },
39665 	{ "LE_DB_DBG_MATCH_DATA", 0x19cb4, 0 },
39666 	{ "LE_DB_DBG_MATCH_DATA", 0x19cb8, 0 },
39667 	{ "LE_DB_DBG_MATCH_DATA", 0x19cbc, 0 },
39668 	{ "LE_DB_DBG_MATCH_CMD_IDX_MASK", 0x19c40, 0 },
39670 		{ "TID_CMP_MASK", 0, 20 },
39671 	{ "LE_DB_DBG_MATCH_CMD_IDX_DATA", 0x19c44, 0 },
39673 		{ "TID_CMP", 0, 20 },
39674 	{ "LE_DB_DBGI_CONFIG", 0x19cf0, 0 },
39684 		{ "DBGICMDMODE", 0, 2 },
39685 	{ "LE_DB_DBGI_REQ_CMD", 0x19cf4, 0 },
39687 		{ "DBGITID", 0, 20 },
39688 	{ "LE_DB_DBGI_REQ_DATA", 0x19d00, 0 },
39689 	{ "LE_DB_DBGI_REQ_DATA", 0x19d04, 0 },
39690 	{ "LE_DB_DBGI_REQ_DATA", 0x19d08, 0 },
39691 	{ "LE_DB_DBGI_REQ_DATA", 0x19d0c, 0 },
39692 	{ "LE_DB_DBGI_REQ_DATA", 0x19d10, 0 },
39693 	{ "LE_DB_DBGI_REQ_DATA", 0x19d14, 0 },
39694 	{ "LE_DB_DBGI_REQ_DATA", 0x19d18, 0 },
39695 	{ "LE_DB_DBGI_REQ_DATA", 0x19d1c, 0 },
39696 	{ "LE_DB_DBGI_REQ_DATA", 0x19d20, 0 },
39697 	{ "LE_DB_DBGI_REQ_DATA", 0x19d24, 0 },
39698 	{ "LE_DB_DBGI_REQ_DATA", 0x19d28, 0 },
39699 	{ "LE_DB_DBGI_REQ_MASK", 0x19d50, 0 },
39700 	{ "LE_DB_DBGI_REQ_MASK", 0x19d54, 0 },
39701 	{ "LE_DB_DBGI_REQ_MASK", 0x19d58, 0 },
39702 	{ "LE_DB_DBGI_REQ_MASK", 0x19d5c, 0 },
39703 	{ "LE_DB_DBGI_REQ_MASK", 0x19d60, 0 },
39704 	{ "LE_DB_DBGI_REQ_MASK", 0x19d64, 0 },
39705 	{ "LE_DB_DBGI_REQ_MASK", 0x19d68, 0 },
39706 	{ "LE_DB_DBGI_REQ_MASK", 0x19d6c, 0 },
39707 	{ "LE_DB_DBGI_REQ_MASK", 0x19d70, 0 },
39708 	{ "LE_DB_DBGI_REQ_MASK", 0x19d74, 0 },
39709 	{ "LE_DB_DBGI_REQ_MASK", 0x19d78, 0 },
39710 	{ "LE_DB_DBGI_RSP_STATUS", 0x19d94, 0 },
39715 		{ "DBGIRspValid", 0, 1 },
39716 	{ "LE_DBG_SEL", 0x19d98, 0 },
39717 	{ "LE_DB_DBGI_RSP_DATA", 0x19da0, 0 },
39718 	{ "LE_DB_DBGI_RSP_DATA", 0x19da4, 0 },
39719 	{ "LE_DB_DBGI_RSP_DATA", 0x19da8, 0 },
39720 	{ "LE_DB_DBGI_RSP_DATA", 0x19dac, 0 },
39721 	{ "LE_DB_DBGI_RSP_DATA", 0x19db0, 0 },
39722 	{ "LE_DB_DBGI_RSP_DATA", 0x19db4, 0 },
39723 	{ "LE_DB_DBGI_RSP_DATA", 0x19db8, 0 },
39724 	{ "LE_DB_DBGI_RSP_DATA", 0x19dbc, 0 },
39725 	{ "LE_DB_DBGI_RSP_DATA", 0x19dc0, 0 },
39726 	{ "LE_DB_DBGI_RSP_DATA", 0x19dc4, 0 },
39727 	{ "LE_DB_DBGI_RSP_DATA", 0x19dc8, 0 },
39728 	{ "LE_DB_DBGI_RSP_DATA", 0x19dcc, 0 },
39729 	{ "LE_DB_DBGI_RSP_DATA", 0x19dd0, 0 },
39730 	{ "LE_DB_DBGI_RSP_DATA", 0x19dd4, 0 },
39731 	{ "LE_DB_DBGI_RSP_DATA", 0x19dd8, 0 },
39732 	{ "LE_DB_DBGI_RSP_DATA", 0x19ddc, 0 },
39733 	{ "LE_DB_DBGI_RSP_DATA", 0x19de0, 0 },
39734 	{ "LE_DB_TCAM_TID_BASE", 0x19df0, 0 },
39735 	{ "LE_DB_CLCAM_TID_BASE", 0x19df4, 0 },
39736 	{ "LE_DB_HASH_TID_BASE", 0x19df8, 0 },
39737 	{ "LE_DB_SSRAM_TID_BASE", 0x19dfc, 0 },
39738 	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e00, 0 },
39739 	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e04, 0 },
39740 	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e08, 0 },
39741 	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e0c, 0 },
39742 	{ "LE_DB_ACTIVE_MASK_IPV4", 0x19e10, 0 },
39743 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e50, 0 },
39744 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e54, 0 },
39745 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e58, 0 },
39746 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e5c, 0 },
39747 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e60, 0 },
39748 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e64, 0 },
39749 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e68, 0 },
39750 	{ "LE_DB_ACTIVE_MASK_IPV6", 0x19e6c, 0 },
39751 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea0, 0 },
39752 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea4, 0 },
39753 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ea8, 0 },
39754 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eac, 0 },
39755 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb0, 0 },
39756 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb4, 0 },
39757 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19eb8, 0 },
39758 	{ "LE_DB_HASH_MASK_GEN_IPV4", 0x19ebc, 0 },
39759 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ec4, 0 },
39760 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ec8, 0 },
39761 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ecc, 0 },
39762 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed0, 0 },
39763 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed4, 0 },
39764 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ed8, 0 },
39765 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19edc, 0 },
39766 	{ "LE_DB_HASH_MASK_GEN_IPV6", 0x19ee0, 0 },
39767 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19ee4, 0 },
39768 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19ee8, 0 },
39769 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV4", 0x19eec, 0 },
39770 	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV4", 0x19ef0, 0 },
39771 	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV4", 0x19ef4, 0 },
39772 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f04, 0 },
39773 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f08, 0 },
39774 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f0c, 0 },
39775 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f10, 0 },
39776 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f14, 0 },
39777 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f18, 0 },
39778 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f1c, 0 },
39779 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f20, 0 },
39780 	{ "LE_DB_PSV_FILTER_MASK_TUP_IPV6", 0x19f24, 0 },
39781 	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV6", 0x19f28, 0 },
39782 	{ "LE_DB_PSV_FILTER_MASK_FLT_IPV6", 0x19f2c, 0 },
39783 	{ "LE_DB_SRVR_SRAM_CONFIG", 0x19f34, 0 },
39788 		{ "SRVRINIT", 0, 1 },
39789 	{ "LE_DB_SRVR_VF_SRCH_TABLE_CTRL", 0x19f38, 0 },
39793 		{ "VFINDEX", 0, 8 },
39794 	{ "LE_DB_SRVR_VF_SRCH_TABLE_DATA", 0x19f3c, 0 },
39796 		{ "SRCHLADDR", 0, 12 },
39797 	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f40, 0 },
39798 	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f44, 0 },
39799 	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f48, 0 },
39800 	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f4c, 0 },
39801 	{ "LE_DB_SECOND_ACTIVE_MASK_IPV4", 0x19f50, 0 },
39802 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f90, 0 },
39803 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f94, 0 },
39804 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f98, 0 },
39805 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19f9c, 0 },
39806 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa0, 0 },
39807 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa4, 0 },
39808 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fa8, 0 },
39809 	{ "LE_DB_SECOND_GEN_HASH_MASK_IPV4", 0x19fac, 0 },
39810 	{ "LE_DEBUG_LA_CONFIG", 0x19fd0, 0 },
39811 	{ "LE_REQ_DEBUG_LA_DATA", 0x19fd4, 0 },
39812 	{ "LE_REQ_DEBUG_LA_WRPTR", 0x19fd8, 0 },
39813 	{ "LE_RSP_DEBUG_LA_DATA", 0x19fdc, 0 },
39814 	{ "LE_RSP_DEBUG_LA_WRPTR", 0x19fe0, 0 },
39815 	{ "LE_DEBUG_LA_SEL_DATA", 0x19fe4, 0 },
39820 	{ "NCSI_PORT_CFGREG", 0x1a000, 0 },
39831 	{ "NCSI_RST_CTRL", 0x1a004, 0 },
39834 		{ "mac_tx_rst", 0, 1 },
39835 	{ "NCSI_CH0_SADDR_LOW", 0x1a010, 0 },
39836 	{ "NCSI_CH0_SADDR_HIGH", 0x1a014, 0 },
39838 		{ "CH0_SADDR_HIGH", 0, 16 },
39839 	{ "NCSI_CH1_SADDR_LOW", 0x1a018, 0 },
39840 	{ "NCSI_CH1_SADDR_HIGH", 0x1a01c, 0 },
39842 		{ "CH1_SADDR_HIGH", 0, 16 },
39843 	{ "NCSI_CH2_SADDR_LOW", 0x1a020, 0 },
39844 	{ "NCSI_CH2_SADDR_HIGH", 0x1a024, 0 },
39846 		{ "CH2_SADDR_HIGH", 0, 16 },
39847 	{ "NCSI_CH3_SADDR_LOW", 0x1a028, 0 },
39848 	{ "NCSI_CH3_SADDR_HIGH", 0x1a02c, 0 },
39850 		{ "CH3_SADDR_HIGH", 0, 16 },
39851 	{ "NCSI_WORK_REQHDR_0", 0x1a030, 0 },
39852 	{ "NCSI_WORK_REQHDR_1", 0x1a034, 0 },
39853 	{ "NCSI_WORK_REQHDR_2", 0x1a038, 0 },
39854 	{ "NCSI_WORK_REQHDR_3", 0x1a03c, 0 },
39855 	{ "NCSI_MPS_HDR_LO", 0x1a040, 0 },
39856 	{ "NCSI_MPS_HDR_HI", 0x1a044, 0 },
39857 	{ "NCSI_CTL", 0x1a048, 0 },
39861 		{ "FWD_BMC", 0, 1 },
39862 	{ "NCSI_NCSI_ETYPE", 0x1a04c, 0 },
39863 	{ "NCSI_RX_FIFO_CNT", 0x1a050, 0 },
39864 	{ "NCSI_RX_ERR_CNT", 0x1a054, 0 },
39865 	{ "NCSI_RX_OF_CNT", 0x1a058, 0 },
39866 	{ "NCSI_RX_MS_CNT", 0x1a05c, 0 },
39867 	{ "NCSI_RX_IE_CNT", 0x1a060, 0 },
39868 	{ "NCSI_MPS_DEMUX_CNT", 0x1a064, 0 },
39870 		{ "MPS2BMC_CNT", 0, 9 },
39871 	{ "NCSI_CIM_DEMUX_CNT", 0x1a068, 0 },
39873 		{ "CIM2BMC_CNT", 0, 9 },
39874 	{ "NCSI_TX_FIFO_CNT", 0x1a06c, 0 },
39875 	{ "NCSI_SE_CNT_CTL", 0x1a0b0, 0 },
39876 	{ "NCSI_SE_CNT_MPS", 0x1a0b4, 0 },
39877 	{ "NCSI_SE_CNT_CIM", 0x1a0b8, 0 },
39878 	{ "NCSI_BUS_DEBUG", 0x1a0bc, 0 },
39879 	{ "NCSI_LA_RDPTR", 0x1a0c0, 0 },
39880 	{ "NCSI_LA_RDDATA", 0x1a0c4, 0 },
39881 	{ "NCSI_LA_WRPTR", 0x1a0c8, 0 },
39882 	{ "NCSI_LA_RESERVED", 0x1a0cc, 0 },
39883 	{ "NCSI_LA_CTL", 0x1a0d0, 0 },
39884 	{ "NCSI_INT_ENABLE", 0x1a0d4, 0 },
39893 		{ "RXFIFO_prty_err", 0, 1 },
39894 	{ "NCSI_INT_CAUSE", 0x1a0d8, 0 },
39903 		{ "RXFIFO_prty_err", 0, 1 },
39904 	{ "NCSI_STATUS", 0x1a0dc, 0 },
39906 		{ "arb_status", 0, 1 },
39907 	{ "NCSI_PAUSE_CTRL", 0x1a0e0, 0 },
39908 	{ "NCSI_PAUSE_TIMEOUT", 0x1a0e4, 0 },
39909 	{ "NCSI_PAUSE_WM", 0x1a0ec, 0 },
39911 		{ "PauseLWM", 0, 11 },
39912 	{ "NCSI_DEBUG", 0x1a0f0, 0 },
39915 		{ "PKG_ID", 0, 3 },
39916 	{ "NCSI_PERR_INJECT", 0x1a0f4, 0 },
39918 		{ "InjectDataErr", 0, 1 },
39919 	{ "NCSI_PERR_ENABLE", 0x1a0f8, 0 },
39923 		{ "RXFIFO_prty_err", 0, 1 },
39924 	{ "NCSI_MACB_NETWORK_CTRL", 0x1a100, 0 },
39937 		{ "LoopPHY", 0, 1 },
39938 	{ "NCSI_MACB_NETWORK_CFG", 0x1a104, 0 },
39959 		{ "Speed", 0, 1 },
39960 	{ "NCSI_MACB_NETWORK_STATUS", 0x1a108, 0 },
39963 		{ "LinkStatus", 0, 1 },
39964 	{ "NCSI_MACB_TX_STATUS", 0x1a114, 0 },
39971 		{ "UsedBitRead", 0, 1 },
39972 	{ "NCSI_MACB_RX_BUF_QPTR", 0x1a118, 0 },
39974 	{ "NCSI_MACB_TX_BUF_QPTR", 0x1a11c, 0 },
39976 	{ "NCSI_MACB_RX_STATUS", 0x1a120, 0 },
39979 		{ "NoRxBuf", 0, 1 },
39980 	{ "NCSI_MACB_INT_STATUS", 0x1a124, 0 },
39993 		{ "MgmtFrameSent", 0, 1 },
39994 	{ "NCSI_MACB_INT_EN", 0x1a128, 0 },
40007 		{ "MgmtFrameSent", 0, 1 },
40008 	{ "NCSI_MACB_INT_DIS", 0x1a12c, 0 },
40021 		{ "MgmtFrameSent", 0, 1 },
40022 	{ "NCSI_MACB_INT_MASK", 0x1a130, 0 },
40035 		{ "MgmtFrameSent", 0, 1 },
40036 	{ "NCSI_MACB_PAUSE_TIME", 0x1a138, 0 },
40037 	{ "NCSI_MACB_PAUSE_FRAMES_RCVD", 0x1a13c, 0 },
40038 	{ "NCSI_MACB_TX_FRAMES_OK", 0x1a140, 0 },
40039 	{ "NCSI_MACB_SINGLE_COL_FRAMES", 0x1a144, 0 },
40040 	{ "NCSI_MACB_MUL_COL_FRAMES", 0x1a148, 0 },
40041 	{ "NCSI_MACB_RX_FRAMES_OK", 0x1a14c, 0 },
40042 	{ "NCSI_MACB_FCS_ERR", 0x1a150, 0 },
40043 	{ "NCSI_MACB_ALIGN_ERR", 0x1a154, 0 },
40044 	{ "NCSI_MACB_DEF_TX_FRAMES", 0x1a158, 0 },
40045 	{ "NCSI_MACB_LATE_COL", 0x1a15c, 0 },
40046 	{ "NCSI_MACB_EXCESSIVE_COL", 0x1a160, 0 },
40047 	{ "NCSI_MACB_TX_UNDERRUN_ERR", 0x1a164, 0 },
40048 	{ "NCSI_MACB_CARRIER_SENSE_ERR", 0x1a168, 0 },
40049 	{ "NCSI_MACB_RX_RESOURCE_ERR", 0x1a16c, 0 },
40050 	{ "NCSI_MACB_RX_OVERRUN_ERR", 0x1a170, 0 },
40051 	{ "NCSI_MACB_RX_SYMBOL_ERR", 0x1a174, 0 },
40052 	{ "NCSI_MACB_RX_OVERSIZE_FRAME", 0x1a178, 0 },
40053 	{ "NCSI_MACB_RX_JABBER_ERR", 0x1a17c, 0 },
40054 	{ "NCSI_MACB_RX_UNDERSIZE_FRAME", 0x1a180, 0 },
40055 	{ "NCSI_MACB_SQE_TEST_ERR", 0x1a184, 0 },
40056 	{ "NCSI_MACB_LENGTH_ERR", 0x1a188, 0 },
40057 	{ "NCSI_MACB_TX_PAUSE_FRAMES", 0x1a18c, 0 },
40058 	{ "NCSI_MACB_HASH_LOW", 0x1a190, 0 },
40059 	{ "NCSI_MACB_HASH_HIGH", 0x1a194, 0 },
40060 	{ "NCSI_MACB_SPECIFIC_1_LOW", 0x1a198, 0 },
40061 	{ "NCSI_MACB_SPECIFIC_1_HIGH", 0x1a19c, 0 },
40062 	{ "NCSI_MACB_SPECIFIC_2_LOW", 0x1a1a0, 0 },
40063 	{ "NCSI_MACB_SPECIFIC_2_HIGH", 0x1a1a4, 0 },
40064 	{ "NCSI_MACB_SPECIFIC_3_LOW", 0x1a1a8, 0 },
40065 	{ "NCSI_MACB_SPECIFIC_3_HIGH", 0x1a1ac, 0 },
40066 	{ "NCSI_MACB_SPECIFIC_4_LOW", 0x1a1b0, 0 },
40067 	{ "NCSI_MACB_SPECIFIC_4_HIGH", 0x1a1b4, 0 },
40068 	{ "NCSI_MACB_TYPE_ID", 0x1a1b8, 0 },
40069 	{ "NCSI_MACB_TX_PAUSE_QUANTUM", 0x1a1bc, 0 },
40070 	{ "NCSI_MACB_USER_IO", 0x1a1c0, 0 },
40072 		{ "UserProgOutput", 0, 16 },
40073 	{ "NCSI_MACB_WOL_CFG", 0x1a1c4, 0 },
40078 		{ "ARPIPAddr", 0, 16 },
40079 	{ "NCSI_MACB_REV_STATUS", 0x1a1fc, 0 },
40081 		{ "DesRev", 0, 16 },
40086 	{ "MAC_PORT_CFG", 0x30800, 0 },
40111 		{ "Port_Sel", 0, 1 },
40112 	{ "MAC_PORT_RESET_CTRL", 0x30804, 0 },
40144 		{ "HSS_Reset", 0, 1 },
40145 	{ "MAC_PORT_LED_CFG", 0x30808, 0 },
40155 		{ "Led0_Polarity_Inv", 0, 1 },
40156 	{ "MAC_PORT_LED_COUNTHI", 0x3080c, 0 },
40157 	{ "MAC_PORT_LED_COUNTLO", 0x30810, 0 },
40158 	{ "MAC_PORT_CFG3", 0x30814, 0 },
40173 		{ "HSSC16C20SEL", 0, 4 },
40174 	{ "MAC_PORT_CFG2", 0x30818, 0 },
40183 		{ "T5_AEC_PMA_RX_READY", 0, 4 },
40184 	{ "MAC_PORT_PKT_COUNT", 0x3081c, 0 },
40188 		{ "rx_eop_count", 0, 8 },
40189 	{ "MAC_PORT_CFG4", 0x30820, 0 },
40197 		{ "AEC0_TX_WIDTH", 0, 2 },
40198 	{ "MAC_PORT_MAGIC_MACID_LO", 0x30824, 0 },
40199 	{ "MAC_PORT_MAGIC_MACID_HI", 0x30828, 0 },
40200 	{ "MAC_PORT_MTIP_RESET_CTRL", 0x3082c, 0 },
40232 		{ "xgmii_clk_reset", 0, 1 },
40233 	{ "MAC_PORT_MTIP_GATE_CTRL", 0x30830, 0 },
40265 		{ "an_clk_enable", 0, 1 },
40266 	{ "MAC_PORT_LINK_STATUS", 0x30834, 0 },
40274 		{ "linkdn", 0, 1 },
40275 	{ "MAC_PORT_AEC_ADD_CTL_STAT_0", 0x30838, 0 },
40283 		{ "AEC_SYS_LANE_SELECT_O", 0, 2 },
40284 	{ "MAC_PORT_AEC_ADD_CTL_STAT_1", 0x3083c, 0 },
40292 		{ "AEC_RX_LANE_ID_O", 0, 2 },
40293 	{ "MAC_PORT_AEC_XGMII_TIMER_LO_40G", 0x30840, 0 },
40294 	{ "MAC_PORT_AEC_XGMII_TIMER_HI_40G", 0x30844, 0 },
40295 	{ "MAC_PORT_AEC_XGMII_TIMER_LO_100G", 0x30848, 0 },
40296 	{ "MAC_PORT_AEC_XGMII_TIMER_HI_100G", 0x3084c, 0 },
40297 	{ "MAC_PORT_AEC_DEBUG_LO_0", 0x30850, 0 },
40313 		{ "REG_MAN_DEC_REQ", 0, 1 },
40314 	{ "MAC_PORT_AEC_DEBUG_HI_0", 0x30854, 0 },
40319 		{ "LCK_FSM_CUR_STATE", 0, 3 },
40320 	{ "MAC_PORT_AEC_DEBUG_LO_1", 0x30858, 0 },
40336 		{ "REG_MAN_DEC_REQ", 0, 1 },
40337 	{ "MAC_PORT_AEC_DEBUG_HI_1", 0x3085c, 0 },
40342 		{ "LCK_FSM_CUR_STATE", 0, 3 },
40343 	{ "MAC_PORT_AEC_DEBUG_LO_2", 0x30860, 0 },
40359 		{ "REG_MAN_DEC_REQ", 0, 1 },
40360 	{ "MAC_PORT_AEC_DEBUG_HI_2", 0x30864, 0 },
40365 		{ "LCK_FSM_CUR_STATE", 0, 3 },
40366 	{ "MAC_PORT_AEC_DEBUG_LO_3", 0x30868, 0 },
40382 		{ "REG_MAN_DEC_REQ", 0, 1 },
40383 	{ "MAC_PORT_AEC_DEBUG_HI_3", 0x3086c, 0 },
40388 		{ "LCK_FSM_CUR_STATE", 0, 3 },
40389 	{ "MAC_PORT_MAC_DEBUG_RO", 0x30870, 0 },
40402 		{ "mac1g10g_tx_underflow", 0, 1 },
40403 	{ "MAC_PORT_MAC_CTRL_RW", 0x30874, 0 },
40413 		{ "mac1g_loop_bck", 0, 1 },
40414 	{ "MAC_PORT_PCS_DEBUG0_RO", 0x30878, 0 },
40433 		{ "sgmii_sg_speed", 0, 2 },
40434 	{ "MAC_PORT_PCS_CTRL_RW", 0x3087c, 0 },
40445 		{ "sgmii_tx_lane_thresh", 0, 4 },
40446 	{ "MAC_PORT_PCS_DEBUG1_RO", 0x30880, 0 },
40449 		{ "pcs100g_block_lock", 0, 20 },
40450 	{ "MAC_PORT_PERR_INT_EN_100G", 0x30884, 0 },
40480 		{ "Perr_rx0_pcs100g", 0, 1 },
40481 	{ "MAC_PORT_PERR_INT_CAUSE_100G", 0x30888, 0 },
40511 		{ "Perr_rx0_pcs100g", 0, 1 },
40512 	{ "MAC_PORT_PERR_ENABLE_100G", 0x3088c, 0 },
40542 		{ "Perr_rx0_pcs100g", 0, 1 },
40543 	{ "MAC_PORT_MAC_STAT_DEBUG", 0x30890, 0 },
40544 	{ "MAC_PORT_MAC_25G_50G_AM0", 0x30894, 0 },
40545 	{ "MAC_PORT_MAC_25G_50G_AM1", 0x30898, 0 },
40546 	{ "MAC_PORT_MAC_25G_50G_AM2", 0x3089c, 0 },
40547 	{ "MAC_PORT_MAC_25G_50G_AM3", 0x308a0, 0 },
40548 	{ "MAC_PORT_MAC_AN_STATE_STATUS", 0x308a4, 0 },
40549 	{ "MAC_PORT_EPIO_DATA0", 0x308c0, 0 },
40550 	{ "MAC_PORT_EPIO_DATA1", 0x308c4, 0 },
40551 	{ "MAC_PORT_EPIO_DATA2", 0x308c8, 0 },
40552 	{ "MAC_PORT_EPIO_DATA3", 0x308cc, 0 },
40553 	{ "MAC_PORT_EPIO_OP", 0x308d0, 0 },
40556 		{ "Address", 0, 8 },
40557 	{ "MAC_PORT_WOL_STATUS", 0x308d4, 0 },
40562 		{ "MatchedFilter", 0, 3 },
40563 	{ "MAC_PORT_INT_EN", 0x308d8, 0 },
40586 		{ "RxFifo_prty_err", 0, 1 },
40587 	{ "MAC_PORT_INT_CAUSE", 0x308dc, 0 },
40610 		{ "RxFifo_prty_err", 0, 1 },
40611 	{ "MAC_PORT_PERR_INT_EN", 0x308e0, 0 },
40643 		{ "Perr_tx_pcs1g", 0, 1 },
40644 	{ "MAC_PORT_PERR_INT_CAUSE", 0x308e4, 0 },
40676 		{ "Perr_tx_pcs1g", 0, 1 },
40677 	{ "MAC_PORT_PERR_ENABLE", 0x308e8, 0 },
40709 		{ "Perr_tx_pcs1g", 0, 1 },
40710 	{ "MAC_PORT_PERR_INJECT", 0x308ec, 0 },
40712 		{ "InjectDataErr", 0, 1 },
40713 	{ "MAC_PORT_HSS_CFG0", 0x308f0, 0 },
40739 	{ "MAC_PORT_HSS_CFG1", 0x308f4, 0 },
40763 		{ "TXDREFRESH", 0, 1 },
40764 	{ "MAC_PORT_HSS_CFG2", 0x308f8, 0 },
40796 		{ "RXAPHSUPIN", 0, 1 },
40797 	{ "MAC_PORT_HSS_CFG3", 0x308fc, 0 },
40801 		{ "HSSPLLCONFIGA", 0, 8 },
40802 	{ "MAC_PORT_HSS_CFG4", 0x30900, 0 },
40808 		{ "HSSDIVSELB", 0, 9 },
40809 	{ "MAC_PORT_HSS_STATUS", 0x30904, 0 },
40829 		{ "HSSPRTREADYA", 0, 1 },
40830 	{ "MAC_PORT_HSS_EEE_STATUS", 0x30908, 0 },
40846 		{ "TXDREFRESH_STATUS", 0, 1 },
40847 	{ "MAC_PORT_HSS_SIGDET_STATUS", 0x3090c, 0 },
40848 	{ "MAC_PORT_HSS_PL_CTL", 0x30910, 0 },
40851 		{ "IPW", 0, 8 },
40852 	{ "MAC_PORT_RUNT_FRAME", 0x30914, 0 },
40854 		{ "runt", 0, 16 },
40855 	{ "MAC_PORT_EEE_STATUS", 0x30918, 0 },
40863 		{ "pma_tx_quiet", 0, 1 },
40864 	{ "MAC_PORT_CGEN", 0x3091c, 0 },
40873 		{ "sd0_CGEN", 0, 1 },
40874 	{ "MAC_PORT_CGEN_MTIP", 0x30920, 0 },
40886 		{ "PCSSEG0_CGEN", 0, 1 },
40887 	{ "MAC_PORT_TX_TS_ID", 0x30924, 0 },
40888 	{ "MAC_PORT_TX_TS_VAL_LO", 0x30928, 0 },
40889 	{ "MAC_PORT_TX_TS_VAL_HI", 0x3092c, 0 },
40890 	{ "MAC_PORT_EEE_CTL", 0x30930, 0 },
40893 		{ "En", 0, 1 },
40894 	{ "MAC_PORT_EEE_TX_CTL", 0x30934, 0 },
40901 		{ "EEE_TX_RESET", 0, 1 },
40902 	{ "MAC_PORT_EEE_RX_CTL", 0x30938, 0 },
40907 		{ "EEE_RX_RESET", 0, 1 },
40908 	{ "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x3093c, 0 },
40909 	{ "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x30940, 0 },
40910 	{ "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x30944, 0 },
40911 	{ "MAC_PORT_EEE_TX_1G_SLEEP_TIMER", 0x30948, 0 },
40912 	{ "MAC_PORT_EEE_TX_1G_QUIET_TIMER", 0x3094c, 0 },
40913 	{ "MAC_PORT_EEE_TX_1G_REFRESH_TIMER", 0x30950, 0 },
40914 	{ "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x30954, 0 },
40915 	{ "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x30958, 0 },
40916 	{ "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x3095c, 0 },
40917 	{ "MAC_PORT_EEE_RX_1G_QUIET_TIMER", 0x30960, 0 },
40918 	{ "MAC_PORT_EEE_RX_1G_WAKE_TIMER", 0x30964, 0 },
40919 	{ "MAC_PORT_EEE_WF_COUNT", 0x30968, 0 },
40921 		{ "wake_cnt", 0, 16 },
40922 	{ "MAC_PORT_PTP_TIMER_RD0_LO", 0x3096c, 0 },
40923 	{ "MAC_PORT_PTP_TIMER_RD0_HI", 0x30970, 0 },
40924 	{ "MAC_PORT_PTP_TIMER_RD1_LO", 0x30974, 0 },
40925 	{ "MAC_PORT_PTP_TIMER_RD1_HI", 0x30978, 0 },
40926 	{ "MAC_PORT_PTP_TIMER_WR_LO", 0x3097c, 0 },
40927 	{ "MAC_PORT_PTP_TIMER_WR_HI", 0x30980, 0 },
40928 	{ "MAC_PORT_PTP_TIMER_OFFSET_0", 0x30984, 0 },
40929 	{ "MAC_PORT_PTP_TIMER_OFFSET_1", 0x30988, 0 },
40930 	{ "MAC_PORT_PTP_TIMER_OFFSET_2", 0x3098c, 0 },
40931 	{ "MAC_PORT_PTP_SUM_LO", 0x30990, 0 },
40932 	{ "MAC_PORT_PTP_SUM_HI", 0x30994, 0 },
40933 	{ "MAC_PORT_PTP_TIMER_INCR0", 0x30998, 0 },
40935 		{ "X", 0, 16 },
40936 	{ "MAC_PORT_PTP_TIMER_INCR1", 0x3099c, 0 },
40938 		{ "X_TICK", 0, 16 },
40939 	{ "MAC_PORT_PTP_DRIFT_ADJUST_COUNT", 0x309a0, 0 },
40940 	{ "MAC_PORT_PTP_OFFSET_ADJUST_FINE", 0x309a4, 0 },
40942 		{ "A", 0, 16 },
40943 	{ "MAC_PORT_PTP_OFFSET_ADJUST_TOTAL", 0x309a8, 0 },
40944 	{ "MAC_PORT_PTP_CFG", 0x309ac, 0 },
40952 		{ "Q", 0, 8 },
40953 	{ "MAC_PORT_PTP_PPS", 0x309b0, 0 },
40954 	{ "MAC_PORT_PTP_SINGLE_ALARM", 0x309b4, 0 },
40955 	{ "MAC_PORT_PTP_PERIODIC_ALARM", 0x309b8, 0 },
40956 	{ "MAC_PORT_PTP_STATUS", 0x309bc, 0 },
40957 	{ "MAC_PORT_MTIP_REVISION", 0x30a00, 0 },
40960 		{ "REV", 0, 8 },
40961 	{ "MAC_PORT_MTIP_SCRATCH", 0x30a04, 0 },
40962 	{ "MAC_PORT_MTIP_COMMAND_CONFIG", 0x30a08, 0 },
40984 		{ "TX_ENA", 0, 1 },
40985 	{ "MAC_PORT_MTIP_MAC_ADDR_0", 0x30a0c, 0 },
40986 	{ "MAC_PORT_MTIP_MAC_ADDR_1", 0x30a10, 0 },
40987 	{ "MAC_PORT_MTIP_FRM_LENGTH", 0x30a14, 0 },
40988 	{ "MAC_PORT_MTIP_RX_FIFO_SECTIONS", 0x30a1c, 0 },
40990 		{ "EMPTY", 0, 16 },
40991 	{ "MAC_PORT_MTIP_TX_FIFO_SECTIONS", 0x30a20, 0 },
40993 		{ "EMPTY", 0, 16 },
40994 	{ "MAC_PORT_MTIP_RX_FIFO_ALMOST_F_E", 0x30a24, 0 },
40996 		{ "AlmstEmpty", 0, 16 },
40997 	{ "MAC_PORT_MTIP_TX_FIFO_ALMOST_F_E", 0x30a28, 0 },
40999 		{ "AlmstEmpty", 0, 16 },
41000 	{ "MAC_PORT_MTIP_HASHTABLE_LOAD", 0x30a2c, 0 },
41002 		{ "ADDR", 0, 6 },
41003 	{ "MAC_PORT_MTIP_MAC_STATUS", 0x30a40, 0 },
41007 		{ "RX_LOC_FAULT", 0, 1 },
41008 	{ "MAC_PORT_MTIP_TX_IPG_LENGTH", 0x30a44, 0 },
41009 	{ "MAC_PORT_MTIP_MAC_CREDIT_TRIGGER", 0x30a48, 0 },
41010 	{ "MAC_PORT_MTIP_INIT_CREDIT", 0x30a4c, 0 },
41011 	{ "MAC_PORT_MTIP_CURRENT_CREDIT", 0x30a50, 0 },
41012 	{ "MAC_PORT_RX_PAUSE_STATUS", 0x30a74, 0 },
41013 	{ "MAC_PORT_MTIP_TS_TIMESTAMP", 0x30a7c, 0 },
41014 	{ "MAC_PORT_AFRAMESTRANSMITTEDOK", 0x30a80, 0 },
41015 	{ "MAC_PORT_AFRAMESTRANSMITTEDOKHI", 0x30a84, 0 },
41016 	{ "MAC_PORT_AFRAMESRECEIVEDOK", 0x30a88, 0 },
41017 	{ "MAC_PORT_AFRAMESRECEIVEDOKHI", 0x30a8c, 0 },
41018 	{ "MAC_PORT_AFRAMECHECKSEQUENCEERRORS", 0x30a90, 0 },
41019 	{ "MAC_PORT_AFRAMECHECKSEQUENCEERRORSHI", 0x30a94, 0 },
41020 	{ "MAC_PORT_AALIGNMENTERRORS", 0x30a98, 0 },
41021 	{ "MAC_PORT_AALIGNMENTERRORSHI", 0x30a9c, 0 },
41022 	{ "MAC_PORT_APAUSEMACCTRLFRAMESTRANSMITTED", 0x30aa0, 0 },
41023 	{ "MAC_PORT_APAUSEMACCTRLFRAMESTRANSMITTEDHI", 0x30aa4, 0 },
41024 	{ "MAC_PORT_APAUSEMACCTRLFRAMESRECEIVED", 0x30aa8, 0 },
41025 	{ "MAC_PORT_APAUSEMACCTRLFRAMESRECEIVEDHI", 0x30aac, 0 },
41026 	{ "MAC_PORT_AFRAMETOOLONGERRORS", 0x30ab0, 0 },
41027 	{ "MAC_PORT_AFRAMETOOLONGERRORSHI", 0x30ab4, 0 },
41028 	{ "MAC_PORT_AINRANGELENGTHERRORS", 0x30ab8, 0 },
41029 	{ "MAC_PORT_AINRANGELENGTHERRORSHI", 0x30abc, 0 },
41030 	{ "MAC_PORT_VLANTRANSMITTEDOK", 0x30ac0, 0 },
41031 	{ "MAC_PORT_VLANTRANSMITTEDOKHI", 0x30ac4, 0 },
41032 	{ "MAC_PORT_VLANRECEIVEDOK", 0x30ac8, 0 },
41033 	{ "MAC_PORT_VLANRECEIVEDOKHI", 0x30acc, 0 },
41034 	{ "MAC_PORT_AOCTETSTRANSMITTEDOK", 0x30ad0, 0 },
41035 	{ "MAC_PORT_AOCTETSTRANSMITTEDOKHI", 0x30ad4, 0 },
41036 	{ "MAC_PORT_AOCTETSRECEIVEDOK", 0x30ad8, 0 },
41037 	{ "MAC_PORT_AOCTETSRECEIVEDOKHI", 0x30adc, 0 },
41038 	{ "MAC_PORT_IFINUCASTPKTS", 0x30ae0, 0 },
41039 	{ "MAC_PORT_IFINUCASTPKTSHI", 0x30ae4, 0 },
41040 	{ "MAC_PORT_IFINMULTICASTPKTS", 0x30ae8, 0 },
41041 	{ "MAC_PORT_IFINMULTICASTPKTSHI", 0x30aec, 0 },
41042 	{ "MAC_PORT_IFINBROADCASTPKTS", 0x30af0, 0 },
41043 	{ "MAC_PORT_IFINBROADCASTPKTSHI", 0x30af4, 0 },
41044 	{ "MAC_PORT_IFOUTERRORS", 0x30af8, 0 },
41045 	{ "MAC_PORT_IFOUTERRORSHI", 0x30afc, 0 },
41046 	{ "MAC_PORT_IFOUTUCASTPKTS", 0x30b08, 0 },
41047 	{ "MAC_PORT_IFOUTUCASTPKTSHI", 0x30b0c, 0 },
41048 	{ "MAC_PORT_IFOUTMULTICASTPKTS", 0x30b10, 0 },
41049 	{ "MAC_PORT_IFOUTMULTICASTPKTSHI", 0x30b14, 0 },
41050 	{ "MAC_PORT_IFOUTBROADCASTPKTS", 0x30b18, 0 },
41051 	{ "MAC_PORT_IFOUTBROADCASTPKTSHI", 0x30b1c, 0 },
41052 	{ "MAC_PORT_ETHERSTATSDROPEVENTS", 0x30b20, 0 },
41053 	{ "MAC_PORT_ETHERSTATSDROPEVENTSHI", 0x30b24, 0 },
41054 	{ "MAC_PORT_ETHERSTATSOCTETS", 0x30b28, 0 },
41055 	{ "MAC_PORT_ETHERSTATSOCTETSHI", 0x30b2c, 0 },
41056 	{ "MAC_PORT_ETHERSTATSPKTS", 0x30b30, 0 },
41057 	{ "MAC_PORT_ETHERSTATSPKTSHI", 0x30b34, 0 },
41058 	{ "MAC_PORT_ETHERSTATSUNDERSIZEPKTS", 0x30b38, 0 },
41059 	{ "MAC_PORT_ETHERSTATSUNDERSIZEPKTSHI", 0x30b3c, 0 },
41060 	{ "MAC_PORT_ETHERSTATSPKTS64OCTETS", 0x30b40, 0 },
41061 	{ "MAC_PORT_ETHERSTATSPKTS64OCTETSHI", 0x30b44, 0 },
41062 	{ "MAC_PORT_ETHERSTATSPKTS65TO127OCTETS", 0x30b48, 0 },
41063 	{ "MAC_PORT_ETHERSTATSPKTS65TO127OCTETSHI", 0x30b4c, 0 },
41064 	{ "MAC_PORT_ETHERSTATSPKTS128TO255OCTETS", 0x30b50, 0 },
41065 	{ "MAC_PORT_ETHERSTATSPKTS128TO255OCTETSHI", 0x30b54, 0 },
41066 	{ "MAC_PORT_ETHERSTATSPKTS256TO511OCTETS", 0x30b58, 0 },
41067 	{ "MAC_PORT_ETHERSTATSPKTS256TO511OCTETSHI", 0x30b5c, 0 },
41068 	{ "MAC_PORT_ETHERSTATSPKTS512TO1023OCTETS", 0x30b60, 0 },
41069 	{ "MAC_PORT_ETHERSTATSPKTS512TO1023OCTETSHI", 0x30b64, 0 },
41070 	{ "MAC_PORT_ETHERSTATSPKTS1024TO1518OCTETS", 0x30b68, 0 },
41071 	{ "MAC_PORT_ETHERSTATSPKTS1024TO1518OCTETSHI", 0x30b6c, 0 },
41072 	{ "MAC_PORT_ETHERSTATSPKTS1519TOMAXOCTETS", 0x30b70, 0 },
41073 	{ "MAC_PORT_ETHERSTATSPKTS1519TOMAXOCTETSHI", 0x30b74, 0 },
41074 	{ "MAC_PORT_ETHERSTATSOVERSIZEPKTS", 0x30b78, 0 },
41075 	{ "MAC_PORT_ETHERSTATSOVERSIZEPKTSHI", 0x30b7c, 0 },
41076 	{ "MAC_PORT_ETHERSTATSJABBERS", 0x30b80, 0 },
41077 	{ "MAC_PORT_ETHERSTATSJABBERSHI", 0x30b84, 0 },
41078 	{ "MAC_PORT_ETHERSTATSFRAGMENTS", 0x30b88, 0 },
41079 	{ "MAC_PORT_ETHERSTATSFRAGMENTSHI", 0x30b8c, 0 },
41080 	{ "MAC_PORT_IFINERRORS", 0x30b90, 0 },
41081 	{ "MAC_PORT_IFINERRORSHI", 0x30b94, 0 },
41082 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_0", 0x30b98, 0 },
41083 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_0HI", 0x30b9c, 0 },
41084 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_1", 0x30ba0, 0 },
41085 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_1HI", 0x30ba4, 0 },
41086 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_2", 0x30ba8, 0 },
41087 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_2HI", 0x30bac, 0 },
41088 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_3", 0x30bb0, 0 },
41089 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_3HI", 0x30bb4, 0 },
41090 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_4", 0x30bb8, 0 },
41091 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_4HI", 0x30bbc, 0 },
41092 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_5", 0x30bc0, 0 },
41093 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_5HI", 0x30bc4, 0 },
41094 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_6", 0x30bc8, 0 },
41095 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_6HI", 0x30bcc, 0 },
41096 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_7", 0x30bd0, 0 },
41097 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_7HI", 0x30bd4, 0 },
41098 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_0", 0x30bd8, 0 },
41099 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_0HI", 0x30bdc, 0 },
41100 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_1", 0x30be0, 0 },
41101 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_1HI", 0x30be4, 0 },
41102 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_2", 0x30be8, 0 },
41103 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_2HI", 0x30bec, 0 },
41104 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_3", 0x30bf0, 0 },
41105 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_3HI", 0x30bf4, 0 },
41106 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_4", 0x30bf8, 0 },
41107 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_4HI", 0x30bfc, 0 },
41108 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_5", 0x30c00, 0 },
41109 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_5HI", 0x30c04, 0 },
41110 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_6", 0x30c08, 0 },
41111 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_6HI", 0x30c0c, 0 },
41112 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_7", 0x30c10, 0 },
41113 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_7HI", 0x30c14, 0 },
41114 	{ "MAC_PORT_AMACCONTROLFRAMESTRANSMITTED", 0x30c18, 0 },
41115 	{ "MAC_PORT_AMACCONTROLFRAMESTRANSMITTEDHI", 0x30c1c, 0 },
41116 	{ "MAC_PORT_AMACCONTROLFRAMESRECEIVED", 0x30c20, 0 },
41117 	{ "MAC_PORT_AMACCONTROLFRAMESRECEIVEDHI", 0x30c24, 0 },
41118 	{ "MAC_PORT_MTIP_1G10G_REVISION", 0x30d00, 0 },
41121 		{ "REV", 0, 8 },
41122 	{ "MAC_PORT_MTIP_1G10G_SCRATCH", 0x30d04, 0 },
41123 	{ "MAC_PORT_MTIP_1G10G_COMMAND_CONFIG", 0x30d08, 0 },
41148 		{ "TX_ENAMAC", 0, 1 },
41149 	{ "MAC_PORT_MTIP_1G10G_MAC_ADDR_0", 0x30d0c, 0 },
41150 	{ "MAC_PORT_MTIP_1G10G_MAC_ADDR_1", 0x30d10, 0 },
41151 	{ "MAC_PORT_MTIP_1G10G_FRM_LENGTH_TX_MTU", 0x30d14, 0 },
41153 		{ "FRM_LEN_SET", 0, 16 },
41154 	{ "MAC_PORT_MTIP_1G10G_RX_FIFO_SECTIONS", 0x30d1c, 0 },
41156 		{ "AVAIL", 0, 16 },
41157 	{ "MAC_PORT_MTIP_1G10G_TX_FIFO_SECTIONS", 0x30d20, 0 },
41159 		{ "AVAIL", 0, 16 },
41160 	{ "MAC_PORT_MTIP_1G10G_RX_FIFO_ALMOST_F_E", 0x30d24, 0 },
41162 		{ "AlmostEmpty", 0, 16 },
41163 	{ "MAC_PORT_MTIP_1G10G_TX_FIFO_ALMOST_F_E", 0x30d28, 0 },
41165 		{ "AlmostEmpty", 0, 16 },
41166 	{ "MAC_PORT_MTIP_1G10G_HASHTABLE_LOAD", 0x30d2c, 0 },
41167 	{ "MAC_PORT_MTIP_1G10G_MDIO_CFG_STATUS", 0x30d30, 0 },
41173 		{ "MDIO_Busy", 0, 1 },
41174 	{ "MAC_PORT_MTIP_1G10G_MDIO_COMMAND", 0x30d34, 0 },
41178 		{ "Device_Reg_Addr", 0, 5 },
41179 	{ "MAC_PORT_MTIP_1G10G_MDIO_DATA", 0x30d38, 0 },
41180 	{ "MAC_PORT_MTIP_1G10G_MDIO_REGADDR", 0x30d3c, 0 },
41181 	{ "MAC_PORT_MTIP_1G10G_STATUS", 0x30d40, 0 },
41189 		{ "RX_LOC_FAULT", 0, 1 },
41190 	{ "MAC_PORT_MTIP_1G10G_TX_IPG_LENGTH", 0x30d44, 0 },
41191 	{ "MAC_PORT_MTIP_1G10G_CREDIT_TRIGGER", 0x30d48, 0 },
41192 	{ "MAC_PORT_MTIP_1G10G_INIT_CREDIT", 0x30d4c, 0 },
41193 	{ "MAC_PORT_MTIP_1G10G_CL01_PAUSE_QUANTA", 0x30d54, 0 },
41195 		{ "CL0_PAUSE_QUANTA", 0, 16 },
41196 	{ "MAC_PORT_MTIP_1G10G_CL23_PAUSE_QUANTA", 0x30d58, 0 },
41198 		{ "CL2_PAUSE_QUANTA", 0, 16 },
41199 	{ "MAC_PORT_MTIP_1G10G_CL45_PAUSE_QUANTA", 0x30d5c, 0 },
41201 		{ "CL4_PAUSE_QUANTA", 0, 16 },
41202 	{ "MAC_PORT_MTIP_1G10G_CL67_PAUSE_QUANTA", 0x30d60, 0 },
41204 		{ "CL6_PAUSE_QUANTA", 0, 16 },
41205 	{ "MAC_PORT_MTIP_1G10G_CL01_QUANTA_THRESH", 0x30d64, 0 },
41207 		{ "CL0_QUANTA_THRESH", 0, 16 },
41208 	{ "MAC_PORT_MTIP_1G10G_CL23_QUANTA_THRESH", 0x30d68, 0 },
41210 		{ "CL2_QUANTA_THRESH", 0, 16 },
41211 	{ "MAC_PORT_MTIP_1G10G_CL45_QUANTA_THRESH", 0x30d6c, 0 },
41213 		{ "CL4_QUANTA_THRESH", 0, 16 },
41214 	{ "MAC_PORT_MTIP_1G10G_CL67_QUANTA_THRESH", 0x30d70, 0 },
41216 		{ "CL6_QUANTA_THRESH", 0, 16 },
41217 	{ "MAC_PORT_MTIP_1G10G_RX_PAUSE_STATUS", 0x30d74, 0 },
41218 	{ "MAC_PORT_MTIP_1G10G_TS_TIMESTAMP", 0x30d7c, 0 },
41219 	{ "MAC_PORT_MTIP_1G10G_STATN_CONFIG", 0x30de0, 0 },
41222 		{ "SATURATE", 0, 1 },
41223 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOCTETS", 0x30e00, 0 },
41224 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOCTETSHI", 0x30e04, 0 },
41225 	{ "MAC_PORT_MTIP_1G10G_RX_OCTETSOK", 0x30e08, 0 },
41226 	{ "MAC_PORT_MTIP_1G10G_RX_OCTETSOKHI", 0x30e0c, 0 },
41227 	{ "MAC_PORT_MTIP_1G10G_RX_AALIGNMENTERRORS", 0x30e10, 0 },
41228 	{ "MAC_PORT_MTIP_1G10G_RX_AALIGNMENTERRORSHI", 0x30e14, 0 },
41229 	{ "MAC_PORT_MTIP_1G10G_RX_APAUSEMACCTRLFRAMES", 0x30e18, 0 },
41230 	{ "MAC_PORT_MTIP_1G10G_RX_APAUSEMACCTRLFRAMESHI", 0x30e1c, 0 },
41231 	{ "MAC_PORT_MTIP_1G10G_RX_FRAMESOK", 0x30e20, 0 },
41232 	{ "MAC_PORT_MTIP_1G10G_RX_FRAMESOKHI", 0x30e24, 0 },
41233 	{ "MAC_PORT_MTIP_1G10G_RX_CRCERRORS", 0x30e28, 0 },
41234 	{ "MAC_PORT_MTIP_1G10G_RX_CRCERRORSHI", 0x30e2c, 0 },
41235 	{ "MAC_PORT_MTIP_1G10G_RX_VLANOK", 0x30e30, 0 },
41236 	{ "MAC_PORT_MTIP_1G10G_RX_VLANOKHI", 0x30e34, 0 },
41237 	{ "MAC_PORT_MTIP_1G10G_RX_IFINERRORS", 0x30e38, 0 },
41238 	{ "MAC_PORT_MTIP_1G10G_RX_IFINERRORSHI", 0x30e3c, 0 },
41239 	{ "MAC_PORT_MTIP_1G10G_RX_IFINUCASTPKTS", 0x30e40, 0 },
41240 	{ "MAC_PORT_MTIP_1G10G_RX_IFINUCASTPKTSHI", 0x30e44, 0 },
41241 	{ "MAC_PORT_MTIP_1G10G_RX_IFINMULTICASTPKTS", 0x30e48, 0 },
41242 	{ "MAC_PORT_MTIP_1G10G_RX_IFINMULTICASTPKTSHI", 0x30e4c, 0 },
41243 	{ "MAC_PORT_MTIP_1G10G_RX_IFINBROADCASTPKTS", 0x30e50, 0 },
41244 	{ "MAC_PORT_MTIP_1G10G_RX_IFINBROADCASTPKTSHI", 0x30e54, 0 },
41245 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSDROPEVENTS", 0x30e58, 0 },
41246 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSDROPEVENTSHI", 0x30e5c, 0 },
41247 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS", 0x30e60, 0 },
41248 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTSHI", 0x30e64, 0 },
41249 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSUNDERSIZEPKTS", 0x30e68, 0 },
41250 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSUNDERSIZEPKTSHI", 0x30e6c, 0 },
41251 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS64OCTETS", 0x30e70, 0 },
41252 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS64OCTETSHI", 0x30e74, 0 },
41253 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS65TO127OCTETS", 0x30e78, 0 },
41254 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS65TO127OCTETSHI", 0x30e7c, 0 },
41255 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS128TO255OCTETS", 0x30e80, 0 },
41256 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS128TO255OCTETSHI", 0x30e84, 0 },
41257 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS256TO511OCTETS", 0x30e88, 0 },
41258 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS256TO511OCTETSHI", 0x30e8c, 0 },
41259 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS512TO1023OCTETS", 0x30e90, 0 },
41260 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS512TO1023OCTETSHI", 0x30e94, 0 },
41261 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1024TO1518OCTETS", 0x30e98, 0 },
41262 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1024TO1518OCTETSHI", 0x30e9c, 0 },
41263 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1519TOMAX", 0x30ea0, 0 },
41264 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1519TOMAXHI", 0x30ea4, 0 },
41265 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOVERSIZEPKTS", 0x30ea8, 0 },
41266 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOVERSIZEPKTSHI", 0x30eac, 0 },
41267 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSJABBERS", 0x30eb0, 0 },
41268 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSJABBERSHI", 0x30eb4, 0 },
41269 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSFRAGMENTS", 0x30eb8, 0 },
41270 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSFRAGMENTSHI", 0x30ebc, 0 },
41271 	{ "MAC_PORT_MTIP_1G10G_AMACCONTROLFRAMESRECEIVED", 0x30ec0, 0 },
41272 	{ "MAC_PORT_MTIP_1G10G_AMACCONTROLFRAMESRECEIVEDHI", 0x30ec4, 0 },
41273 	{ "MAC_PORT_MTIP_1G10G_RX_AFRAMETOOLONG", 0x30ec8, 0 },
41274 	{ "MAC_PORT_MTIP_1G10G_RX_AFRAMETOOLONGHI", 0x30ecc, 0 },
41275 	{ "MAC_PORT_MTIP_1G10G_RX_AINRANGELENGTHERRORS", 0x30ed0, 0 },
41276 	{ "MAC_PORT_MTIP_1G10G_RX_AINRANGELENGTHERRORSHI", 0x30ed4, 0 },
41277 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSOCTETS", 0x30f00, 0 },
41278 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSOCTETSHI", 0x30f04, 0 },
41279 	{ "MAC_PORT_MTIP_1G10G_TX_OCTETSOK", 0x30f08, 0 },
41280 	{ "MAC_PORT_MTIP_1G10G_TX_OCTETSOKHI", 0x30f0c, 0 },
41281 	{ "MAC_PORT_MTIP_1G10G_TX_AALIGNMENTERRORS", 0x30f10, 0 },
41282 	{ "MAC_PORT_MTIP_1G10G_TX_AALIGNMENTERRORSHI", 0x30f14, 0 },
41283 	{ "MAC_PORT_MTIP_1G10G_TX_APAUSEMACCTRLFRAMES", 0x30f18, 0 },
41284 	{ "MAC_PORT_MTIP_1G10G_TX_APAUSEMACCTRLFRAMESHI", 0x30f1c, 0 },
41285 	{ "MAC_PORT_MTIP_1G10G_TX_FRAMESOK", 0x30f20, 0 },
41286 	{ "MAC_PORT_MTIP_1G10G_TX_FRAMESOKHI", 0x30f24, 0 },
41287 	{ "MAC_PORT_MTIP_1G10G_TX_CRCERRORS", 0x30f28, 0 },
41288 	{ "MAC_PORT_MTIP_1G10G_TX_CRCERRORSHI", 0x30f2c, 0 },
41289 	{ "MAC_PORT_MTIP_1G10G_TX_VLANOK", 0x30f30, 0 },
41290 	{ "MAC_PORT_MTIP_1G10G_TX_VLANOKHI", 0x30f34, 0 },
41291 	{ "MAC_PORT_MTIP_1G10G_TX_IFOUTERRORS", 0x30f38, 0 },
41292 	{ "MAC_PORT_MTIP_1G10G_TX_IFOUTERRORSHI", 0x30f3c, 0 },
41293 	{ "MAC_PORT_MTIP_1G10G_TX_IFUCASTPKTS", 0x30f40, 0 },
41294 	{ "MAC_PORT_MTIP_1G10G_TX_IFUCASTPKTSHI", 0x30f44, 0 },
41295 	{ "MAC_PORT_MTIP_1G10G_TX_IFMULTICASTPKTS", 0x30f48, 0 },
41296 	{ "MAC_PORT_MTIP_1G10G_TX_IFMULTICASTPKTSHI", 0x30f4c, 0 },
41297 	{ "MAC_PORT_MTIP_1G10G_TX_IFBROADCASTPKTS", 0x30f50, 0 },
41298 	{ "MAC_PORT_MTIP_1G10G_TX_IFBROADCASTPKTSHI", 0x30f54, 0 },
41299 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSDROPEVENTS", 0x30f58, 0 },
41300 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSDROPEVENTSHI", 0x30f5c, 0 },
41301 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS", 0x30f60, 0 },
41302 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTSHI", 0x30f64, 0 },
41303 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSUNDERSIZEPKTS", 0x30f68, 0 },
41304 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSUNDERSIZEPKTSHI", 0x30f6c, 0 },
41305 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS64OCTETS", 0x30f70, 0 },
41306 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS64OCTETSHI", 0x30f74, 0 },
41307 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS65TO127OCTETS", 0x30f78, 0 },
41308 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS65TO127OCTETSHI", 0x30f7c, 0 },
41309 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS128TO255OCTETS", 0x30f80, 0 },
41310 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS128TO255OCTETSHI", 0x30f84, 0 },
41311 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS256TO511OCTETS", 0x30f88, 0 },
41312 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS256TO511OCTETSHI", 0x30f8c, 0 },
41313 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS512TO1023OCTETS", 0x30f90, 0 },
41314 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS512TO1023OCTETSHI", 0x30f94, 0 },
41315 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS1024TO1518OCTETS", 0x30f98, 0 },
41316 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS1024TO1518OCTETSHI", 0x30f9c, 0 },
41317 	{ "MAC_PORT_MTIP_1G10G_ETHERSTATSPKTS1519TOTX_MTU", 0x30fa0, 0 },
41318 	{ "MAC_PORT_MTIP_1G10G_ETHERSTATSPKTS1519TOTX_MTUHI", 0x30fa4, 0 },
41319 	{ "MAC_PORT_MTIP_1G10G_TX_AMACCONTROLFRAMES", 0x30fc0, 0 },
41320 	{ "MAC_PORT_MTIP_1G10G_TX_AMACCONTROLFRAMESHI", 0x30fc4, 0 },
41321 	{ "MAC_PORT_MTIP_1G10G_IF_MODE", 0x31000, 0 },
41323 		{ "IF_MODE", 0, 2 },
41324 	{ "MAC_PORT_MTIP_1G10G_IF_STATUS", 0x31004, 0 },
41325 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_0", 0x31080, 0 },
41326 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_0HI", 0x31084, 0 },
41327 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_1", 0x31088, 0 },
41328 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_1HI", 0x3108c, 0 },
41329 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_2", 0x31090, 0 },
41330 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_2HI", 0x31094, 0 },
41331 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_3", 0x31098, 0 },
41332 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_3HI", 0x3109c, 0 },
41333 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_4", 0x310a0, 0 },
41334 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_4HI", 0x310a4, 0 },
41335 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_5", 0x310a8, 0 },
41336 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_5HI", 0x310ac, 0 },
41337 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_6", 0x310b0, 0 },
41338 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_6HI", 0x310b4, 0 },
41339 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_7", 0x310b8, 0 },
41340 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_7HI", 0x310bc, 0 },
41341 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_0", 0x310c0, 0 },
41342 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_0HI", 0x310c4, 0 },
41343 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_1", 0x310c8, 0 },
41344 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_1HI", 0x310cc, 0 },
41345 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_2", 0x310d0, 0 },
41346 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_2HI", 0x310d4, 0 },
41347 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_3", 0x310d8, 0 },
41348 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_3HI", 0x310dc, 0 },
41349 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_4", 0x310e0, 0 },
41350 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_4HI", 0x310e4, 0 },
41351 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_5", 0x310e8, 0 },
41352 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_5HI", 0x310ec, 0 },
41353 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_6", 0x310f0, 0 },
41354 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_6HI", 0x310f4, 0 },
41355 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_7", 0x310f8, 0 },
41356 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_7HI", 0x310fc, 0 },
41357 	{ "MAC_PORT_MTIP_SGMII_CONTROL", 0x31200, 0 },
41368 	{ "MAC_PORT_MTIP_SGMII_STATUS", 0x31204, 0 },
41382 		{ "ExtdCapability", 0, 1 },
41383 	{ "MAC_PORT_MTIP_SGMII_PHY_IDENTIFIER_0", 0x31208, 0 },
41384 	{ "MAC_PORT_MTIP_SGMII_PHY_IDENTIFIER_1", 0x3120c, 0 },
41385 	{ "MAC_PORT_MTIP_SGMII_DEV_ABILITY", 0x31210, 0 },
41394 	{ "MAC_PORT_MTIP_SGMII_PARTNER_ABILITY", 0x31214, 0 },
41399 	{ "MAC_PORT_MTIP_SGMII_AN_EXPANSION", 0x31218, 0 },
41402 	{ "MAC_PORT_MTIP_SGMII_NP_TX", 0x3121c, 0 },
41403 	{ "MAC_PORT_MTIP_SGMII_LP_NP_RX", 0x31220, 0 },
41404 	{ "MAC_PORT_MTIP_SGMII_EXTENDED_STATUS", 0x3123c, 0 },
41405 	{ "MAC_PORT_MTIP_SGMII_SCRATCH", 0x31240, 0 },
41406 	{ "MAC_PORT_MTIP_SGMII_REV", 0x31244, 0 },
41409 		{ "REV", 0, 8 },
41410 	{ "MAC_PORT_MTIP_SGMII_LINK_TIMER_LO", 0x31248, 0 },
41411 	{ "MAC_PORT_MTIP_SGMII_LINK_TIMER_HI", 0x3124c, 0 },
41412 	{ "MAC_PORT_MTIP_SGMII_IF_MODE", 0x31250, 0 },
41416 		{ "SGMII_ENA", 0, 1 },
41417 	{ "MAC_PORT_MTIP_SGMII_DECODE_ERROR", 0x31254, 0 },
41418 	{ "MAC_PORT_MTIP_KR_PCS_CONTROL_1", 0x31300, 0 },
41425 	{ "MAC_PORT_MTIP_KR_PCS_STATUS_1", 0x31304, 0 },
41433 	{ "MAC_PORT_MTIP_KR_PCS_DEVICE_IDENTIFIER_1", 0x31308, 0 },
41434 	{ "MAC_PORT_MTIP_KR_PCS_DEVICE_IDENTIFIER_2", 0x3130c, 0 },
41435 	{ "MAC_PORT_MTIP_KR_PCS_SPEED_ABILITY", 0x31310, 0 },
41436 	{ "MAC_PORT_MTIP_KR_PCS_DEVICES_IN_PACKAGELO", 0x31314, 0 },
41443 		{ "Clause_22_Reg_Present", 0, 1 },
41444 	{ "MAC_PORT_MTIP_KR_PCS_DEVICES_IN_PACKAGEHI", 0x31318, 0 },
41451 		{ "Clause_22_Reg_Present", 0, 1 },
41452 	{ "MAC_PORT_MTIP_KR_PCS_CONTROL_2", 0x3131c, 0 },
41453 	{ "MAC_PORT_MTIP_KR_PCS_STATUS_2", 0x31320, 0 },
41459 		{ "10GBASE_R_Capable", 0, 1 },
41460 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_PACKAGE_IDENTIFIER_LO", 0x31338, 0 },
41461 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_PACKAGE_IDENTIFIER_HI", 0x3133c, 0 },
41462 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_STATUS_1", 0x31380, 0 },
41467 		{ "10GBASE_R_PCS_Block_Lock", 0, 1 },
41468 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_STATUS_2", 0x31384, 0 },
41472 		{ "ErrBlkCnt", 0, 8 },
41473 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_0", 0x31388, 0 },
41474 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_1", 0x3138c, 0 },
41475 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_2", 0x31390, 0 },
41476 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_3", 0x31394, 0 },
41477 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_0", 0x31398, 0 },
41478 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_1", 0x3139c, 0 },
41479 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_2", 0x313a0, 0 },
41480 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_3", 0x313a4, 0 },
41481 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_CONTROL", 0x313a8, 0 },
41488 		{ "Data_Pattern_Select", 0, 1 },
41489 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_ERROR_COUNTER", 0x313ac, 0 },
41490 	{ "MAC_PORT_MTIP_KR_VENDOR_SPECIFIC_PCS_STATUS", 0x313b4, 0 },
41492 		{ "Receive_FIFO_Fault", 0, 1 },
41493 	{ "MAC_PORT_MTIP_KR4_CONTROL_1", 0x31400, 0 },
41500 	{ "MAC_PORT_MTIP_KR4_STATUS_1", 0x31404, 0 },
41504 	{ "MAC_PORT_MTIP_KR4_DEVICE_ID0", 0x31408, 0 },
41505 	{ "MAC_PORT_MTIP_KR4_DEVICE_ID1", 0x3140c, 0 },
41507 	{ "MAC_PORT_MTIP_KR4_SPEED_ABILITY", 0x31410, 0 },
41511 		{ "10G_capable", 0, 1 },
41512 	{ "MAC_PORT_MTIP_KR4_DEVICES_IN_PKG1", 0x31414, 0 },
41519 		{ "Clause_22_reg", 0, 1 },
41520 	{ "MAC_PORT_MTIP_KR4_DEVICES_IN_PKG2", 0x31418, 0 },
41524 	{ "MAC_PORT_MTIP_KR4_CONTROL_2", 0x3141c, 0 },
41525 	{ "MAC_PORT_MTIP_KR4_STATUS_2", 0x31420, 0 },
41534 		{ "10GBase_R_capable", 0, 1 },
41535 	{ "MAC_PORT_MTIP_KR4_PKG_ID0", 0x31438, 0 },
41536 	{ "MAC_PORT_MTIP_KR4_PKG_ID1", 0x3143c, 0 },
41537 	{ "MAC_PORT_MTIP_KR4_BASE_R_STATUS_1", 0x31480, 0 },
41540 		{ "Block_lock", 0, 1 },
41541 	{ "MAC_PORT_MTIP_KR4_BASE_R_STATUS_2", 0x31484, 0 },
41545 		{ "Err_bl_cnt", 0, 8 },
41546 	{ "MAC_PORT_MTIP_KR4_BASE_R_TEST_CONTROL", 0x314a8, 0 },
41549 	{ "MAC_PORT_MTIP_KR4_BASE_R_TEST_ERR_CNT", 0x314ac, 0 },
41550 	{ "MAC_PORT_MTIP_KR4_BER_HIGH_ORDER_CNT", 0x314b0, 0 },
41551 	{ "MAC_PORT_MTIP_KR4_ERR_BLK_HIGH_ORDER_CNT", 0x314b4, 0 },
41553 		{ "ERR_BLK_CNTR", 0, 14 },
41554 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_1", 0x314c8, 0 },
41559 		{ "LANE_0_BLK_LCK", 0, 1 },
41560 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_2", 0x314cc, 0 },
41561 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_3", 0x314d0, 0 },
41565 		{ "LANE_0_ALIGN_MRKR_LCK", 0, 1 },
41566 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_4", 0x314d4, 0 },
41567 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_0", 0x31720, 0 },
41568 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_1", 0x31724, 0 },
41569 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_2", 0x31728, 0 },
41570 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_3", 0x3172c, 0 },
41571 	{ "MAC_PORT_MTIP_KR4_LANE_0_MAPPING", 0x31a40, 0 },
41572 	{ "MAC_PORT_MTIP_KR4_LANE_1_MAPPING", 0x31a44, 0 },
41573 	{ "MAC_PORT_MTIP_KR4_LANE_2_MAPPING", 0x31a48, 0 },
41574 	{ "MAC_PORT_MTIP_KR4_LANE_3_MAPPING", 0x31a4c, 0 },
41575 	{ "MAC_PORT_MTIP_KR4_SCRATCH", 0x31af0, 0 },
41576 	{ "MAC_PORT_MTIP_KR4_CORE_REVISION", 0x31af4, 0 },
41577 	{ "MAC_PORT_MTIP_KR4_VL_INTVL", 0x31af8, 0 },
41578 	{ "MAC_PORT_MTIP_KR4_TX_LANE_THRESH", 0x31afc, 0 },
41579 	{ "MAC_PORT_MTIP_CR4_CONTROL_1", 0x31b00, 0 },
41586 	{ "MAC_PORT_MTIP_CR4_STATUS_1", 0x31b04, 0 },
41590 	{ "MAC_PORT_MTIP_CR4_DEVICE_ID0", 0x31b08, 0 },
41591 	{ "MAC_PORT_MTIP_CR4_DEVICE_ID1", 0x31b0c, 0 },
41592 	{ "MAC_PORT_MTIP_CR4_SPEED_ABILITY", 0x31b10, 0 },
41596 		{ "10G_capable", 0, 1 },
41597 	{ "MAC_PORT_MTIP_CR4_DEVICES_IN_PKG1", 0x31b14, 0 },
41604 		{ "Clause22reg_present", 0, 1 },
41605 	{ "MAC_PORT_MTIP_CR4_DEVICES_IN_PKG2", 0x31b18, 0 },
41609 	{ "MAC_PORT_MTIP_CR4_CONTROL_2", 0x31b1c, 0 },
41610 	{ "MAC_PORT_MTIP_CR4_STATUS_2", 0x31b20, 0 },
41619 		{ "10GBase_R_capable", 0, 1 },
41620 	{ "MAC_PORT_MTIP_CR4_PKG_ID0", 0x31b38, 0 },
41621 	{ "MAC_PORT_MTIP_CR4_PKG_ID1", 0x31b3c, 0 },
41622 	{ "MAC_PORT_MTIP_CR4_BASE_R_STATUS_1", 0x31b80, 0 },
41625 		{ "Block_Lock", 0, 1 },
41626 	{ "MAC_PORT_MTIP_CR4_BASE_R_STATUS_2", 0x31b84, 0 },
41630 		{ "Errored_blocks_cntr", 0, 8 },
41631 	{ "MAC_PORT_MTIP_CR4_BASE_R_TEST_CONTROL", 0x31ba8, 0 },
41633 	{ "MAC_PORT_MTIP_CR4_BASE_R_TEST_ERR_CNT", 0x31bac, 0 },
41634 	{ "MAC_PORT_MTIP_CR4_BER_HIGH_ORDER_CNT", 0x31bb0, 0 },
41635 	{ "MAC_PORT_MTIP_CR4_ERR_BLK_HIGH_ORDER_CNT", 0x31bb4, 0 },
41637 		{ "ERR_BLKS_CNTR", 0, 14 },
41638 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_1", 0x31bc8, 0 },
41647 		{ "Lane_0_blck_lck", 0, 1 },
41648 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_2", 0x31bcc, 0 },
41660 		{ "Lane_8_blck_lck", 0, 1 },
41661 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_3", 0x31bd0, 0 },
41669 		{ "Lane0_algn_mrkr_lck", 0, 1 },
41670 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_4", 0x31bd4, 0 },
41682 		{ "Lane8_algn_mrkr_lck", 0, 1 },
41683 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_0", 0x31e20, 0 },
41684 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_1", 0x31e24, 0 },
41685 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_2", 0x31e28, 0 },
41686 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_3", 0x31e2c, 0 },
41687 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_4", 0x31e30, 0 },
41688 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_5", 0x31e34, 0 },
41689 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_6", 0x31e38, 0 },
41690 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_7", 0x31e3c, 0 },
41691 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_8", 0x31e40, 0 },
41692 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_9", 0x31e44, 0 },
41693 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_10", 0x31e48, 0 },
41694 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_11", 0x31e4c, 0 },
41695 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_12", 0x31e50, 0 },
41696 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_13", 0x31e54, 0 },
41697 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_14", 0x31e58, 0 },
41698 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_15", 0x31e5c, 0 },
41699 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_16", 0x31e60, 0 },
41700 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_17", 0x31e64, 0 },
41701 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_18", 0x31e68, 0 },
41702 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_19", 0x31e6c, 0 },
41703 	{ "MAC_PORT_MTIP_CR4_LANE_0_MAPPING", 0x32140, 0 },
41704 	{ "MAC_PORT_MTIP_CR4_LANE_1_MAPPING", 0x32144, 0 },
41705 	{ "MAC_PORT_MTIP_CR4_LANE_2_MAPPING", 0x32148, 0 },
41706 	{ "MAC_PORT_MTIP_CR4_LANE_3_MAPPING", 0x3214c, 0 },
41707 	{ "MAC_PORT_MTIP_CR4_LANE_4_MAPPING", 0x32150, 0 },
41708 	{ "MAC_PORT_MTIP_CR4_LANE_5_MAPPING", 0x32154, 0 },
41709 	{ "MAC_PORT_MTIP_CR4_LANE_6_MAPPING", 0x32158, 0 },
41710 	{ "MAC_PORT_MTIP_CR4_LANE_7_MAPPING", 0x3215c, 0 },
41711 	{ "MAC_PORT_MTIP_CR4_LANE_8_MAPPING", 0x32160, 0 },
41712 	{ "MAC_PORT_MTIP_CR4_LANE_9_MAPPING", 0x32164, 0 },
41713 	{ "MAC_PORT_MTIP_CR4_LANE_10_MAPPING", 0x32168, 0 },
41714 	{ "MAC_PORT_MTIP_CR4_LANE_11_MAPPING", 0x3216c, 0 },
41715 	{ "MAC_PORT_MTIP_CR4_LANE_12_MAPPING", 0x32170, 0 },
41716 	{ "MAC_PORT_MTIP_CR4_LANE_13_MAPPING", 0x32174, 0 },
41717 	{ "MAC_PORT_MTIP_CR4_LANE_14_MAPPING", 0x32178, 0 },
41718 	{ "MAC_PORT_MTIP_CR4_LANE_15_MAPPING", 0x3217c, 0 },
41719 	{ "MAC_PORT_MTIP_CR4_LANE_16_MAPPING", 0x32180, 0 },
41720 	{ "MAC_PORT_MTIP_CR4_LANE_17_MAPPING", 0x32184, 0 },
41721 	{ "MAC_PORT_MTIP_CR4_LANE_18_MAPPING", 0x32188, 0 },
41722 	{ "MAC_PORT_MTIP_CR4_LANE_19_MAPPING", 0x3218c, 0 },
41723 	{ "MAC_PORT_MTIP_CR4_SCRATCH", 0x321f0, 0 },
41724 	{ "MAC_PORT_MTIP_CR4_CORE_REVISION", 0x321f4, 0 },
41725 	{ "MAC_PORT_MTIP_RS_FEC_CONTROL", 0x32200, 0 },
41727 		{ "RS_FEC_Bypass_Correction", 0, 1 },
41728 	{ "MAC_PORT_MTIP_RS_FEC_STATUS", 0x32204, 0 },
41733 		{ "RS_FEC_bypass_correction_ability", 0, 1 },
41734 	{ "MAC_PORT_MTIP_RS_FEC_CCW_LO", 0x32208, 0 },
41735 	{ "MAC_PORT_MTIP_RS_FEC_CCW_HI", 0x3220c, 0 },
41736 	{ "MAC_PORT_MTIP_RS_FEC_NCCW_LO", 0x32210, 0 },
41737 	{ "MAC_PORT_MTIP_RS_FEC_NCCW_HI", 0x32214, 0 },
41738 	{ "MAC_PORT_MTIP_RS_FEC_LANEMAPRS_FEC_NCCW_HI", 0x32218, 0 },
41739 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR0_LO", 0x32228, 0 },
41740 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR0_HI", 0x3222c, 0 },
41741 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR1_LO", 0x32230, 0 },
41742 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR1_HI", 0x32234, 0 },
41743 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR2_LO", 0x32238, 0 },
41744 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR2_HI", 0x3223c, 0 },
41745 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR3_LO", 0x32240, 0 },
41746 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR3_HI", 0x32244, 0 },
41747 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_CONTROL", 0x32400, 0 },
41750 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_INFO_1", 0x32404, 0 },
41759 		{ "amps_lock", 0, 4 },
41760 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_INFO_2", 0x32408, 0 },
41761 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_REVISION", 0x3240c, 0 },
41762 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_KEY", 0x32410, 0 },
41763 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_SYMBOLS", 0x32414, 0 },
41764 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_PATTERN", 0x32418, 0 },
41765 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_TRIGGER", 0x3241c, 0 },
41766 	{ "MAC_PORT_MTIP_FEC_ABILITY", 0x32618, 0 },
41768 		{ "BASE_R_FEC_Ability", 0, 1 },
41769 	{ "MAC_PORT_FEC_CONTROL", 0x3261c, 0 },
41771 		{ "fec_en", 0, 1 },
41772 	{ "MAC_PORT_FEC_STATUS", 0x32620, 0 },
41774 		{ "FEC_LOCKED", 0, 1 },
41775 	{ "MAC_PORT_MTIP_FEC0_CERR_CNT_0", 0x32624, 0 },
41776 	{ "MAC_PORT_MTIP_FEC0_CERR_CNT_1", 0x32628, 0 },
41777 	{ "MAC_PORT_MTIP_FEC0_NCERR_CNT_0", 0x3262c, 0 },
41778 	{ "MAC_PORT_MTIP_FEC0_NCERR_CNT_1", 0x32630, 0 },
41779 	{ "MAC_PORT_MTIP_FEC_STATUS1", 0x32664, 0 },
41781 		{ "FEC_LOCKED", 0, 1 },
41782 	{ "MAC_PORT_MTIP_FEC1_CERR_CNT_0", 0x32668, 0 },
41783 	{ "MAC_PORT_MTIP_FEC1_CERR_CNT_1", 0x3266c, 0 },
41784 	{ "MAC_PORT_MTIP_FEC1_NCERR_CNT_0", 0x32670, 0 },
41785 	{ "MAC_PORT_MTIP_FEC1_NCERR_CNT_1", 0x32674, 0 },
41786 	{ "MAC_PORT_MTIP_FEC_STATUS2", 0x326a8, 0 },
41788 		{ "FEC_LOCKED", 0, 1 },
41789 	{ "MAC_PORT_MTIP_FEC2_CERR_CNT_0", 0x326ac, 0 },
41790 	{ "MAC_PORT_MTIP_FEC2_CERR_CNT_1", 0x326b0, 0 },
41791 	{ "MAC_PORT_MTIP_FEC2_NCERR_CNT_0", 0x326b4, 0 },
41792 	{ "MAC_PORT_MTIP_FEC2_NCERR_CNT_1", 0x326b8, 0 },
41793 	{ "MAC_PORT_MTIP_FEC_STATUS3", 0x326ec, 0 },
41795 		{ "FEC_LOCKED", 0, 1 },
41796 	{ "MAC_PORT_MTIP_FEC3_CERR_CNT_0", 0x326f0, 0 },
41797 	{ "MAC_PORT_MTIP_FEC3_CERR_CNT_1", 0x326f4, 0 },
41798 	{ "MAC_PORT_MTIP_FEC3_NCERR_CNT_0", 0x326f8, 0 },
41799 	{ "MAC_PORT_MTIP_FEC3_NCERR_CNT_1", 0x326fc, 0 },
41800 	{ "MAC_PORT_BEAN_CTL", 0x32c00, 0 },
41805 	{ "MAC_PORT_BEAN_STATUS", 0x32c04, 0 },
41813 		{ "LP_BEAN_ABILITY", 0, 1 },
41814 	{ "MAC_PORT_BEAN_ABILITY_0", 0x32c08, 0 },
41820 		{ "SELECTOR", 0, 5 },
41821 	{ "MAC_PORT_BEAN_ABILITY_1", 0x32c0c, 0 },
41823 		{ "TX_NONCE", 0, 5 },
41824 	{ "MAC_PORT_BEAN_ABILITY_2", 0x32c10, 0 },
41826 		{ "TECH_ABILITY_2", 0, 14 },
41827 	{ "MAC_PORT_BEAN_REM_ABILITY_0", 0x32c14, 0 },
41833 		{ "SELECTOR", 0, 5 },
41834 	{ "MAC_PORT_BEAN_REM_ABILITY_1", 0x32c18, 0 },
41836 		{ "TX_NONCE", 0, 5 },
41837 	{ "MAC_PORT_BEAN_REM_ABILITY_2", 0x32c1c, 0 },
41839 		{ "TECH_ABILITY_2", 0, 14 },
41840 	{ "MAC_PORT_BEAN_MS_COUNT", 0x32c20, 0 },
41841 	{ "MAC_PORT_BEAN_XNP_0", 0x32c24, 0 },
41847 		{ "MU", 0, 11 },
41848 	{ "MAC_PORT_BEAN_XNP_1", 0x32c28, 0 },
41849 	{ "MAC_PORT_BEAN_XNP_2", 0x32c2c, 0 },
41850 	{ "MAC_PORT_LP_BEAN_XNP_0", 0x32c30, 0 },
41856 		{ "MU", 0, 11 },
41857 	{ "MAC_PORT_LP_BEAN_XNP_1", 0x32c34, 0 },
41858 	{ "MAC_PORT_LP_BEAN_XNP_2", 0x32c38, 0 },
41859 	{ "MAC_PORT_BEAN_ETH_STATUS", 0x32c3c, 0 },
41870 	{ "MAC_PORT_AE_RX_COEF_REQ", 0x32a00, 0 },
41876 		{ "T5_RXREQ_C0", 0, 2 },
41877 	{ "MAC_PORT_AE_RX_COEF_STAT", 0x32a04, 0 },
41885 		{ "T5_AE0_RXSTAT_C0", 0, 2 },
41886 	{ "MAC_PORT_AE_TX_COEF_REQ", 0x32a08, 0 },
41893 		{ "T5_TXREQ_C0", 0, 2 },
41894 	{ "MAC_PORT_AE_TX_COEF_STAT", 0x32a0c, 0 },
41899 		{ "T5_TXSTAT_C0", 0, 2 },
41900 	{ "MAC_PORT_AE_REG_MODE", 0x32a10, 0 },
41913 		{ "STICKY_MODE", 0, 1 },
41914 	{ "MAC_PORT_AE_PRBS_CTL", 0x32a14, 0 },
41921 		{ "PRBS_GEN_OFF", 0, 1 },
41922 	{ "MAC_PORT_AE_FSM_CTL", 0x32a18, 0 },
41934 		{ "FSM_TR_EN", 0, 1 },
41935 	{ "MAC_PORT_AE_FSM_STATE", 0x32a1c, 0 },
41940 		{ "TFSM_STATE", 0, 3 },
41941 	{ "MAC_PORT_AE_RX_COEF_REQ_1", 0x32a20, 0 },
41947 		{ "T5_RXREQ_C0", 0, 2 },
41948 	{ "MAC_PORT_AE_RX_COEF_STAT_1", 0x32a24, 0 },
41956 		{ "T5_AE1_RXSTAT_C0", 0, 2 },
41957 	{ "MAC_PORT_AE_TX_COEF_REQ_1", 0x32a28, 0 },
41964 		{ "T5_TXREQ_C0", 0, 2 },
41965 	{ "MAC_PORT_AE_TX_COEF_STAT_1", 0x32a2c, 0 },
41970 		{ "T5_TXSTAT_C0", 0, 2 },
41971 	{ "MAC_PORT_AE_REG_MODE_1", 0x32a30, 0 },
41984 		{ "STICKY_MODE", 0, 1 },
41985 	{ "MAC_PORT_AE_PRBS_CTL_1", 0x32a34, 0 },
41992 		{ "PRBS_GEN_OFF", 0, 1 },
41993 	{ "MAC_PORT_AE_FSM_CTL_1", 0x32a38, 0 },
42005 		{ "FSM_TR_EN", 0, 1 },
42006 	{ "MAC_PORT_AE_FSM_STATE_1", 0x32a3c, 0 },
42011 		{ "TFSM_STATE", 0, 3 },
42012 	{ "MAC_PORT_AE_RX_COEF_REQ_2", 0x32a40, 0 },
42018 		{ "T5_RXREQ_C0", 0, 2 },
42019 	{ "MAC_PORT_AE_RX_COEF_STAT_2", 0x32a44, 0 },
42027 		{ "T5_AE2_RXSTAT_C0", 0, 2 },
42028 	{ "MAC_PORT_AE_TX_COEF_REQ_2", 0x32a48, 0 },
42035 		{ "T5_TXREQ_C0", 0, 2 },
42036 	{ "MAC_PORT_AE_TX_COEF_STAT_2", 0x32a4c, 0 },
42041 		{ "T5_TXSTAT_C0", 0, 2 },
42042 	{ "MAC_PORT_AE_REG_MODE_2", 0x32a50, 0 },
42055 		{ "STICKY_MODE", 0, 1 },
42056 	{ "MAC_PORT_AE_PRBS_CTL_2", 0x32a54, 0 },
42063 		{ "PRBS_GEN_OFF", 0, 1 },
42064 	{ "MAC_PORT_AE_FSM_CTL_2", 0x32a58, 0 },
42076 		{ "FSM_TR_EN", 0, 1 },
42077 	{ "MAC_PORT_AE_FSM_STATE_2", 0x32a5c, 0 },
42082 		{ "TFSM_STATE", 0, 3 },
42083 	{ "MAC_PORT_AE_RX_COEF_REQ_3", 0x32a60, 0 },
42089 		{ "T5_RXREQ_C0", 0, 2 },
42090 	{ "MAC_PORT_AE_RX_COEF_STAT_3", 0x32a64, 0 },
42098 		{ "T5_AE3_RXSTAT_C0", 0, 2 },
42099 	{ "MAC_PORT_AE_TX_COEF_REQ_3", 0x32a68, 0 },
42106 		{ "T5_TXREQ_C0", 0, 2 },
42107 	{ "MAC_PORT_AE_TX_COEF_STAT_3", 0x32a6c, 0 },
42112 		{ "T5_TXSTAT_C0", 0, 2 },
42113 	{ "MAC_PORT_AE_REG_MODE_3", 0x32a70, 0 },
42126 		{ "STICKY_MODE", 0, 1 },
42127 	{ "MAC_PORT_AE_PRBS_CTL_3", 0x32a74, 0 },
42134 		{ "PRBS_GEN_OFF", 0, 1 },
42135 	{ "MAC_PORT_AE_FSM_CTL_3", 0x32a78, 0 },
42147 		{ "FSM_TR_EN", 0, 1 },
42148 	{ "MAC_PORT_AE_FSM_STATE_3", 0x32a7c, 0 },
42153 		{ "TFSM_STATE", 0, 3 },
42154 	{ "MAC_PORT_AE_TX_DIS", 0x32a80, 0 },
42155 	{ "MAC_PORT_AE_KR_CTRL", 0x32a84, 0 },
42157 		{ "Restart_Training", 0, 1 },
42158 	{ "MAC_PORT_AE_RX_SIGDET", 0x32a88, 0 },
42159 	{ "MAC_PORT_AE_KR_STATUS", 0x32a8c, 0 },
42163 		{ "RX_Trained", 0, 1 },
42164 	{ "MAC_PORT_AE_TX_DIS_1", 0x32a90, 0 },
42165 	{ "MAC_PORT_AE_KR_CTRL_1", 0x32a94, 0 },
42167 		{ "Restart_Training", 0, 1 },
42168 	{ "MAC_PORT_AE_RX_SIGDET_1", 0x32a98, 0 },
42169 	{ "MAC_PORT_AE_KR_STATUS_1", 0x32a9c, 0 },
42173 		{ "RX_Trained", 0, 1 },
42174 	{ "MAC_PORT_AE_TX_DIS_2", 0x32aa0, 0 },
42175 	{ "MAC_PORT_AE_KR_CTRL_2", 0x32aa4, 0 },
42177 		{ "Restart_Training", 0, 1 },
42178 	{ "MAC_PORT_AE_RX_SIGDET_2", 0x32aa8, 0 },
42179 	{ "MAC_PORT_AE_KR_STATUS_2", 0x32aac, 0 },
42183 		{ "RX_Trained", 0, 1 },
42184 	{ "MAC_PORT_AE_TX_DIS_3", 0x32ab0, 0 },
42185 	{ "MAC_PORT_AE_KR_CTRL_3", 0x32ab4, 0 },
42187 		{ "Restart_Training", 0, 1 },
42188 	{ "MAC_PORT_AE_RX_SIGDET_3", 0x32ab8, 0 },
42189 	{ "MAC_PORT_AE_KR_STATUS_3", 0x32abc, 0 },
42193 		{ "RX_Trained", 0, 1 },
42194 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_0", 0x32b00, 0 },
42201 		{ "H1TEQ_GOAL", 0, 3 },
42202 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_0", 0x32b04, 0 },
42210 		{ "AMIN_TH", 0, 4 },
42211 	{ "MAC_PORT_AET_ZFE_LIMITS_0", 0x32b08, 0 },
42214 		{ "TOG_LIM", 0, 4 },
42215 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_0", 0x32b0c, 0 },
42221 	{ "MAC_PORT_AET_STATUS_0", 0x32b10, 0 },
42224 		{ "CTRL_STATE", 0, 4 },
42225 	{ "MAC_PORT_AET_STATUS_20", 0x32b14, 0 },
42226 	{ "MAC_PORT_AET_LIMITS0", 0x32b18, 0 },
42227 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_1", 0x32b20, 0 },
42234 		{ "H1TEQ_GOAL", 0, 3 },
42235 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_1", 0x32b24, 0 },
42243 		{ "AMIN_TH", 0, 4 },
42244 	{ "MAC_PORT_AET_ZFE_LIMITS_1", 0x32b28, 0 },
42247 		{ "TOG_LIM", 0, 4 },
42248 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_1", 0x32b2c, 0 },
42254 	{ "MAC_PORT_AET_STATUS_1", 0x32b30, 0 },
42257 		{ "CTRL_STATE", 0, 4 },
42258 	{ "MAC_PORT_AET_STATUS_21", 0x32b34, 0 },
42259 	{ "MAC_PORT_AET_LIMITS1", 0x32b38, 0 },
42260 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_2", 0x32b40, 0 },
42267 		{ "H1TEQ_GOAL", 0, 3 },
42268 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_2", 0x32b44, 0 },
42276 		{ "AMIN_TH", 0, 4 },
42277 	{ "MAC_PORT_AET_ZFE_LIMITS_2", 0x32b48, 0 },
42280 		{ "TOG_LIM", 0, 4 },
42281 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_2", 0x32b4c, 0 },
42287 	{ "MAC_PORT_AET_STATUS_2", 0x32b50, 0 },
42290 		{ "CTRL_STATE", 0, 4 },
42291 	{ "MAC_PORT_AET_STATUS_22", 0x32b54, 0 },
42292 	{ "MAC_PORT_AET_LIMITS2", 0x32b58, 0 },
42293 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_3", 0x32b60, 0 },
42300 		{ "H1TEQ_GOAL", 0, 3 },
42301 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_3", 0x32b64, 0 },
42309 		{ "AMIN_TH", 0, 4 },
42310 	{ "MAC_PORT_AET_ZFE_LIMITS_3", 0x32b68, 0 },
42313 		{ "TOG_LIM", 0, 4 },
42314 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_3", 0x32b6c, 0 },
42320 	{ "MAC_PORT_AET_STATUS_3", 0x32b70, 0 },
42323 		{ "CTRL_STATE", 0, 4 },
42324 	{ "MAC_PORT_AET_STATUS_23", 0x32b74, 0 },
42325 	{ "MAC_PORT_AET_LIMITS3", 0x32b78, 0 },
42326 	{ "MAC_PORT_ANALOG_TEST_MUX", 0x33814, 0 },
42327 	{ "MAC_PORT_PLLREFSEL_CONTROL", 0x33854, 0 },
42328 	{ "MAC_PORT_REFISINK_CONTROL", 0x33858, 0 },
42329 	{ "MAC_PORT_REFISRC_CONTROL", 0x3385c, 0 },
42330 	{ "MAC_PORT_REFVREG_CONTROL", 0x33860, 0 },
42331 	{ "MAC_PORT_VBGENDOC_CONTROL", 0x33864, 0 },
42333 		{ "VBGENDOC", 0, 2 },
42334 	{ "MAC_PORT_VREFTUNE_CONTROL", 0x33868, 0 },
42335 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_CONTROL", 0x33880, 0 },
42339 		{ "RCAL_RESET", 0, 1 },
42340 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_STATUS_1", 0x33884, 0 },
42344 		{ "RCALCOMP", 0, 1 },
42345 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_STATUS_2", 0x33888, 0 },
42346 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_STATUS_3", 0x3388c, 0 },
42347 	{ "MAC_PORT_INEQUALITY_CONTROL_AND_RESULT", 0x338c0, 0 },
42353 		{ "INEQ", 0, 1 },
42354 	{ "MAC_PORT_INEQUALITY_LOW_LIMIT", 0x338c4, 0 },
42355 	{ "MAC_PORT_INEQUALITY_LOW_LIMIT_MASK", 0x338c8, 0 },
42356 	{ "MAC_PORT_INEQUALITY_HIGH_LIMIT", 0x338cc, 0 },
42357 	{ "MAC_PORT_INEQUALITY_HIGH_LIMIT_MASK", 0x338d0, 0 },
42358 	{ "MAC_PORT_MACRO_TEST_CONTROL_6", 0x338e8, 0 },
42362 		{ "HSSACJAC", 0, 1 },
42363 	{ "MAC_PORT_MACRO_TEST_CONTROL_5", 0x338ec, 0 },
42370 		{ "MACROTEST", 0, 1 },
42371 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_0", 0x33b00, 0 },
42372 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_1", 0x33b04, 0 },
42376 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_2", 0x33b08, 0 },
42377 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_3", 0x33b0c, 0 },
42381 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_4", 0x33b10, 0 },
42384 		{ "CCLD", 0, 1 },
42385 	{ "MAC_PORT_PLLA_POWER_CONTROL", 0x33b24, 0 },
42387 		{ "NPWRENA", 0, 1 },
42388 	{ "MAC_PORT_PLLA_CHARGE_PUMP_CONTROL", 0x33b28, 0 },
42389 	{ "MAC_PORT_PLLA_PLL_MICELLANEOUS_CONTROL", 0x33b38, 0 },
42390 	{ "MAC_PORT_PLLA_PCLK_CONTROL", 0x33b3c, 0 },
42392 		{ "PCKSEL", 0, 3 },
42393 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_CONTROL", 0x33b40, 0 },
42396 		{ "EMIS", 0, 1 },
42397 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_1", 0x33b44, 0 },
42398 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_2", 0x33b48, 0 },
42399 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_3", 0x33b4c, 0 },
42400 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_4", 0x33b50, 0 },
42401 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_4", 0x33bf0, 0 },
42403 		{ "REFDIV", 0, 4 },
42404 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_3", 0x33bf4, 0 },
42410 		{ "DIVSEL8", 0, 1 },
42411 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_2", 0x33bf8, 0 },
42412 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_1", 0x33bfc, 0 },
42413 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_0", 0x33c00, 0 },
42414 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_1", 0x33c04, 0 },
42418 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_2", 0x33c08, 0 },
42419 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_3", 0x33c0c, 0 },
42423 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_4", 0x33c10, 0 },
42426 		{ "CCLD", 0, 1 },
42427 	{ "MAC_PORT_PLLB_POWER_CONTROL", 0x33c24, 0 },
42429 		{ "NPWRENA", 0, 1 },
42430 	{ "MAC_PORT_PLLB_CHARGE_PUMP_CONTROL", 0x33c28, 0 },
42431 	{ "MAC_PORT_PLLB_PLL_MICELLANEOUS_CONTROL", 0x33c38, 0 },
42432 	{ "MAC_PORT_PLLB_PCLK_CONTROL", 0x33c3c, 0 },
42434 		{ "PCKSEL", 0, 3 },
42435 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_CONTROL", 0x33c40, 0 },
42438 		{ "EMIS", 0, 1 },
42439 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_1", 0x33c44, 0 },
42440 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_2", 0x33c48, 0 },
42441 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_3", 0x33c4c, 0 },
42442 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_4", 0x33c50, 0 },
42443 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_4", 0x33cf0, 0 },
42445 		{ "REFDIV", 0, 4 },
42446 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_3", 0x33cf4, 0 },
42452 		{ "DIVSEL8", 0, 1 },
42453 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_2", 0x33cf8, 0 },
42454 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_1", 0x33cfc, 0 },
42455 	{ "MAC_PORT_TX_LINKA_TRANSMIT_CONFIGURATION_MODE", 0x33000, 0 },
42467 		{ "T5_TX_RTSEL", 0, 2 },
42468 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TEST_CONTROL", 0x33004, 0 },
42476 		{ "TPSEL", 0, 3 },
42477 	{ "MAC_PORT_TX_LINKA_TRANSMIT_COEFFICIENT_CONTROL", 0x33008, 0 },
42485 		{ "ALOAD", 0, 1 },
42486 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DRIVER_MODE_CONTROL", 0x3300c, 0 },
42489 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x33010, 0 },
42491 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x33014, 0 },
42496 	{ "MAC_PORT_TX_LINKA_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x33018, 0 },
42498 		{ "CALSSTP", 0, 6 },
42499 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3301c, 0 },
42501 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_0_COEFFICIENT", 0x33020, 0 },
42502 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_1_COEFFICIENT", 0x33024, 0 },
42503 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_2_COEFFICIENT", 0x33028, 0 },
42504 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_3_COEFFICIENT", 0x3302c, 0 },
42505 	{ "MAC_PORT_TX_LINKA_TRANSMIT_POLARITY", 0x33034, 0 },
42506 	{ "MAC_PORT_TX_LINKA_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x33038, 0 },
42513 		{ "C1UPDT", 0, 2 },
42514 	{ "MAC_PORT_TX_LINKA_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3303c, 0 },
42518 		{ "C1STAT", 0, 2 },
42519 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x33040, 0 },
42520 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x33044, 0 },
42521 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x33048, 0 },
42522 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3304c, 0 },
42523 	{ "MAC_PORT_TX_LINKA_TRANSMIT_APPLIED_TUNE_REGISTER", 0x33050, 0 },
42525 		{ "ATUNEP", 0, 8 },
42526 	{ "MAC_PORT_TX_LINKA_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x33058, 0 },
42528 	{ "MAC_PORT_TX_LINKA_TRANSMIT_4X_SEGMENT_APPLIED", 0x33060, 0 },
42536 		{ "AS4X0", 0, 2 },
42537 	{ "MAC_PORT_TX_LINKA_TRANSMIT_2X_SEGMENT_APPLIED", 0x33064, 0 },
42541 		{ "AS2X0", 0, 2 },
42542 	{ "MAC_PORT_TX_LINKA_TRANSMIT_1X_SEGMENT_APPLIED", 0x33068, 0 },
42550 		{ "AS1X0", 0, 2 },
42551 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3306c, 0 },
42552 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x33070, 0 },
42554 		{ "AT4X", 0, 8 },
42555 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x33074, 0 },
42556 	{ "MAC_PORT_TX_LINKA_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x33078, 0 },
42557 	{ "MAC_PORT_TX_LINKA_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3307c, 0 },
42559 		{ "XWR", 0, 1 },
42560 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x33080, 0 },
42561 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x33084, 0 },
42562 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x33088, 0 },
42563 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3308c, 0 },
42564 	{ "MAC_PORT_TX_LINKA_TRANSMIT_802_3AZ_CONTROL", 0x3309c, 0 },
42565 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_CONTROL", 0x330a0, 0 },
42571 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_OVERRIDE", 0x330a4, 0 },
42577 		{ "DCCOEN", 0, 1 },
42578 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_APPLIED", 0x330a8, 0 },
42580 		{ "DCCAAMP", 0, 7 },
42581 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_TIME_OUT", 0x330ac, 0 },
42582 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SIGN_OVERRIDE", 0x330c0, 0 },
42583 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x330c8, 0 },
42591 		{ "OS4X0", 0, 2 },
42592 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x330cc, 0 },
42596 		{ "OS2X0", 0, 2 },
42597 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x330d0, 0 },
42605 		{ "OS1X0", 0, 2 },
42606 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x330d8, 0 },
42607 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x330dc, 0 },
42608 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x330e0, 0 },
42609 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_5", 0x330ec, 0 },
42617 		{ "DATASIGN", 0, 1 },
42618 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_4", 0x330f0, 0 },
42619 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_3", 0x330f4, 0 },
42620 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_2", 0x330f8, 0 },
42623 		{ "AECMD70", 0, 8 },
42624 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_1", 0x330fc, 0 },
42632 		{ "OBS", 0, 1 },
42633 	{ "MAC_PORT_TX_LINKB_TRANSMIT_CONFIGURATION_MODE", 0x33100, 0 },
42645 		{ "T5_TX_RTSEL", 0, 2 },
42646 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TEST_CONTROL", 0x33104, 0 },
42654 		{ "TPSEL", 0, 3 },
42655 	{ "MAC_PORT_TX_LINKB_TRANSMIT_COEFFICIENT_CONTROL", 0x33108, 0 },
42663 		{ "ALOAD", 0, 1 },
42664 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DRIVER_MODE_CONTROL", 0x3310c, 0 },
42667 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x33110, 0 },
42669 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x33114, 0 },
42674 	{ "MAC_PORT_TX_LINKB_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x33118, 0 },
42676 		{ "CALSSTP", 0, 6 },
42677 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3311c, 0 },
42679 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_0_COEFFICIENT", 0x33120, 0 },
42680 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_1_COEFFICIENT", 0x33124, 0 },
42681 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_2_COEFFICIENT", 0x33128, 0 },
42682 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_3_COEFFICIENT", 0x3312c, 0 },
42683 	{ "MAC_PORT_TX_LINKB_TRANSMIT_POLARITY", 0x33134, 0 },
42684 	{ "MAC_PORT_TX_LINKB_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x33138, 0 },
42691 		{ "C1UPDT", 0, 2 },
42692 	{ "MAC_PORT_TX_LINKB_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3313c, 0 },
42696 		{ "C1STAT", 0, 2 },
42697 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x33140, 0 },
42698 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x33144, 0 },
42699 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x33148, 0 },
42700 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3314c, 0 },
42701 	{ "MAC_PORT_TX_LINKB_TRANSMIT_APPLIED_TUNE_REGISTER", 0x33150, 0 },
42703 		{ "ATUNEP", 0, 8 },
42704 	{ "MAC_PORT_TX_LINKB_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x33158, 0 },
42706 	{ "MAC_PORT_TX_LINKB_TRANSMIT_4X_SEGMENT_APPLIED", 0x33160, 0 },
42714 		{ "AS4X0", 0, 2 },
42715 	{ "MAC_PORT_TX_LINKB_TRANSMIT_2X_SEGMENT_APPLIED", 0x33164, 0 },
42719 		{ "AS2X0", 0, 2 },
42720 	{ "MAC_PORT_TX_LINKB_TRANSMIT_1X_SEGMENT_APPLIED", 0x33168, 0 },
42728 		{ "AS1X0", 0, 2 },
42729 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3316c, 0 },
42730 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x33170, 0 },
42732 		{ "AT4X", 0, 8 },
42733 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x33174, 0 },
42734 	{ "MAC_PORT_TX_LINKB_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x33178, 0 },
42735 	{ "MAC_PORT_TX_LINKB_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3317c, 0 },
42737 		{ "XWR", 0, 1 },
42738 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x33180, 0 },
42739 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x33184, 0 },
42740 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x33188, 0 },
42741 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3318c, 0 },
42742 	{ "MAC_PORT_TX_LINKB_TRANSMIT_802_3AZ_CONTROL", 0x3319c, 0 },
42743 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_CONTROL", 0x331a0, 0 },
42749 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_OVERRIDE", 0x331a4, 0 },
42755 		{ "DCCOEN", 0, 1 },
42756 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_APPLIED", 0x331a8, 0 },
42758 		{ "DCCAAMP", 0, 7 },
42759 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_TIME_OUT", 0x331ac, 0 },
42760 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SIGN_OVERRIDE", 0x331c0, 0 },
42761 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x331c8, 0 },
42769 		{ "OS4X0", 0, 2 },
42770 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x331cc, 0 },
42774 		{ "OS2X0", 0, 2 },
42775 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x331d0, 0 },
42783 		{ "OS1X0", 0, 2 },
42784 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x331d8, 0 },
42785 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x331dc, 0 },
42786 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x331e0, 0 },
42787 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_5", 0x331ec, 0 },
42795 		{ "DATASIGN", 0, 1 },
42796 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_4", 0x331f0, 0 },
42797 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_3", 0x331f4, 0 },
42798 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_2", 0x331f8, 0 },
42801 		{ "AECMD70", 0, 8 },
42802 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_1", 0x331fc, 0 },
42810 		{ "OBS", 0, 1 },
42811 	{ "MAC_PORT_TX_LINKC_TRANSMIT_CONFIGURATION_MODE", 0x33400, 0 },
42823 		{ "T5_TX_RTSEL", 0, 2 },
42824 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TEST_CONTROL", 0x33404, 0 },
42832 		{ "TPSEL", 0, 3 },
42833 	{ "MAC_PORT_TX_LINKC_TRANSMIT_COEFFICIENT_CONTROL", 0x33408, 0 },
42841 		{ "ALOAD", 0, 1 },
42842 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DRIVER_MODE_CONTROL", 0x3340c, 0 },
42845 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x33410, 0 },
42847 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x33414, 0 },
42852 	{ "MAC_PORT_TX_LINKC_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x33418, 0 },
42854 		{ "CALSSTP", 0, 6 },
42855 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3341c, 0 },
42857 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_0_COEFFICIENT", 0x33420, 0 },
42858 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_1_COEFFICIENT", 0x33424, 0 },
42859 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_2_COEFFICIENT", 0x33428, 0 },
42860 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_3_COEFFICIENT", 0x3342c, 0 },
42861 	{ "MAC_PORT_TX_LINKC_TRANSMIT_POLARITY", 0x33434, 0 },
42862 	{ "MAC_PORT_TX_LINKC_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x33438, 0 },
42869 		{ "C1UPDT", 0, 2 },
42870 	{ "MAC_PORT_TX_LINKC_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3343c, 0 },
42874 		{ "C1STAT", 0, 2 },
42875 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x33440, 0 },
42876 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x33444, 0 },
42877 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x33448, 0 },
42878 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3344c, 0 },
42879 	{ "MAC_PORT_TX_LINKC_TRANSMIT_APPLIED_TUNE_REGISTER", 0x33450, 0 },
42881 		{ "ATUNEP", 0, 8 },
42882 	{ "MAC_PORT_TX_LINKC_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x33458, 0 },
42884 	{ "MAC_PORT_TX_LINKC_TRANSMIT_4X_SEGMENT_APPLIED", 0x33460, 0 },
42892 		{ "AS4X0", 0, 2 },
42893 	{ "MAC_PORT_TX_LINKC_TRANSMIT_2X_SEGMENT_APPLIED", 0x33464, 0 },
42897 		{ "AS2X0", 0, 2 },
42898 	{ "MAC_PORT_TX_LINKC_TRANSMIT_1X_SEGMENT_APPLIED", 0x33468, 0 },
42906 		{ "AS1X0", 0, 2 },
42907 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3346c, 0 },
42908 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x33470, 0 },
42910 		{ "AT4X", 0, 8 },
42911 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x33474, 0 },
42912 	{ "MAC_PORT_TX_LINKC_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x33478, 0 },
42913 	{ "MAC_PORT_TX_LINKC_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3347c, 0 },
42915 		{ "XWR", 0, 1 },
42916 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x33480, 0 },
42917 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x33484, 0 },
42918 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x33488, 0 },
42919 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3348c, 0 },
42920 	{ "MAC_PORT_TX_LINKC_TRANSMIT_802_3AZ_CONTROL", 0x3349c, 0 },
42921 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_CONTROL", 0x334a0, 0 },
42927 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_OVERRIDE", 0x334a4, 0 },
42933 		{ "DCCOEN", 0, 1 },
42934 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_APPLIED", 0x334a8, 0 },
42936 		{ "DCCAAMP", 0, 7 },
42937 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_TIME_OUT", 0x334ac, 0 },
42938 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SIGN_OVERRIDE", 0x334c0, 0 },
42939 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x334c8, 0 },
42947 		{ "OS4X0", 0, 2 },
42948 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x334cc, 0 },
42952 		{ "OS2X0", 0, 2 },
42953 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x334d0, 0 },
42961 		{ "OS1X0", 0, 2 },
42962 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x334d8, 0 },
42963 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x334dc, 0 },
42964 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x334e0, 0 },
42965 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_5", 0x334ec, 0 },
42973 		{ "DATASIGN", 0, 1 },
42974 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_4", 0x334f0, 0 },
42975 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_3", 0x334f4, 0 },
42976 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_2", 0x334f8, 0 },
42979 		{ "AECMD70", 0, 8 },
42980 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_1", 0x334fc, 0 },
42988 		{ "OBS", 0, 1 },
42989 	{ "MAC_PORT_TX_LINKD_TRANSMIT_CONFIGURATION_MODE", 0x33500, 0 },
43001 		{ "T5_TX_RTSEL", 0, 2 },
43002 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TEST_CONTROL", 0x33504, 0 },
43010 		{ "TPSEL", 0, 3 },
43011 	{ "MAC_PORT_TX_LINKD_TRANSMIT_COEFFICIENT_CONTROL", 0x33508, 0 },
43019 		{ "ALOAD", 0, 1 },
43020 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DRIVER_MODE_CONTROL", 0x3350c, 0 },
43023 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x33510, 0 },
43025 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x33514, 0 },
43030 	{ "MAC_PORT_TX_LINKD_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x33518, 0 },
43032 		{ "CALSSTP", 0, 6 },
43033 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3351c, 0 },
43035 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_0_COEFFICIENT", 0x33520, 0 },
43036 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_1_COEFFICIENT", 0x33524, 0 },
43037 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_2_COEFFICIENT", 0x33528, 0 },
43038 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_3_COEFFICIENT", 0x3352c, 0 },
43039 	{ "MAC_PORT_TX_LINKD_TRANSMIT_POLARITY", 0x33534, 0 },
43040 	{ "MAC_PORT_TX_LINKD_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x33538, 0 },
43047 		{ "C1UPDT", 0, 2 },
43048 	{ "MAC_PORT_TX_LINKD_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3353c, 0 },
43052 		{ "C1STAT", 0, 2 },
43053 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x33540, 0 },
43054 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x33544, 0 },
43055 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x33548, 0 },
43056 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3354c, 0 },
43057 	{ "MAC_PORT_TX_LINKD_TRANSMIT_APPLIED_TUNE_REGISTER", 0x33550, 0 },
43059 		{ "ATUNEP", 0, 8 },
43060 	{ "MAC_PORT_TX_LINKD_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x33558, 0 },
43062 	{ "MAC_PORT_TX_LINKD_TRANSMIT_4X_SEGMENT_APPLIED", 0x33560, 0 },
43070 		{ "AS4X0", 0, 2 },
43071 	{ "MAC_PORT_TX_LINKD_TRANSMIT_2X_SEGMENT_APPLIED", 0x33564, 0 },
43075 		{ "AS2X0", 0, 2 },
43076 	{ "MAC_PORT_TX_LINKD_TRANSMIT_1X_SEGMENT_APPLIED", 0x33568, 0 },
43084 		{ "AS1X0", 0, 2 },
43085 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3356c, 0 },
43086 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x33570, 0 },
43088 		{ "AT4X", 0, 8 },
43089 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x33574, 0 },
43090 	{ "MAC_PORT_TX_LINKD_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x33578, 0 },
43091 	{ "MAC_PORT_TX_LINKD_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3357c, 0 },
43093 		{ "XWR", 0, 1 },
43094 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x33580, 0 },
43095 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x33584, 0 },
43096 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x33588, 0 },
43097 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3358c, 0 },
43098 	{ "MAC_PORT_TX_LINKD_TRANSMIT_802_3AZ_CONTROL", 0x3359c, 0 },
43099 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_CONTROL", 0x335a0, 0 },
43105 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_OVERRIDE", 0x335a4, 0 },
43111 		{ "DCCOEN", 0, 1 },
43112 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_APPLIED", 0x335a8, 0 },
43114 		{ "DCCAAMP", 0, 7 },
43115 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_TIME_OUT", 0x335ac, 0 },
43116 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SIGN_OVERRIDE", 0x335c0, 0 },
43117 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x335c8, 0 },
43125 		{ "OS4X0", 0, 2 },
43126 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x335cc, 0 },
43130 		{ "OS2X0", 0, 2 },
43131 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x335d0, 0 },
43139 		{ "OS1X0", 0, 2 },
43140 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x335d8, 0 },
43141 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x335dc, 0 },
43142 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x335e0, 0 },
43143 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_5", 0x335ec, 0 },
43151 		{ "DATASIGN", 0, 1 },
43152 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_4", 0x335f0, 0 },
43153 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_3", 0x335f4, 0 },
43154 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_2", 0x335f8, 0 },
43157 		{ "AECMD70", 0, 8 },
43158 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_1", 0x335fc, 0 },
43166 		{ "OBS", 0, 1 },
43167 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_CONFIGURATION_MODE", 0x33900, 0 },
43179 		{ "T5_TX_RTSEL", 0, 2 },
43180 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TEST_CONTROL", 0x33904, 0 },
43188 		{ "TPSEL", 0, 3 },
43189 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_COEFFICIENT_CONTROL", 0x33908, 0 },
43197 		{ "ALOAD", 0, 1 },
43198 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DRIVER_MODE_CONTROL", 0x3390c, 0 },
43201 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x33910, 0 },
43203 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x33914, 0 },
43208 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x33918, 0 },
43210 		{ "CALSSTP", 0, 6 },
43211 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3391c, 0 },
43213 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_0_COEFFICIENT", 0x33920, 0 },
43214 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_1_COEFFICIENT", 0x33924, 0 },
43215 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_2_COEFFICIENT", 0x33928, 0 },
43216 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_3_COEFFICIENT", 0x3392c, 0 },
43217 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_POLARITY", 0x33934, 0 },
43218 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x33938, 0 },
43225 		{ "C1UPDT", 0, 2 },
43226 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3393c, 0 },
43230 		{ "C1STAT", 0, 2 },
43231 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x33940, 0 },
43232 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x33944, 0 },
43233 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x33948, 0 },
43234 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3394c, 0 },
43235 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_APPLIED_TUNE_REGISTER", 0x33950, 0 },
43237 		{ "ATUNEP", 0, 8 },
43238 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x33958, 0 },
43240 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_4X_SEGMENT_APPLIED", 0x33960, 0 },
43248 		{ "AS4X0", 0, 2 },
43249 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_2X_SEGMENT_APPLIED", 0x33964, 0 },
43253 		{ "AS2X0", 0, 2 },
43254 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_1X_SEGMENT_APPLIED", 0x33968, 0 },
43262 		{ "AS1X0", 0, 2 },
43263 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3396c, 0 },
43264 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x33970, 0 },
43266 		{ "AT4X", 0, 8 },
43267 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x33974, 0 },
43268 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x33978, 0 },
43269 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3397c, 0 },
43271 		{ "XWR", 0, 1 },
43272 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x33980, 0 },
43273 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x33984, 0 },
43274 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x33988, 0 },
43275 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3398c, 0 },
43276 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_802_3AZ_CONTROL", 0x3399c, 0 },
43277 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_CONTROL", 0x339a0, 0 },
43283 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_OVERRIDE", 0x339a4, 0 },
43289 		{ "DCCOEN", 0, 1 },
43290 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_APPLIED", 0x339a8, 0 },
43292 		{ "DCCAAMP", 0, 7 },
43293 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_TIME_OUT", 0x339ac, 0 },
43294 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SIGN_OVERRIDE", 0x339c0, 0 },
43295 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x339c8, 0 },
43303 		{ "OS4X0", 0, 2 },
43304 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x339cc, 0 },
43308 		{ "OS2X0", 0, 2 },
43309 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x339d0, 0 },
43317 		{ "OS1X0", 0, 2 },
43318 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x339d8, 0 },
43319 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x339dc, 0 },
43320 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x339e0, 0 },
43321 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_5", 0x339ec, 0 },
43329 		{ "DATASIGN", 0, 1 },
43330 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_4", 0x339f0, 0 },
43331 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_3", 0x339f4, 0 },
43332 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_2", 0x339f8, 0 },
43335 		{ "AECMD70", 0, 8 },
43336 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_1", 0x339fc, 0 },
43344 		{ "OBS", 0, 1 },
43345 	{ "MAC_PORT_RX_LINKA_RECEIVER_CONFIGURATION_MODE", 0x33200, 0 },
43356 		{ "T5_RX_RTSEL", 0, 2 },
43357 	{ "MAC_PORT_RX_LINKA_RECEIVER_TEST_CONTROL", 0x33204, 0 },
43369 		{ "PATSEL", 0, 3 },
43370 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_CONTROL", 0x33208, 0 },
43379 		{ "SSCEN", 0, 1 },
43380 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_OFFSET_CONTROL", 0x3320c, 0 },
43387 		{ "PHOFFS", 0, 6 },
43388 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_POSITION_1", 0x33210, 0 },
43390 		{ "ROTD", 0, 6 },
43391 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_POSITION_2", 0x33214, 0 },
43394 		{ "ROTE", 0, 6 },
43395 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x33218, 0 },
43398 		{ "RAOFF", 0, 5 },
43399 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3321c, 0 },
43401 		{ "RDOFF", 0, 5 },
43402 	{ "MAC_PORT_RX_LINKA_DFE_CONTROL", 0x33220, 0 },
43413 		{ "DFERST", 0, 1 },
43414 	{ "MAC_PORT_RX_LINKA_DFE_SAMPLE_SNAPSHOT_1", 0x33224, 0 },
43416 		{ "T5BYTE0", 0, 8 },
43417 	{ "MAC_PORT_RX_LINKA_DFE_SAMPLE_SNAPSHOT_2", 0x33228, 0 },
43424 		{ "T5_RX_ASAMP", 0, 3 },
43425 	{ "MAC_PORT_RX_LINKA_RECEIVER_VGA_CONTROL_1", 0x3322c, 0 },
43429 		{ "VOFFA", 0, 6 },
43430 	{ "MAC_PORT_RX_LINKA_RECEIVER_VGA_CONTROL_2", 0x33230, 0 },
43438 		{ "T5VGAIN", 0, 7 },
43439 	{ "MAC_PORT_RX_LINKA_RECEIVER_VGA_CONTROL_3", 0x33234, 0 },
43444 		{ "AMAXT", 0, 7 },
43445 	{ "MAC_PORT_RX_LINKA_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x33238, 0 },
43447 		{ "PMOFFTIME", 0, 6 },
43448 	{ "MAC_PORT_RX_LINKA_RECEIVER_IQAMP_CONTROL_1", 0x3323c, 0 },
43451 		{ "IQAMP", 0, 5 },
43452 	{ "MAC_PORT_RX_LINKA_RECEIVER_IQAMP_CONTROL_2", 0x33240, 0 },
43453 	{ "MAC_PORT_RX_LINKA_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x33244, 0 },
43460 		{ "DASEL", 0, 3 },
43461 	{ "MAC_PORT_RX_LINKA_RECEIVER_DACAP_AND_DACAN", 0x33248, 0 },
43463 		{ "DACAP", 0, 8 },
43464 	{ "MAC_PORT_RX_LINKA_RECEIVER_DACA_MIN", 0x3324c, 0 },
43466 		{ "DACAM", 0, 8 },
43467 	{ "MAC_PORT_RX_LINKA_RECEIVER_ADAC_CONTROL", 0x33250, 0 },
43469 		{ "ADAC1", 0, 8 },
43470 	{ "MAC_PORT_RX_LINKA_RECEIVER_AC_COUPLING_CONTROL", 0x33254, 0 },
43476 		{ "FACCPL", 0, 1 },
43477 	{ "MAC_PORT_RX_LINKA_RECEIVER_AC_COUPLING_VALUE", 0x33258, 0 },
43480 		{ "ACCPLBIAS", 0, 8 },
43481 	{ "MAC_PORT_RX_LINKA_DFE_H1H2H3_LOCAL_OFFSET", 0x3325c, 0 },
43482 	{ "MAC_PORT_RX_LINKA_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x33260, 0 },
43484 		{ "H1EX", 0, 6 },
43485 	{ "MAC_PORT_RX_LINKA_PEAKED_INTEGRATOR", 0x33264, 0 },
43488 		{ "UNPKVGA", 0, 2 },
43489 	{ "MAC_PORT_RX_LINKA_CDR_ANALOG_SWITCH", 0x33268, 0 },
43498 		{ "CDRANLGSW", 0, 2 },
43499 	{ "MAC_PORT_RX_LINKA_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3326c, 0 },
43501 …{ "MAC_PORT_RX_LINKA_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x33270, 0 …
43512 		{ "OAE", 0, 4 },
43513 	{ "MAC_PORT_RX_LINKA_DYNAMIC_DATA_CENTERING_DDC", 0x33274, 0 },
43518 		{ "ODEC", 0, 4 },
43519 	{ "MAC_PORT_RX_LINKA_RECEIVER_INTERNAL_STATUS", 0x33278, 0 },
43535 		{ "T5OCCMP", 0, 1 },
43536 	{ "MAC_PORT_RX_LINKA_DFE_FUNCTION_CONTROL_1", 0x3327c, 0 },
43552 		{ "FADAC", 0, 1 },
43553 	{ "MAC_PORT_RX_LINKA_DFE_FUNCTION_CONTROL_2", 0x33280, 0 },
43569 		{ "FQCC", 0, 1 },
43570 	{ "MAC_PORT_RX_LINKA_DFE_OFFSET_CHANNEL", 0x33284, 0 },
43575 		{ "LOFCH", 0, 5 },
43576 	{ "MAC_PORT_RX_LINKA_DFE_OFFSET_VALUE", 0x33288, 0 },
43578 		{ "LOFL", 0, 7 },
43579 	{ "MAC_PORT_RX_LINKA_H_COEFFICIENBT_BIST", 0x3328c, 0 },
43587 		{ "HSEL", 0, 4 },
43588 	{ "MAC_PORT_RX_LINKA_AC_CAPACITOR_BIST", 0x33290, 0 },
43593 		{ "ACCRD", 0, 8 },
43594 	{ "MAC_PORT_RX_LINKA_RECEIVER_LOFF_CONTROL_REGISTER", 0x33298, 0 },
43602 		{ "LCURR", 0, 5 },
43603 	{ "MAC_PORT_RX_LINKA_RECEIVER_SIGDET_CONTROL", 0x3329c, 0 },
43609 		{ "SDLVL", 0, 5 },
43610 	{ "MAC_PORT_RX_LINKA_RECEIVER_ANALOG_CONTROL_SWITCH", 0x332a0, 0 },
43619 		{ "RX_LINKANLGSW", 0, 7 },
43620 	{ "MAC_PORT_RX_LINKA_INTEGRATOR_DAC_OFFSET", 0x332a4, 0 },
43624 		{ "INTDAC", 0, 6 },
43625 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_CONTROL", 0x332a8, 0 },
43629 		{ "MINAMP", 0, 5 },
43630 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS", 0x332ac, 0 },
43636 		{ "EMEN", 0, 1 },
43637 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x332b0, 0 },
43643 		{ "EMCEN", 0, 1 },
43644 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x332b4, 0 },
43647 		{ "APDF", 0, 12 },
43648 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x332b8, 0 },
43649 	{ "MAC_PORT_RX_LINKA_DFE_FUNCTION_CONTROL_3", 0x332bc, 0 },
43665 		{ "FPRBSOFF", 0, 1 },
43666 	{ "MAC_PORT_RX_LINKA_DFE_TAP_CONTROL", 0x332c0, 0 },
43667 	{ "MAC_PORT_RX_LINKA_DFE_TAP", 0x332c4, 0 },
43668 	{ "MAC_PORT_RX_LINKA_RECEIVER_INTERNAL_STATUS_2", 0x332e4, 0 },
43676 		{ "QCCCMP", 0, 1 },
43677 	{ "MAC_PORT_RX_LINKA_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x332e8, 0 },
43680 		{ "CSVAL", 0, 3 },
43681 	{ "MAC_PORT_RX_LINKA_RECEIVER_DCD_CONTROL", 0x332ec, 0 },
43690 		{ "DCDAMP", 0, 6 },
43691 	{ "MAC_PORT_RX_LINKA_RECEIVER_DCC_CONTROL", 0x332f0, 0 },
43697 		{ "DCDAMP", 0, 6 },
43698 	{ "MAC_PORT_RX_LINKA_RECEIVER_QCC_CONTROL", 0x332f4, 0 },
43706 		{ "QCDAMP", 0, 6 },
43707 	{ "MAC_PORT_RX_LINKA_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x332f8, 0 },
43714 		{ "ACJZNT", 0, 1 },
43715 	{ "MAC_PORT_RX_LINKA_RECEIVER_MACRO_TEST_CONTROL_1", 0x332fc, 0 },
43726 		{ "MTHOLD", 0, 1 },
43727 	{ "MAC_PORT_RX_LINKB_RECEIVER_CONFIGURATION_MODE", 0x33300, 0 },
43738 		{ "T5_RX_RTSEL", 0, 2 },
43739 	{ "MAC_PORT_RX_LINKB_RECEIVER_TEST_CONTROL", 0x33304, 0 },
43751 		{ "PATSEL", 0, 3 },
43752 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_CONTROL", 0x33308, 0 },
43761 		{ "SSCEN", 0, 1 },
43762 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_OFFSET_CONTROL", 0x3330c, 0 },
43769 		{ "PHOFFS", 0, 6 },
43770 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_POSITION_1", 0x33310, 0 },
43772 		{ "ROTD", 0, 6 },
43773 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_POSITION_2", 0x33314, 0 },
43776 		{ "ROTE", 0, 6 },
43777 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x33318, 0 },
43780 		{ "RAOFF", 0, 5 },
43781 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3331c, 0 },
43783 		{ "RDOFF", 0, 5 },
43784 	{ "MAC_PORT_RX_LINKB_DFE_CONTROL", 0x33320, 0 },
43795 		{ "DFERST", 0, 1 },
43796 	{ "MAC_PORT_RX_LINKB_DFE_SAMPLE_SNAPSHOT_1", 0x33324, 0 },
43798 		{ "T5BYTE0", 0, 8 },
43799 	{ "MAC_PORT_RX_LINKB_DFE_SAMPLE_SNAPSHOT_2", 0x33328, 0 },
43806 		{ "T5_RX_ASAMP", 0, 3 },
43807 	{ "MAC_PORT_RX_LINKB_RECEIVER_VGA_CONTROL_1", 0x3332c, 0 },
43811 		{ "VOFFA", 0, 6 },
43812 	{ "MAC_PORT_RX_LINKB_RECEIVER_VGA_CONTROL_2", 0x33330, 0 },
43820 		{ "T5VGAIN", 0, 7 },
43821 	{ "MAC_PORT_RX_LINKB_RECEIVER_VGA_CONTROL_3", 0x33334, 0 },
43826 		{ "AMAXT", 0, 7 },
43827 	{ "MAC_PORT_RX_LINKB_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x33338, 0 },
43829 		{ "PMOFFTIME", 0, 6 },
43830 	{ "MAC_PORT_RX_LINKB_RECEIVER_IQAMP_CONTROL_1", 0x3333c, 0 },
43833 		{ "IQAMP", 0, 5 },
43834 	{ "MAC_PORT_RX_LINKB_RECEIVER_IQAMP_CONTROL_2", 0x33340, 0 },
43835 	{ "MAC_PORT_RX_LINKB_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x33344, 0 },
43842 		{ "DASEL", 0, 3 },
43843 	{ "MAC_PORT_RX_LINKB_RECEIVER_DACAP_AND_DACAN", 0x33348, 0 },
43845 		{ "DACAP", 0, 8 },
43846 	{ "MAC_PORT_RX_LINKB_RECEIVER_DACA_MIN", 0x3334c, 0 },
43848 		{ "DACAM", 0, 8 },
43849 	{ "MAC_PORT_RX_LINKB_RECEIVER_ADAC_CONTROL", 0x33350, 0 },
43851 		{ "ADAC1", 0, 8 },
43852 	{ "MAC_PORT_RX_LINKB_RECEIVER_AC_COUPLING_CONTROL", 0x33354, 0 },
43858 		{ "FACCPL", 0, 1 },
43859 	{ "MAC_PORT_RX_LINKB_RECEIVER_AC_COUPLING_VALUE", 0x33358, 0 },
43862 		{ "ACCPLBIAS", 0, 8 },
43863 	{ "MAC_PORT_RX_LINKB_DFE_H1H2H3_LOCAL_OFFSET", 0x3335c, 0 },
43864 	{ "MAC_PORT_RX_LINKB_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x33360, 0 },
43866 		{ "H1EX", 0, 6 },
43867 	{ "MAC_PORT_RX_LINKB_PEAKED_INTEGRATOR", 0x33364, 0 },
43870 		{ "UNPKVGA", 0, 2 },
43871 	{ "MAC_PORT_RX_LINKB_CDR_ANALOG_SWITCH", 0x33368, 0 },
43880 		{ "CDRANLGSW", 0, 2 },
43881 	{ "MAC_PORT_RX_LINKB_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3336c, 0 },
43883 …{ "MAC_PORT_RX_LINKB_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x33370, 0 …
43894 		{ "OAE", 0, 4 },
43895 	{ "MAC_PORT_RX_LINKB_DYNAMIC_DATA_CENTERING_DDC", 0x33374, 0 },
43900 		{ "ODEC", 0, 4 },
43901 	{ "MAC_PORT_RX_LINKB_RECEIVER_INTERNAL_STATUS", 0x33378, 0 },
43917 		{ "T5OCCMP", 0, 1 },
43918 	{ "MAC_PORT_RX_LINKB_DFE_FUNCTION_CONTROL_1", 0x3337c, 0 },
43934 		{ "FADAC", 0, 1 },
43935 	{ "MAC_PORT_RX_LINKB_DFE_FUNCTION_CONTROL_2", 0x33380, 0 },
43951 		{ "FQCC", 0, 1 },
43952 	{ "MAC_PORT_RX_LINKB_DFE_OFFSET_CHANNEL", 0x33384, 0 },
43957 		{ "LOFCH", 0, 5 },
43958 	{ "MAC_PORT_RX_LINKB_DFE_OFFSET_VALUE", 0x33388, 0 },
43960 		{ "LOFL", 0, 7 },
43961 	{ "MAC_PORT_RX_LINKB_H_COEFFICIENBT_BIST", 0x3338c, 0 },
43969 		{ "HSEL", 0, 4 },
43970 	{ "MAC_PORT_RX_LINKB_AC_CAPACITOR_BIST", 0x33390, 0 },
43975 		{ "ACCRD", 0, 8 },
43976 	{ "MAC_PORT_RX_LINKB_RECEIVER_LOFF_CONTROL_REGISTER", 0x33398, 0 },
43984 		{ "LCURR", 0, 5 },
43985 	{ "MAC_PORT_RX_LINKB_RECEIVER_SIGDET_CONTROL", 0x3339c, 0 },
43991 		{ "SDLVL", 0, 5 },
43992 	{ "MAC_PORT_RX_LINKB_RECEIVER_ANALOG_CONTROL_SWITCH", 0x333a0, 0 },
44001 		{ "RX_LINKANLGSW", 0, 7 },
44002 	{ "MAC_PORT_RX_LINKB_INTEGRATOR_DAC_OFFSET", 0x333a4, 0 },
44006 		{ "INTDAC", 0, 6 },
44007 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_CONTROL", 0x333a8, 0 },
44011 		{ "MINAMP", 0, 5 },
44012 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS", 0x333ac, 0 },
44018 		{ "EMEN", 0, 1 },
44019 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x333b0, 0 },
44025 		{ "EMCEN", 0, 1 },
44026 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x333b4, 0 },
44029 		{ "APDF", 0, 12 },
44030 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x333b8, 0 },
44031 	{ "MAC_PORT_RX_LINKB_DFE_FUNCTION_CONTROL_3", 0x333bc, 0 },
44047 		{ "FPRBSOFF", 0, 1 },
44048 	{ "MAC_PORT_RX_LINKB_DFE_TAP_CONTROL", 0x333c0, 0 },
44049 	{ "MAC_PORT_RX_LINKB_DFE_TAP", 0x333c4, 0 },
44050 	{ "MAC_PORT_RX_LINKB_RECEIVER_INTERNAL_STATUS_2", 0x333e4, 0 },
44058 		{ "QCCCMP", 0, 1 },
44059 	{ "MAC_PORT_RX_LINKB_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x333e8, 0 },
44062 		{ "CSVAL", 0, 3 },
44063 	{ "MAC_PORT_RX_LINKB_RECEIVER_DCD_CONTROL", 0x333ec, 0 },
44072 		{ "DCDAMP", 0, 6 },
44073 	{ "MAC_PORT_RX_LINKB_RECEIVER_DCC_CONTROL", 0x333f0, 0 },
44079 		{ "DCDAMP", 0, 6 },
44080 	{ "MAC_PORT_RX_LINKB_RECEIVER_QCC_CONTROL", 0x333f4, 0 },
44088 		{ "QCDAMP", 0, 6 },
44089 	{ "MAC_PORT_RX_LINKB_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x333f8, 0 },
44096 		{ "ACJZNT", 0, 1 },
44097 	{ "MAC_PORT_RX_LINKB_RECEIVER_MACRO_TEST_CONTROL_1", 0x333fc, 0 },
44108 		{ "MTHOLD", 0, 1 },
44109 	{ "MAC_PORT_RX_LINKC_RECEIVER_CONFIGURATION_MODE", 0x33600, 0 },
44120 		{ "T5_RX_RTSEL", 0, 2 },
44121 	{ "MAC_PORT_RX_LINKC_RECEIVER_TEST_CONTROL", 0x33604, 0 },
44133 		{ "PATSEL", 0, 3 },
44134 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_CONTROL", 0x33608, 0 },
44143 		{ "SSCEN", 0, 1 },
44144 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_OFFSET_CONTROL", 0x3360c, 0 },
44151 		{ "PHOFFS", 0, 6 },
44152 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_POSITION_1", 0x33610, 0 },
44154 		{ "ROTD", 0, 6 },
44155 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_POSITION_2", 0x33614, 0 },
44158 		{ "ROTE", 0, 6 },
44159 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x33618, 0 },
44162 		{ "RAOFF", 0, 5 },
44163 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3361c, 0 },
44165 		{ "RDOFF", 0, 5 },
44166 	{ "MAC_PORT_RX_LINKC_DFE_CONTROL", 0x33620, 0 },
44177 		{ "DFERST", 0, 1 },
44178 	{ "MAC_PORT_RX_LINKC_DFE_SAMPLE_SNAPSHOT_1", 0x33624, 0 },
44180 		{ "T5BYTE0", 0, 8 },
44181 	{ "MAC_PORT_RX_LINKC_DFE_SAMPLE_SNAPSHOT_2", 0x33628, 0 },
44188 		{ "T5_RX_ASAMP", 0, 3 },
44189 	{ "MAC_PORT_RX_LINKC_RECEIVER_VGA_CONTROL_1", 0x3362c, 0 },
44193 		{ "VOFFA", 0, 6 },
44194 	{ "MAC_PORT_RX_LINKC_RECEIVER_VGA_CONTROL_2", 0x33630, 0 },
44202 		{ "T5VGAIN", 0, 7 },
44203 	{ "MAC_PORT_RX_LINKC_RECEIVER_VGA_CONTROL_3", 0x33634, 0 },
44208 		{ "AMAXT", 0, 7 },
44209 	{ "MAC_PORT_RX_LINKC_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x33638, 0 },
44211 		{ "PMOFFTIME", 0, 6 },
44212 	{ "MAC_PORT_RX_LINKC_RECEIVER_IQAMP_CONTROL_1", 0x3363c, 0 },
44215 		{ "IQAMP", 0, 5 },
44216 	{ "MAC_PORT_RX_LINKC_RECEIVER_IQAMP_CONTROL_2", 0x33640, 0 },
44217 	{ "MAC_PORT_RX_LINKC_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x33644, 0 },
44224 		{ "DASEL", 0, 3 },
44225 	{ "MAC_PORT_RX_LINKC_RECEIVER_DACAP_AND_DACAN", 0x33648, 0 },
44227 		{ "DACAP", 0, 8 },
44228 	{ "MAC_PORT_RX_LINKC_RECEIVER_DACA_MIN", 0x3364c, 0 },
44230 		{ "DACAM", 0, 8 },
44231 	{ "MAC_PORT_RX_LINKC_RECEIVER_ADAC_CONTROL", 0x33650, 0 },
44233 		{ "ADAC1", 0, 8 },
44234 	{ "MAC_PORT_RX_LINKC_RECEIVER_AC_COUPLING_CONTROL", 0x33654, 0 },
44240 		{ "FACCPL", 0, 1 },
44241 	{ "MAC_PORT_RX_LINKC_RECEIVER_AC_COUPLING_VALUE", 0x33658, 0 },
44244 		{ "ACCPLBIAS", 0, 8 },
44245 	{ "MAC_PORT_RX_LINKC_DFE_H1H2H3_LOCAL_OFFSET", 0x3365c, 0 },
44246 	{ "MAC_PORT_RX_LINKC_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x33660, 0 },
44248 		{ "H1EX", 0, 6 },
44249 	{ "MAC_PORT_RX_LINKC_PEAKED_INTEGRATOR", 0x33664, 0 },
44252 		{ "UNPKVGA", 0, 2 },
44253 	{ "MAC_PORT_RX_LINKC_CDR_ANALOG_SWITCH", 0x33668, 0 },
44262 		{ "CDRANLGSW", 0, 2 },
44263 	{ "MAC_PORT_RX_LINKC_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3366c, 0 },
44265 …{ "MAC_PORT_RX_LINKC_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x33670, 0 …
44276 		{ "OAE", 0, 4 },
44277 	{ "MAC_PORT_RX_LINKC_DYNAMIC_DATA_CENTERING_DDC", 0x33674, 0 },
44282 		{ "ODEC", 0, 4 },
44283 	{ "MAC_PORT_RX_LINKC_RECEIVER_INTERNAL_STATUS", 0x33678, 0 },
44299 		{ "T5OCCMP", 0, 1 },
44300 	{ "MAC_PORT_RX_LINKC_DFE_FUNCTION_CONTROL_1", 0x3367c, 0 },
44316 		{ "FADAC", 0, 1 },
44317 	{ "MAC_PORT_RX_LINKC_DFE_FUNCTION_CONTROL_2", 0x33680, 0 },
44333 		{ "FQCC", 0, 1 },
44334 	{ "MAC_PORT_RX_LINKC_DFE_OFFSET_CHANNEL", 0x33684, 0 },
44339 		{ "LOFCH", 0, 5 },
44340 	{ "MAC_PORT_RX_LINKC_DFE_OFFSET_VALUE", 0x33688, 0 },
44342 		{ "LOFL", 0, 7 },
44343 	{ "MAC_PORT_RX_LINKC_H_COEFFICIENBT_BIST", 0x3368c, 0 },
44351 		{ "HSEL", 0, 4 },
44352 	{ "MAC_PORT_RX_LINKC_AC_CAPACITOR_BIST", 0x33690, 0 },
44357 		{ "ACCRD", 0, 8 },
44358 	{ "MAC_PORT_RX_LINKC_RECEIVER_LOFF_CONTROL_REGISTER", 0x33698, 0 },
44366 		{ "LCURR", 0, 5 },
44367 	{ "MAC_PORT_RX_LINKC_RECEIVER_SIGDET_CONTROL", 0x3369c, 0 },
44373 		{ "SDLVL", 0, 5 },
44374 	{ "MAC_PORT_RX_LINKC_RECEIVER_ANALOG_CONTROL_SWITCH", 0x336a0, 0 },
44383 		{ "RX_LINKANLGSW", 0, 7 },
44384 	{ "MAC_PORT_RX_LINKC_INTEGRATOR_DAC_OFFSET", 0x336a4, 0 },
44388 		{ "INTDAC", 0, 6 },
44389 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_CONTROL", 0x336a8, 0 },
44393 		{ "MINAMP", 0, 5 },
44394 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS", 0x336ac, 0 },
44400 		{ "EMEN", 0, 1 },
44401 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x336b0, 0 },
44407 		{ "EMCEN", 0, 1 },
44408 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x336b4, 0 },
44411 		{ "APDF", 0, 12 },
44412 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x336b8, 0 },
44413 	{ "MAC_PORT_RX_LINKC_DFE_FUNCTION_CONTROL_3", 0x336bc, 0 },
44429 		{ "FPRBSOFF", 0, 1 },
44430 	{ "MAC_PORT_RX_LINKC_DFE_TAP_CONTROL", 0x336c0, 0 },
44431 	{ "MAC_PORT_RX_LINKC_DFE_TAP", 0x336c4, 0 },
44432 	{ "MAC_PORT_RX_LINKC_RECEIVER_INTERNAL_STATUS_2", 0x336e4, 0 },
44440 		{ "QCCCMP", 0, 1 },
44441 	{ "MAC_PORT_RX_LINKC_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x336e8, 0 },
44444 		{ "CSVAL", 0, 3 },
44445 	{ "MAC_PORT_RX_LINKC_RECEIVER_DCD_CONTROL", 0x336ec, 0 },
44454 		{ "DCDAMP", 0, 6 },
44455 	{ "MAC_PORT_RX_LINKC_RECEIVER_DCC_CONTROL", 0x336f0, 0 },
44461 		{ "DCDAMP", 0, 6 },
44462 	{ "MAC_PORT_RX_LINKC_RECEIVER_QCC_CONTROL", 0x336f4, 0 },
44470 		{ "QCDAMP", 0, 6 },
44471 	{ "MAC_PORT_RX_LINKC_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x336f8, 0 },
44478 		{ "ACJZNT", 0, 1 },
44479 	{ "MAC_PORT_RX_LINKC_RECEIVER_MACRO_TEST_CONTROL_1", 0x336fc, 0 },
44490 		{ "MTHOLD", 0, 1 },
44491 	{ "MAC_PORT_RX_LINKD_RECEIVER_CONFIGURATION_MODE", 0x33700, 0 },
44502 		{ "T5_RX_RTSEL", 0, 2 },
44503 	{ "MAC_PORT_RX_LINKD_RECEIVER_TEST_CONTROL", 0x33704, 0 },
44515 		{ "PATSEL", 0, 3 },
44516 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_CONTROL", 0x33708, 0 },
44525 		{ "SSCEN", 0, 1 },
44526 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_OFFSET_CONTROL", 0x3370c, 0 },
44533 		{ "PHOFFS", 0, 6 },
44534 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_POSITION_1", 0x33710, 0 },
44536 		{ "ROTD", 0, 6 },
44537 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_POSITION_2", 0x33714, 0 },
44540 		{ "ROTE", 0, 6 },
44541 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x33718, 0 },
44544 		{ "RAOFF", 0, 5 },
44545 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3371c, 0 },
44547 		{ "RDOFF", 0, 5 },
44548 	{ "MAC_PORT_RX_LINKD_DFE_CONTROL", 0x33720, 0 },
44559 		{ "DFERST", 0, 1 },
44560 	{ "MAC_PORT_RX_LINKD_DFE_SAMPLE_SNAPSHOT_1", 0x33724, 0 },
44562 		{ "T5BYTE0", 0, 8 },
44563 	{ "MAC_PORT_RX_LINKD_DFE_SAMPLE_SNAPSHOT_2", 0x33728, 0 },
44570 		{ "T5_RX_ASAMP", 0, 3 },
44571 	{ "MAC_PORT_RX_LINKD_RECEIVER_VGA_CONTROL_1", 0x3372c, 0 },
44575 		{ "VOFFA", 0, 6 },
44576 	{ "MAC_PORT_RX_LINKD_RECEIVER_VGA_CONTROL_2", 0x33730, 0 },
44584 		{ "T5VGAIN", 0, 7 },
44585 	{ "MAC_PORT_RX_LINKD_RECEIVER_VGA_CONTROL_3", 0x33734, 0 },
44590 		{ "AMAXT", 0, 7 },
44591 	{ "MAC_PORT_RX_LINKD_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x33738, 0 },
44593 		{ "PMOFFTIME", 0, 6 },
44594 	{ "MAC_PORT_RX_LINKD_RECEIVER_IQAMP_CONTROL_1", 0x3373c, 0 },
44597 		{ "IQAMP", 0, 5 },
44598 	{ "MAC_PORT_RX_LINKD_RECEIVER_IQAMP_CONTROL_2", 0x33740, 0 },
44599 	{ "MAC_PORT_RX_LINKD_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x33744, 0 },
44606 		{ "DASEL", 0, 3 },
44607 	{ "MAC_PORT_RX_LINKD_RECEIVER_DACAP_AND_DACAN", 0x33748, 0 },
44609 		{ "DACAP", 0, 8 },
44610 	{ "MAC_PORT_RX_LINKD_RECEIVER_DACA_MIN", 0x3374c, 0 },
44612 		{ "DACAM", 0, 8 },
44613 	{ "MAC_PORT_RX_LINKD_RECEIVER_ADAC_CONTROL", 0x33750, 0 },
44615 		{ "ADAC1", 0, 8 },
44616 	{ "MAC_PORT_RX_LINKD_RECEIVER_AC_COUPLING_CONTROL", 0x33754, 0 },
44622 		{ "FACCPL", 0, 1 },
44623 	{ "MAC_PORT_RX_LINKD_RECEIVER_AC_COUPLING_VALUE", 0x33758, 0 },
44626 		{ "ACCPLBIAS", 0, 8 },
44627 	{ "MAC_PORT_RX_LINKD_DFE_H1H2H3_LOCAL_OFFSET", 0x3375c, 0 },
44628 	{ "MAC_PORT_RX_LINKD_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x33760, 0 },
44630 		{ "H1EX", 0, 6 },
44631 	{ "MAC_PORT_RX_LINKD_PEAKED_INTEGRATOR", 0x33764, 0 },
44634 		{ "UNPKVGA", 0, 2 },
44635 	{ "MAC_PORT_RX_LINKD_CDR_ANALOG_SWITCH", 0x33768, 0 },
44644 		{ "CDRANLGSW", 0, 2 },
44645 	{ "MAC_PORT_RX_LINKD_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3376c, 0 },
44647 …{ "MAC_PORT_RX_LINKD_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x33770, 0 …
44658 		{ "OAE", 0, 4 },
44659 	{ "MAC_PORT_RX_LINKD_DYNAMIC_DATA_CENTERING_DDC", 0x33774, 0 },
44664 		{ "ODEC", 0, 4 },
44665 	{ "MAC_PORT_RX_LINKD_RECEIVER_INTERNAL_STATUS", 0x33778, 0 },
44681 		{ "T5OCCMP", 0, 1 },
44682 	{ "MAC_PORT_RX_LINKD_DFE_FUNCTION_CONTROL_1", 0x3377c, 0 },
44698 		{ "FADAC", 0, 1 },
44699 	{ "MAC_PORT_RX_LINKD_DFE_FUNCTION_CONTROL_2", 0x33780, 0 },
44715 		{ "FQCC", 0, 1 },
44716 	{ "MAC_PORT_RX_LINKD_DFE_OFFSET_CHANNEL", 0x33784, 0 },
44721 		{ "LOFCH", 0, 5 },
44722 	{ "MAC_PORT_RX_LINKD_DFE_OFFSET_VALUE", 0x33788, 0 },
44724 		{ "LOFL", 0, 7 },
44725 	{ "MAC_PORT_RX_LINKD_H_COEFFICIENBT_BIST", 0x3378c, 0 },
44733 		{ "HSEL", 0, 4 },
44734 	{ "MAC_PORT_RX_LINKD_AC_CAPACITOR_BIST", 0x33790, 0 },
44739 		{ "ACCRD", 0, 8 },
44740 	{ "MAC_PORT_RX_LINKD_RECEIVER_LOFF_CONTROL_REGISTER", 0x33798, 0 },
44748 		{ "LCURR", 0, 5 },
44749 	{ "MAC_PORT_RX_LINKD_RECEIVER_SIGDET_CONTROL", 0x3379c, 0 },
44755 		{ "SDLVL", 0, 5 },
44756 	{ "MAC_PORT_RX_LINKD_RECEIVER_ANALOG_CONTROL_SWITCH", 0x337a0, 0 },
44765 		{ "RX_LINKANLGSW", 0, 7 },
44766 	{ "MAC_PORT_RX_LINKD_INTEGRATOR_DAC_OFFSET", 0x337a4, 0 },
44770 		{ "INTDAC", 0, 6 },
44771 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_CONTROL", 0x337a8, 0 },
44775 		{ "MINAMP", 0, 5 },
44776 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS", 0x337ac, 0 },
44782 		{ "EMEN", 0, 1 },
44783 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x337b0, 0 },
44789 		{ "EMCEN", 0, 1 },
44790 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x337b4, 0 },
44793 		{ "APDF", 0, 12 },
44794 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x337b8, 0 },
44795 	{ "MAC_PORT_RX_LINKD_DFE_FUNCTION_CONTROL_3", 0x337bc, 0 },
44811 		{ "FPRBSOFF", 0, 1 },
44812 	{ "MAC_PORT_RX_LINKD_DFE_TAP_CONTROL", 0x337c0, 0 },
44813 	{ "MAC_PORT_RX_LINKD_DFE_TAP", 0x337c4, 0 },
44814 	{ "MAC_PORT_RX_LINKD_RECEIVER_INTERNAL_STATUS_2", 0x337e4, 0 },
44822 		{ "QCCCMP", 0, 1 },
44823 	{ "MAC_PORT_RX_LINKD_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x337e8, 0 },
44826 		{ "CSVAL", 0, 3 },
44827 	{ "MAC_PORT_RX_LINKD_RECEIVER_DCD_CONTROL", 0x337ec, 0 },
44836 		{ "DCDAMP", 0, 6 },
44837 	{ "MAC_PORT_RX_LINKD_RECEIVER_DCC_CONTROL", 0x337f0, 0 },
44843 		{ "DCDAMP", 0, 6 },
44844 	{ "MAC_PORT_RX_LINKD_RECEIVER_QCC_CONTROL", 0x337f4, 0 },
44852 		{ "QCDAMP", 0, 6 },
44853 	{ "MAC_PORT_RX_LINKD_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x337f8, 0 },
44860 		{ "ACJZNT", 0, 1 },
44861 	{ "MAC_PORT_RX_LINKD_RECEIVER_MACRO_TEST_CONTROL_1", 0x337fc, 0 },
44872 		{ "MTHOLD", 0, 1 },
44873 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_CONFIGURATION_MODE", 0x33a00, 0 },
44884 		{ "T5_RX_RTSEL", 0, 2 },
44885 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_TEST_CONTROL", 0x33a04, 0 },
44897 		{ "PATSEL", 0, 3 },
44898 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_CONTROL", 0x33a08, 0 },
44907 		{ "SSCEN", 0, 1 },
44908 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_OFFSET_CONTROL", 0x33a0c, 0 },
44915 		{ "PHOFFS", 0, 6 },
44916 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_POSITION_1", 0x33a10, 0 },
44918 		{ "ROTD", 0, 6 },
44919 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_POSITION_2", 0x33a14, 0 },
44922 		{ "ROTE", 0, 6 },
44923 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x33a18, 0 },
44926 		{ "RAOFF", 0, 5 },
44927 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x33a1c, 0 },
44929 		{ "RDOFF", 0, 5 },
44930 	{ "MAC_PORT_RX_LINK_BCST_DFE_CONTROL", 0x33a20, 0 },
44941 		{ "DFERST", 0, 1 },
44942 	{ "MAC_PORT_RX_LINK_BCST_DFE_SAMPLE_SNAPSHOT_1", 0x33a24, 0 },
44944 		{ "T5BYTE0", 0, 8 },
44945 	{ "MAC_PORT_RX_LINK_BCST_DFE_SAMPLE_SNAPSHOT_2", 0x33a28, 0 },
44952 		{ "T5_RX_ASAMP", 0, 3 },
44953 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_VGA_CONTROL_1", 0x33a2c, 0 },
44957 		{ "VOFFA", 0, 6 },
44958 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_VGA_CONTROL_2", 0x33a30, 0 },
44966 		{ "T5VGAIN", 0, 7 },
44967 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_VGA_CONTROL_3", 0x33a34, 0 },
44972 		{ "AMAXT", 0, 7 },
44973 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x33a38, 0 },
44975 		{ "PMOFFTIME", 0, 6 },
44976 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_IQAMP_CONTROL_1", 0x33a3c, 0 },
44979 		{ "IQAMP", 0, 5 },
44980 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_IQAMP_CONTROL_2", 0x33a40, 0 },
44981 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x33a44, 0 },
44988 		{ "DASEL", 0, 3 },
44989 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DACAP_AND_DACAN", 0x33a48, 0 },
44991 		{ "DACAP", 0, 8 },
44992 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DACA_MIN", 0x33a4c, 0 },
44994 		{ "DACAM", 0, 8 },
44995 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_ADAC_CONTROL", 0x33a50, 0 },
44997 		{ "ADAC1", 0, 8 },
44998 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_AC_COUPLING_CONTROL", 0x33a54, 0 },
45004 		{ "FACCPL", 0, 1 },
45005 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_AC_COUPLING_VALUE", 0x33a58, 0 },
45008 		{ "ACCPLBIAS", 0, 8 },
45009 	{ "MAC_PORT_RX_LINK_BCST_DFE_H1H2H3_LOCAL_OFFSET", 0x33a5c, 0 },
45010 	{ "MAC_PORT_RX_LINK_BCST_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x33a60, 0 },
45012 		{ "H1EX", 0, 6 },
45013 	{ "MAC_PORT_RX_LINK_BCST_PEAKED_INTEGRATOR", 0x33a64, 0 },
45016 		{ "UNPKVGA", 0, 2 },
45017 	{ "MAC_PORT_RX_LINK_BCST_CDR_ANALOG_SWITCH", 0x33a68, 0 },
45026 		{ "CDRANLGSW", 0, 2 },
45027 	{ "MAC_PORT_RX_LINK_BCST_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x33a6c, 0 },
45029 …C_PORT_RX_LINK_BCST_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x33a70, 0 },
45040 		{ "OAE", 0, 4 },
45041 	{ "MAC_PORT_RX_LINK_BCST_DYNAMIC_DATA_CENTERING_DDC", 0x33a74, 0 },
45046 		{ "ODEC", 0, 4 },
45047 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_INTERNAL_STATUS", 0x33a78, 0 },
45063 		{ "T5OCCMP", 0, 1 },
45064 	{ "MAC_PORT_RX_LINK_BCST_DFE_FUNCTION_CONTROL_1", 0x33a7c, 0 },
45080 		{ "FADAC", 0, 1 },
45081 	{ "MAC_PORT_RX_LINK_BCST_DFE_FUNCTION_CONTROL_2", 0x33a80, 0 },
45097 		{ "FQCC", 0, 1 },
45098 	{ "MAC_PORT_RX_LINK_BCST_DFE_OFFSET_CHANNEL", 0x33a84, 0 },
45103 		{ "LOFCH", 0, 5 },
45104 	{ "MAC_PORT_RX_LINK_BCST_DFE_OFFSET_VALUE", 0x33a88, 0 },
45106 		{ "LOFL", 0, 7 },
45107 	{ "MAC_PORT_RX_LINK_BCST_H_COEFFICIENBT_BIST", 0x33a8c, 0 },
45115 		{ "HSEL", 0, 4 },
45116 	{ "MAC_PORT_RX_LINK_BCST_AC_CAPACITOR_BIST", 0x33a90, 0 },
45121 		{ "ACCRD", 0, 8 },
45122 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_LOFF_CONTROL_REGISTER", 0x33a98, 0 },
45130 		{ "LCURR", 0, 5 },
45131 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_SIGDET_CONTROL", 0x33a9c, 0 },
45137 		{ "SDLVL", 0, 5 },
45138 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_ANALOG_CONTROL_SWITCH", 0x33aa0, 0 },
45147 		{ "RX_LINKANLGSW", 0, 7 },
45148 	{ "MAC_PORT_RX_LINK_BCST_INTEGRATOR_DAC_OFFSET", 0x33aa4, 0 },
45152 		{ "INTDAC", 0, 6 },
45153 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_CONTROL", 0x33aa8, 0 },
45157 		{ "MINAMP", 0, 5 },
45158 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS", 0x33aac, 0 },
45164 		{ "EMEN", 0, 1 },
45165 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x33ab0, 0 },
45171 		{ "EMCEN", 0, 1 },
45172 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x33ab4, 0 },
45175 		{ "APDF", 0, 12 },
45176 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x33ab8, 0 },
45177 	{ "MAC_PORT_RX_LINK_BCST_DFE_FUNCTION_CONTROL_3", 0x33abc, 0 },
45193 		{ "FPRBSOFF", 0, 1 },
45194 	{ "MAC_PORT_RX_LINK_BCST_DFE_TAP_CONTROL", 0x33ac0, 0 },
45195 	{ "MAC_PORT_RX_LINK_BCST_DFE_TAP", 0x33ac4, 0 },
45196 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_INTERNAL_STATUS_2", 0x33ae4, 0 },
45204 		{ "QCCCMP", 0, 1 },
45205 	{ "MAC_PORT_RX_LINK_BCST_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x33ae8, 0 },
45208 		{ "CSVAL", 0, 3 },
45209 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DCD_CONTROL", 0x33aec, 0 },
45218 		{ "DCDAMP", 0, 6 },
45219 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DCC_CONTROL", 0x33af0, 0 },
45225 		{ "DCDAMP", 0, 6 },
45226 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_QCC_CONTROL", 0x33af4, 0 },
45234 		{ "QCDAMP", 0, 6 },
45235 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x33af8, 0 },
45242 		{ "ACJZNT", 0, 1 },
45243 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_MACRO_TEST_CONTROL_1", 0x33afc, 0 },
45254 		{ "MTHOLD", 0, 1 },
45255 	{ "MAC_PORT_CFG", 0x34800, 0 },
45280 		{ "Port_Sel", 0, 1 },
45281 	{ "MAC_PORT_RESET_CTRL", 0x34804, 0 },
45313 		{ "HSS_Reset", 0, 1 },
45314 	{ "MAC_PORT_LED_CFG", 0x34808, 0 },
45324 		{ "Led0_Polarity_Inv", 0, 1 },
45325 	{ "MAC_PORT_LED_COUNTHI", 0x3480c, 0 },
45326 	{ "MAC_PORT_LED_COUNTLO", 0x34810, 0 },
45327 	{ "MAC_PORT_CFG3", 0x34814, 0 },
45342 		{ "HSSC16C20SEL", 0, 4 },
45343 	{ "MAC_PORT_CFG2", 0x34818, 0 },
45352 		{ "T5_AEC_PMA_RX_READY", 0, 4 },
45353 	{ "MAC_PORT_PKT_COUNT", 0x3481c, 0 },
45357 		{ "rx_eop_count", 0, 8 },
45358 	{ "MAC_PORT_CFG4", 0x34820, 0 },
45366 		{ "AEC0_TX_WIDTH", 0, 2 },
45367 	{ "MAC_PORT_MAGIC_MACID_LO", 0x34824, 0 },
45368 	{ "MAC_PORT_MAGIC_MACID_HI", 0x34828, 0 },
45369 	{ "MAC_PORT_MTIP_RESET_CTRL", 0x3482c, 0 },
45401 		{ "xgmii_clk_reset", 0, 1 },
45402 	{ "MAC_PORT_MTIP_GATE_CTRL", 0x34830, 0 },
45434 		{ "an_clk_enable", 0, 1 },
45435 	{ "MAC_PORT_LINK_STATUS", 0x34834, 0 },
45443 		{ "linkdn", 0, 1 },
45444 	{ "MAC_PORT_AEC_ADD_CTL_STAT_0", 0x34838, 0 },
45452 		{ "AEC_SYS_LANE_SELECT_O", 0, 2 },
45453 	{ "MAC_PORT_AEC_ADD_CTL_STAT_1", 0x3483c, 0 },
45461 		{ "AEC_RX_LANE_ID_O", 0, 2 },
45462 	{ "MAC_PORT_AEC_XGMII_TIMER_LO_40G", 0x34840, 0 },
45463 	{ "MAC_PORT_AEC_XGMII_TIMER_HI_40G", 0x34844, 0 },
45464 	{ "MAC_PORT_AEC_XGMII_TIMER_LO_100G", 0x34848, 0 },
45465 	{ "MAC_PORT_AEC_XGMII_TIMER_HI_100G", 0x3484c, 0 },
45466 	{ "MAC_PORT_AEC_DEBUG_LO_0", 0x34850, 0 },
45482 		{ "REG_MAN_DEC_REQ", 0, 1 },
45483 	{ "MAC_PORT_AEC_DEBUG_HI_0", 0x34854, 0 },
45488 		{ "LCK_FSM_CUR_STATE", 0, 3 },
45489 	{ "MAC_PORT_AEC_DEBUG_LO_1", 0x34858, 0 },
45505 		{ "REG_MAN_DEC_REQ", 0, 1 },
45506 	{ "MAC_PORT_AEC_DEBUG_HI_1", 0x3485c, 0 },
45511 		{ "LCK_FSM_CUR_STATE", 0, 3 },
45512 	{ "MAC_PORT_AEC_DEBUG_LO_2", 0x34860, 0 },
45528 		{ "REG_MAN_DEC_REQ", 0, 1 },
45529 	{ "MAC_PORT_AEC_DEBUG_HI_2", 0x34864, 0 },
45534 		{ "LCK_FSM_CUR_STATE", 0, 3 },
45535 	{ "MAC_PORT_AEC_DEBUG_LO_3", 0x34868, 0 },
45551 		{ "REG_MAN_DEC_REQ", 0, 1 },
45552 	{ "MAC_PORT_AEC_DEBUG_HI_3", 0x3486c, 0 },
45557 		{ "LCK_FSM_CUR_STATE", 0, 3 },
45558 	{ "MAC_PORT_MAC_DEBUG_RO", 0x34870, 0 },
45571 		{ "mac1g10g_tx_underflow", 0, 1 },
45572 	{ "MAC_PORT_MAC_CTRL_RW", 0x34874, 0 },
45582 		{ "mac1g_loop_bck", 0, 1 },
45583 	{ "MAC_PORT_PCS_DEBUG0_RO", 0x34878, 0 },
45602 		{ "sgmii_sg_speed", 0, 2 },
45603 	{ "MAC_PORT_PCS_CTRL_RW", 0x3487c, 0 },
45614 		{ "sgmii_tx_lane_thresh", 0, 4 },
45615 	{ "MAC_PORT_PCS_DEBUG1_RO", 0x34880, 0 },
45618 		{ "pcs100g_block_lock", 0, 20 },
45619 	{ "MAC_PORT_PERR_INT_EN_100G", 0x34884, 0 },
45649 		{ "Perr_rx0_pcs100g", 0, 1 },
45650 	{ "MAC_PORT_PERR_INT_CAUSE_100G", 0x34888, 0 },
45680 		{ "Perr_rx0_pcs100g", 0, 1 },
45681 	{ "MAC_PORT_PERR_ENABLE_100G", 0x3488c, 0 },
45711 		{ "Perr_rx0_pcs100g", 0, 1 },
45712 	{ "MAC_PORT_MAC_STAT_DEBUG", 0x34890, 0 },
45713 	{ "MAC_PORT_MAC_25G_50G_AM0", 0x34894, 0 },
45714 	{ "MAC_PORT_MAC_25G_50G_AM1", 0x34898, 0 },
45715 	{ "MAC_PORT_MAC_25G_50G_AM2", 0x3489c, 0 },
45716 	{ "MAC_PORT_MAC_25G_50G_AM3", 0x348a0, 0 },
45717 	{ "MAC_PORT_MAC_AN_STATE_STATUS", 0x348a4, 0 },
45718 	{ "MAC_PORT_EPIO_DATA0", 0x348c0, 0 },
45719 	{ "MAC_PORT_EPIO_DATA1", 0x348c4, 0 },
45720 	{ "MAC_PORT_EPIO_DATA2", 0x348c8, 0 },
45721 	{ "MAC_PORT_EPIO_DATA3", 0x348cc, 0 },
45722 	{ "MAC_PORT_EPIO_OP", 0x348d0, 0 },
45725 		{ "Address", 0, 8 },
45726 	{ "MAC_PORT_WOL_STATUS", 0x348d4, 0 },
45731 		{ "MatchedFilter", 0, 3 },
45732 	{ "MAC_PORT_INT_EN", 0x348d8, 0 },
45755 		{ "RxFifo_prty_err", 0, 1 },
45756 	{ "MAC_PORT_INT_CAUSE", 0x348dc, 0 },
45779 		{ "RxFifo_prty_err", 0, 1 },
45780 	{ "MAC_PORT_PERR_INT_EN", 0x348e0, 0 },
45812 		{ "Perr_tx_pcs1g", 0, 1 },
45813 	{ "MAC_PORT_PERR_INT_CAUSE", 0x348e4, 0 },
45845 		{ "Perr_tx_pcs1g", 0, 1 },
45846 	{ "MAC_PORT_PERR_ENABLE", 0x348e8, 0 },
45878 		{ "Perr_tx_pcs1g", 0, 1 },
45879 	{ "MAC_PORT_PERR_INJECT", 0x348ec, 0 },
45881 		{ "InjectDataErr", 0, 1 },
45882 	{ "MAC_PORT_HSS_CFG0", 0x348f0, 0 },
45908 	{ "MAC_PORT_HSS_CFG1", 0x348f4, 0 },
45932 		{ "TXDREFRESH", 0, 1 },
45933 	{ "MAC_PORT_HSS_CFG2", 0x348f8, 0 },
45965 		{ "RXAPHSUPIN", 0, 1 },
45966 	{ "MAC_PORT_HSS_CFG3", 0x348fc, 0 },
45970 		{ "HSSPLLCONFIGA", 0, 8 },
45971 	{ "MAC_PORT_HSS_CFG4", 0x34900, 0 },
45977 		{ "HSSDIVSELB", 0, 9 },
45978 	{ "MAC_PORT_HSS_STATUS", 0x34904, 0 },
45998 		{ "HSSPRTREADYA", 0, 1 },
45999 	{ "MAC_PORT_HSS_EEE_STATUS", 0x34908, 0 },
46015 		{ "TXDREFRESH_STATUS", 0, 1 },
46016 	{ "MAC_PORT_HSS_SIGDET_STATUS", 0x3490c, 0 },
46017 	{ "MAC_PORT_HSS_PL_CTL", 0x34910, 0 },
46020 		{ "IPW", 0, 8 },
46021 	{ "MAC_PORT_RUNT_FRAME", 0x34914, 0 },
46023 		{ "runt", 0, 16 },
46024 	{ "MAC_PORT_EEE_STATUS", 0x34918, 0 },
46032 		{ "pma_tx_quiet", 0, 1 },
46033 	{ "MAC_PORT_CGEN", 0x3491c, 0 },
46042 		{ "sd0_CGEN", 0, 1 },
46043 	{ "MAC_PORT_CGEN_MTIP", 0x34920, 0 },
46055 		{ "PCSSEG0_CGEN", 0, 1 },
46056 	{ "MAC_PORT_TX_TS_ID", 0x34924, 0 },
46057 	{ "MAC_PORT_TX_TS_VAL_LO", 0x34928, 0 },
46058 	{ "MAC_PORT_TX_TS_VAL_HI", 0x3492c, 0 },
46059 	{ "MAC_PORT_EEE_CTL", 0x34930, 0 },
46062 		{ "En", 0, 1 },
46063 	{ "MAC_PORT_EEE_TX_CTL", 0x34934, 0 },
46070 		{ "EEE_TX_RESET", 0, 1 },
46071 	{ "MAC_PORT_EEE_RX_CTL", 0x34938, 0 },
46076 		{ "EEE_RX_RESET", 0, 1 },
46077 	{ "MAC_PORT_EEE_TX_10G_SLEEP_TIMER", 0x3493c, 0 },
46078 	{ "MAC_PORT_EEE_TX_10G_QUIET_TIMER", 0x34940, 0 },
46079 	{ "MAC_PORT_EEE_TX_10G_WAKE_TIMER", 0x34944, 0 },
46080 	{ "MAC_PORT_EEE_TX_1G_SLEEP_TIMER", 0x34948, 0 },
46081 	{ "MAC_PORT_EEE_TX_1G_QUIET_TIMER", 0x3494c, 0 },
46082 	{ "MAC_PORT_EEE_TX_1G_REFRESH_TIMER", 0x34950, 0 },
46083 	{ "MAC_PORT_EEE_RX_10G_QUIET_TIMER", 0x34954, 0 },
46084 	{ "MAC_PORT_EEE_RX_10G_WAKE_TIMER", 0x34958, 0 },
46085 	{ "MAC_PORT_EEE_RX_10G_WF_TIMER", 0x3495c, 0 },
46086 	{ "MAC_PORT_EEE_RX_1G_QUIET_TIMER", 0x34960, 0 },
46087 	{ "MAC_PORT_EEE_RX_1G_WAKE_TIMER", 0x34964, 0 },
46088 	{ "MAC_PORT_EEE_WF_COUNT", 0x34968, 0 },
46090 		{ "wake_cnt", 0, 16 },
46091 	{ "MAC_PORT_PTP_TIMER_RD0_LO", 0x3496c, 0 },
46092 	{ "MAC_PORT_PTP_TIMER_RD0_HI", 0x34970, 0 },
46093 	{ "MAC_PORT_PTP_TIMER_RD1_LO", 0x34974, 0 },
46094 	{ "MAC_PORT_PTP_TIMER_RD1_HI", 0x34978, 0 },
46095 	{ "MAC_PORT_PTP_TIMER_WR_LO", 0x3497c, 0 },
46096 	{ "MAC_PORT_PTP_TIMER_WR_HI", 0x34980, 0 },
46097 	{ "MAC_PORT_PTP_TIMER_OFFSET_0", 0x34984, 0 },
46098 	{ "MAC_PORT_PTP_TIMER_OFFSET_1", 0x34988, 0 },
46099 	{ "MAC_PORT_PTP_TIMER_OFFSET_2", 0x3498c, 0 },
46100 	{ "MAC_PORT_PTP_SUM_LO", 0x34990, 0 },
46101 	{ "MAC_PORT_PTP_SUM_HI", 0x34994, 0 },
46102 	{ "MAC_PORT_PTP_TIMER_INCR0", 0x34998, 0 },
46104 		{ "X", 0, 16 },
46105 	{ "MAC_PORT_PTP_TIMER_INCR1", 0x3499c, 0 },
46107 		{ "X_TICK", 0, 16 },
46108 	{ "MAC_PORT_PTP_DRIFT_ADJUST_COUNT", 0x349a0, 0 },
46109 	{ "MAC_PORT_PTP_OFFSET_ADJUST_FINE", 0x349a4, 0 },
46111 		{ "A", 0, 16 },
46112 	{ "MAC_PORT_PTP_OFFSET_ADJUST_TOTAL", 0x349a8, 0 },
46113 	{ "MAC_PORT_PTP_CFG", 0x349ac, 0 },
46121 		{ "Q", 0, 8 },
46122 	{ "MAC_PORT_PTP_PPS", 0x349b0, 0 },
46123 	{ "MAC_PORT_PTP_SINGLE_ALARM", 0x349b4, 0 },
46124 	{ "MAC_PORT_PTP_PERIODIC_ALARM", 0x349b8, 0 },
46125 	{ "MAC_PORT_PTP_STATUS", 0x349bc, 0 },
46126 	{ "MAC_PORT_MTIP_REVISION", 0x34a00, 0 },
46129 		{ "REV", 0, 8 },
46130 	{ "MAC_PORT_MTIP_SCRATCH", 0x34a04, 0 },
46131 	{ "MAC_PORT_MTIP_COMMAND_CONFIG", 0x34a08, 0 },
46153 		{ "TX_ENA", 0, 1 },
46154 	{ "MAC_PORT_MTIP_MAC_ADDR_0", 0x34a0c, 0 },
46155 	{ "MAC_PORT_MTIP_MAC_ADDR_1", 0x34a10, 0 },
46156 	{ "MAC_PORT_MTIP_FRM_LENGTH", 0x34a14, 0 },
46157 	{ "MAC_PORT_MTIP_RX_FIFO_SECTIONS", 0x34a1c, 0 },
46159 		{ "EMPTY", 0, 16 },
46160 	{ "MAC_PORT_MTIP_TX_FIFO_SECTIONS", 0x34a20, 0 },
46162 		{ "EMPTY", 0, 16 },
46163 	{ "MAC_PORT_MTIP_RX_FIFO_ALMOST_F_E", 0x34a24, 0 },
46165 		{ "AlmstEmpty", 0, 16 },
46166 	{ "MAC_PORT_MTIP_TX_FIFO_ALMOST_F_E", 0x34a28, 0 },
46168 		{ "AlmstEmpty", 0, 16 },
46169 	{ "MAC_PORT_MTIP_HASHTABLE_LOAD", 0x34a2c, 0 },
46171 		{ "ADDR", 0, 6 },
46172 	{ "MAC_PORT_MTIP_MAC_STATUS", 0x34a40, 0 },
46176 		{ "RX_LOC_FAULT", 0, 1 },
46177 	{ "MAC_PORT_MTIP_TX_IPG_LENGTH", 0x34a44, 0 },
46178 	{ "MAC_PORT_MTIP_MAC_CREDIT_TRIGGER", 0x34a48, 0 },
46179 	{ "MAC_PORT_MTIP_INIT_CREDIT", 0x34a4c, 0 },
46180 	{ "MAC_PORT_MTIP_CURRENT_CREDIT", 0x34a50, 0 },
46181 	{ "MAC_PORT_RX_PAUSE_STATUS", 0x34a74, 0 },
46182 	{ "MAC_PORT_MTIP_TS_TIMESTAMP", 0x34a7c, 0 },
46183 	{ "MAC_PORT_AFRAMESTRANSMITTEDOK", 0x34a80, 0 },
46184 	{ "MAC_PORT_AFRAMESTRANSMITTEDOKHI", 0x34a84, 0 },
46185 	{ "MAC_PORT_AFRAMESRECEIVEDOK", 0x34a88, 0 },
46186 	{ "MAC_PORT_AFRAMESRECEIVEDOKHI", 0x34a8c, 0 },
46187 	{ "MAC_PORT_AFRAMECHECKSEQUENCEERRORS", 0x34a90, 0 },
46188 	{ "MAC_PORT_AFRAMECHECKSEQUENCEERRORSHI", 0x34a94, 0 },
46189 	{ "MAC_PORT_AALIGNMENTERRORS", 0x34a98, 0 },
46190 	{ "MAC_PORT_AALIGNMENTERRORSHI", 0x34a9c, 0 },
46191 	{ "MAC_PORT_APAUSEMACCTRLFRAMESTRANSMITTED", 0x34aa0, 0 },
46192 	{ "MAC_PORT_APAUSEMACCTRLFRAMESTRANSMITTEDHI", 0x34aa4, 0 },
46193 	{ "MAC_PORT_APAUSEMACCTRLFRAMESRECEIVED", 0x34aa8, 0 },
46194 	{ "MAC_PORT_APAUSEMACCTRLFRAMESRECEIVEDHI", 0x34aac, 0 },
46195 	{ "MAC_PORT_AFRAMETOOLONGERRORS", 0x34ab0, 0 },
46196 	{ "MAC_PORT_AFRAMETOOLONGERRORSHI", 0x34ab4, 0 },
46197 	{ "MAC_PORT_AINRANGELENGTHERRORS", 0x34ab8, 0 },
46198 	{ "MAC_PORT_AINRANGELENGTHERRORSHI", 0x34abc, 0 },
46199 	{ "MAC_PORT_VLANTRANSMITTEDOK", 0x34ac0, 0 },
46200 	{ "MAC_PORT_VLANTRANSMITTEDOKHI", 0x34ac4, 0 },
46201 	{ "MAC_PORT_VLANRECEIVEDOK", 0x34ac8, 0 },
46202 	{ "MAC_PORT_VLANRECEIVEDOKHI", 0x34acc, 0 },
46203 	{ "MAC_PORT_AOCTETSTRANSMITTEDOK", 0x34ad0, 0 },
46204 	{ "MAC_PORT_AOCTETSTRANSMITTEDOKHI", 0x34ad4, 0 },
46205 	{ "MAC_PORT_AOCTETSRECEIVEDOK", 0x34ad8, 0 },
46206 	{ "MAC_PORT_AOCTETSRECEIVEDOKHI", 0x34adc, 0 },
46207 	{ "MAC_PORT_IFINUCASTPKTS", 0x34ae0, 0 },
46208 	{ "MAC_PORT_IFINUCASTPKTSHI", 0x34ae4, 0 },
46209 	{ "MAC_PORT_IFINMULTICASTPKTS", 0x34ae8, 0 },
46210 	{ "MAC_PORT_IFINMULTICASTPKTSHI", 0x34aec, 0 },
46211 	{ "MAC_PORT_IFINBROADCASTPKTS", 0x34af0, 0 },
46212 	{ "MAC_PORT_IFINBROADCASTPKTSHI", 0x34af4, 0 },
46213 	{ "MAC_PORT_IFOUTERRORS", 0x34af8, 0 },
46214 	{ "MAC_PORT_IFOUTERRORSHI", 0x34afc, 0 },
46215 	{ "MAC_PORT_IFOUTUCASTPKTS", 0x34b08, 0 },
46216 	{ "MAC_PORT_IFOUTUCASTPKTSHI", 0x34b0c, 0 },
46217 	{ "MAC_PORT_IFOUTMULTICASTPKTS", 0x34b10, 0 },
46218 	{ "MAC_PORT_IFOUTMULTICASTPKTSHI", 0x34b14, 0 },
46219 	{ "MAC_PORT_IFOUTBROADCASTPKTS", 0x34b18, 0 },
46220 	{ "MAC_PORT_IFOUTBROADCASTPKTSHI", 0x34b1c, 0 },
46221 	{ "MAC_PORT_ETHERSTATSDROPEVENTS", 0x34b20, 0 },
46222 	{ "MAC_PORT_ETHERSTATSDROPEVENTSHI", 0x34b24, 0 },
46223 	{ "MAC_PORT_ETHERSTATSOCTETS", 0x34b28, 0 },
46224 	{ "MAC_PORT_ETHERSTATSOCTETSHI", 0x34b2c, 0 },
46225 	{ "MAC_PORT_ETHERSTATSPKTS", 0x34b30, 0 },
46226 	{ "MAC_PORT_ETHERSTATSPKTSHI", 0x34b34, 0 },
46227 	{ "MAC_PORT_ETHERSTATSUNDERSIZEPKTS", 0x34b38, 0 },
46228 	{ "MAC_PORT_ETHERSTATSUNDERSIZEPKTSHI", 0x34b3c, 0 },
46229 	{ "MAC_PORT_ETHERSTATSPKTS64OCTETS", 0x34b40, 0 },
46230 	{ "MAC_PORT_ETHERSTATSPKTS64OCTETSHI", 0x34b44, 0 },
46231 	{ "MAC_PORT_ETHERSTATSPKTS65TO127OCTETS", 0x34b48, 0 },
46232 	{ "MAC_PORT_ETHERSTATSPKTS65TO127OCTETSHI", 0x34b4c, 0 },
46233 	{ "MAC_PORT_ETHERSTATSPKTS128TO255OCTETS", 0x34b50, 0 },
46234 	{ "MAC_PORT_ETHERSTATSPKTS128TO255OCTETSHI", 0x34b54, 0 },
46235 	{ "MAC_PORT_ETHERSTATSPKTS256TO511OCTETS", 0x34b58, 0 },
46236 	{ "MAC_PORT_ETHERSTATSPKTS256TO511OCTETSHI", 0x34b5c, 0 },
46237 	{ "MAC_PORT_ETHERSTATSPKTS512TO1023OCTETS", 0x34b60, 0 },
46238 	{ "MAC_PORT_ETHERSTATSPKTS512TO1023OCTETSHI", 0x34b64, 0 },
46239 	{ "MAC_PORT_ETHERSTATSPKTS1024TO1518OCTETS", 0x34b68, 0 },
46240 	{ "MAC_PORT_ETHERSTATSPKTS1024TO1518OCTETSHI", 0x34b6c, 0 },
46241 	{ "MAC_PORT_ETHERSTATSPKTS1519TOMAXOCTETS", 0x34b70, 0 },
46242 	{ "MAC_PORT_ETHERSTATSPKTS1519TOMAXOCTETSHI", 0x34b74, 0 },
46243 	{ "MAC_PORT_ETHERSTATSOVERSIZEPKTS", 0x34b78, 0 },
46244 	{ "MAC_PORT_ETHERSTATSOVERSIZEPKTSHI", 0x34b7c, 0 },
46245 	{ "MAC_PORT_ETHERSTATSJABBERS", 0x34b80, 0 },
46246 	{ "MAC_PORT_ETHERSTATSJABBERSHI", 0x34b84, 0 },
46247 	{ "MAC_PORT_ETHERSTATSFRAGMENTS", 0x34b88, 0 },
46248 	{ "MAC_PORT_ETHERSTATSFRAGMENTSHI", 0x34b8c, 0 },
46249 	{ "MAC_PORT_IFINERRORS", 0x34b90, 0 },
46250 	{ "MAC_PORT_IFINERRORSHI", 0x34b94, 0 },
46251 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_0", 0x34b98, 0 },
46252 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_0HI", 0x34b9c, 0 },
46253 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_1", 0x34ba0, 0 },
46254 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_1HI", 0x34ba4, 0 },
46255 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_2", 0x34ba8, 0 },
46256 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_2HI", 0x34bac, 0 },
46257 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_3", 0x34bb0, 0 },
46258 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_3HI", 0x34bb4, 0 },
46259 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_4", 0x34bb8, 0 },
46260 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_4HI", 0x34bbc, 0 },
46261 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_5", 0x34bc0, 0 },
46262 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_5HI", 0x34bc4, 0 },
46263 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_6", 0x34bc8, 0 },
46264 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_6HI", 0x34bcc, 0 },
46265 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_7", 0x34bd0, 0 },
46266 	{ "MAC_PORT_ACBFCPAUSEFRAMESTRANSMITTED_7HI", 0x34bd4, 0 },
46267 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_0", 0x34bd8, 0 },
46268 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_0HI", 0x34bdc, 0 },
46269 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_1", 0x34be0, 0 },
46270 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_1HI", 0x34be4, 0 },
46271 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_2", 0x34be8, 0 },
46272 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_2HI", 0x34bec, 0 },
46273 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_3", 0x34bf0, 0 },
46274 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_3HI", 0x34bf4, 0 },
46275 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_4", 0x34bf8, 0 },
46276 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_4HI", 0x34bfc, 0 },
46277 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_5", 0x34c00, 0 },
46278 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_5HI", 0x34c04, 0 },
46279 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_6", 0x34c08, 0 },
46280 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_6HI", 0x34c0c, 0 },
46281 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_7", 0x34c10, 0 },
46282 	{ "MAC_PORT_ACBFCPAUSEFRAMESRECEIVED_7HI", 0x34c14, 0 },
46283 	{ "MAC_PORT_AMACCONTROLFRAMESTRANSMITTED", 0x34c18, 0 },
46284 	{ "MAC_PORT_AMACCONTROLFRAMESTRANSMITTEDHI", 0x34c1c, 0 },
46285 	{ "MAC_PORT_AMACCONTROLFRAMESRECEIVED", 0x34c20, 0 },
46286 	{ "MAC_PORT_AMACCONTROLFRAMESRECEIVEDHI", 0x34c24, 0 },
46287 	{ "MAC_PORT_MTIP_1G10G_REVISION", 0x34d00, 0 },
46290 		{ "REV", 0, 8 },
46291 	{ "MAC_PORT_MTIP_1G10G_SCRATCH", 0x34d04, 0 },
46292 	{ "MAC_PORT_MTIP_1G10G_COMMAND_CONFIG", 0x34d08, 0 },
46317 		{ "TX_ENAMAC", 0, 1 },
46318 	{ "MAC_PORT_MTIP_1G10G_MAC_ADDR_0", 0x34d0c, 0 },
46319 	{ "MAC_PORT_MTIP_1G10G_MAC_ADDR_1", 0x34d10, 0 },
46320 	{ "MAC_PORT_MTIP_1G10G_FRM_LENGTH_TX_MTU", 0x34d14, 0 },
46322 		{ "FRM_LEN_SET", 0, 16 },
46323 	{ "MAC_PORT_MTIP_1G10G_RX_FIFO_SECTIONS", 0x34d1c, 0 },
46325 		{ "AVAIL", 0, 16 },
46326 	{ "MAC_PORT_MTIP_1G10G_TX_FIFO_SECTIONS", 0x34d20, 0 },
46328 		{ "AVAIL", 0, 16 },
46329 	{ "MAC_PORT_MTIP_1G10G_RX_FIFO_ALMOST_F_E", 0x34d24, 0 },
46331 		{ "AlmostEmpty", 0, 16 },
46332 	{ "MAC_PORT_MTIP_1G10G_TX_FIFO_ALMOST_F_E", 0x34d28, 0 },
46334 		{ "AlmostEmpty", 0, 16 },
46335 	{ "MAC_PORT_MTIP_1G10G_HASHTABLE_LOAD", 0x34d2c, 0 },
46336 	{ "MAC_PORT_MTIP_1G10G_MDIO_CFG_STATUS", 0x34d30, 0 },
46342 		{ "MDIO_Busy", 0, 1 },
46343 	{ "MAC_PORT_MTIP_1G10G_MDIO_COMMAND", 0x34d34, 0 },
46347 		{ "Device_Reg_Addr", 0, 5 },
46348 	{ "MAC_PORT_MTIP_1G10G_MDIO_DATA", 0x34d38, 0 },
46349 	{ "MAC_PORT_MTIP_1G10G_MDIO_REGADDR", 0x34d3c, 0 },
46350 	{ "MAC_PORT_MTIP_1G10G_STATUS", 0x34d40, 0 },
46358 		{ "RX_LOC_FAULT", 0, 1 },
46359 	{ "MAC_PORT_MTIP_1G10G_TX_IPG_LENGTH", 0x34d44, 0 },
46360 	{ "MAC_PORT_MTIP_1G10G_CREDIT_TRIGGER", 0x34d48, 0 },
46361 	{ "MAC_PORT_MTIP_1G10G_INIT_CREDIT", 0x34d4c, 0 },
46362 	{ "MAC_PORT_MTIP_1G10G_CL01_PAUSE_QUANTA", 0x34d54, 0 },
46364 		{ "CL0_PAUSE_QUANTA", 0, 16 },
46365 	{ "MAC_PORT_MTIP_1G10G_CL23_PAUSE_QUANTA", 0x34d58, 0 },
46367 		{ "CL2_PAUSE_QUANTA", 0, 16 },
46368 	{ "MAC_PORT_MTIP_1G10G_CL45_PAUSE_QUANTA", 0x34d5c, 0 },
46370 		{ "CL4_PAUSE_QUANTA", 0, 16 },
46371 	{ "MAC_PORT_MTIP_1G10G_CL67_PAUSE_QUANTA", 0x34d60, 0 },
46373 		{ "CL6_PAUSE_QUANTA", 0, 16 },
46374 	{ "MAC_PORT_MTIP_1G10G_CL01_QUANTA_THRESH", 0x34d64, 0 },
46376 		{ "CL0_QUANTA_THRESH", 0, 16 },
46377 	{ "MAC_PORT_MTIP_1G10G_CL23_QUANTA_THRESH", 0x34d68, 0 },
46379 		{ "CL2_QUANTA_THRESH", 0, 16 },
46380 	{ "MAC_PORT_MTIP_1G10G_CL45_QUANTA_THRESH", 0x34d6c, 0 },
46382 		{ "CL4_QUANTA_THRESH", 0, 16 },
46383 	{ "MAC_PORT_MTIP_1G10G_CL67_QUANTA_THRESH", 0x34d70, 0 },
46385 		{ "CL6_QUANTA_THRESH", 0, 16 },
46386 	{ "MAC_PORT_MTIP_1G10G_RX_PAUSE_STATUS", 0x34d74, 0 },
46387 	{ "MAC_PORT_MTIP_1G10G_TS_TIMESTAMP", 0x34d7c, 0 },
46388 	{ "MAC_PORT_MTIP_1G10G_STATN_CONFIG", 0x34de0, 0 },
46391 		{ "SATURATE", 0, 1 },
46392 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOCTETS", 0x34e00, 0 },
46393 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOCTETSHI", 0x34e04, 0 },
46394 	{ "MAC_PORT_MTIP_1G10G_RX_OCTETSOK", 0x34e08, 0 },
46395 	{ "MAC_PORT_MTIP_1G10G_RX_OCTETSOKHI", 0x34e0c, 0 },
46396 	{ "MAC_PORT_MTIP_1G10G_RX_AALIGNMENTERRORS", 0x34e10, 0 },
46397 	{ "MAC_PORT_MTIP_1G10G_RX_AALIGNMENTERRORSHI", 0x34e14, 0 },
46398 	{ "MAC_PORT_MTIP_1G10G_RX_APAUSEMACCTRLFRAMES", 0x34e18, 0 },
46399 	{ "MAC_PORT_MTIP_1G10G_RX_APAUSEMACCTRLFRAMESHI", 0x34e1c, 0 },
46400 	{ "MAC_PORT_MTIP_1G10G_RX_FRAMESOK", 0x34e20, 0 },
46401 	{ "MAC_PORT_MTIP_1G10G_RX_FRAMESOKHI", 0x34e24, 0 },
46402 	{ "MAC_PORT_MTIP_1G10G_RX_CRCERRORS", 0x34e28, 0 },
46403 	{ "MAC_PORT_MTIP_1G10G_RX_CRCERRORSHI", 0x34e2c, 0 },
46404 	{ "MAC_PORT_MTIP_1G10G_RX_VLANOK", 0x34e30, 0 },
46405 	{ "MAC_PORT_MTIP_1G10G_RX_VLANOKHI", 0x34e34, 0 },
46406 	{ "MAC_PORT_MTIP_1G10G_RX_IFINERRORS", 0x34e38, 0 },
46407 	{ "MAC_PORT_MTIP_1G10G_RX_IFINERRORSHI", 0x34e3c, 0 },
46408 	{ "MAC_PORT_MTIP_1G10G_RX_IFINUCASTPKTS", 0x34e40, 0 },
46409 	{ "MAC_PORT_MTIP_1G10G_RX_IFINUCASTPKTSHI", 0x34e44, 0 },
46410 	{ "MAC_PORT_MTIP_1G10G_RX_IFINMULTICASTPKTS", 0x34e48, 0 },
46411 	{ "MAC_PORT_MTIP_1G10G_RX_IFINMULTICASTPKTSHI", 0x34e4c, 0 },
46412 	{ "MAC_PORT_MTIP_1G10G_RX_IFINBROADCASTPKTS", 0x34e50, 0 },
46413 	{ "MAC_PORT_MTIP_1G10G_RX_IFINBROADCASTPKTSHI", 0x34e54, 0 },
46414 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSDROPEVENTS", 0x34e58, 0 },
46415 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSDROPEVENTSHI", 0x34e5c, 0 },
46416 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS", 0x34e60, 0 },
46417 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTSHI", 0x34e64, 0 },
46418 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSUNDERSIZEPKTS", 0x34e68, 0 },
46419 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSUNDERSIZEPKTSHI", 0x34e6c, 0 },
46420 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS64OCTETS", 0x34e70, 0 },
46421 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS64OCTETSHI", 0x34e74, 0 },
46422 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS65TO127OCTETS", 0x34e78, 0 },
46423 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS65TO127OCTETSHI", 0x34e7c, 0 },
46424 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS128TO255OCTETS", 0x34e80, 0 },
46425 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS128TO255OCTETSHI", 0x34e84, 0 },
46426 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS256TO511OCTETS", 0x34e88, 0 },
46427 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS256TO511OCTETSHI", 0x34e8c, 0 },
46428 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS512TO1023OCTETS", 0x34e90, 0 },
46429 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS512TO1023OCTETSHI", 0x34e94, 0 },
46430 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1024TO1518OCTETS", 0x34e98, 0 },
46431 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1024TO1518OCTETSHI", 0x34e9c, 0 },
46432 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1519TOMAX", 0x34ea0, 0 },
46433 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSPKTS1519TOMAXHI", 0x34ea4, 0 },
46434 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOVERSIZEPKTS", 0x34ea8, 0 },
46435 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSOVERSIZEPKTSHI", 0x34eac, 0 },
46436 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSJABBERS", 0x34eb0, 0 },
46437 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSJABBERSHI", 0x34eb4, 0 },
46438 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSFRAGMENTS", 0x34eb8, 0 },
46439 	{ "MAC_PORT_MTIP_1G10G_RX_ETHERSTATSFRAGMENTSHI", 0x34ebc, 0 },
46440 	{ "MAC_PORT_MTIP_1G10G_AMACCONTROLFRAMESRECEIVED", 0x34ec0, 0 },
46441 	{ "MAC_PORT_MTIP_1G10G_AMACCONTROLFRAMESRECEIVEDHI", 0x34ec4, 0 },
46442 	{ "MAC_PORT_MTIP_1G10G_RX_AFRAMETOOLONG", 0x34ec8, 0 },
46443 	{ "MAC_PORT_MTIP_1G10G_RX_AFRAMETOOLONGHI", 0x34ecc, 0 },
46444 	{ "MAC_PORT_MTIP_1G10G_RX_AINRANGELENGTHERRORS", 0x34ed0, 0 },
46445 	{ "MAC_PORT_MTIP_1G10G_RX_AINRANGELENGTHERRORSHI", 0x34ed4, 0 },
46446 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSOCTETS", 0x34f00, 0 },
46447 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSOCTETSHI", 0x34f04, 0 },
46448 	{ "MAC_PORT_MTIP_1G10G_TX_OCTETSOK", 0x34f08, 0 },
46449 	{ "MAC_PORT_MTIP_1G10G_TX_OCTETSOKHI", 0x34f0c, 0 },
46450 	{ "MAC_PORT_MTIP_1G10G_TX_AALIGNMENTERRORS", 0x34f10, 0 },
46451 	{ "MAC_PORT_MTIP_1G10G_TX_AALIGNMENTERRORSHI", 0x34f14, 0 },
46452 	{ "MAC_PORT_MTIP_1G10G_TX_APAUSEMACCTRLFRAMES", 0x34f18, 0 },
46453 	{ "MAC_PORT_MTIP_1G10G_TX_APAUSEMACCTRLFRAMESHI", 0x34f1c, 0 },
46454 	{ "MAC_PORT_MTIP_1G10G_TX_FRAMESOK", 0x34f20, 0 },
46455 	{ "MAC_PORT_MTIP_1G10G_TX_FRAMESOKHI", 0x34f24, 0 },
46456 	{ "MAC_PORT_MTIP_1G10G_TX_CRCERRORS", 0x34f28, 0 },
46457 	{ "MAC_PORT_MTIP_1G10G_TX_CRCERRORSHI", 0x34f2c, 0 },
46458 	{ "MAC_PORT_MTIP_1G10G_TX_VLANOK", 0x34f30, 0 },
46459 	{ "MAC_PORT_MTIP_1G10G_TX_VLANOKHI", 0x34f34, 0 },
46460 	{ "MAC_PORT_MTIP_1G10G_TX_IFOUTERRORS", 0x34f38, 0 },
46461 	{ "MAC_PORT_MTIP_1G10G_TX_IFOUTERRORSHI", 0x34f3c, 0 },
46462 	{ "MAC_PORT_MTIP_1G10G_TX_IFUCASTPKTS", 0x34f40, 0 },
46463 	{ "MAC_PORT_MTIP_1G10G_TX_IFUCASTPKTSHI", 0x34f44, 0 },
46464 	{ "MAC_PORT_MTIP_1G10G_TX_IFMULTICASTPKTS", 0x34f48, 0 },
46465 	{ "MAC_PORT_MTIP_1G10G_TX_IFMULTICASTPKTSHI", 0x34f4c, 0 },
46466 	{ "MAC_PORT_MTIP_1G10G_TX_IFBROADCASTPKTS", 0x34f50, 0 },
46467 	{ "MAC_PORT_MTIP_1G10G_TX_IFBROADCASTPKTSHI", 0x34f54, 0 },
46468 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSDROPEVENTS", 0x34f58, 0 },
46469 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSDROPEVENTSHI", 0x34f5c, 0 },
46470 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS", 0x34f60, 0 },
46471 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTSHI", 0x34f64, 0 },
46472 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSUNDERSIZEPKTS", 0x34f68, 0 },
46473 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSUNDERSIZEPKTSHI", 0x34f6c, 0 },
46474 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS64OCTETS", 0x34f70, 0 },
46475 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS64OCTETSHI", 0x34f74, 0 },
46476 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS65TO127OCTETS", 0x34f78, 0 },
46477 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS65TO127OCTETSHI", 0x34f7c, 0 },
46478 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS128TO255OCTETS", 0x34f80, 0 },
46479 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS128TO255OCTETSHI", 0x34f84, 0 },
46480 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS256TO511OCTETS", 0x34f88, 0 },
46481 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS256TO511OCTETSHI", 0x34f8c, 0 },
46482 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS512TO1023OCTETS", 0x34f90, 0 },
46483 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS512TO1023OCTETSHI", 0x34f94, 0 },
46484 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS1024TO1518OCTETS", 0x34f98, 0 },
46485 	{ "MAC_PORT_MTIP_1G10G_TX_ETHERSTATSPKTS1024TO1518OCTETSHI", 0x34f9c, 0 },
46486 	{ "MAC_PORT_MTIP_1G10G_ETHERSTATSPKTS1519TOTX_MTU", 0x34fa0, 0 },
46487 	{ "MAC_PORT_MTIP_1G10G_ETHERSTATSPKTS1519TOTX_MTUHI", 0x34fa4, 0 },
46488 	{ "MAC_PORT_MTIP_1G10G_TX_AMACCONTROLFRAMES", 0x34fc0, 0 },
46489 	{ "MAC_PORT_MTIP_1G10G_TX_AMACCONTROLFRAMESHI", 0x34fc4, 0 },
46490 	{ "MAC_PORT_MTIP_1G10G_IF_MODE", 0x35000, 0 },
46492 		{ "IF_MODE", 0, 2 },
46493 	{ "MAC_PORT_MTIP_1G10G_IF_STATUS", 0x35004, 0 },
46494 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_0", 0x35080, 0 },
46495 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_0HI", 0x35084, 0 },
46496 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_1", 0x35088, 0 },
46497 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_1HI", 0x3508c, 0 },
46498 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_2", 0x35090, 0 },
46499 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_2HI", 0x35094, 0 },
46500 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_3", 0x35098, 0 },
46501 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_3HI", 0x3509c, 0 },
46502 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_4", 0x350a0, 0 },
46503 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_4HI", 0x350a4, 0 },
46504 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_5", 0x350a8, 0 },
46505 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_5HI", 0x350ac, 0 },
46506 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_6", 0x350b0, 0 },
46507 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_6HI", 0x350b4, 0 },
46508 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_7", 0x350b8, 0 },
46509 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESRECEIVED_7HI", 0x350bc, 0 },
46510 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_0", 0x350c0, 0 },
46511 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_0HI", 0x350c4, 0 },
46512 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_1", 0x350c8, 0 },
46513 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_1HI", 0x350cc, 0 },
46514 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_2", 0x350d0, 0 },
46515 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_2HI", 0x350d4, 0 },
46516 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_3", 0x350d8, 0 },
46517 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_3HI", 0x350dc, 0 },
46518 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_4", 0x350e0, 0 },
46519 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_4HI", 0x350e4, 0 },
46520 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_5", 0x350e8, 0 },
46521 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_5HI", 0x350ec, 0 },
46522 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_6", 0x350f0, 0 },
46523 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_6HI", 0x350f4, 0 },
46524 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_7", 0x350f8, 0 },
46525 	{ "MAC_PORT_MTIP_1G10G_PFCFRAMESTRANSMITTED_7HI", 0x350fc, 0 },
46526 	{ "MAC_PORT_MTIP_SGMII_CONTROL", 0x35200, 0 },
46537 	{ "MAC_PORT_MTIP_SGMII_STATUS", 0x35204, 0 },
46551 		{ "ExtdCapability", 0, 1 },
46552 	{ "MAC_PORT_MTIP_SGMII_PHY_IDENTIFIER_0", 0x35208, 0 },
46553 	{ "MAC_PORT_MTIP_SGMII_PHY_IDENTIFIER_1", 0x3520c, 0 },
46554 	{ "MAC_PORT_MTIP_SGMII_DEV_ABILITY", 0x35210, 0 },
46563 	{ "MAC_PORT_MTIP_SGMII_PARTNER_ABILITY", 0x35214, 0 },
46568 	{ "MAC_PORT_MTIP_SGMII_AN_EXPANSION", 0x35218, 0 },
46571 	{ "MAC_PORT_MTIP_SGMII_NP_TX", 0x3521c, 0 },
46572 	{ "MAC_PORT_MTIP_SGMII_LP_NP_RX", 0x35220, 0 },
46573 	{ "MAC_PORT_MTIP_SGMII_EXTENDED_STATUS", 0x3523c, 0 },
46574 	{ "MAC_PORT_MTIP_SGMII_SCRATCH", 0x35240, 0 },
46575 	{ "MAC_PORT_MTIP_SGMII_REV", 0x35244, 0 },
46578 		{ "REV", 0, 8 },
46579 	{ "MAC_PORT_MTIP_SGMII_LINK_TIMER_LO", 0x35248, 0 },
46580 	{ "MAC_PORT_MTIP_SGMII_LINK_TIMER_HI", 0x3524c, 0 },
46581 	{ "MAC_PORT_MTIP_SGMII_IF_MODE", 0x35250, 0 },
46585 		{ "SGMII_ENA", 0, 1 },
46586 	{ "MAC_PORT_MTIP_SGMII_DECODE_ERROR", 0x35254, 0 },
46587 	{ "MAC_PORT_MTIP_KR_PCS_CONTROL_1", 0x35300, 0 },
46594 	{ "MAC_PORT_MTIP_KR_PCS_STATUS_1", 0x35304, 0 },
46602 	{ "MAC_PORT_MTIP_KR_PCS_DEVICE_IDENTIFIER_1", 0x35308, 0 },
46603 	{ "MAC_PORT_MTIP_KR_PCS_DEVICE_IDENTIFIER_2", 0x3530c, 0 },
46604 	{ "MAC_PORT_MTIP_KR_PCS_SPEED_ABILITY", 0x35310, 0 },
46605 	{ "MAC_PORT_MTIP_KR_PCS_DEVICES_IN_PACKAGELO", 0x35314, 0 },
46612 		{ "Clause_22_Reg_Present", 0, 1 },
46613 	{ "MAC_PORT_MTIP_KR_PCS_DEVICES_IN_PACKAGEHI", 0x35318, 0 },
46620 		{ "Clause_22_Reg_Present", 0, 1 },
46621 	{ "MAC_PORT_MTIP_KR_PCS_CONTROL_2", 0x3531c, 0 },
46622 	{ "MAC_PORT_MTIP_KR_PCS_STATUS_2", 0x35320, 0 },
46628 		{ "10GBASE_R_Capable", 0, 1 },
46629 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_PACKAGE_IDENTIFIER_LO", 0x35338, 0 },
46630 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_PACKAGE_IDENTIFIER_HI", 0x3533c, 0 },
46631 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_STATUS_1", 0x35380, 0 },
46636 		{ "10GBASE_R_PCS_Block_Lock", 0, 1 },
46637 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_STATUS_2", 0x35384, 0 },
46641 		{ "ErrBlkCnt", 0, 8 },
46642 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_0", 0x35388, 0 },
46643 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_1", 0x3538c, 0 },
46644 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_2", 0x35390, 0 },
46645 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_A_3", 0x35394, 0 },
46646 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_0", 0x35398, 0 },
46647 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_1", 0x3539c, 0 },
46648 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_2", 0x353a0, 0 },
46649 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_SEED_B_3", 0x353a4, 0 },
46650 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_CONTROL", 0x353a8, 0 },
46657 		{ "Data_Pattern_Select", 0, 1 },
46658 	{ "MAC_PORT_MTIP_KR_10GBASE_R_PCS_TEST_PATTERN_ERROR_COUNTER", 0x353ac, 0 },
46659 	{ "MAC_PORT_MTIP_KR_VENDOR_SPECIFIC_PCS_STATUS", 0x353b4, 0 },
46661 		{ "Receive_FIFO_Fault", 0, 1 },
46662 	{ "MAC_PORT_MTIP_KR4_CONTROL_1", 0x35400, 0 },
46669 	{ "MAC_PORT_MTIP_KR4_STATUS_1", 0x35404, 0 },
46673 	{ "MAC_PORT_MTIP_KR4_DEVICE_ID0", 0x35408, 0 },
46674 	{ "MAC_PORT_MTIP_KR4_DEVICE_ID1", 0x3540c, 0 },
46676 	{ "MAC_PORT_MTIP_KR4_SPEED_ABILITY", 0x35410, 0 },
46680 		{ "10G_capable", 0, 1 },
46681 	{ "MAC_PORT_MTIP_KR4_DEVICES_IN_PKG1", 0x35414, 0 },
46688 		{ "Clause_22_reg", 0, 1 },
46689 	{ "MAC_PORT_MTIP_KR4_DEVICES_IN_PKG2", 0x35418, 0 },
46693 	{ "MAC_PORT_MTIP_KR4_CONTROL_2", 0x3541c, 0 },
46694 	{ "MAC_PORT_MTIP_KR4_STATUS_2", 0x35420, 0 },
46703 		{ "10GBase_R_capable", 0, 1 },
46704 	{ "MAC_PORT_MTIP_KR4_PKG_ID0", 0x35438, 0 },
46705 	{ "MAC_PORT_MTIP_KR4_PKG_ID1", 0x3543c, 0 },
46706 	{ "MAC_PORT_MTIP_KR4_BASE_R_STATUS_1", 0x35480, 0 },
46709 		{ "Block_lock", 0, 1 },
46710 	{ "MAC_PORT_MTIP_KR4_BASE_R_STATUS_2", 0x35484, 0 },
46714 		{ "Err_bl_cnt", 0, 8 },
46715 	{ "MAC_PORT_MTIP_KR4_BASE_R_TEST_CONTROL", 0x354a8, 0 },
46718 	{ "MAC_PORT_MTIP_KR4_BASE_R_TEST_ERR_CNT", 0x354ac, 0 },
46719 	{ "MAC_PORT_MTIP_KR4_BER_HIGH_ORDER_CNT", 0x354b0, 0 },
46720 	{ "MAC_PORT_MTIP_KR4_ERR_BLK_HIGH_ORDER_CNT", 0x354b4, 0 },
46722 		{ "ERR_BLK_CNTR", 0, 14 },
46723 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_1", 0x354c8, 0 },
46728 		{ "LANE_0_BLK_LCK", 0, 1 },
46729 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_2", 0x354cc, 0 },
46730 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_3", 0x354d0, 0 },
46734 		{ "LANE_0_ALIGN_MRKR_LCK", 0, 1 },
46735 	{ "MAC_PORT_MTIP_KR4_MULTI_LANE_ALIGN_STATUS_4", 0x354d4, 0 },
46736 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_0", 0x35720, 0 },
46737 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_1", 0x35724, 0 },
46738 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_2", 0x35728, 0 },
46739 	{ "MAC_PORT_MTIP_KR4_BIP_ERR_CNT_LANE_3", 0x3572c, 0 },
46740 	{ "MAC_PORT_MTIP_KR4_LANE_0_MAPPING", 0x35a40, 0 },
46741 	{ "MAC_PORT_MTIP_KR4_LANE_1_MAPPING", 0x35a44, 0 },
46742 	{ "MAC_PORT_MTIP_KR4_LANE_2_MAPPING", 0x35a48, 0 },
46743 	{ "MAC_PORT_MTIP_KR4_LANE_3_MAPPING", 0x35a4c, 0 },
46744 	{ "MAC_PORT_MTIP_KR4_SCRATCH", 0x35af0, 0 },
46745 	{ "MAC_PORT_MTIP_KR4_CORE_REVISION", 0x35af4, 0 },
46746 	{ "MAC_PORT_MTIP_KR4_VL_INTVL", 0x35af8, 0 },
46747 	{ "MAC_PORT_MTIP_KR4_TX_LANE_THRESH", 0x35afc, 0 },
46748 	{ "MAC_PORT_MTIP_CR4_CONTROL_1", 0x35b00, 0 },
46755 	{ "MAC_PORT_MTIP_CR4_STATUS_1", 0x35b04, 0 },
46759 	{ "MAC_PORT_MTIP_CR4_DEVICE_ID0", 0x35b08, 0 },
46760 	{ "MAC_PORT_MTIP_CR4_DEVICE_ID1", 0x35b0c, 0 },
46761 	{ "MAC_PORT_MTIP_CR4_SPEED_ABILITY", 0x35b10, 0 },
46765 		{ "10G_capable", 0, 1 },
46766 	{ "MAC_PORT_MTIP_CR4_DEVICES_IN_PKG1", 0x35b14, 0 },
46773 		{ "Clause22reg_present", 0, 1 },
46774 	{ "MAC_PORT_MTIP_CR4_DEVICES_IN_PKG2", 0x35b18, 0 },
46778 	{ "MAC_PORT_MTIP_CR4_CONTROL_2", 0x35b1c, 0 },
46779 	{ "MAC_PORT_MTIP_CR4_STATUS_2", 0x35b20, 0 },
46788 		{ "10GBase_R_capable", 0, 1 },
46789 	{ "MAC_PORT_MTIP_CR4_PKG_ID0", 0x35b38, 0 },
46790 	{ "MAC_PORT_MTIP_CR4_PKG_ID1", 0x35b3c, 0 },
46791 	{ "MAC_PORT_MTIP_CR4_BASE_R_STATUS_1", 0x35b80, 0 },
46794 		{ "Block_Lock", 0, 1 },
46795 	{ "MAC_PORT_MTIP_CR4_BASE_R_STATUS_2", 0x35b84, 0 },
46799 		{ "Errored_blocks_cntr", 0, 8 },
46800 	{ "MAC_PORT_MTIP_CR4_BASE_R_TEST_CONTROL", 0x35ba8, 0 },
46802 	{ "MAC_PORT_MTIP_CR4_BASE_R_TEST_ERR_CNT", 0x35bac, 0 },
46803 	{ "MAC_PORT_MTIP_CR4_BER_HIGH_ORDER_CNT", 0x35bb0, 0 },
46804 	{ "MAC_PORT_MTIP_CR4_ERR_BLK_HIGH_ORDER_CNT", 0x35bb4, 0 },
46806 		{ "ERR_BLKS_CNTR", 0, 14 },
46807 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_1", 0x35bc8, 0 },
46816 		{ "Lane_0_blck_lck", 0, 1 },
46817 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_2", 0x35bcc, 0 },
46829 		{ "Lane_8_blck_lck", 0, 1 },
46830 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_3", 0x35bd0, 0 },
46838 		{ "Lane0_algn_mrkr_lck", 0, 1 },
46839 	{ "MAC_PORT_MTIP_CR4_MULTI_LANE_ALIGN_STATUS_4", 0x35bd4, 0 },
46851 		{ "Lane8_algn_mrkr_lck", 0, 1 },
46852 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_0", 0x35e20, 0 },
46853 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_1", 0x35e24, 0 },
46854 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_2", 0x35e28, 0 },
46855 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_3", 0x35e2c, 0 },
46856 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_4", 0x35e30, 0 },
46857 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_5", 0x35e34, 0 },
46858 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_6", 0x35e38, 0 },
46859 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_7", 0x35e3c, 0 },
46860 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_8", 0x35e40, 0 },
46861 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_9", 0x35e44, 0 },
46862 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_10", 0x35e48, 0 },
46863 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_11", 0x35e4c, 0 },
46864 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_12", 0x35e50, 0 },
46865 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_13", 0x35e54, 0 },
46866 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_14", 0x35e58, 0 },
46867 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_15", 0x35e5c, 0 },
46868 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_16", 0x35e60, 0 },
46869 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_17", 0x35e64, 0 },
46870 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_18", 0x35e68, 0 },
46871 	{ "MAC_PORT_MTIP_CR4_BIP_ERR_CNTLANE_19", 0x35e6c, 0 },
46872 	{ "MAC_PORT_MTIP_CR4_LANE_0_MAPPING", 0x36140, 0 },
46873 	{ "MAC_PORT_MTIP_CR4_LANE_1_MAPPING", 0x36144, 0 },
46874 	{ "MAC_PORT_MTIP_CR4_LANE_2_MAPPING", 0x36148, 0 },
46875 	{ "MAC_PORT_MTIP_CR4_LANE_3_MAPPING", 0x3614c, 0 },
46876 	{ "MAC_PORT_MTIP_CR4_LANE_4_MAPPING", 0x36150, 0 },
46877 	{ "MAC_PORT_MTIP_CR4_LANE_5_MAPPING", 0x36154, 0 },
46878 	{ "MAC_PORT_MTIP_CR4_LANE_6_MAPPING", 0x36158, 0 },
46879 	{ "MAC_PORT_MTIP_CR4_LANE_7_MAPPING", 0x3615c, 0 },
46880 	{ "MAC_PORT_MTIP_CR4_LANE_8_MAPPING", 0x36160, 0 },
46881 	{ "MAC_PORT_MTIP_CR4_LANE_9_MAPPING", 0x36164, 0 },
46882 	{ "MAC_PORT_MTIP_CR4_LANE_10_MAPPING", 0x36168, 0 },
46883 	{ "MAC_PORT_MTIP_CR4_LANE_11_MAPPING", 0x3616c, 0 },
46884 	{ "MAC_PORT_MTIP_CR4_LANE_12_MAPPING", 0x36170, 0 },
46885 	{ "MAC_PORT_MTIP_CR4_LANE_13_MAPPING", 0x36174, 0 },
46886 	{ "MAC_PORT_MTIP_CR4_LANE_14_MAPPING", 0x36178, 0 },
46887 	{ "MAC_PORT_MTIP_CR4_LANE_15_MAPPING", 0x3617c, 0 },
46888 	{ "MAC_PORT_MTIP_CR4_LANE_16_MAPPING", 0x36180, 0 },
46889 	{ "MAC_PORT_MTIP_CR4_LANE_17_MAPPING", 0x36184, 0 },
46890 	{ "MAC_PORT_MTIP_CR4_LANE_18_MAPPING", 0x36188, 0 },
46891 	{ "MAC_PORT_MTIP_CR4_LANE_19_MAPPING", 0x3618c, 0 },
46892 	{ "MAC_PORT_MTIP_CR4_SCRATCH", 0x361f0, 0 },
46893 	{ "MAC_PORT_MTIP_CR4_CORE_REVISION", 0x361f4, 0 },
46894 	{ "MAC_PORT_MTIP_RS_FEC_CONTROL", 0x36200, 0 },
46896 		{ "RS_FEC_Bypass_Correction", 0, 1 },
46897 	{ "MAC_PORT_MTIP_RS_FEC_STATUS", 0x36204, 0 },
46902 		{ "RS_FEC_bypass_correction_ability", 0, 1 },
46903 	{ "MAC_PORT_MTIP_RS_FEC_CCW_LO", 0x36208, 0 },
46904 	{ "MAC_PORT_MTIP_RS_FEC_CCW_HI", 0x3620c, 0 },
46905 	{ "MAC_PORT_MTIP_RS_FEC_NCCW_LO", 0x36210, 0 },
46906 	{ "MAC_PORT_MTIP_RS_FEC_NCCW_HI", 0x36214, 0 },
46907 	{ "MAC_PORT_MTIP_RS_FEC_LANEMAPRS_FEC_NCCW_HI", 0x36218, 0 },
46908 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR0_LO", 0x36228, 0 },
46909 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR0_HI", 0x3622c, 0 },
46910 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR1_LO", 0x36230, 0 },
46911 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR1_HI", 0x36234, 0 },
46912 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR2_LO", 0x36238, 0 },
46913 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR2_HI", 0x3623c, 0 },
46914 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR3_LO", 0x36240, 0 },
46915 	{ "MAC_PORT_MTIP_RS_FEC_SYMBLERR3_HI", 0x36244, 0 },
46916 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_CONTROL", 0x36400, 0 },
46919 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_INFO_1", 0x36404, 0 },
46928 		{ "amps_lock", 0, 4 },
46929 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_INFO_2", 0x36408, 0 },
46930 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_REVISION", 0x3640c, 0 },
46931 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_KEY", 0x36410, 0 },
46932 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_SYMBOLS", 0x36414, 0 },
46933 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_PATTERN", 0x36418, 0 },
46934 	{ "MAC_PORT_MTIP_RS_FEC_VENDOR_TX_TEST_TRIGGER", 0x3641c, 0 },
46935 	{ "MAC_PORT_MTIP_FEC_ABILITY", 0x36618, 0 },
46937 		{ "BASE_R_FEC_Ability", 0, 1 },
46938 	{ "MAC_PORT_FEC_CONTROL", 0x3661c, 0 },
46940 		{ "fec_en", 0, 1 },
46941 	{ "MAC_PORT_FEC_STATUS", 0x36620, 0 },
46943 		{ "FEC_LOCKED", 0, 1 },
46944 	{ "MAC_PORT_MTIP_FEC0_CERR_CNT_0", 0x36624, 0 },
46945 	{ "MAC_PORT_MTIP_FEC0_CERR_CNT_1", 0x36628, 0 },
46946 	{ "MAC_PORT_MTIP_FEC0_NCERR_CNT_0", 0x3662c, 0 },
46947 	{ "MAC_PORT_MTIP_FEC0_NCERR_CNT_1", 0x36630, 0 },
46948 	{ "MAC_PORT_MTIP_FEC_STATUS1", 0x36664, 0 },
46950 		{ "FEC_LOCKED", 0, 1 },
46951 	{ "MAC_PORT_MTIP_FEC1_CERR_CNT_0", 0x36668, 0 },
46952 	{ "MAC_PORT_MTIP_FEC1_CERR_CNT_1", 0x3666c, 0 },
46953 	{ "MAC_PORT_MTIP_FEC1_NCERR_CNT_0", 0x36670, 0 },
46954 	{ "MAC_PORT_MTIP_FEC1_NCERR_CNT_1", 0x36674, 0 },
46955 	{ "MAC_PORT_MTIP_FEC_STATUS2", 0x366a8, 0 },
46957 		{ "FEC_LOCKED", 0, 1 },
46958 	{ "MAC_PORT_MTIP_FEC2_CERR_CNT_0", 0x366ac, 0 },
46959 	{ "MAC_PORT_MTIP_FEC2_CERR_CNT_1", 0x366b0, 0 },
46960 	{ "MAC_PORT_MTIP_FEC2_NCERR_CNT_0", 0x366b4, 0 },
46961 	{ "MAC_PORT_MTIP_FEC2_NCERR_CNT_1", 0x366b8, 0 },
46962 	{ "MAC_PORT_MTIP_FEC_STATUS3", 0x366ec, 0 },
46964 		{ "FEC_LOCKED", 0, 1 },
46965 	{ "MAC_PORT_MTIP_FEC3_CERR_CNT_0", 0x366f0, 0 },
46966 	{ "MAC_PORT_MTIP_FEC3_CERR_CNT_1", 0x366f4, 0 },
46967 	{ "MAC_PORT_MTIP_FEC3_NCERR_CNT_0", 0x366f8, 0 },
46968 	{ "MAC_PORT_MTIP_FEC3_NCERR_CNT_1", 0x366fc, 0 },
46969 	{ "MAC_PORT_BEAN_CTL", 0x36c00, 0 },
46974 	{ "MAC_PORT_BEAN_STATUS", 0x36c04, 0 },
46982 		{ "LP_BEAN_ABILITY", 0, 1 },
46983 	{ "MAC_PORT_BEAN_ABILITY_0", 0x36c08, 0 },
46989 		{ "SELECTOR", 0, 5 },
46990 	{ "MAC_PORT_BEAN_ABILITY_1", 0x36c0c, 0 },
46992 		{ "TX_NONCE", 0, 5 },
46993 	{ "MAC_PORT_BEAN_ABILITY_2", 0x36c10, 0 },
46995 		{ "TECH_ABILITY_2", 0, 14 },
46996 	{ "MAC_PORT_BEAN_REM_ABILITY_0", 0x36c14, 0 },
47002 		{ "SELECTOR", 0, 5 },
47003 	{ "MAC_PORT_BEAN_REM_ABILITY_1", 0x36c18, 0 },
47005 		{ "TX_NONCE", 0, 5 },
47006 	{ "MAC_PORT_BEAN_REM_ABILITY_2", 0x36c1c, 0 },
47008 		{ "TECH_ABILITY_2", 0, 14 },
47009 	{ "MAC_PORT_BEAN_MS_COUNT", 0x36c20, 0 },
47010 	{ "MAC_PORT_BEAN_XNP_0", 0x36c24, 0 },
47016 		{ "MU", 0, 11 },
47017 	{ "MAC_PORT_BEAN_XNP_1", 0x36c28, 0 },
47018 	{ "MAC_PORT_BEAN_XNP_2", 0x36c2c, 0 },
47019 	{ "MAC_PORT_LP_BEAN_XNP_0", 0x36c30, 0 },
47025 		{ "MU", 0, 11 },
47026 	{ "MAC_PORT_LP_BEAN_XNP_1", 0x36c34, 0 },
47027 	{ "MAC_PORT_LP_BEAN_XNP_2", 0x36c38, 0 },
47028 	{ "MAC_PORT_BEAN_ETH_STATUS", 0x36c3c, 0 },
47039 	{ "MAC_PORT_AE_RX_COEF_REQ", 0x36a00, 0 },
47045 		{ "T5_RXREQ_C0", 0, 2 },
47046 	{ "MAC_PORT_AE_RX_COEF_STAT", 0x36a04, 0 },
47054 		{ "T5_AE0_RXSTAT_C0", 0, 2 },
47055 	{ "MAC_PORT_AE_TX_COEF_REQ", 0x36a08, 0 },
47062 		{ "T5_TXREQ_C0", 0, 2 },
47063 	{ "MAC_PORT_AE_TX_COEF_STAT", 0x36a0c, 0 },
47068 		{ "T5_TXSTAT_C0", 0, 2 },
47069 	{ "MAC_PORT_AE_REG_MODE", 0x36a10, 0 },
47082 		{ "STICKY_MODE", 0, 1 },
47083 	{ "MAC_PORT_AE_PRBS_CTL", 0x36a14, 0 },
47090 		{ "PRBS_GEN_OFF", 0, 1 },
47091 	{ "MAC_PORT_AE_FSM_CTL", 0x36a18, 0 },
47103 		{ "FSM_TR_EN", 0, 1 },
47104 	{ "MAC_PORT_AE_FSM_STATE", 0x36a1c, 0 },
47109 		{ "TFSM_STATE", 0, 3 },
47110 	{ "MAC_PORT_AE_RX_COEF_REQ_1", 0x36a20, 0 },
47116 		{ "T5_RXREQ_C0", 0, 2 },
47117 	{ "MAC_PORT_AE_RX_COEF_STAT_1", 0x36a24, 0 },
47125 		{ "T5_AE1_RXSTAT_C0", 0, 2 },
47126 	{ "MAC_PORT_AE_TX_COEF_REQ_1", 0x36a28, 0 },
47133 		{ "T5_TXREQ_C0", 0, 2 },
47134 	{ "MAC_PORT_AE_TX_COEF_STAT_1", 0x36a2c, 0 },
47139 		{ "T5_TXSTAT_C0", 0, 2 },
47140 	{ "MAC_PORT_AE_REG_MODE_1", 0x36a30, 0 },
47153 		{ "STICKY_MODE", 0, 1 },
47154 	{ "MAC_PORT_AE_PRBS_CTL_1", 0x36a34, 0 },
47161 		{ "PRBS_GEN_OFF", 0, 1 },
47162 	{ "MAC_PORT_AE_FSM_CTL_1", 0x36a38, 0 },
47174 		{ "FSM_TR_EN", 0, 1 },
47175 	{ "MAC_PORT_AE_FSM_STATE_1", 0x36a3c, 0 },
47180 		{ "TFSM_STATE", 0, 3 },
47181 	{ "MAC_PORT_AE_RX_COEF_REQ_2", 0x36a40, 0 },
47187 		{ "T5_RXREQ_C0", 0, 2 },
47188 	{ "MAC_PORT_AE_RX_COEF_STAT_2", 0x36a44, 0 },
47196 		{ "T5_AE2_RXSTAT_C0", 0, 2 },
47197 	{ "MAC_PORT_AE_TX_COEF_REQ_2", 0x36a48, 0 },
47204 		{ "T5_TXREQ_C0", 0, 2 },
47205 	{ "MAC_PORT_AE_TX_COEF_STAT_2", 0x36a4c, 0 },
47210 		{ "T5_TXSTAT_C0", 0, 2 },
47211 	{ "MAC_PORT_AE_REG_MODE_2", 0x36a50, 0 },
47224 		{ "STICKY_MODE", 0, 1 },
47225 	{ "MAC_PORT_AE_PRBS_CTL_2", 0x36a54, 0 },
47232 		{ "PRBS_GEN_OFF", 0, 1 },
47233 	{ "MAC_PORT_AE_FSM_CTL_2", 0x36a58, 0 },
47245 		{ "FSM_TR_EN", 0, 1 },
47246 	{ "MAC_PORT_AE_FSM_STATE_2", 0x36a5c, 0 },
47251 		{ "TFSM_STATE", 0, 3 },
47252 	{ "MAC_PORT_AE_RX_COEF_REQ_3", 0x36a60, 0 },
47258 		{ "T5_RXREQ_C0", 0, 2 },
47259 	{ "MAC_PORT_AE_RX_COEF_STAT_3", 0x36a64, 0 },
47267 		{ "T5_AE3_RXSTAT_C0", 0, 2 },
47268 	{ "MAC_PORT_AE_TX_COEF_REQ_3", 0x36a68, 0 },
47275 		{ "T5_TXREQ_C0", 0, 2 },
47276 	{ "MAC_PORT_AE_TX_COEF_STAT_3", 0x36a6c, 0 },
47281 		{ "T5_TXSTAT_C0", 0, 2 },
47282 	{ "MAC_PORT_AE_REG_MODE_3", 0x36a70, 0 },
47295 		{ "STICKY_MODE", 0, 1 },
47296 	{ "MAC_PORT_AE_PRBS_CTL_3", 0x36a74, 0 },
47303 		{ "PRBS_GEN_OFF", 0, 1 },
47304 	{ "MAC_PORT_AE_FSM_CTL_3", 0x36a78, 0 },
47316 		{ "FSM_TR_EN", 0, 1 },
47317 	{ "MAC_PORT_AE_FSM_STATE_3", 0x36a7c, 0 },
47322 		{ "TFSM_STATE", 0, 3 },
47323 	{ "MAC_PORT_AE_TX_DIS", 0x36a80, 0 },
47324 	{ "MAC_PORT_AE_KR_CTRL", 0x36a84, 0 },
47326 		{ "Restart_Training", 0, 1 },
47327 	{ "MAC_PORT_AE_RX_SIGDET", 0x36a88, 0 },
47328 	{ "MAC_PORT_AE_KR_STATUS", 0x36a8c, 0 },
47332 		{ "RX_Trained", 0, 1 },
47333 	{ "MAC_PORT_AE_TX_DIS_1", 0x36a90, 0 },
47334 	{ "MAC_PORT_AE_KR_CTRL_1", 0x36a94, 0 },
47336 		{ "Restart_Training", 0, 1 },
47337 	{ "MAC_PORT_AE_RX_SIGDET_1", 0x36a98, 0 },
47338 	{ "MAC_PORT_AE_KR_STATUS_1", 0x36a9c, 0 },
47342 		{ "RX_Trained", 0, 1 },
47343 	{ "MAC_PORT_AE_TX_DIS_2", 0x36aa0, 0 },
47344 	{ "MAC_PORT_AE_KR_CTRL_2", 0x36aa4, 0 },
47346 		{ "Restart_Training", 0, 1 },
47347 	{ "MAC_PORT_AE_RX_SIGDET_2", 0x36aa8, 0 },
47348 	{ "MAC_PORT_AE_KR_STATUS_2", 0x36aac, 0 },
47352 		{ "RX_Trained", 0, 1 },
47353 	{ "MAC_PORT_AE_TX_DIS_3", 0x36ab0, 0 },
47354 	{ "MAC_PORT_AE_KR_CTRL_3", 0x36ab4, 0 },
47356 		{ "Restart_Training", 0, 1 },
47357 	{ "MAC_PORT_AE_RX_SIGDET_3", 0x36ab8, 0 },
47358 	{ "MAC_PORT_AE_KR_STATUS_3", 0x36abc, 0 },
47362 		{ "RX_Trained", 0, 1 },
47363 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_0", 0x36b00, 0 },
47370 		{ "H1TEQ_GOAL", 0, 3 },
47371 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_0", 0x36b04, 0 },
47379 		{ "AMIN_TH", 0, 4 },
47380 	{ "MAC_PORT_AET_ZFE_LIMITS_0", 0x36b08, 0 },
47383 		{ "TOG_LIM", 0, 4 },
47384 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_0", 0x36b0c, 0 },
47390 	{ "MAC_PORT_AET_STATUS_0", 0x36b10, 0 },
47393 		{ "CTRL_STATE", 0, 4 },
47394 	{ "MAC_PORT_AET_STATUS_20", 0x36b14, 0 },
47395 	{ "MAC_PORT_AET_LIMITS0", 0x36b18, 0 },
47396 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_1", 0x36b20, 0 },
47403 		{ "H1TEQ_GOAL", 0, 3 },
47404 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_1", 0x36b24, 0 },
47412 		{ "AMIN_TH", 0, 4 },
47413 	{ "MAC_PORT_AET_ZFE_LIMITS_1", 0x36b28, 0 },
47416 		{ "TOG_LIM", 0, 4 },
47417 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_1", 0x36b2c, 0 },
47423 	{ "MAC_PORT_AET_STATUS_1", 0x36b30, 0 },
47426 		{ "CTRL_STATE", 0, 4 },
47427 	{ "MAC_PORT_AET_STATUS_21", 0x36b34, 0 },
47428 	{ "MAC_PORT_AET_LIMITS1", 0x36b38, 0 },
47429 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_2", 0x36b40, 0 },
47436 		{ "H1TEQ_GOAL", 0, 3 },
47437 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_2", 0x36b44, 0 },
47445 		{ "AMIN_TH", 0, 4 },
47446 	{ "MAC_PORT_AET_ZFE_LIMITS_2", 0x36b48, 0 },
47449 		{ "TOG_LIM", 0, 4 },
47450 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_2", 0x36b4c, 0 },
47456 	{ "MAC_PORT_AET_STATUS_2", 0x36b50, 0 },
47459 		{ "CTRL_STATE", 0, 4 },
47460 	{ "MAC_PORT_AET_STATUS_22", 0x36b54, 0 },
47461 	{ "MAC_PORT_AET_LIMITS2", 0x36b58, 0 },
47462 	{ "MAC_PORT_AET_STAGE_CONFIGURATION_3", 0x36b60, 0 },
47469 		{ "H1TEQ_GOAL", 0, 3 },
47470 	{ "MAC_PORT_AET_SIGNAL_LOSS_DETECTION_3", 0x36b64, 0 },
47478 		{ "AMIN_TH", 0, 4 },
47479 	{ "MAC_PORT_AET_ZFE_LIMITS_3", 0x36b68, 0 },
47482 		{ "TOG_LIM", 0, 4 },
47483 	{ "MAC_PORT_AET_BOOTSTRAP_LOOKUP_TABLE_3", 0x36b6c, 0 },
47489 	{ "MAC_PORT_AET_STATUS_3", 0x36b70, 0 },
47492 		{ "CTRL_STATE", 0, 4 },
47493 	{ "MAC_PORT_AET_STATUS_23", 0x36b74, 0 },
47494 	{ "MAC_PORT_AET_LIMITS3", 0x36b78, 0 },
47495 	{ "MAC_PORT_ANALOG_TEST_MUX", 0x37814, 0 },
47496 	{ "MAC_PORT_PLLREFSEL_CONTROL", 0x37854, 0 },
47497 	{ "MAC_PORT_REFISINK_CONTROL", 0x37858, 0 },
47498 	{ "MAC_PORT_REFISRC_CONTROL", 0x3785c, 0 },
47499 	{ "MAC_PORT_REFVREG_CONTROL", 0x37860, 0 },
47500 	{ "MAC_PORT_VBGENDOC_CONTROL", 0x37864, 0 },
47502 		{ "VBGENDOC", 0, 2 },
47503 	{ "MAC_PORT_VREFTUNE_CONTROL", 0x37868, 0 },
47504 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_CONTROL", 0x37880, 0 },
47508 		{ "RCAL_RESET", 0, 1 },
47509 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_STATUS_1", 0x37884, 0 },
47513 		{ "RCALCOMP", 0, 1 },
47514 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_STATUS_2", 0x37888, 0 },
47515 	{ "MAC_PORT_IMPEDENCE_CALIBRATION_STATUS_3", 0x3788c, 0 },
47516 	{ "MAC_PORT_INEQUALITY_CONTROL_AND_RESULT", 0x378c0, 0 },
47522 		{ "INEQ", 0, 1 },
47523 	{ "MAC_PORT_INEQUALITY_LOW_LIMIT", 0x378c4, 0 },
47524 	{ "MAC_PORT_INEQUALITY_LOW_LIMIT_MASK", 0x378c8, 0 },
47525 	{ "MAC_PORT_INEQUALITY_HIGH_LIMIT", 0x378cc, 0 },
47526 	{ "MAC_PORT_INEQUALITY_HIGH_LIMIT_MASK", 0x378d0, 0 },
47527 	{ "MAC_PORT_MACRO_TEST_CONTROL_6", 0x378e8, 0 },
47531 		{ "HSSACJAC", 0, 1 },
47532 	{ "MAC_PORT_MACRO_TEST_CONTROL_5", 0x378ec, 0 },
47539 		{ "MACROTEST", 0, 1 },
47540 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_0", 0x37b00, 0 },
47541 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_1", 0x37b04, 0 },
47545 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_2", 0x37b08, 0 },
47546 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_3", 0x37b0c, 0 },
47550 	{ "MAC_PORT_PLLA_VCO_COARSE_CALIBRATION_4", 0x37b10, 0 },
47553 		{ "CCLD", 0, 1 },
47554 	{ "MAC_PORT_PLLA_POWER_CONTROL", 0x37b24, 0 },
47556 		{ "NPWRENA", 0, 1 },
47557 	{ "MAC_PORT_PLLA_CHARGE_PUMP_CONTROL", 0x37b28, 0 },
47558 	{ "MAC_PORT_PLLA_PLL_MICELLANEOUS_CONTROL", 0x37b38, 0 },
47559 	{ "MAC_PORT_PLLA_PCLK_CONTROL", 0x37b3c, 0 },
47561 		{ "PCKSEL", 0, 3 },
47562 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_CONTROL", 0x37b40, 0 },
47565 		{ "EMIS", 0, 1 },
47566 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_1", 0x37b44, 0 },
47567 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_2", 0x37b48, 0 },
47568 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_3", 0x37b4c, 0 },
47569 	{ "MAC_PORT_PLLA_EYE_METRICS_INTERVAL_LIMIT_4", 0x37b50, 0 },
47570 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_4", 0x37bf0, 0 },
47572 		{ "REFDIV", 0, 4 },
47573 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_3", 0x37bf4, 0 },
47579 		{ "DIVSEL8", 0, 1 },
47580 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_2", 0x37bf8, 0 },
47581 	{ "MAC_PORT_PLLA_MACRO_TEST_CONTROL_1", 0x37bfc, 0 },
47582 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_0", 0x37c00, 0 },
47583 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_1", 0x37c04, 0 },
47587 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_2", 0x37c08, 0 },
47588 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_3", 0x37c0c, 0 },
47592 	{ "MAC_PORT_PLLB_VCO_COARSE_CALIBRATION_4", 0x37c10, 0 },
47595 		{ "CCLD", 0, 1 },
47596 	{ "MAC_PORT_PLLB_POWER_CONTROL", 0x37c24, 0 },
47598 		{ "NPWRENA", 0, 1 },
47599 	{ "MAC_PORT_PLLB_CHARGE_PUMP_CONTROL", 0x37c28, 0 },
47600 	{ "MAC_PORT_PLLB_PLL_MICELLANEOUS_CONTROL", 0x37c38, 0 },
47601 	{ "MAC_PORT_PLLB_PCLK_CONTROL", 0x37c3c, 0 },
47603 		{ "PCKSEL", 0, 3 },
47604 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_CONTROL", 0x37c40, 0 },
47607 		{ "EMIS", 0, 1 },
47608 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_1", 0x37c44, 0 },
47609 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_2", 0x37c48, 0 },
47610 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_3", 0x37c4c, 0 },
47611 	{ "MAC_PORT_PLLB_EYE_METRICS_INTERVAL_LIMIT_4", 0x37c50, 0 },
47612 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_4", 0x37cf0, 0 },
47614 		{ "REFDIV", 0, 4 },
47615 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_3", 0x37cf4, 0 },
47621 		{ "DIVSEL8", 0, 1 },
47622 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_2", 0x37cf8, 0 },
47623 	{ "MAC_PORT_PLLB_MACRO_TEST_CONTROL_1", 0x37cfc, 0 },
47624 	{ "MAC_PORT_TX_LINKA_TRANSMIT_CONFIGURATION_MODE", 0x37000, 0 },
47636 		{ "T5_TX_RTSEL", 0, 2 },
47637 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TEST_CONTROL", 0x37004, 0 },
47645 		{ "TPSEL", 0, 3 },
47646 	{ "MAC_PORT_TX_LINKA_TRANSMIT_COEFFICIENT_CONTROL", 0x37008, 0 },
47654 		{ "ALOAD", 0, 1 },
47655 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DRIVER_MODE_CONTROL", 0x3700c, 0 },
47658 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x37010, 0 },
47660 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x37014, 0 },
47665 	{ "MAC_PORT_TX_LINKA_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x37018, 0 },
47667 		{ "CALSSTP", 0, 6 },
47668 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3701c, 0 },
47670 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_0_COEFFICIENT", 0x37020, 0 },
47671 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_1_COEFFICIENT", 0x37024, 0 },
47672 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_2_COEFFICIENT", 0x37028, 0 },
47673 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_3_COEFFICIENT", 0x3702c, 0 },
47674 	{ "MAC_PORT_TX_LINKA_TRANSMIT_POLARITY", 0x37034, 0 },
47675 	{ "MAC_PORT_TX_LINKA_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x37038, 0 },
47682 		{ "C1UPDT", 0, 2 },
47683 	{ "MAC_PORT_TX_LINKA_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3703c, 0 },
47687 		{ "C1STAT", 0, 2 },
47688 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x37040, 0 },
47689 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x37044, 0 },
47690 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x37048, 0 },
47691 	{ "MAC_PORT_TX_LINKA_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3704c, 0 },
47692 	{ "MAC_PORT_TX_LINKA_TRANSMIT_APPLIED_TUNE_REGISTER", 0x37050, 0 },
47694 		{ "ATUNEP", 0, 8 },
47695 	{ "MAC_PORT_TX_LINKA_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x37058, 0 },
47697 	{ "MAC_PORT_TX_LINKA_TRANSMIT_4X_SEGMENT_APPLIED", 0x37060, 0 },
47705 		{ "AS4X0", 0, 2 },
47706 	{ "MAC_PORT_TX_LINKA_TRANSMIT_2X_SEGMENT_APPLIED", 0x37064, 0 },
47710 		{ "AS2X0", 0, 2 },
47711 	{ "MAC_PORT_TX_LINKA_TRANSMIT_1X_SEGMENT_APPLIED", 0x37068, 0 },
47719 		{ "AS1X0", 0, 2 },
47720 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3706c, 0 },
47721 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x37070, 0 },
47723 		{ "AT4X", 0, 8 },
47724 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x37074, 0 },
47725 	{ "MAC_PORT_TX_LINKA_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x37078, 0 },
47726 	{ "MAC_PORT_TX_LINKA_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3707c, 0 },
47728 		{ "XWR", 0, 1 },
47729 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x37080, 0 },
47730 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x37084, 0 },
47731 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x37088, 0 },
47732 	{ "MAC_PORT_TX_LINKA_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3708c, 0 },
47733 	{ "MAC_PORT_TX_LINKA_TRANSMIT_802_3AZ_CONTROL", 0x3709c, 0 },
47734 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_CONTROL", 0x370a0, 0 },
47740 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_OVERRIDE", 0x370a4, 0 },
47746 		{ "DCCOEN", 0, 1 },
47747 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_APPLIED", 0x370a8, 0 },
47749 		{ "DCCAAMP", 0, 7 },
47750 	{ "MAC_PORT_TX_LINKA_TRANSMIT_DCC_TIME_OUT", 0x370ac, 0 },
47751 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SIGN_OVERRIDE", 0x370c0, 0 },
47752 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x370c8, 0 },
47760 		{ "OS4X0", 0, 2 },
47761 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x370cc, 0 },
47765 		{ "OS2X0", 0, 2 },
47766 	{ "MAC_PORT_TX_LINKA_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x370d0, 0 },
47774 		{ "OS1X0", 0, 2 },
47775 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x370d8, 0 },
47776 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x370dc, 0 },
47777 	{ "MAC_PORT_TX_LINKA_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x370e0, 0 },
47778 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_5", 0x370ec, 0 },
47786 		{ "DATASIGN", 0, 1 },
47787 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_4", 0x370f0, 0 },
47788 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_3", 0x370f4, 0 },
47789 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_2", 0x370f8, 0 },
47792 		{ "AECMD70", 0, 8 },
47793 	{ "MAC_PORT_TX_LINKA_TRANSMIT_MACRO_TEST_CONTROL_1", 0x370fc, 0 },
47801 		{ "OBS", 0, 1 },
47802 	{ "MAC_PORT_TX_LINKB_TRANSMIT_CONFIGURATION_MODE", 0x37100, 0 },
47814 		{ "T5_TX_RTSEL", 0, 2 },
47815 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TEST_CONTROL", 0x37104, 0 },
47823 		{ "TPSEL", 0, 3 },
47824 	{ "MAC_PORT_TX_LINKB_TRANSMIT_COEFFICIENT_CONTROL", 0x37108, 0 },
47832 		{ "ALOAD", 0, 1 },
47833 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DRIVER_MODE_CONTROL", 0x3710c, 0 },
47836 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x37110, 0 },
47838 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x37114, 0 },
47843 	{ "MAC_PORT_TX_LINKB_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x37118, 0 },
47845 		{ "CALSSTP", 0, 6 },
47846 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3711c, 0 },
47848 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_0_COEFFICIENT", 0x37120, 0 },
47849 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_1_COEFFICIENT", 0x37124, 0 },
47850 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_2_COEFFICIENT", 0x37128, 0 },
47851 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_3_COEFFICIENT", 0x3712c, 0 },
47852 	{ "MAC_PORT_TX_LINKB_TRANSMIT_POLARITY", 0x37134, 0 },
47853 	{ "MAC_PORT_TX_LINKB_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x37138, 0 },
47860 		{ "C1UPDT", 0, 2 },
47861 	{ "MAC_PORT_TX_LINKB_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3713c, 0 },
47865 		{ "C1STAT", 0, 2 },
47866 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x37140, 0 },
47867 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x37144, 0 },
47868 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x37148, 0 },
47869 	{ "MAC_PORT_TX_LINKB_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3714c, 0 },
47870 	{ "MAC_PORT_TX_LINKB_TRANSMIT_APPLIED_TUNE_REGISTER", 0x37150, 0 },
47872 		{ "ATUNEP", 0, 8 },
47873 	{ "MAC_PORT_TX_LINKB_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x37158, 0 },
47875 	{ "MAC_PORT_TX_LINKB_TRANSMIT_4X_SEGMENT_APPLIED", 0x37160, 0 },
47883 		{ "AS4X0", 0, 2 },
47884 	{ "MAC_PORT_TX_LINKB_TRANSMIT_2X_SEGMENT_APPLIED", 0x37164, 0 },
47888 		{ "AS2X0", 0, 2 },
47889 	{ "MAC_PORT_TX_LINKB_TRANSMIT_1X_SEGMENT_APPLIED", 0x37168, 0 },
47897 		{ "AS1X0", 0, 2 },
47898 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3716c, 0 },
47899 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x37170, 0 },
47901 		{ "AT4X", 0, 8 },
47902 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x37174, 0 },
47903 	{ "MAC_PORT_TX_LINKB_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x37178, 0 },
47904 	{ "MAC_PORT_TX_LINKB_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3717c, 0 },
47906 		{ "XWR", 0, 1 },
47907 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x37180, 0 },
47908 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x37184, 0 },
47909 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x37188, 0 },
47910 	{ "MAC_PORT_TX_LINKB_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3718c, 0 },
47911 	{ "MAC_PORT_TX_LINKB_TRANSMIT_802_3AZ_CONTROL", 0x3719c, 0 },
47912 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_CONTROL", 0x371a0, 0 },
47918 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_OVERRIDE", 0x371a4, 0 },
47924 		{ "DCCOEN", 0, 1 },
47925 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_APPLIED", 0x371a8, 0 },
47927 		{ "DCCAAMP", 0, 7 },
47928 	{ "MAC_PORT_TX_LINKB_TRANSMIT_DCC_TIME_OUT", 0x371ac, 0 },
47929 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SIGN_OVERRIDE", 0x371c0, 0 },
47930 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x371c8, 0 },
47938 		{ "OS4X0", 0, 2 },
47939 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x371cc, 0 },
47943 		{ "OS2X0", 0, 2 },
47944 	{ "MAC_PORT_TX_LINKB_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x371d0, 0 },
47952 		{ "OS1X0", 0, 2 },
47953 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x371d8, 0 },
47954 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x371dc, 0 },
47955 	{ "MAC_PORT_TX_LINKB_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x371e0, 0 },
47956 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_5", 0x371ec, 0 },
47964 		{ "DATASIGN", 0, 1 },
47965 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_4", 0x371f0, 0 },
47966 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_3", 0x371f4, 0 },
47967 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_2", 0x371f8, 0 },
47970 		{ "AECMD70", 0, 8 },
47971 	{ "MAC_PORT_TX_LINKB_TRANSMIT_MACRO_TEST_CONTROL_1", 0x371fc, 0 },
47979 		{ "OBS", 0, 1 },
47980 	{ "MAC_PORT_TX_LINKC_TRANSMIT_CONFIGURATION_MODE", 0x37400, 0 },
47992 		{ "T5_TX_RTSEL", 0, 2 },
47993 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TEST_CONTROL", 0x37404, 0 },
48001 		{ "TPSEL", 0, 3 },
48002 	{ "MAC_PORT_TX_LINKC_TRANSMIT_COEFFICIENT_CONTROL", 0x37408, 0 },
48010 		{ "ALOAD", 0, 1 },
48011 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DRIVER_MODE_CONTROL", 0x3740c, 0 },
48014 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x37410, 0 },
48016 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x37414, 0 },
48021 	{ "MAC_PORT_TX_LINKC_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x37418, 0 },
48023 		{ "CALSSTP", 0, 6 },
48024 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3741c, 0 },
48026 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_0_COEFFICIENT", 0x37420, 0 },
48027 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_1_COEFFICIENT", 0x37424, 0 },
48028 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_2_COEFFICIENT", 0x37428, 0 },
48029 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_3_COEFFICIENT", 0x3742c, 0 },
48030 	{ "MAC_PORT_TX_LINKC_TRANSMIT_POLARITY", 0x37434, 0 },
48031 	{ "MAC_PORT_TX_LINKC_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x37438, 0 },
48038 		{ "C1UPDT", 0, 2 },
48039 	{ "MAC_PORT_TX_LINKC_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3743c, 0 },
48043 		{ "C1STAT", 0, 2 },
48044 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x37440, 0 },
48045 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x37444, 0 },
48046 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x37448, 0 },
48047 	{ "MAC_PORT_TX_LINKC_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3744c, 0 },
48048 	{ "MAC_PORT_TX_LINKC_TRANSMIT_APPLIED_TUNE_REGISTER", 0x37450, 0 },
48050 		{ "ATUNEP", 0, 8 },
48051 	{ "MAC_PORT_TX_LINKC_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x37458, 0 },
48053 	{ "MAC_PORT_TX_LINKC_TRANSMIT_4X_SEGMENT_APPLIED", 0x37460, 0 },
48061 		{ "AS4X0", 0, 2 },
48062 	{ "MAC_PORT_TX_LINKC_TRANSMIT_2X_SEGMENT_APPLIED", 0x37464, 0 },
48066 		{ "AS2X0", 0, 2 },
48067 	{ "MAC_PORT_TX_LINKC_TRANSMIT_1X_SEGMENT_APPLIED", 0x37468, 0 },
48075 		{ "AS1X0", 0, 2 },
48076 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3746c, 0 },
48077 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x37470, 0 },
48079 		{ "AT4X", 0, 8 },
48080 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x37474, 0 },
48081 	{ "MAC_PORT_TX_LINKC_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x37478, 0 },
48082 	{ "MAC_PORT_TX_LINKC_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3747c, 0 },
48084 		{ "XWR", 0, 1 },
48085 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x37480, 0 },
48086 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x37484, 0 },
48087 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x37488, 0 },
48088 	{ "MAC_PORT_TX_LINKC_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3748c, 0 },
48089 	{ "MAC_PORT_TX_LINKC_TRANSMIT_802_3AZ_CONTROL", 0x3749c, 0 },
48090 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_CONTROL", 0x374a0, 0 },
48096 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_OVERRIDE", 0x374a4, 0 },
48102 		{ "DCCOEN", 0, 1 },
48103 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_APPLIED", 0x374a8, 0 },
48105 		{ "DCCAAMP", 0, 7 },
48106 	{ "MAC_PORT_TX_LINKC_TRANSMIT_DCC_TIME_OUT", 0x374ac, 0 },
48107 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SIGN_OVERRIDE", 0x374c0, 0 },
48108 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x374c8, 0 },
48116 		{ "OS4X0", 0, 2 },
48117 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x374cc, 0 },
48121 		{ "OS2X0", 0, 2 },
48122 	{ "MAC_PORT_TX_LINKC_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x374d0, 0 },
48130 		{ "OS1X0", 0, 2 },
48131 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x374d8, 0 },
48132 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x374dc, 0 },
48133 	{ "MAC_PORT_TX_LINKC_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x374e0, 0 },
48134 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_5", 0x374ec, 0 },
48142 		{ "DATASIGN", 0, 1 },
48143 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_4", 0x374f0, 0 },
48144 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_3", 0x374f4, 0 },
48145 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_2", 0x374f8, 0 },
48148 		{ "AECMD70", 0, 8 },
48149 	{ "MAC_PORT_TX_LINKC_TRANSMIT_MACRO_TEST_CONTROL_1", 0x374fc, 0 },
48157 		{ "OBS", 0, 1 },
48158 	{ "MAC_PORT_TX_LINKD_TRANSMIT_CONFIGURATION_MODE", 0x37500, 0 },
48170 		{ "T5_TX_RTSEL", 0, 2 },
48171 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TEST_CONTROL", 0x37504, 0 },
48179 		{ "TPSEL", 0, 3 },
48180 	{ "MAC_PORT_TX_LINKD_TRANSMIT_COEFFICIENT_CONTROL", 0x37508, 0 },
48188 		{ "ALOAD", 0, 1 },
48189 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DRIVER_MODE_CONTROL", 0x3750c, 0 },
48192 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x37510, 0 },
48194 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x37514, 0 },
48199 	{ "MAC_PORT_TX_LINKD_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x37518, 0 },
48201 		{ "CALSSTP", 0, 6 },
48202 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3751c, 0 },
48204 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_0_COEFFICIENT", 0x37520, 0 },
48205 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_1_COEFFICIENT", 0x37524, 0 },
48206 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_2_COEFFICIENT", 0x37528, 0 },
48207 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_3_COEFFICIENT", 0x3752c, 0 },
48208 	{ "MAC_PORT_TX_LINKD_TRANSMIT_POLARITY", 0x37534, 0 },
48209 	{ "MAC_PORT_TX_LINKD_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x37538, 0 },
48216 		{ "C1UPDT", 0, 2 },
48217 	{ "MAC_PORT_TX_LINKD_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3753c, 0 },
48221 		{ "C1STAT", 0, 2 },
48222 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x37540, 0 },
48223 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x37544, 0 },
48224 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x37548, 0 },
48225 	{ "MAC_PORT_TX_LINKD_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3754c, 0 },
48226 	{ "MAC_PORT_TX_LINKD_TRANSMIT_APPLIED_TUNE_REGISTER", 0x37550, 0 },
48228 		{ "ATUNEP", 0, 8 },
48229 	{ "MAC_PORT_TX_LINKD_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x37558, 0 },
48231 	{ "MAC_PORT_TX_LINKD_TRANSMIT_4X_SEGMENT_APPLIED", 0x37560, 0 },
48239 		{ "AS4X0", 0, 2 },
48240 	{ "MAC_PORT_TX_LINKD_TRANSMIT_2X_SEGMENT_APPLIED", 0x37564, 0 },
48244 		{ "AS2X0", 0, 2 },
48245 	{ "MAC_PORT_TX_LINKD_TRANSMIT_1X_SEGMENT_APPLIED", 0x37568, 0 },
48253 		{ "AS1X0", 0, 2 },
48254 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3756c, 0 },
48255 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x37570, 0 },
48257 		{ "AT4X", 0, 8 },
48258 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x37574, 0 },
48259 	{ "MAC_PORT_TX_LINKD_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x37578, 0 },
48260 	{ "MAC_PORT_TX_LINKD_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3757c, 0 },
48262 		{ "XWR", 0, 1 },
48263 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x37580, 0 },
48264 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x37584, 0 },
48265 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x37588, 0 },
48266 	{ "MAC_PORT_TX_LINKD_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3758c, 0 },
48267 	{ "MAC_PORT_TX_LINKD_TRANSMIT_802_3AZ_CONTROL", 0x3759c, 0 },
48268 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_CONTROL", 0x375a0, 0 },
48274 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_OVERRIDE", 0x375a4, 0 },
48280 		{ "DCCOEN", 0, 1 },
48281 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_APPLIED", 0x375a8, 0 },
48283 		{ "DCCAAMP", 0, 7 },
48284 	{ "MAC_PORT_TX_LINKD_TRANSMIT_DCC_TIME_OUT", 0x375ac, 0 },
48285 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SIGN_OVERRIDE", 0x375c0, 0 },
48286 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x375c8, 0 },
48294 		{ "OS4X0", 0, 2 },
48295 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x375cc, 0 },
48299 		{ "OS2X0", 0, 2 },
48300 	{ "MAC_PORT_TX_LINKD_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x375d0, 0 },
48308 		{ "OS1X0", 0, 2 },
48309 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x375d8, 0 },
48310 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x375dc, 0 },
48311 	{ "MAC_PORT_TX_LINKD_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x375e0, 0 },
48312 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_5", 0x375ec, 0 },
48320 		{ "DATASIGN", 0, 1 },
48321 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_4", 0x375f0, 0 },
48322 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_3", 0x375f4, 0 },
48323 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_2", 0x375f8, 0 },
48326 		{ "AECMD70", 0, 8 },
48327 	{ "MAC_PORT_TX_LINKD_TRANSMIT_MACRO_TEST_CONTROL_1", 0x375fc, 0 },
48335 		{ "OBS", 0, 1 },
48336 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_CONFIGURATION_MODE", 0x37900, 0 },
48348 		{ "T5_TX_RTSEL", 0, 2 },
48349 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TEST_CONTROL", 0x37904, 0 },
48357 		{ "TPSEL", 0, 3 },
48358 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_COEFFICIENT_CONTROL", 0x37908, 0 },
48366 		{ "ALOAD", 0, 1 },
48367 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DRIVER_MODE_CONTROL", 0x3790c, 0 },
48370 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DRIVER_OVERRIDE_CONTROL", 0x37910, 0 },
48372 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCLK_ROTATOR_OVERRIDE", 0x37914, 0 },
48377 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_IMPEDANCE_CALIBRATION_OVERRIDE", 0x37918, 0 },
48379 		{ "CALSSTP", 0, 6 },
48380 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCLK_DRIFT_TOLERANCE", 0x3791c, 0 },
48382 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_0_COEFFICIENT", 0x37920, 0 },
48383 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_1_COEFFICIENT", 0x37924, 0 },
48384 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_2_COEFFICIENT", 0x37928, 0 },
48385 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_3_COEFFICIENT", 0x3792c, 0 },
48386 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_POLARITY", 0x37934, 0 },
48387 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_COMMAND", 0x37938, 0 },
48394 		{ "C1UPDT", 0, 2 },
48395 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_802_3AP_ADAPTIVE_EQUALIZATION_STATUS", 0x3793c, 0 },
48399 		{ "C1STAT", 0, 2 },
48400 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_0_COEFFICIENT_OVERRIDE", 0x37940, 0 },
48401 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_1_COEFFICIENT_OVERRIDE", 0x37944, 0 },
48402 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_2_COEFFICIENT_OVERRIDE", 0x37948, 0 },
48403 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_AE_TAP_3_COEFFICIENT_OVERRIDE", 0x3794c, 0 },
48404 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_APPLIED_TUNE_REGISTER", 0x37950, 0 },
48406 		{ "ATUNEP", 0, 8 },
48407 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_ANALOG_DIAGNOSTICS_REGISTER", 0x37958, 0 },
48409 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_4X_SEGMENT_APPLIED", 0x37960, 0 },
48417 		{ "AS4X0", 0, 2 },
48418 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_2X_SEGMENT_APPLIED", 0x37964, 0 },
48422 		{ "AS2X0", 0, 2 },
48423 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_1X_SEGMENT_APPLIED", 0x37968, 0 },
48431 		{ "AS1X0", 0, 2 },
48432 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_4X_TERMINATION_APPLIED", 0x3796c, 0 },
48433 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_2X1X_TERMINATION_APPLIED", 0x37970, 0 },
48435 		{ "AT4X", 0, 8 },
48436 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SIGN_APPLIED_REGISTER", 0x37974, 0 },
48437 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_EXTENDED_ADDRESS_DATA", 0x37978, 0 },
48438 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_EXTENDED_ADDRESS_ADDR", 0x3797c, 0 },
48440 		{ "XWR", 0, 1 },
48441 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_1_0", 0x37980, 0 },
48442 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_3_2", 0x37984, 0 },
48443 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_5_4", 0x37988, 0 },
48444 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_PATTERN_BUFFER_BYTES_7_6", 0x3798c, 0 },
48445 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_802_3AZ_CONTROL", 0x3799c, 0 },
48446 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_CONTROL", 0x379a0, 0 },
48452 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_OVERRIDE", 0x379a4, 0 },
48458 		{ "DCCOEN", 0, 1 },
48459 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_APPLIED", 0x379a8, 0 },
48461 		{ "DCCAAMP", 0, 7 },
48462 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_DCC_TIME_OUT", 0x379ac, 0 },
48463 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SIGN_OVERRIDE", 0x379c0, 0 },
48464 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_4X_OVERRIDE", 0x379c8, 0 },
48472 		{ "OS4X0", 0, 2 },
48473 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_2X_OVERRIDE", 0x379cc, 0 },
48477 		{ "OS2X0", 0, 2 },
48478 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_SEGMENT_1X_OVERRIDE", 0x379d0, 0 },
48486 		{ "OS1X0", 0, 2 },
48487 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SEGMENT_4X_TERMINATION_OVERRIDE", 0x379d8, 0 },
48488 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SEGMENT_2X_TERMINATION_OVERRIDE", 0x379dc, 0 },
48489 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_TAP_SEGMENT_1X_TERMINATION_OVERRIDE", 0x379e0, 0 },
48490 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_5", 0x379ec, 0 },
48498 		{ "DATASIGN", 0, 1 },
48499 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_4", 0x379f0, 0 },
48500 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_3", 0x379f4, 0 },
48501 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_2", 0x379f8, 0 },
48504 		{ "AECMD70", 0, 8 },
48505 	{ "MAC_PORT_TX_LINK_BCST_TRANSMIT_MACRO_TEST_CONTROL_1", 0x379fc, 0 },
48513 		{ "OBS", 0, 1 },
48514 	{ "MAC_PORT_RX_LINKA_RECEIVER_CONFIGURATION_MODE", 0x37200, 0 },
48525 		{ "T5_RX_RTSEL", 0, 2 },
48526 	{ "MAC_PORT_RX_LINKA_RECEIVER_TEST_CONTROL", 0x37204, 0 },
48538 		{ "PATSEL", 0, 3 },
48539 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_CONTROL", 0x37208, 0 },
48548 		{ "SSCEN", 0, 1 },
48549 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_OFFSET_CONTROL", 0x3720c, 0 },
48556 		{ "PHOFFS", 0, 6 },
48557 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_POSITION_1", 0x37210, 0 },
48559 		{ "ROTD", 0, 6 },
48560 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_POSITION_2", 0x37214, 0 },
48563 		{ "ROTE", 0, 6 },
48564 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x37218, 0 },
48567 		{ "RAOFF", 0, 5 },
48568 	{ "MAC_PORT_RX_LINKA_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3721c, 0 },
48570 		{ "RDOFF", 0, 5 },
48571 	{ "MAC_PORT_RX_LINKA_DFE_CONTROL", 0x37220, 0 },
48582 		{ "DFERST", 0, 1 },
48583 	{ "MAC_PORT_RX_LINKA_DFE_SAMPLE_SNAPSHOT_1", 0x37224, 0 },
48585 		{ "T5BYTE0", 0, 8 },
48586 	{ "MAC_PORT_RX_LINKA_DFE_SAMPLE_SNAPSHOT_2", 0x37228, 0 },
48593 		{ "T5_RX_ASAMP", 0, 3 },
48594 	{ "MAC_PORT_RX_LINKA_RECEIVER_VGA_CONTROL_1", 0x3722c, 0 },
48598 		{ "VOFFA", 0, 6 },
48599 	{ "MAC_PORT_RX_LINKA_RECEIVER_VGA_CONTROL_2", 0x37230, 0 },
48607 		{ "T5VGAIN", 0, 7 },
48608 	{ "MAC_PORT_RX_LINKA_RECEIVER_VGA_CONTROL_3", 0x37234, 0 },
48613 		{ "AMAXT", 0, 7 },
48614 	{ "MAC_PORT_RX_LINKA_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x37238, 0 },
48616 		{ "PMOFFTIME", 0, 6 },
48617 	{ "MAC_PORT_RX_LINKA_RECEIVER_IQAMP_CONTROL_1", 0x3723c, 0 },
48620 		{ "IQAMP", 0, 5 },
48621 	{ "MAC_PORT_RX_LINKA_RECEIVER_IQAMP_CONTROL_2", 0x37240, 0 },
48622 	{ "MAC_PORT_RX_LINKA_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x37244, 0 },
48629 		{ "DASEL", 0, 3 },
48630 	{ "MAC_PORT_RX_LINKA_RECEIVER_DACAP_AND_DACAN", 0x37248, 0 },
48632 		{ "DACAP", 0, 8 },
48633 	{ "MAC_PORT_RX_LINKA_RECEIVER_DACA_MIN", 0x3724c, 0 },
48635 		{ "DACAM", 0, 8 },
48636 	{ "MAC_PORT_RX_LINKA_RECEIVER_ADAC_CONTROL", 0x37250, 0 },
48638 		{ "ADAC1", 0, 8 },
48639 	{ "MAC_PORT_RX_LINKA_RECEIVER_AC_COUPLING_CONTROL", 0x37254, 0 },
48645 		{ "FACCPL", 0, 1 },
48646 	{ "MAC_PORT_RX_LINKA_RECEIVER_AC_COUPLING_VALUE", 0x37258, 0 },
48649 		{ "ACCPLBIAS", 0, 8 },
48650 	{ "MAC_PORT_RX_LINKA_DFE_H1H2H3_LOCAL_OFFSET", 0x3725c, 0 },
48651 	{ "MAC_PORT_RX_LINKA_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x37260, 0 },
48653 		{ "H1EX", 0, 6 },
48654 	{ "MAC_PORT_RX_LINKA_PEAKED_INTEGRATOR", 0x37264, 0 },
48657 		{ "UNPKVGA", 0, 2 },
48658 	{ "MAC_PORT_RX_LINKA_CDR_ANALOG_SWITCH", 0x37268, 0 },
48667 		{ "CDRANLGSW", 0, 2 },
48668 	{ "MAC_PORT_RX_LINKA_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3726c, 0 },
48670 …{ "MAC_PORT_RX_LINKA_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x37270, 0 …
48681 		{ "OAE", 0, 4 },
48682 	{ "MAC_PORT_RX_LINKA_DYNAMIC_DATA_CENTERING_DDC", 0x37274, 0 },
48687 		{ "ODEC", 0, 4 },
48688 	{ "MAC_PORT_RX_LINKA_RECEIVER_INTERNAL_STATUS", 0x37278, 0 },
48704 		{ "T5OCCMP", 0, 1 },
48705 	{ "MAC_PORT_RX_LINKA_DFE_FUNCTION_CONTROL_1", 0x3727c, 0 },
48721 		{ "FADAC", 0, 1 },
48722 	{ "MAC_PORT_RX_LINKA_DFE_FUNCTION_CONTROL_2", 0x37280, 0 },
48738 		{ "FQCC", 0, 1 },
48739 	{ "MAC_PORT_RX_LINKA_DFE_OFFSET_CHANNEL", 0x37284, 0 },
48744 		{ "LOFCH", 0, 5 },
48745 	{ "MAC_PORT_RX_LINKA_DFE_OFFSET_VALUE", 0x37288, 0 },
48747 		{ "LOFL", 0, 7 },
48748 	{ "MAC_PORT_RX_LINKA_H_COEFFICIENBT_BIST", 0x3728c, 0 },
48756 		{ "HSEL", 0, 4 },
48757 	{ "MAC_PORT_RX_LINKA_AC_CAPACITOR_BIST", 0x37290, 0 },
48762 		{ "ACCRD", 0, 8 },
48763 	{ "MAC_PORT_RX_LINKA_RECEIVER_LOFF_CONTROL_REGISTER", 0x37298, 0 },
48771 		{ "LCURR", 0, 5 },
48772 	{ "MAC_PORT_RX_LINKA_RECEIVER_SIGDET_CONTROL", 0x3729c, 0 },
48778 		{ "SDLVL", 0, 5 },
48779 	{ "MAC_PORT_RX_LINKA_RECEIVER_ANALOG_CONTROL_SWITCH", 0x372a0, 0 },
48788 		{ "RX_LINKANLGSW", 0, 7 },
48789 	{ "MAC_PORT_RX_LINKA_INTEGRATOR_DAC_OFFSET", 0x372a4, 0 },
48793 		{ "INTDAC", 0, 6 },
48794 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_CONTROL", 0x372a8, 0 },
48798 		{ "MINAMP", 0, 5 },
48799 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS", 0x372ac, 0 },
48805 		{ "EMEN", 0, 1 },
48806 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x372b0, 0 },
48812 		{ "EMCEN", 0, 1 },
48813 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x372b4, 0 },
48816 		{ "APDF", 0, 12 },
48817 	{ "MAC_PORT_RX_LINKA_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x372b8, 0 },
48818 	{ "MAC_PORT_RX_LINKA_DFE_FUNCTION_CONTROL_3", 0x372bc, 0 },
48834 		{ "FPRBSOFF", 0, 1 },
48835 	{ "MAC_PORT_RX_LINKA_DFE_TAP_CONTROL", 0x372c0, 0 },
48836 	{ "MAC_PORT_RX_LINKA_DFE_TAP", 0x372c4, 0 },
48837 	{ "MAC_PORT_RX_LINKA_RECEIVER_INTERNAL_STATUS_2", 0x372e4, 0 },
48845 		{ "QCCCMP", 0, 1 },
48846 	{ "MAC_PORT_RX_LINKA_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x372e8, 0 },
48849 		{ "CSVAL", 0, 3 },
48850 	{ "MAC_PORT_RX_LINKA_RECEIVER_DCD_CONTROL", 0x372ec, 0 },
48859 		{ "DCDAMP", 0, 6 },
48860 	{ "MAC_PORT_RX_LINKA_RECEIVER_DCC_CONTROL", 0x372f0, 0 },
48866 		{ "DCDAMP", 0, 6 },
48867 	{ "MAC_PORT_RX_LINKA_RECEIVER_QCC_CONTROL", 0x372f4, 0 },
48875 		{ "QCDAMP", 0, 6 },
48876 	{ "MAC_PORT_RX_LINKA_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x372f8, 0 },
48883 		{ "ACJZNT", 0, 1 },
48884 	{ "MAC_PORT_RX_LINKA_RECEIVER_MACRO_TEST_CONTROL_1", 0x372fc, 0 },
48895 		{ "MTHOLD", 0, 1 },
48896 	{ "MAC_PORT_RX_LINKB_RECEIVER_CONFIGURATION_MODE", 0x37300, 0 },
48907 		{ "T5_RX_RTSEL", 0, 2 },
48908 	{ "MAC_PORT_RX_LINKB_RECEIVER_TEST_CONTROL", 0x37304, 0 },
48920 		{ "PATSEL", 0, 3 },
48921 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_CONTROL", 0x37308, 0 },
48930 		{ "SSCEN", 0, 1 },
48931 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_OFFSET_CONTROL", 0x3730c, 0 },
48938 		{ "PHOFFS", 0, 6 },
48939 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_POSITION_1", 0x37310, 0 },
48941 		{ "ROTD", 0, 6 },
48942 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_POSITION_2", 0x37314, 0 },
48945 		{ "ROTE", 0, 6 },
48946 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x37318, 0 },
48949 		{ "RAOFF", 0, 5 },
48950 	{ "MAC_PORT_RX_LINKB_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3731c, 0 },
48952 		{ "RDOFF", 0, 5 },
48953 	{ "MAC_PORT_RX_LINKB_DFE_CONTROL", 0x37320, 0 },
48964 		{ "DFERST", 0, 1 },
48965 	{ "MAC_PORT_RX_LINKB_DFE_SAMPLE_SNAPSHOT_1", 0x37324, 0 },
48967 		{ "T5BYTE0", 0, 8 },
48968 	{ "MAC_PORT_RX_LINKB_DFE_SAMPLE_SNAPSHOT_2", 0x37328, 0 },
48975 		{ "T5_RX_ASAMP", 0, 3 },
48976 	{ "MAC_PORT_RX_LINKB_RECEIVER_VGA_CONTROL_1", 0x3732c, 0 },
48980 		{ "VOFFA", 0, 6 },
48981 	{ "MAC_PORT_RX_LINKB_RECEIVER_VGA_CONTROL_2", 0x37330, 0 },
48989 		{ "T5VGAIN", 0, 7 },
48990 	{ "MAC_PORT_RX_LINKB_RECEIVER_VGA_CONTROL_3", 0x37334, 0 },
48995 		{ "AMAXT", 0, 7 },
48996 	{ "MAC_PORT_RX_LINKB_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x37338, 0 },
48998 		{ "PMOFFTIME", 0, 6 },
48999 	{ "MAC_PORT_RX_LINKB_RECEIVER_IQAMP_CONTROL_1", 0x3733c, 0 },
49002 		{ "IQAMP", 0, 5 },
49003 	{ "MAC_PORT_RX_LINKB_RECEIVER_IQAMP_CONTROL_2", 0x37340, 0 },
49004 	{ "MAC_PORT_RX_LINKB_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x37344, 0 },
49011 		{ "DASEL", 0, 3 },
49012 	{ "MAC_PORT_RX_LINKB_RECEIVER_DACAP_AND_DACAN", 0x37348, 0 },
49014 		{ "DACAP", 0, 8 },
49015 	{ "MAC_PORT_RX_LINKB_RECEIVER_DACA_MIN", 0x3734c, 0 },
49017 		{ "DACAM", 0, 8 },
49018 	{ "MAC_PORT_RX_LINKB_RECEIVER_ADAC_CONTROL", 0x37350, 0 },
49020 		{ "ADAC1", 0, 8 },
49021 	{ "MAC_PORT_RX_LINKB_RECEIVER_AC_COUPLING_CONTROL", 0x37354, 0 },
49027 		{ "FACCPL", 0, 1 },
49028 	{ "MAC_PORT_RX_LINKB_RECEIVER_AC_COUPLING_VALUE", 0x37358, 0 },
49031 		{ "ACCPLBIAS", 0, 8 },
49032 	{ "MAC_PORT_RX_LINKB_DFE_H1H2H3_LOCAL_OFFSET", 0x3735c, 0 },
49033 	{ "MAC_PORT_RX_LINKB_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x37360, 0 },
49035 		{ "H1EX", 0, 6 },
49036 	{ "MAC_PORT_RX_LINKB_PEAKED_INTEGRATOR", 0x37364, 0 },
49039 		{ "UNPKVGA", 0, 2 },
49040 	{ "MAC_PORT_RX_LINKB_CDR_ANALOG_SWITCH", 0x37368, 0 },
49049 		{ "CDRANLGSW", 0, 2 },
49050 	{ "MAC_PORT_RX_LINKB_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3736c, 0 },
49052 …{ "MAC_PORT_RX_LINKB_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x37370, 0 …
49063 		{ "OAE", 0, 4 },
49064 	{ "MAC_PORT_RX_LINKB_DYNAMIC_DATA_CENTERING_DDC", 0x37374, 0 },
49069 		{ "ODEC", 0, 4 },
49070 	{ "MAC_PORT_RX_LINKB_RECEIVER_INTERNAL_STATUS", 0x37378, 0 },
49086 		{ "T5OCCMP", 0, 1 },
49087 	{ "MAC_PORT_RX_LINKB_DFE_FUNCTION_CONTROL_1", 0x3737c, 0 },
49103 		{ "FADAC", 0, 1 },
49104 	{ "MAC_PORT_RX_LINKB_DFE_FUNCTION_CONTROL_2", 0x37380, 0 },
49120 		{ "FQCC", 0, 1 },
49121 	{ "MAC_PORT_RX_LINKB_DFE_OFFSET_CHANNEL", 0x37384, 0 },
49126 		{ "LOFCH", 0, 5 },
49127 	{ "MAC_PORT_RX_LINKB_DFE_OFFSET_VALUE", 0x37388, 0 },
49129 		{ "LOFL", 0, 7 },
49130 	{ "MAC_PORT_RX_LINKB_H_COEFFICIENBT_BIST", 0x3738c, 0 },
49138 		{ "HSEL", 0, 4 },
49139 	{ "MAC_PORT_RX_LINKB_AC_CAPACITOR_BIST", 0x37390, 0 },
49144 		{ "ACCRD", 0, 8 },
49145 	{ "MAC_PORT_RX_LINKB_RECEIVER_LOFF_CONTROL_REGISTER", 0x37398, 0 },
49153 		{ "LCURR", 0, 5 },
49154 	{ "MAC_PORT_RX_LINKB_RECEIVER_SIGDET_CONTROL", 0x3739c, 0 },
49160 		{ "SDLVL", 0, 5 },
49161 	{ "MAC_PORT_RX_LINKB_RECEIVER_ANALOG_CONTROL_SWITCH", 0x373a0, 0 },
49170 		{ "RX_LINKANLGSW", 0, 7 },
49171 	{ "MAC_PORT_RX_LINKB_INTEGRATOR_DAC_OFFSET", 0x373a4, 0 },
49175 		{ "INTDAC", 0, 6 },
49176 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_CONTROL", 0x373a8, 0 },
49180 		{ "MINAMP", 0, 5 },
49181 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS", 0x373ac, 0 },
49187 		{ "EMEN", 0, 1 },
49188 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x373b0, 0 },
49194 		{ "EMCEN", 0, 1 },
49195 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x373b4, 0 },
49198 		{ "APDF", 0, 12 },
49199 	{ "MAC_PORT_RX_LINKB_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x373b8, 0 },
49200 	{ "MAC_PORT_RX_LINKB_DFE_FUNCTION_CONTROL_3", 0x373bc, 0 },
49216 		{ "FPRBSOFF", 0, 1 },
49217 	{ "MAC_PORT_RX_LINKB_DFE_TAP_CONTROL", 0x373c0, 0 },
49218 	{ "MAC_PORT_RX_LINKB_DFE_TAP", 0x373c4, 0 },
49219 	{ "MAC_PORT_RX_LINKB_RECEIVER_INTERNAL_STATUS_2", 0x373e4, 0 },
49227 		{ "QCCCMP", 0, 1 },
49228 	{ "MAC_PORT_RX_LINKB_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x373e8, 0 },
49231 		{ "CSVAL", 0, 3 },
49232 	{ "MAC_PORT_RX_LINKB_RECEIVER_DCD_CONTROL", 0x373ec, 0 },
49241 		{ "DCDAMP", 0, 6 },
49242 	{ "MAC_PORT_RX_LINKB_RECEIVER_DCC_CONTROL", 0x373f0, 0 },
49248 		{ "DCDAMP", 0, 6 },
49249 	{ "MAC_PORT_RX_LINKB_RECEIVER_QCC_CONTROL", 0x373f4, 0 },
49257 		{ "QCDAMP", 0, 6 },
49258 	{ "MAC_PORT_RX_LINKB_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x373f8, 0 },
49265 		{ "ACJZNT", 0, 1 },
49266 	{ "MAC_PORT_RX_LINKB_RECEIVER_MACRO_TEST_CONTROL_1", 0x373fc, 0 },
49277 		{ "MTHOLD", 0, 1 },
49278 	{ "MAC_PORT_RX_LINKC_RECEIVER_CONFIGURATION_MODE", 0x37600, 0 },
49289 		{ "T5_RX_RTSEL", 0, 2 },
49290 	{ "MAC_PORT_RX_LINKC_RECEIVER_TEST_CONTROL", 0x37604, 0 },
49302 		{ "PATSEL", 0, 3 },
49303 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_CONTROL", 0x37608, 0 },
49312 		{ "SSCEN", 0, 1 },
49313 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_OFFSET_CONTROL", 0x3760c, 0 },
49320 		{ "PHOFFS", 0, 6 },
49321 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_POSITION_1", 0x37610, 0 },
49323 		{ "ROTD", 0, 6 },
49324 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_POSITION_2", 0x37614, 0 },
49327 		{ "ROTE", 0, 6 },
49328 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x37618, 0 },
49331 		{ "RAOFF", 0, 5 },
49332 	{ "MAC_PORT_RX_LINKC_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3761c, 0 },
49334 		{ "RDOFF", 0, 5 },
49335 	{ "MAC_PORT_RX_LINKC_DFE_CONTROL", 0x37620, 0 },
49346 		{ "DFERST", 0, 1 },
49347 	{ "MAC_PORT_RX_LINKC_DFE_SAMPLE_SNAPSHOT_1", 0x37624, 0 },
49349 		{ "T5BYTE0", 0, 8 },
49350 	{ "MAC_PORT_RX_LINKC_DFE_SAMPLE_SNAPSHOT_2", 0x37628, 0 },
49357 		{ "T5_RX_ASAMP", 0, 3 },
49358 	{ "MAC_PORT_RX_LINKC_RECEIVER_VGA_CONTROL_1", 0x3762c, 0 },
49362 		{ "VOFFA", 0, 6 },
49363 	{ "MAC_PORT_RX_LINKC_RECEIVER_VGA_CONTROL_2", 0x37630, 0 },
49371 		{ "T5VGAIN", 0, 7 },
49372 	{ "MAC_PORT_RX_LINKC_RECEIVER_VGA_CONTROL_3", 0x37634, 0 },
49377 		{ "AMAXT", 0, 7 },
49378 	{ "MAC_PORT_RX_LINKC_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x37638, 0 },
49380 		{ "PMOFFTIME", 0, 6 },
49381 	{ "MAC_PORT_RX_LINKC_RECEIVER_IQAMP_CONTROL_1", 0x3763c, 0 },
49384 		{ "IQAMP", 0, 5 },
49385 	{ "MAC_PORT_RX_LINKC_RECEIVER_IQAMP_CONTROL_2", 0x37640, 0 },
49386 	{ "MAC_PORT_RX_LINKC_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x37644, 0 },
49393 		{ "DASEL", 0, 3 },
49394 	{ "MAC_PORT_RX_LINKC_RECEIVER_DACAP_AND_DACAN", 0x37648, 0 },
49396 		{ "DACAP", 0, 8 },
49397 	{ "MAC_PORT_RX_LINKC_RECEIVER_DACA_MIN", 0x3764c, 0 },
49399 		{ "DACAM", 0, 8 },
49400 	{ "MAC_PORT_RX_LINKC_RECEIVER_ADAC_CONTROL", 0x37650, 0 },
49402 		{ "ADAC1", 0, 8 },
49403 	{ "MAC_PORT_RX_LINKC_RECEIVER_AC_COUPLING_CONTROL", 0x37654, 0 },
49409 		{ "FACCPL", 0, 1 },
49410 	{ "MAC_PORT_RX_LINKC_RECEIVER_AC_COUPLING_VALUE", 0x37658, 0 },
49413 		{ "ACCPLBIAS", 0, 8 },
49414 	{ "MAC_PORT_RX_LINKC_DFE_H1H2H3_LOCAL_OFFSET", 0x3765c, 0 },
49415 	{ "MAC_PORT_RX_LINKC_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x37660, 0 },
49417 		{ "H1EX", 0, 6 },
49418 	{ "MAC_PORT_RX_LINKC_PEAKED_INTEGRATOR", 0x37664, 0 },
49421 		{ "UNPKVGA", 0, 2 },
49422 	{ "MAC_PORT_RX_LINKC_CDR_ANALOG_SWITCH", 0x37668, 0 },
49431 		{ "CDRANLGSW", 0, 2 },
49432 	{ "MAC_PORT_RX_LINKC_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3766c, 0 },
49434 …{ "MAC_PORT_RX_LINKC_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x37670, 0 …
49445 		{ "OAE", 0, 4 },
49446 	{ "MAC_PORT_RX_LINKC_DYNAMIC_DATA_CENTERING_DDC", 0x37674, 0 },
49451 		{ "ODEC", 0, 4 },
49452 	{ "MAC_PORT_RX_LINKC_RECEIVER_INTERNAL_STATUS", 0x37678, 0 },
49468 		{ "T5OCCMP", 0, 1 },
49469 	{ "MAC_PORT_RX_LINKC_DFE_FUNCTION_CONTROL_1", 0x3767c, 0 },
49485 		{ "FADAC", 0, 1 },
49486 	{ "MAC_PORT_RX_LINKC_DFE_FUNCTION_CONTROL_2", 0x37680, 0 },
49502 		{ "FQCC", 0, 1 },
49503 	{ "MAC_PORT_RX_LINKC_DFE_OFFSET_CHANNEL", 0x37684, 0 },
49508 		{ "LOFCH", 0, 5 },
49509 	{ "MAC_PORT_RX_LINKC_DFE_OFFSET_VALUE", 0x37688, 0 },
49511 		{ "LOFL", 0, 7 },
49512 	{ "MAC_PORT_RX_LINKC_H_COEFFICIENBT_BIST", 0x3768c, 0 },
49520 		{ "HSEL", 0, 4 },
49521 	{ "MAC_PORT_RX_LINKC_AC_CAPACITOR_BIST", 0x37690, 0 },
49526 		{ "ACCRD", 0, 8 },
49527 	{ "MAC_PORT_RX_LINKC_RECEIVER_LOFF_CONTROL_REGISTER", 0x37698, 0 },
49535 		{ "LCURR", 0, 5 },
49536 	{ "MAC_PORT_RX_LINKC_RECEIVER_SIGDET_CONTROL", 0x3769c, 0 },
49542 		{ "SDLVL", 0, 5 },
49543 	{ "MAC_PORT_RX_LINKC_RECEIVER_ANALOG_CONTROL_SWITCH", 0x376a0, 0 },
49552 		{ "RX_LINKANLGSW", 0, 7 },
49553 	{ "MAC_PORT_RX_LINKC_INTEGRATOR_DAC_OFFSET", 0x376a4, 0 },
49557 		{ "INTDAC", 0, 6 },
49558 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_CONTROL", 0x376a8, 0 },
49562 		{ "MINAMP", 0, 5 },
49563 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS", 0x376ac, 0 },
49569 		{ "EMEN", 0, 1 },
49570 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x376b0, 0 },
49576 		{ "EMCEN", 0, 1 },
49577 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x376b4, 0 },
49580 		{ "APDF", 0, 12 },
49581 	{ "MAC_PORT_RX_LINKC_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x376b8, 0 },
49582 	{ "MAC_PORT_RX_LINKC_DFE_FUNCTION_CONTROL_3", 0x376bc, 0 },
49598 		{ "FPRBSOFF", 0, 1 },
49599 	{ "MAC_PORT_RX_LINKC_DFE_TAP_CONTROL", 0x376c0, 0 },
49600 	{ "MAC_PORT_RX_LINKC_DFE_TAP", 0x376c4, 0 },
49601 	{ "MAC_PORT_RX_LINKC_RECEIVER_INTERNAL_STATUS_2", 0x376e4, 0 },
49609 		{ "QCCCMP", 0, 1 },
49610 	{ "MAC_PORT_RX_LINKC_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x376e8, 0 },
49613 		{ "CSVAL", 0, 3 },
49614 	{ "MAC_PORT_RX_LINKC_RECEIVER_DCD_CONTROL", 0x376ec, 0 },
49623 		{ "DCDAMP", 0, 6 },
49624 	{ "MAC_PORT_RX_LINKC_RECEIVER_DCC_CONTROL", 0x376f0, 0 },
49630 		{ "DCDAMP", 0, 6 },
49631 	{ "MAC_PORT_RX_LINKC_RECEIVER_QCC_CONTROL", 0x376f4, 0 },
49639 		{ "QCDAMP", 0, 6 },
49640 	{ "MAC_PORT_RX_LINKC_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x376f8, 0 },
49647 		{ "ACJZNT", 0, 1 },
49648 	{ "MAC_PORT_RX_LINKC_RECEIVER_MACRO_TEST_CONTROL_1", 0x376fc, 0 },
49659 		{ "MTHOLD", 0, 1 },
49660 	{ "MAC_PORT_RX_LINKD_RECEIVER_CONFIGURATION_MODE", 0x37700, 0 },
49671 		{ "T5_RX_RTSEL", 0, 2 },
49672 	{ "MAC_PORT_RX_LINKD_RECEIVER_TEST_CONTROL", 0x37704, 0 },
49684 		{ "PATSEL", 0, 3 },
49685 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_CONTROL", 0x37708, 0 },
49694 		{ "SSCEN", 0, 1 },
49695 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_OFFSET_CONTROL", 0x3770c, 0 },
49702 		{ "PHOFFS", 0, 6 },
49703 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_POSITION_1", 0x37710, 0 },
49705 		{ "ROTD", 0, 6 },
49706 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_POSITION_2", 0x37714, 0 },
49709 		{ "ROTE", 0, 6 },
49710 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x37718, 0 },
49713 		{ "RAOFF", 0, 5 },
49714 	{ "MAC_PORT_RX_LINKD_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x3771c, 0 },
49716 		{ "RDOFF", 0, 5 },
49717 	{ "MAC_PORT_RX_LINKD_DFE_CONTROL", 0x37720, 0 },
49728 		{ "DFERST", 0, 1 },
49729 	{ "MAC_PORT_RX_LINKD_DFE_SAMPLE_SNAPSHOT_1", 0x37724, 0 },
49731 		{ "T5BYTE0", 0, 8 },
49732 	{ "MAC_PORT_RX_LINKD_DFE_SAMPLE_SNAPSHOT_2", 0x37728, 0 },
49739 		{ "T5_RX_ASAMP", 0, 3 },
49740 	{ "MAC_PORT_RX_LINKD_RECEIVER_VGA_CONTROL_1", 0x3772c, 0 },
49744 		{ "VOFFA", 0, 6 },
49745 	{ "MAC_PORT_RX_LINKD_RECEIVER_VGA_CONTROL_2", 0x37730, 0 },
49753 		{ "T5VGAIN", 0, 7 },
49754 	{ "MAC_PORT_RX_LINKD_RECEIVER_VGA_CONTROL_3", 0x37734, 0 },
49759 		{ "AMAXT", 0, 7 },
49760 	{ "MAC_PORT_RX_LINKD_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x37738, 0 },
49762 		{ "PMOFFTIME", 0, 6 },
49763 	{ "MAC_PORT_RX_LINKD_RECEIVER_IQAMP_CONTROL_1", 0x3773c, 0 },
49766 		{ "IQAMP", 0, 5 },
49767 	{ "MAC_PORT_RX_LINKD_RECEIVER_IQAMP_CONTROL_2", 0x37740, 0 },
49768 	{ "MAC_PORT_RX_LINKD_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x37744, 0 },
49775 		{ "DASEL", 0, 3 },
49776 	{ "MAC_PORT_RX_LINKD_RECEIVER_DACAP_AND_DACAN", 0x37748, 0 },
49778 		{ "DACAP", 0, 8 },
49779 	{ "MAC_PORT_RX_LINKD_RECEIVER_DACA_MIN", 0x3774c, 0 },
49781 		{ "DACAM", 0, 8 },
49782 	{ "MAC_PORT_RX_LINKD_RECEIVER_ADAC_CONTROL", 0x37750, 0 },
49784 		{ "ADAC1", 0, 8 },
49785 	{ "MAC_PORT_RX_LINKD_RECEIVER_AC_COUPLING_CONTROL", 0x37754, 0 },
49791 		{ "FACCPL", 0, 1 },
49792 	{ "MAC_PORT_RX_LINKD_RECEIVER_AC_COUPLING_VALUE", 0x37758, 0 },
49795 		{ "ACCPLBIAS", 0, 8 },
49796 	{ "MAC_PORT_RX_LINKD_DFE_H1H2H3_LOCAL_OFFSET", 0x3775c, 0 },
49797 	{ "MAC_PORT_RX_LINKD_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x37760, 0 },
49799 		{ "H1EX", 0, 6 },
49800 	{ "MAC_PORT_RX_LINKD_PEAKED_INTEGRATOR", 0x37764, 0 },
49803 		{ "UNPKVGA", 0, 2 },
49804 	{ "MAC_PORT_RX_LINKD_CDR_ANALOG_SWITCH", 0x37768, 0 },
49813 		{ "CDRANLGSW", 0, 2 },
49814 	{ "MAC_PORT_RX_LINKD_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x3776c, 0 },
49816 …{ "MAC_PORT_RX_LINKD_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x37770, 0 …
49827 		{ "OAE", 0, 4 },
49828 	{ "MAC_PORT_RX_LINKD_DYNAMIC_DATA_CENTERING_DDC", 0x37774, 0 },
49833 		{ "ODEC", 0, 4 },
49834 	{ "MAC_PORT_RX_LINKD_RECEIVER_INTERNAL_STATUS", 0x37778, 0 },
49850 		{ "T5OCCMP", 0, 1 },
49851 	{ "MAC_PORT_RX_LINKD_DFE_FUNCTION_CONTROL_1", 0x3777c, 0 },
49867 		{ "FADAC", 0, 1 },
49868 	{ "MAC_PORT_RX_LINKD_DFE_FUNCTION_CONTROL_2", 0x37780, 0 },
49884 		{ "FQCC", 0, 1 },
49885 	{ "MAC_PORT_RX_LINKD_DFE_OFFSET_CHANNEL", 0x37784, 0 },
49890 		{ "LOFCH", 0, 5 },
49891 	{ "MAC_PORT_RX_LINKD_DFE_OFFSET_VALUE", 0x37788, 0 },
49893 		{ "LOFL", 0, 7 },
49894 	{ "MAC_PORT_RX_LINKD_H_COEFFICIENBT_BIST", 0x3778c, 0 },
49902 		{ "HSEL", 0, 4 },
49903 	{ "MAC_PORT_RX_LINKD_AC_CAPACITOR_BIST", 0x37790, 0 },
49908 		{ "ACCRD", 0, 8 },
49909 	{ "MAC_PORT_RX_LINKD_RECEIVER_LOFF_CONTROL_REGISTER", 0x37798, 0 },
49917 		{ "LCURR", 0, 5 },
49918 	{ "MAC_PORT_RX_LINKD_RECEIVER_SIGDET_CONTROL", 0x3779c, 0 },
49924 		{ "SDLVL", 0, 5 },
49925 	{ "MAC_PORT_RX_LINKD_RECEIVER_ANALOG_CONTROL_SWITCH", 0x377a0, 0 },
49934 		{ "RX_LINKANLGSW", 0, 7 },
49935 	{ "MAC_PORT_RX_LINKD_INTEGRATOR_DAC_OFFSET", 0x377a4, 0 },
49939 		{ "INTDAC", 0, 6 },
49940 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_CONTROL", 0x377a8, 0 },
49944 		{ "MINAMP", 0, 5 },
49945 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS", 0x377ac, 0 },
49951 		{ "EMEN", 0, 1 },
49952 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x377b0, 0 },
49958 		{ "EMCEN", 0, 1 },
49959 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x377b4, 0 },
49962 		{ "APDF", 0, 12 },
49963 	{ "MAC_PORT_RX_LINKD_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x377b8, 0 },
49964 	{ "MAC_PORT_RX_LINKD_DFE_FUNCTION_CONTROL_3", 0x377bc, 0 },
49980 		{ "FPRBSOFF", 0, 1 },
49981 	{ "MAC_PORT_RX_LINKD_DFE_TAP_CONTROL", 0x377c0, 0 },
49982 	{ "MAC_PORT_RX_LINKD_DFE_TAP", 0x377c4, 0 },
49983 	{ "MAC_PORT_RX_LINKD_RECEIVER_INTERNAL_STATUS_2", 0x377e4, 0 },
49991 		{ "QCCCMP", 0, 1 },
49992 	{ "MAC_PORT_RX_LINKD_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x377e8, 0 },
49995 		{ "CSVAL", 0, 3 },
49996 	{ "MAC_PORT_RX_LINKD_RECEIVER_DCD_CONTROL", 0x377ec, 0 },
50005 		{ "DCDAMP", 0, 6 },
50006 	{ "MAC_PORT_RX_LINKD_RECEIVER_DCC_CONTROL", 0x377f0, 0 },
50012 		{ "DCDAMP", 0, 6 },
50013 	{ "MAC_PORT_RX_LINKD_RECEIVER_QCC_CONTROL", 0x377f4, 0 },
50021 		{ "QCDAMP", 0, 6 },
50022 	{ "MAC_PORT_RX_LINKD_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x377f8, 0 },
50029 		{ "ACJZNT", 0, 1 },
50030 	{ "MAC_PORT_RX_LINKD_RECEIVER_MACRO_TEST_CONTROL_1", 0x377fc, 0 },
50041 		{ "MTHOLD", 0, 1 },
50042 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_CONFIGURATION_MODE", 0x37a00, 0 },
50053 		{ "T5_RX_RTSEL", 0, 2 },
50054 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_TEST_CONTROL", 0x37a04, 0 },
50066 		{ "PATSEL", 0, 3 },
50067 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_CONTROL", 0x37a08, 0 },
50076 		{ "SSCEN", 0, 1 },
50077 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_OFFSET_CONTROL", 0x37a0c, 0 },
50084 		{ "PHOFFS", 0, 6 },
50085 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_POSITION_1", 0x37a10, 0 },
50087 		{ "ROTD", 0, 6 },
50088 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_POSITION_2", 0x37a14, 0 },
50091 		{ "ROTE", 0, 6 },
50092 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_STATIC_PHASE_OFFSET_1", 0x37a18, 0 },
50095 		{ "RAOFF", 0, 5 },
50096 	{ "MAC_PORT_RX_LINK_BCST_PHASE_ROTATOR_STATIC_PHASE_OFFSET_2", 0x37a1c, 0 },
50098 		{ "RDOFF", 0, 5 },
50099 	{ "MAC_PORT_RX_LINK_BCST_DFE_CONTROL", 0x37a20, 0 },
50110 		{ "DFERST", 0, 1 },
50111 	{ "MAC_PORT_RX_LINK_BCST_DFE_SAMPLE_SNAPSHOT_1", 0x37a24, 0 },
50113 		{ "T5BYTE0", 0, 8 },
50114 	{ "MAC_PORT_RX_LINK_BCST_DFE_SAMPLE_SNAPSHOT_2", 0x37a28, 0 },
50121 		{ "T5_RX_ASAMP", 0, 3 },
50122 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_VGA_CONTROL_1", 0x37a2c, 0 },
50126 		{ "VOFFA", 0, 6 },
50127 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_VGA_CONTROL_2", 0x37a30, 0 },
50135 		{ "T5VGAIN", 0, 7 },
50136 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_VGA_CONTROL_3", 0x37a34, 0 },
50141 		{ "AMAXT", 0, 7 },
50142 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_POWER_MANAGEMENT_CONTROL", 0x37a38, 0 },
50144 		{ "PMOFFTIME", 0, 6 },
50145 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_IQAMP_CONTROL_1", 0x37a3c, 0 },
50148 		{ "IQAMP", 0, 5 },
50149 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_IQAMP_CONTROL_2", 0x37a40, 0 },
50150 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DACAP_AND_DACAN_SELECTION", 0x37a44, 0 },
50157 		{ "DASEL", 0, 3 },
50158 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DACAP_AND_DACAN", 0x37a48, 0 },
50160 		{ "DACAP", 0, 8 },
50161 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DACA_MIN", 0x37a4c, 0 },
50163 		{ "DACAM", 0, 8 },
50164 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_ADAC_CONTROL", 0x37a50, 0 },
50166 		{ "ADAC1", 0, 8 },
50167 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_AC_COUPLING_CONTROL", 0x37a54, 0 },
50173 		{ "FACCPL", 0, 1 },
50174 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_AC_COUPLING_VALUE", 0x37a58, 0 },
50177 		{ "ACCPLBIAS", 0, 8 },
50178 	{ "MAC_PORT_RX_LINK_BCST_DFE_H1H2H3_LOCAL_OFFSET", 0x37a5c, 0 },
50179 	{ "MAC_PORT_RX_LINK_BCST_DFE_H1H2H3_LOCAL_OFFSET_VALUE", 0x37a60, 0 },
50181 		{ "H1EX", 0, 6 },
50182 	{ "MAC_PORT_RX_LINK_BCST_PEAKED_INTEGRATOR", 0x37a64, 0 },
50185 		{ "UNPKVGA", 0, 2 },
50186 	{ "MAC_PORT_RX_LINK_BCST_CDR_ANALOG_SWITCH", 0x37a68, 0 },
50195 		{ "CDRANLGSW", 0, 2 },
50196 	{ "MAC_PORT_RX_LINK_BCST_PEAKING_AMPLIFIER_INTIALIZATION_CONTROL", 0x37a6c, 0 },
50198 …C_PORT_RX_LINK_BCST_DYNAMIC_AMPLITUDE_CENTERING_DAC_AND_DYNAMIC_PEAKING_CONTROL_DPC", 0x37a70, 0 },
50209 		{ "OAE", 0, 4 },
50210 	{ "MAC_PORT_RX_LINK_BCST_DYNAMIC_DATA_CENTERING_DDC", 0x37a74, 0 },
50215 		{ "ODEC", 0, 4 },
50216 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_INTERNAL_STATUS", 0x37a78, 0 },
50232 		{ "T5OCCMP", 0, 1 },
50233 	{ "MAC_PORT_RX_LINK_BCST_DFE_FUNCTION_CONTROL_1", 0x37a7c, 0 },
50249 		{ "FADAC", 0, 1 },
50250 	{ "MAC_PORT_RX_LINK_BCST_DFE_FUNCTION_CONTROL_2", 0x37a80, 0 },
50266 		{ "FQCC", 0, 1 },
50267 	{ "MAC_PORT_RX_LINK_BCST_DFE_OFFSET_CHANNEL", 0x37a84, 0 },
50272 		{ "LOFCH", 0, 5 },
50273 	{ "MAC_PORT_RX_LINK_BCST_DFE_OFFSET_VALUE", 0x37a88, 0 },
50275 		{ "LOFL", 0, 7 },
50276 	{ "MAC_PORT_RX_LINK_BCST_H_COEFFICIENBT_BIST", 0x37a8c, 0 },
50284 		{ "HSEL", 0, 4 },
50285 	{ "MAC_PORT_RX_LINK_BCST_AC_CAPACITOR_BIST", 0x37a90, 0 },
50290 		{ "ACCRD", 0, 8 },
50291 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_LOFF_CONTROL_REGISTER", 0x37a98, 0 },
50299 		{ "LCURR", 0, 5 },
50300 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_SIGDET_CONTROL", 0x37a9c, 0 },
50306 		{ "SDLVL", 0, 5 },
50307 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_ANALOG_CONTROL_SWITCH", 0x37aa0, 0 },
50316 		{ "RX_LINKANLGSW", 0, 7 },
50317 	{ "MAC_PORT_RX_LINK_BCST_INTEGRATOR_DAC_OFFSET", 0x37aa4, 0 },
50321 		{ "INTDAC", 0, 6 },
50322 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_CONTROL", 0x37aa8, 0 },
50326 		{ "MINAMP", 0, 5 },
50327 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS", 0x37aac, 0 },
50333 		{ "EMEN", 0, 1 },
50334 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS_ERROR_COUNT", 0x37ab0, 0 },
50340 		{ "EMCEN", 0, 1 },
50341 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS_PDF_EYE_COUNT", 0x37ab4, 0 },
50344 		{ "APDF", 0, 12 },
50345 	{ "MAC_PORT_RX_LINK_BCST_DIGITAL_EYE_METRICS_PATTERN_LENGTH", 0x37ab8, 0 },
50346 	{ "MAC_PORT_RX_LINK_BCST_DFE_FUNCTION_CONTROL_3", 0x37abc, 0 },
50362 		{ "FPRBSOFF", 0, 1 },
50363 	{ "MAC_PORT_RX_LINK_BCST_DFE_TAP_CONTROL", 0x37ac0, 0 },
50364 	{ "MAC_PORT_RX_LINK_BCST_DFE_TAP", 0x37ac4, 0 },
50365 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_INTERNAL_STATUS_2", 0x37ae4, 0 },
50373 		{ "QCCCMP", 0, 1 },
50374 	{ "MAC_PORT_RX_LINK_BCST_AC_COUPLING_CURRENT_SOURCE_ADJUST", 0x37ae8, 0 },
50377 		{ "CSVAL", 0, 3 },
50378 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DCD_CONTROL", 0x37aec, 0 },
50387 		{ "DCDAMP", 0, 6 },
50388 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_DCC_CONTROL", 0x37af0, 0 },
50394 		{ "DCDAMP", 0, 6 },
50395 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_QCC_CONTROL", 0x37af4, 0 },
50403 		{ "QCDAMP", 0, 6 },
50404 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_MACRO_TEST_CONTROL_REGISTER_2", 0x37af8, 0 },
50411 		{ "ACJZNT", 0, 1 },
50412 	{ "MAC_PORT_RX_LINK_BCST_RECEIVER_MACRO_TEST_CONTROL_1", 0x37afc, 0 },
50423 		{ "MTHOLD", 0, 1 },
50428 	{ "MC_DDRPHY_PC_DP18_PLL_LOCK_STATUS", 0x47000, 0 },
50430 	{ "MC_DDRPHY_PC_AD32S_PLL_LOCK_STATUS", 0x47004, 0 },
50432 	{ "MC_DDRPHY_PC_RANK_PAIR0", 0x47008, 0 },
50440 		{ "RANK_PAIR1_SEC_V", 0, 1 },
50441 	{ "MC_DDRPHY_PC_RANK_PAIR1", 0x4700c, 0 },
50449 		{ "RANK_PAIR3_SEC_V", 0, 1 },
50450 	{ "MC_DDRPHY_PC_BASE_CNTR0", 0x47010, 0 },
50451 	{ "MC_DDRPHY_PC_RELOAD_VALUE0", 0x47014, 0 },
50453 		{ "PERIODIC_RELOAD_VALUE0", 0, 15 },
50454 	{ "MC_DDRPHY_PC_BASE_CNTR1", 0x47018, 0 },
50455 	{ "MC_DDRPHY_PC_CAL_TIMER", 0x4701c, 0 },
50456 	{ "MC_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE", 0x47020, 0 },
50457 	{ "MC_DDRPHY_PC_ZCAL_TIMER", 0x47024, 0 },
50458 	{ "MC_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE", 0x47028, 0 },
50459 	{ "MC_DDRPHY_PC_PER_CAL_CONFIG", 0x4702c, 0 },
50470 	{ "MC_DDRPHY_PC_PER_ZCAL_CONFIG", 0x4703c, 0 },
50474 	{ "MC_DDRPHY_PC_CONFIG0", 0x47030, 0 },
50483 	{ "MC_DDRPHY_PC_CONFIG1", 0x47034, 0 },
50491 	{ "MC_DDRPHY_PC_RESETS", 0x47038, 0 },
50494 	{ "MC_DDRPHY_PC_ERROR_STATUS0", 0x47048, 0 },
50501 	{ "MC_DDRPHY_PC_ERROR_MASK0", 0x4704c, 0 },
50508 	{ "MC_DDRPHY_PC_IO_PVT_FET_CONTROL", 0x47050, 0 },
50513 	{ "MC_DDRPHY_PC_VREF_DRV_CONTROL", 0x47054, 0 },
50520 		{ "ANALOG_PD_DIV", 0, 2 },
50521 	{ "MC_DDRPHY_PC_INIT_CAL_CONFIG0", 0x47058, 0 },
50534 		{ "ENA_RANK_PAIR", 0, 4 },
50535 	{ "MC_DDRPHY_PC_INIT_CAL_CONFIG1", 0x4705c, 0 },
50539 		{ "REFRESH_INTERVAL", 0, 7 },
50540 	{ "MC_DDRPHY_PC_INIT_CAL_ERROR", 0x47060, 0 },
50552 		{ "ERROR_RANK_PAIR", 0, 4 },
50553 	{ "MC_DDRPHY_PC_INIT_CAL_MASK", 0x47068, 0 },
50565 	{ "MC_DDRPHY_PC_INIT_CAL_STATUS", 0x47064, 0 },
50568 	{ "MC_DDRPHY_PC_IO_PVT_FET_STATUS", 0x4706c, 0 },
50571 	{ "MC_DDRPHY_PC_MR0_PRI_RP", 0x47070, 0 },
50572 	{ "MC_DDRPHY_PC_MR1_PRI_RP", 0x47074, 0 },
50573 	{ "MC_DDRPHY_PC_MR2_PRI_RP", 0x47078, 0 },
50574 	{ "MC_DDRPHY_PC_MR3_PRI_RP", 0x4707c, 0 },
50575 	{ "MC_DDRPHY_PC_MR0_SEC_RP", 0x47080, 0 },
50576 	{ "MC_DDRPHY_PC_MR1_SEC_RP", 0x47084, 0 },
50577 	{ "MC_DDRPHY_PC_MR2_SEC_RP", 0x47088, 0 },
50578 	{ "MC_DDRPHY_PC_MR3_SEC_RP", 0x4708c, 0 },
50579 	{ "MC_DDRPHY_PC_RANK_GROUP", 0x47044, 0 },
50594 		{ "ADDR_MIRROR_BG0_BG1", 0, 1 },
50595 	{ "MC_ADR_DDRPHY_ADR_BIT_ENABLE", 0x45800, 0 },
50597 		{ "BIT_ENABLE_12_15", 0, 4 },
50598 	{ "MC_ADR_DDRPHY_ADR_DIFFPAIR_ENABLE", 0x45804, 0 },
50607 	{ "MC_ADR_DDRPHY_ADR_DELAY0", 0x45810, 0 },
50609 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50610 	{ "MC_ADR_DDRPHY_ADR_DELAY1", 0x45814, 0 },
50612 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50613 	{ "MC_ADR_DDRPHY_ADR_DELAY2", 0x45818, 0 },
50615 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50616 	{ "MC_ADR_DDRPHY_ADR_DELAY3", 0x4581c, 0 },
50618 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50619 	{ "MC_ADR_DDRPHY_ADR_DELAY4", 0x45820, 0 },
50621 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50622 	{ "MC_ADR_DDRPHY_ADR_DELAY5", 0x45824, 0 },
50624 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50625 	{ "MC_ADR_DDRPHY_ADR_DELAY6", 0x45828, 0 },
50627 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50628 	{ "MC_ADR_DDRPHY_ADR_DELAY7", 0x4582c, 0 },
50630 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50631 	{ "MC_ADR_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL", 0x45830, 0 },
50639 		{ "ADR_TEST_CHECK_EN", 0, 1 },
50640 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN0", 0x45840, 0 },
50643 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN1", 0x45844, 0 },
50646 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN2", 0x45848, 0 },
50649 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN3", 0x4584c, 0 },
50652 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN0", 0x45850, 0 },
50655 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN1", 0x45854, 0 },
50658 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN2", 0x45858, 0 },
50661 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN3", 0x4585c, 0 },
50664 	{ "MC_ADR_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0", 0x45880, 0 },
50672 		{ "SLICE_SEL_REG_BITS14_15", 0, 2 },
50673 	{ "MC_ADR_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1", 0x45884, 0 },
50681 		{ "SLICE_SEL_REG_BITS14_15", 0, 2 },
50682 	{ "MC_ADR_DDRPHY_ADR_IO_POST_CURSOR_VALUE", 0x45860, 0 },
50683 	{ "MC_ADR_DDRPHY_ADR_IO_POST_CURSOR_VALUE_MAP0", 0x458a0, 0 },
50684 	{ "MC_ADR_DDRPHY_ADR_IO_POST_CURSOR_VALUE_MAP1", 0x458a4, 0 },
50685 	{ "MC_ADR_DDRPHY_ADR_IO_SLEW_CTL_VALUE", 0x45868, 0 },
50689 		{ "SLEW_CTL3", 0, 4 },
50690 	{ "MC_ADR_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0", 0x458a8, 0 },
50698 		{ "SLEW_CTL_SEL_BITS14_15", 0, 2 },
50699 	{ "MC_ADR_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1", 0x458ac, 0 },
50707 		{ "SLEW_CTL_SEL_BITS14_15", 0, 2 },
50708 	{ "MC_ADR_DDRPHY_ADR_POWERDOWN_2", 0x458b0, 0 },
50710 		{ "ADR_LANE_12_15_PD", 0, 4 },
50711 	{ "MC_ADR_DDRPHY_ADR_BIT_ENABLE", 0x45a00, 0 },
50713 		{ "BIT_ENABLE_12_15", 0, 4 },
50714 	{ "MC_ADR_DDRPHY_ADR_DIFFPAIR_ENABLE", 0x45a04, 0 },
50723 	{ "MC_ADR_DDRPHY_ADR_DELAY0", 0x45a10, 0 },
50725 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50726 	{ "MC_ADR_DDRPHY_ADR_DELAY1", 0x45a14, 0 },
50728 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50729 	{ "MC_ADR_DDRPHY_ADR_DELAY2", 0x45a18, 0 },
50731 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50732 	{ "MC_ADR_DDRPHY_ADR_DELAY3", 0x45a1c, 0 },
50734 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50735 	{ "MC_ADR_DDRPHY_ADR_DELAY4", 0x45a20, 0 },
50737 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50738 	{ "MC_ADR_DDRPHY_ADR_DELAY5", 0x45a24, 0 },
50740 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50741 	{ "MC_ADR_DDRPHY_ADR_DELAY6", 0x45a28, 0 },
50743 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50744 	{ "MC_ADR_DDRPHY_ADR_DELAY7", 0x45a2c, 0 },
50746 		{ "ADR_DELAY_BITS9_15", 0, 7 },
50747 	{ "MC_ADR_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL", 0x45a30, 0 },
50755 		{ "ADR_TEST_CHECK_EN", 0, 1 },
50756 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN0", 0x45a40, 0 },
50759 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN1", 0x45a44, 0 },
50762 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN2", 0x45a48, 0 },
50765 	{ "MC_ADR_DDRPHY_ADR_IO_NFET_SLICE_EN3", 0x45a4c, 0 },
50768 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN0", 0x45a50, 0 },
50771 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN1", 0x45a54, 0 },
50774 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN2", 0x45a58, 0 },
50777 	{ "MC_ADR_DDRPHY_ADR_IO_PFET_SLICE_EN3", 0x45a5c, 0 },
50780 	{ "MC_ADR_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0", 0x45a80, 0 },
50788 		{ "SLICE_SEL_REG_BITS14_15", 0, 2 },
50789 	{ "MC_ADR_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1", 0x45a84, 0 },
50797 		{ "SLICE_SEL_REG_BITS14_15", 0, 2 },
50798 	{ "MC_ADR_DDRPHY_ADR_IO_POST_CURSOR_VALUE", 0x45a60, 0 },
50799 	{ "MC_ADR_DDRPHY_ADR_IO_POST_CURSOR_VALUE_MAP0", 0x45aa0, 0 },
50800 	{ "MC_ADR_DDRPHY_ADR_IO_POST_CURSOR_VALUE_MAP1", 0x45aa4, 0 },
50801 	{ "MC_ADR_DDRPHY_ADR_IO_SLEW_CTL_VALUE", 0x45a68, 0 },
50805 		{ "SLEW_CTL3", 0, 4 },
50806 	{ "MC_ADR_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0", 0x45aa8, 0 },
50814 		{ "SLEW_CTL_SEL_BITS14_15", 0, 2 },
50815 	{ "MC_ADR_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1", 0x45aac, 0 },
50823 		{ "SLEW_CTL_SEL_BITS14_15", 0, 2 },
50824 	{ "MC_ADR_DDRPHY_ADR_POWERDOWN_2", 0x45ab0, 0 },
50826 		{ "ADR_LANE_12_15_PD", 0, 4 },
50827 	{ "MC_DDRPHY_AD32S_PLL_VREG_CONFIG_0", 0x460c0, 0 },
50832 		{ "PLL_PLLXTR_0_1", 0, 2 },
50833 	{ "MC_DDRPHY_AD32S_PLL_VREG_CONFIG_1", 0x460c4, 0 },
50841 		{ "ANALOG_WRAPON", 0, 1 },
50842 	{ "MC_DDRPHY_AD32S_SYSCLK_CNTL_PR", 0x460c8, 0 },
50851 		{ "CE0DLTVCC", 0, 2 },
50852 	{ "MC_DDRPHY_AD32S_MCCLK_WRCLK_PR_STATIC_OFFSET", 0x460cc, 0 },
50854 	{ "MC_DDRPHY_AD32S_SYSCLK_PR_VALUE_RO", 0x460d0, 0 },
50860 		{ "SLEW_CNTL", 0, 4 },
50861 	{ "MC_DDRPHY_AD32S_OUTPUT_FORCE_ATEST_CNTL", 0x460d4, 0 },
50869 		{ "ATEST1CTL3", 0, 1 },
50870 	{ "MC_DDRPHY_AD32S_OUTPUT_DRIVER_FORCE_VALUE0", 0x460d8, 0 },
50871 	{ "MC_DDRPHY_AD32S_OUTPUT_DRIVER_FORCE_VALUE1", 0x460dc, 0 },
50872 	{ "MC_DDRPHY_AD32S_POWERDOWN_1", 0x460e0, 0 },
50880 		{ "DVCC_REG_PD", 0, 1 },
50881 	{ "MC_DDRPHY_AD32S_SLEW_CAL_CNTL", 0x460e4, 0 },
50886 		{ "SLEW_TARGET_PR_OFFSET", 0, 5 },
50887 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44000, 0 },
50888 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44004, 0 },
50897 		{ "MRS_CMD_DATA_N3", 0, 1 },
50898 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x441f0, 0 },
50899 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x441f4, 0 },
50901 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44008, 0 },
50902 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x4400c, 0 },
50911 		{ "ATEST_MUX_CTL3", 0, 1 },
50912 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44010, 0 },
50927 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44014, 0 },
50943 		{ "QUAD3_CLK18_BIT15", 0, 1 },
50944 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x441f8, 0 },
50948 		{ "DQ_WR_OFFSET_N3", 0, 4 },
50949 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44018, 0 },
50955 		{ "READ_CENTERING_MODE", 0, 2 },
50956 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x4401c, 0 },
50965 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x441cc, 0 },
50968 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x4417c, 0 },
50970 		{ "PASS_FAIL_VALUE", 0, 8 },
50971 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44178, 0 },
50986 		{ "QUAD0_CAVEAT", 0, 1 },
50987 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44058, 0 },
50995 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x4407c, 0 },
50996 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x441d0, 0 },
50998 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x440c0, 0 },
51000 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
51001 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x440c4, 0 },
51003 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
51004 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44024, 0 },
51012 		{ "RDCLK_SELECT3", 0, 2 },
51013 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44170, 0 },
51015 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
51016 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44174, 0 },
51018 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
51019 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x440e0, 0 },
51021 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x440e4, 0 },
51023 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x440e8, 0 },
51025 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x440ec, 0 },
51027 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x440f0, 0 },
51029 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x440f4, 0 },
51031 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x440f8, 0 },
51033 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x440fc, 0 },
51035 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44100, 0 },
51037 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44104, 0 },
51039 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44108, 0 },
51041 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x4410c, 0 },
51043 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44110, 0 },
51045 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44114, 0 },
51047 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44118, 0 },
51049 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x4411c, 0 },
51051 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44120, 0 },
51053 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44124, 0 },
51055 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44128, 0 },
51057 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x4412c, 0 },
51059 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44130, 0 },
51061 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44134, 0 },
51063 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44138, 0 },
51065 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x4413c, 0 },
51067 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44140, 0 },
51070 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44144, 0 },
51073 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44148, 0 },
51076 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x4414c, 0 },
51079 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44150, 0 },
51082 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44154, 0 },
51085 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44158, 0 },
51088 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x4415c, 0 },
51091 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44160, 0 },
51094 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44164, 0 },
51097 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44168, 0 },
51100 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x4416c, 0 },
51103 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44030, 0 },
51105 		{ "OFFSET_BITS9_15", 0, 7 },
51106 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44034, 0 },
51108 		{ "OFFSET_BITS9_15", 0, 7 },
51109 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x441c0, 0 },
51111 		{ "REFERENCE_BITS9_15", 0, 7 },
51112 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x441c4, 0 },
51114 		{ "REFERENCE_BITS9_15", 0, 7 },
51115 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x441c8, 0 },
51117 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44180, 0 },
51119 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51120 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44184, 0 },
51122 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51123 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44188, 0 },
51125 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51126 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x4418c, 0 },
51128 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51129 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44190, 0 },
51131 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51132 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44194, 0 },
51134 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51135 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44198, 0 },
51137 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51138 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x4419c, 0 },
51140 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51141 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x441a0, 0 },
51143 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51144 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x441a4, 0 },
51146 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51147 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x441a8, 0 },
51149 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51150 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x441ac, 0 },
51152 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51153 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44028, 0 },
51155 		{ "MAX_DQS_DRIFT", 0, 6 },
51156 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44038, 0 },
51157 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x4403c, 0 },
51159 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44040, 0 },
51160 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44044, 0 },
51162 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x4404c, 0 },
51166 		{ "DQS_GATE_DELAY_N3", 0, 3 },
51167 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44050, 0 },
51183 		{ "MIN_EYE", 0, 1 },
51184 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44054, 0 },
51200 		{ "MIN_EYE_MASK", 0, 1 },
51201 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x4405c, 0 },
51210 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44060, 0 },
51218 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44064, 0 },
51220 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44068, 0 },
51222 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x4406c, 0 },
51234 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44070, 0 },
51248 		{ "ADVANCE_PR_VALUE", 0, 1 },
51249 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x441d8, 0 },
51254 		{ "PLL_PLLXTR_0_1", 0, 2 },
51255 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x441dc, 0 },
51266 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x441e0, 0 },
51269 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x441e8, 0 },
51272 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x441e4, 0 },
51275 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x441ec, 0 },
51278 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x441d4, 0 },
51282 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44074, 0 },
51286 		{ "DP18_DFT_ERROR", 0, 6 },
51287 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44020, 0 },
51293 		{ "DIGITAL_EYE_VALUE", 0, 8 },
51294 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x440c8, 0 },
51302 		{ "MEMINTD07_POS", 0, 2 },
51303 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x440cc, 0 },
51311 		{ "MEMINTD15_POS", 0, 2 },
51312 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x440d0, 0 },
51320 		{ "MEMINTD23_POS", 0, 2 },
51321 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44078, 0 },
51323 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
51324 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x440d4, 0 },
51328 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
51329 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x440d8, 0 },
51337 		{ "MAX_DQS_ITER", 0, 1 },
51338 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x441b4, 0 },
51340 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
51341 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x441b8, 0 },
51343 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x440dc, 0 },
51345 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x4402c, 0 },
51349 		{ "WR_DEBUG_SEL", 0, 3 },
51350 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x441fc, 0 },
51361 		{ "VCC_REG_PD", 0, 1 },
51362 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44048, 0 },
51365 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x441bc, 0 },
51369 		{ "QUAD3_PWR_CTL", 0, 4 },
51370 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44200, 0 },
51371 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44204, 0 },
51380 		{ "MRS_CMD_DATA_N3", 0, 1 },
51381 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x443f0, 0 },
51382 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x443f4, 0 },
51384 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44208, 0 },
51385 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x4420c, 0 },
51394 		{ "ATEST_MUX_CTL3", 0, 1 },
51395 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44210, 0 },
51410 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44214, 0 },
51426 		{ "QUAD3_CLK18_BIT15", 0, 1 },
51427 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x443f8, 0 },
51431 		{ "DQ_WR_OFFSET_N3", 0, 4 },
51432 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44218, 0 },
51438 		{ "READ_CENTERING_MODE", 0, 2 },
51439 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x4421c, 0 },
51448 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x443cc, 0 },
51451 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x4437c, 0 },
51453 		{ "PASS_FAIL_VALUE", 0, 8 },
51454 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44378, 0 },
51469 		{ "QUAD0_CAVEAT", 0, 1 },
51470 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44258, 0 },
51478 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x4427c, 0 },
51479 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x443d0, 0 },
51481 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x442c0, 0 },
51483 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
51484 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x442c4, 0 },
51486 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
51487 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44224, 0 },
51495 		{ "RDCLK_SELECT3", 0, 2 },
51496 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44370, 0 },
51498 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
51499 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44374, 0 },
51501 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
51502 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x442e0, 0 },
51504 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x442e4, 0 },
51506 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x442e8, 0 },
51508 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x442ec, 0 },
51510 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x442f0, 0 },
51512 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x442f4, 0 },
51514 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x442f8, 0 },
51516 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x442fc, 0 },
51518 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44300, 0 },
51520 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44304, 0 },
51522 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44308, 0 },
51524 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x4430c, 0 },
51526 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44310, 0 },
51528 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44314, 0 },
51530 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44318, 0 },
51532 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x4431c, 0 },
51534 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44320, 0 },
51536 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44324, 0 },
51538 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44328, 0 },
51540 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x4432c, 0 },
51542 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44330, 0 },
51544 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44334, 0 },
51546 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44338, 0 },
51548 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x4433c, 0 },
51550 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44340, 0 },
51553 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44344, 0 },
51556 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44348, 0 },
51559 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x4434c, 0 },
51562 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44350, 0 },
51565 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44354, 0 },
51568 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44358, 0 },
51571 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x4435c, 0 },
51574 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44360, 0 },
51577 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44364, 0 },
51580 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44368, 0 },
51583 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x4436c, 0 },
51586 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44230, 0 },
51588 		{ "OFFSET_BITS9_15", 0, 7 },
51589 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44234, 0 },
51591 		{ "OFFSET_BITS9_15", 0, 7 },
51592 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x443c0, 0 },
51594 		{ "REFERENCE_BITS9_15", 0, 7 },
51595 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x443c4, 0 },
51597 		{ "REFERENCE_BITS9_15", 0, 7 },
51598 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x443c8, 0 },
51600 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44380, 0 },
51602 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51603 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44384, 0 },
51605 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51606 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44388, 0 },
51608 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51609 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x4438c, 0 },
51611 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51612 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44390, 0 },
51614 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51615 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44394, 0 },
51617 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51618 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44398, 0 },
51620 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51621 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x4439c, 0 },
51623 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51624 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x443a0, 0 },
51626 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51627 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x443a4, 0 },
51629 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51630 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x443a8, 0 },
51632 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51633 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x443ac, 0 },
51635 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
51636 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44228, 0 },
51638 		{ "MAX_DQS_DRIFT", 0, 6 },
51639 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44238, 0 },
51640 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x4423c, 0 },
51642 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44240, 0 },
51643 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44244, 0 },
51645 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x4424c, 0 },
51649 		{ "DQS_GATE_DELAY_N3", 0, 3 },
51650 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44250, 0 },
51666 		{ "MIN_EYE", 0, 1 },
51667 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44254, 0 },
51683 		{ "MIN_EYE_MASK", 0, 1 },
51684 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x4425c, 0 },
51693 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44260, 0 },
51701 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44264, 0 },
51703 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44268, 0 },
51705 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x4426c, 0 },
51717 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44270, 0 },
51731 		{ "ADVANCE_PR_VALUE", 0, 1 },
51732 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x443d8, 0 },
51737 		{ "PLL_PLLXTR_0_1", 0, 2 },
51738 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x443dc, 0 },
51749 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x443e0, 0 },
51752 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x443e8, 0 },
51755 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x443e4, 0 },
51758 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x443ec, 0 },
51761 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x443d4, 0 },
51765 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44274, 0 },
51769 		{ "DP18_DFT_ERROR", 0, 6 },
51770 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44220, 0 },
51776 		{ "DIGITAL_EYE_VALUE", 0, 8 },
51777 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x442c8, 0 },
51785 		{ "MEMINTD07_POS", 0, 2 },
51786 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x442cc, 0 },
51794 		{ "MEMINTD15_POS", 0, 2 },
51795 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x442d0, 0 },
51803 		{ "MEMINTD23_POS", 0, 2 },
51804 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44278, 0 },
51806 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
51807 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x442d4, 0 },
51811 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
51812 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x442d8, 0 },
51820 		{ "MAX_DQS_ITER", 0, 1 },
51821 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x443b4, 0 },
51823 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
51824 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x443b8, 0 },
51826 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x442dc, 0 },
51828 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x4422c, 0 },
51832 		{ "WR_DEBUG_SEL", 0, 3 },
51833 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x443fc, 0 },
51844 		{ "VCC_REG_PD", 0, 1 },
51845 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44248, 0 },
51848 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x443bc, 0 },
51852 		{ "QUAD3_PWR_CTL", 0, 4 },
51853 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44400, 0 },
51854 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44404, 0 },
51863 		{ "MRS_CMD_DATA_N3", 0, 1 },
51864 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x445f0, 0 },
51865 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x445f4, 0 },
51867 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44408, 0 },
51868 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x4440c, 0 },
51877 		{ "ATEST_MUX_CTL3", 0, 1 },
51878 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44410, 0 },
51893 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44414, 0 },
51909 		{ "QUAD3_CLK18_BIT15", 0, 1 },
51910 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x445f8, 0 },
51914 		{ "DQ_WR_OFFSET_N3", 0, 4 },
51915 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44418, 0 },
51921 		{ "READ_CENTERING_MODE", 0, 2 },
51922 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x4441c, 0 },
51931 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x445cc, 0 },
51934 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x4457c, 0 },
51936 		{ "PASS_FAIL_VALUE", 0, 8 },
51937 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44578, 0 },
51952 		{ "QUAD0_CAVEAT", 0, 1 },
51953 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44458, 0 },
51961 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x4447c, 0 },
51962 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x445d0, 0 },
51964 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x444c0, 0 },
51966 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
51967 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x444c4, 0 },
51969 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
51970 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44424, 0 },
51978 		{ "RDCLK_SELECT3", 0, 2 },
51979 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44570, 0 },
51981 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
51982 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44574, 0 },
51984 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
51985 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x444e0, 0 },
51987 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x444e4, 0 },
51989 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x444e8, 0 },
51991 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x444ec, 0 },
51993 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x444f0, 0 },
51995 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x444f4, 0 },
51997 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x444f8, 0 },
51999 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x444fc, 0 },
52001 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44500, 0 },
52003 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44504, 0 },
52005 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44508, 0 },
52007 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x4450c, 0 },
52009 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44510, 0 },
52011 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44514, 0 },
52013 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44518, 0 },
52015 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x4451c, 0 },
52017 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44520, 0 },
52019 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44524, 0 },
52021 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44528, 0 },
52023 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x4452c, 0 },
52025 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44530, 0 },
52027 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44534, 0 },
52029 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44538, 0 },
52031 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x4453c, 0 },
52033 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44540, 0 },
52036 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44544, 0 },
52039 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44548, 0 },
52042 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x4454c, 0 },
52045 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44550, 0 },
52048 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44554, 0 },
52051 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44558, 0 },
52054 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x4455c, 0 },
52057 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44560, 0 },
52060 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44564, 0 },
52063 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44568, 0 },
52066 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x4456c, 0 },
52069 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44430, 0 },
52071 		{ "OFFSET_BITS9_15", 0, 7 },
52072 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44434, 0 },
52074 		{ "OFFSET_BITS9_15", 0, 7 },
52075 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x445c0, 0 },
52077 		{ "REFERENCE_BITS9_15", 0, 7 },
52078 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x445c4, 0 },
52080 		{ "REFERENCE_BITS9_15", 0, 7 },
52081 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x445c8, 0 },
52083 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44580, 0 },
52085 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52086 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44584, 0 },
52088 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52089 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44588, 0 },
52091 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52092 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x4458c, 0 },
52094 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52095 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44590, 0 },
52097 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52098 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44594, 0 },
52100 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52101 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44598, 0 },
52103 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52104 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x4459c, 0 },
52106 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52107 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x445a0, 0 },
52109 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52110 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x445a4, 0 },
52112 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52113 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x445a8, 0 },
52115 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52116 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x445ac, 0 },
52118 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52119 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44428, 0 },
52121 		{ "MAX_DQS_DRIFT", 0, 6 },
52122 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44438, 0 },
52123 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x4443c, 0 },
52125 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44440, 0 },
52126 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44444, 0 },
52128 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x4444c, 0 },
52132 		{ "DQS_GATE_DELAY_N3", 0, 3 },
52133 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44450, 0 },
52149 		{ "MIN_EYE", 0, 1 },
52150 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44454, 0 },
52166 		{ "MIN_EYE_MASK", 0, 1 },
52167 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x4445c, 0 },
52176 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44460, 0 },
52184 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44464, 0 },
52186 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44468, 0 },
52188 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x4446c, 0 },
52200 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44470, 0 },
52214 		{ "ADVANCE_PR_VALUE", 0, 1 },
52215 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x445d8, 0 },
52220 		{ "PLL_PLLXTR_0_1", 0, 2 },
52221 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x445dc, 0 },
52232 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x445e0, 0 },
52235 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x445e8, 0 },
52238 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x445e4, 0 },
52241 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x445ec, 0 },
52244 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x445d4, 0 },
52248 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44474, 0 },
52252 		{ "DP18_DFT_ERROR", 0, 6 },
52253 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44420, 0 },
52259 		{ "DIGITAL_EYE_VALUE", 0, 8 },
52260 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x444c8, 0 },
52268 		{ "MEMINTD07_POS", 0, 2 },
52269 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x444cc, 0 },
52277 		{ "MEMINTD15_POS", 0, 2 },
52278 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x444d0, 0 },
52286 		{ "MEMINTD23_POS", 0, 2 },
52287 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44478, 0 },
52289 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
52290 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x444d4, 0 },
52294 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
52295 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x444d8, 0 },
52303 		{ "MAX_DQS_ITER", 0, 1 },
52304 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x445b4, 0 },
52306 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
52307 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x445b8, 0 },
52309 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x444dc, 0 },
52311 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x4442c, 0 },
52315 		{ "WR_DEBUG_SEL", 0, 3 },
52316 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x445fc, 0 },
52327 		{ "VCC_REG_PD", 0, 1 },
52328 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44448, 0 },
52331 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x445bc, 0 },
52335 		{ "QUAD3_PWR_CTL", 0, 4 },
52336 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44600, 0 },
52337 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44604, 0 },
52346 		{ "MRS_CMD_DATA_N3", 0, 1 },
52347 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x447f0, 0 },
52348 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x447f4, 0 },
52350 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44608, 0 },
52351 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x4460c, 0 },
52360 		{ "ATEST_MUX_CTL3", 0, 1 },
52361 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44610, 0 },
52376 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44614, 0 },
52392 		{ "QUAD3_CLK18_BIT15", 0, 1 },
52393 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x447f8, 0 },
52397 		{ "DQ_WR_OFFSET_N3", 0, 4 },
52398 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44618, 0 },
52404 		{ "READ_CENTERING_MODE", 0, 2 },
52405 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x4461c, 0 },
52414 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x447cc, 0 },
52417 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x4477c, 0 },
52419 		{ "PASS_FAIL_VALUE", 0, 8 },
52420 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44778, 0 },
52435 		{ "QUAD0_CAVEAT", 0, 1 },
52436 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44658, 0 },
52444 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x4467c, 0 },
52445 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x447d0, 0 },
52447 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x446c0, 0 },
52449 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
52450 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x446c4, 0 },
52452 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
52453 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44624, 0 },
52461 		{ "RDCLK_SELECT3", 0, 2 },
52462 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44770, 0 },
52464 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
52465 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44774, 0 },
52467 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
52468 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x446e0, 0 },
52470 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x446e4, 0 },
52472 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x446e8, 0 },
52474 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x446ec, 0 },
52476 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x446f0, 0 },
52478 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x446f4, 0 },
52480 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x446f8, 0 },
52482 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x446fc, 0 },
52484 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44700, 0 },
52486 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44704, 0 },
52488 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44708, 0 },
52490 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x4470c, 0 },
52492 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44710, 0 },
52494 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44714, 0 },
52496 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44718, 0 },
52498 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x4471c, 0 },
52500 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44720, 0 },
52502 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44724, 0 },
52504 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44728, 0 },
52506 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x4472c, 0 },
52508 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44730, 0 },
52510 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44734, 0 },
52512 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44738, 0 },
52514 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x4473c, 0 },
52516 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44740, 0 },
52519 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44744, 0 },
52522 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44748, 0 },
52525 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x4474c, 0 },
52528 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44750, 0 },
52531 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44754, 0 },
52534 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44758, 0 },
52537 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x4475c, 0 },
52540 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44760, 0 },
52543 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44764, 0 },
52546 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44768, 0 },
52549 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x4476c, 0 },
52552 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44630, 0 },
52554 		{ "OFFSET_BITS9_15", 0, 7 },
52555 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44634, 0 },
52557 		{ "OFFSET_BITS9_15", 0, 7 },
52558 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x447c0, 0 },
52560 		{ "REFERENCE_BITS9_15", 0, 7 },
52561 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x447c4, 0 },
52563 		{ "REFERENCE_BITS9_15", 0, 7 },
52564 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x447c8, 0 },
52566 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44780, 0 },
52568 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52569 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44784, 0 },
52571 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52572 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44788, 0 },
52574 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52575 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x4478c, 0 },
52577 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52578 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44790, 0 },
52580 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52581 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44794, 0 },
52583 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52584 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44798, 0 },
52586 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52587 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x4479c, 0 },
52589 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52590 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x447a0, 0 },
52592 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52593 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x447a4, 0 },
52595 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52596 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x447a8, 0 },
52598 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52599 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x447ac, 0 },
52601 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
52602 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44628, 0 },
52604 		{ "MAX_DQS_DRIFT", 0, 6 },
52605 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44638, 0 },
52606 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x4463c, 0 },
52608 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44640, 0 },
52609 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44644, 0 },
52611 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x4464c, 0 },
52615 		{ "DQS_GATE_DELAY_N3", 0, 3 },
52616 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44650, 0 },
52632 		{ "MIN_EYE", 0, 1 },
52633 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44654, 0 },
52649 		{ "MIN_EYE_MASK", 0, 1 },
52650 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x4465c, 0 },
52659 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44660, 0 },
52667 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44664, 0 },
52669 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44668, 0 },
52671 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x4466c, 0 },
52683 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44670, 0 },
52697 		{ "ADVANCE_PR_VALUE", 0, 1 },
52698 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x447d8, 0 },
52703 		{ "PLL_PLLXTR_0_1", 0, 2 },
52704 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x447dc, 0 },
52715 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x447e0, 0 },
52718 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x447e8, 0 },
52721 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x447e4, 0 },
52724 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x447ec, 0 },
52727 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x447d4, 0 },
52731 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44674, 0 },
52735 		{ "DP18_DFT_ERROR", 0, 6 },
52736 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44620, 0 },
52742 		{ "DIGITAL_EYE_VALUE", 0, 8 },
52743 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x446c8, 0 },
52751 		{ "MEMINTD07_POS", 0, 2 },
52752 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x446cc, 0 },
52760 		{ "MEMINTD15_POS", 0, 2 },
52761 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x446d0, 0 },
52769 		{ "MEMINTD23_POS", 0, 2 },
52770 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44678, 0 },
52772 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
52773 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x446d4, 0 },
52777 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
52778 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x446d8, 0 },
52786 		{ "MAX_DQS_ITER", 0, 1 },
52787 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x447b4, 0 },
52789 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
52790 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x447b8, 0 },
52792 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x446dc, 0 },
52794 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x4462c, 0 },
52798 		{ "WR_DEBUG_SEL", 0, 3 },
52799 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x447fc, 0 },
52810 		{ "VCC_REG_PD", 0, 1 },
52811 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44648, 0 },
52814 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x447bc, 0 },
52818 		{ "QUAD3_PWR_CTL", 0, 4 },
52819 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44800, 0 },
52820 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44804, 0 },
52829 		{ "MRS_CMD_DATA_N3", 0, 1 },
52830 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x449f0, 0 },
52831 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x449f4, 0 },
52833 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44808, 0 },
52834 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x4480c, 0 },
52843 		{ "ATEST_MUX_CTL3", 0, 1 },
52844 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44810, 0 },
52859 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44814, 0 },
52875 		{ "QUAD3_CLK18_BIT15", 0, 1 },
52876 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x449f8, 0 },
52880 		{ "DQ_WR_OFFSET_N3", 0, 4 },
52881 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44818, 0 },
52887 		{ "READ_CENTERING_MODE", 0, 2 },
52888 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x4481c, 0 },
52897 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x449cc, 0 },
52900 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x4497c, 0 },
52902 		{ "PASS_FAIL_VALUE", 0, 8 },
52903 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44978, 0 },
52918 		{ "QUAD0_CAVEAT", 0, 1 },
52919 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44858, 0 },
52927 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x4487c, 0 },
52928 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x449d0, 0 },
52930 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x448c0, 0 },
52932 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
52933 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x448c4, 0 },
52935 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
52936 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44824, 0 },
52944 		{ "RDCLK_SELECT3", 0, 2 },
52945 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44970, 0 },
52947 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
52948 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44974, 0 },
52950 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
52951 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x448e0, 0 },
52953 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x448e4, 0 },
52955 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x448e8, 0 },
52957 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x448ec, 0 },
52959 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x448f0, 0 },
52961 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x448f4, 0 },
52963 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x448f8, 0 },
52965 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x448fc, 0 },
52967 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44900, 0 },
52969 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44904, 0 },
52971 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44908, 0 },
52973 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x4490c, 0 },
52975 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44910, 0 },
52977 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44914, 0 },
52979 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44918, 0 },
52981 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x4491c, 0 },
52983 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44920, 0 },
52985 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44924, 0 },
52987 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44928, 0 },
52989 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x4492c, 0 },
52991 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44930, 0 },
52993 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44934, 0 },
52995 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44938, 0 },
52997 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x4493c, 0 },
52999 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44940, 0 },
53002 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44944, 0 },
53005 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44948, 0 },
53008 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x4494c, 0 },
53011 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44950, 0 },
53014 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44954, 0 },
53017 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44958, 0 },
53020 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x4495c, 0 },
53023 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44960, 0 },
53026 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44964, 0 },
53029 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44968, 0 },
53032 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x4496c, 0 },
53035 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44830, 0 },
53037 		{ "OFFSET_BITS9_15", 0, 7 },
53038 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44834, 0 },
53040 		{ "OFFSET_BITS9_15", 0, 7 },
53041 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x449c0, 0 },
53043 		{ "REFERENCE_BITS9_15", 0, 7 },
53044 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x449c4, 0 },
53046 		{ "REFERENCE_BITS9_15", 0, 7 },
53047 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x449c8, 0 },
53049 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44980, 0 },
53051 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53052 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44984, 0 },
53054 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53055 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44988, 0 },
53057 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53058 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x4498c, 0 },
53060 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53061 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44990, 0 },
53063 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53064 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44994, 0 },
53066 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53067 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44998, 0 },
53069 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53070 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x4499c, 0 },
53072 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53073 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x449a0, 0 },
53075 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53076 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x449a4, 0 },
53078 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53079 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x449a8, 0 },
53081 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53082 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x449ac, 0 },
53084 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53085 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44828, 0 },
53087 		{ "MAX_DQS_DRIFT", 0, 6 },
53088 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44838, 0 },
53089 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x4483c, 0 },
53091 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44840, 0 },
53092 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44844, 0 },
53094 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x4484c, 0 },
53098 		{ "DQS_GATE_DELAY_N3", 0, 3 },
53099 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44850, 0 },
53115 		{ "MIN_EYE", 0, 1 },
53116 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44854, 0 },
53132 		{ "MIN_EYE_MASK", 0, 1 },
53133 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x4485c, 0 },
53142 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44860, 0 },
53150 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44864, 0 },
53152 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44868, 0 },
53154 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x4486c, 0 },
53166 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44870, 0 },
53180 		{ "ADVANCE_PR_VALUE", 0, 1 },
53181 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x449d8, 0 },
53186 		{ "PLL_PLLXTR_0_1", 0, 2 },
53187 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x449dc, 0 },
53198 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x449e0, 0 },
53201 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x449e8, 0 },
53204 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x449e4, 0 },
53207 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x449ec, 0 },
53210 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x449d4, 0 },
53214 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44874, 0 },
53218 		{ "DP18_DFT_ERROR", 0, 6 },
53219 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44820, 0 },
53225 		{ "DIGITAL_EYE_VALUE", 0, 8 },
53226 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x448c8, 0 },
53234 		{ "MEMINTD07_POS", 0, 2 },
53235 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x448cc, 0 },
53243 		{ "MEMINTD15_POS", 0, 2 },
53244 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x448d0, 0 },
53252 		{ "MEMINTD23_POS", 0, 2 },
53253 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44878, 0 },
53255 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
53256 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x448d4, 0 },
53260 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
53261 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x448d8, 0 },
53269 		{ "MAX_DQS_ITER", 0, 1 },
53270 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x449b4, 0 },
53272 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
53273 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x449b8, 0 },
53275 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x448dc, 0 },
53277 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x4482c, 0 },
53281 		{ "WR_DEBUG_SEL", 0, 3 },
53282 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x449fc, 0 },
53293 		{ "VCC_REG_PD", 0, 1 },
53294 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44848, 0 },
53297 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x449bc, 0 },
53301 		{ "QUAD3_PWR_CTL", 0, 4 },
53302 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44a00, 0 },
53303 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44a04, 0 },
53312 		{ "MRS_CMD_DATA_N3", 0, 1 },
53313 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x44bf0, 0 },
53314 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x44bf4, 0 },
53316 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44a08, 0 },
53317 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x44a0c, 0 },
53326 		{ "ATEST_MUX_CTL3", 0, 1 },
53327 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44a10, 0 },
53342 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44a14, 0 },
53358 		{ "QUAD3_CLK18_BIT15", 0, 1 },
53359 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x44bf8, 0 },
53363 		{ "DQ_WR_OFFSET_N3", 0, 4 },
53364 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44a18, 0 },
53370 		{ "READ_CENTERING_MODE", 0, 2 },
53371 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x44a1c, 0 },
53380 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x44bcc, 0 },
53383 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x44b7c, 0 },
53385 		{ "PASS_FAIL_VALUE", 0, 8 },
53386 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44b78, 0 },
53401 		{ "QUAD0_CAVEAT", 0, 1 },
53402 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44a58, 0 },
53410 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x44a7c, 0 },
53411 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x44bd0, 0 },
53413 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x44ac0, 0 },
53415 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
53416 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x44ac4, 0 },
53418 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
53419 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44a24, 0 },
53427 		{ "RDCLK_SELECT3", 0, 2 },
53428 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44b70, 0 },
53430 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
53431 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44b74, 0 },
53433 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
53434 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x44ae0, 0 },
53436 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x44ae4, 0 },
53438 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x44ae8, 0 },
53440 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x44aec, 0 },
53442 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x44af0, 0 },
53444 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x44af4, 0 },
53446 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x44af8, 0 },
53448 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x44afc, 0 },
53450 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44b00, 0 },
53452 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44b04, 0 },
53454 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44b08, 0 },
53456 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x44b0c, 0 },
53458 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44b10, 0 },
53460 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44b14, 0 },
53462 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44b18, 0 },
53464 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x44b1c, 0 },
53466 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44b20, 0 },
53468 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44b24, 0 },
53470 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44b28, 0 },
53472 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x44b2c, 0 },
53474 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44b30, 0 },
53476 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44b34, 0 },
53478 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44b38, 0 },
53480 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x44b3c, 0 },
53482 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44b40, 0 },
53485 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44b44, 0 },
53488 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44b48, 0 },
53491 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x44b4c, 0 },
53494 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44b50, 0 },
53497 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44b54, 0 },
53500 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44b58, 0 },
53503 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x44b5c, 0 },
53506 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44b60, 0 },
53509 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44b64, 0 },
53512 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44b68, 0 },
53515 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x44b6c, 0 },
53518 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44a30, 0 },
53520 		{ "OFFSET_BITS9_15", 0, 7 },
53521 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44a34, 0 },
53523 		{ "OFFSET_BITS9_15", 0, 7 },
53524 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x44bc0, 0 },
53526 		{ "REFERENCE_BITS9_15", 0, 7 },
53527 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x44bc4, 0 },
53529 		{ "REFERENCE_BITS9_15", 0, 7 },
53530 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x44bc8, 0 },
53532 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44b80, 0 },
53534 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53535 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44b84, 0 },
53537 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53538 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44b88, 0 },
53540 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53541 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x44b8c, 0 },
53543 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53544 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44b90, 0 },
53546 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53547 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44b94, 0 },
53549 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53550 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44b98, 0 },
53552 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53553 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x44b9c, 0 },
53555 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53556 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x44ba0, 0 },
53558 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53559 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x44ba4, 0 },
53561 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53562 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x44ba8, 0 },
53564 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53565 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x44bac, 0 },
53567 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
53568 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44a28, 0 },
53570 		{ "MAX_DQS_DRIFT", 0, 6 },
53571 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44a38, 0 },
53572 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x44a3c, 0 },
53574 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44a40, 0 },
53575 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44a44, 0 },
53577 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x44a4c, 0 },
53581 		{ "DQS_GATE_DELAY_N3", 0, 3 },
53582 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44a50, 0 },
53598 		{ "MIN_EYE", 0, 1 },
53599 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44a54, 0 },
53615 		{ "MIN_EYE_MASK", 0, 1 },
53616 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x44a5c, 0 },
53625 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44a60, 0 },
53633 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44a64, 0 },
53635 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44a68, 0 },
53637 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x44a6c, 0 },
53649 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44a70, 0 },
53663 		{ "ADVANCE_PR_VALUE", 0, 1 },
53664 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x44bd8, 0 },
53669 		{ "PLL_PLLXTR_0_1", 0, 2 },
53670 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x44bdc, 0 },
53681 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x44be0, 0 },
53684 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x44be8, 0 },
53687 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x44be4, 0 },
53690 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x44bec, 0 },
53693 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x44bd4, 0 },
53697 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44a74, 0 },
53701 		{ "DP18_DFT_ERROR", 0, 6 },
53702 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44a20, 0 },
53708 		{ "DIGITAL_EYE_VALUE", 0, 8 },
53709 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x44ac8, 0 },
53717 		{ "MEMINTD07_POS", 0, 2 },
53718 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x44acc, 0 },
53726 		{ "MEMINTD15_POS", 0, 2 },
53727 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x44ad0, 0 },
53735 		{ "MEMINTD23_POS", 0, 2 },
53736 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44a78, 0 },
53738 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
53739 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x44ad4, 0 },
53743 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
53744 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x44ad8, 0 },
53752 		{ "MAX_DQS_ITER", 0, 1 },
53753 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x44bb4, 0 },
53755 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
53756 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x44bb8, 0 },
53758 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x44adc, 0 },
53760 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x44a2c, 0 },
53764 		{ "WR_DEBUG_SEL", 0, 3 },
53765 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x44bfc, 0 },
53776 		{ "VCC_REG_PD", 0, 1 },
53777 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44a48, 0 },
53780 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x44bbc, 0 },
53784 		{ "QUAD3_PWR_CTL", 0, 4 },
53785 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44c00, 0 },
53786 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44c04, 0 },
53795 		{ "MRS_CMD_DATA_N3", 0, 1 },
53796 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x44df0, 0 },
53797 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x44df4, 0 },
53799 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44c08, 0 },
53800 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x44c0c, 0 },
53809 		{ "ATEST_MUX_CTL3", 0, 1 },
53810 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44c10, 0 },
53825 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44c14, 0 },
53841 		{ "QUAD3_CLK18_BIT15", 0, 1 },
53842 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x44df8, 0 },
53846 		{ "DQ_WR_OFFSET_N3", 0, 4 },
53847 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44c18, 0 },
53853 		{ "READ_CENTERING_MODE", 0, 2 },
53854 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x44c1c, 0 },
53863 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x44dcc, 0 },
53866 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x44d7c, 0 },
53868 		{ "PASS_FAIL_VALUE", 0, 8 },
53869 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44d78, 0 },
53884 		{ "QUAD0_CAVEAT", 0, 1 },
53885 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44c58, 0 },
53893 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x44c7c, 0 },
53894 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x44dd0, 0 },
53896 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x44cc0, 0 },
53898 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
53899 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x44cc4, 0 },
53901 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
53902 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44c24, 0 },
53910 		{ "RDCLK_SELECT3", 0, 2 },
53911 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44d70, 0 },
53913 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
53914 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44d74, 0 },
53916 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
53917 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x44ce0, 0 },
53919 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x44ce4, 0 },
53921 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x44ce8, 0 },
53923 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x44cec, 0 },
53925 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x44cf0, 0 },
53927 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x44cf4, 0 },
53929 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x44cf8, 0 },
53931 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x44cfc, 0 },
53933 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44d00, 0 },
53935 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44d04, 0 },
53937 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44d08, 0 },
53939 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x44d0c, 0 },
53941 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44d10, 0 },
53943 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44d14, 0 },
53945 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44d18, 0 },
53947 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x44d1c, 0 },
53949 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44d20, 0 },
53951 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44d24, 0 },
53953 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44d28, 0 },
53955 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x44d2c, 0 },
53957 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44d30, 0 },
53959 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44d34, 0 },
53961 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44d38, 0 },
53963 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x44d3c, 0 },
53965 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44d40, 0 },
53968 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44d44, 0 },
53971 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44d48, 0 },
53974 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x44d4c, 0 },
53977 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44d50, 0 },
53980 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44d54, 0 },
53983 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44d58, 0 },
53986 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x44d5c, 0 },
53989 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44d60, 0 },
53992 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44d64, 0 },
53995 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44d68, 0 },
53998 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x44d6c, 0 },
54001 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44c30, 0 },
54003 		{ "OFFSET_BITS9_15", 0, 7 },
54004 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44c34, 0 },
54006 		{ "OFFSET_BITS9_15", 0, 7 },
54007 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x44dc0, 0 },
54009 		{ "REFERENCE_BITS9_15", 0, 7 },
54010 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x44dc4, 0 },
54012 		{ "REFERENCE_BITS9_15", 0, 7 },
54013 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x44dc8, 0 },
54015 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44d80, 0 },
54017 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54018 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44d84, 0 },
54020 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54021 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44d88, 0 },
54023 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54024 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x44d8c, 0 },
54026 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54027 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44d90, 0 },
54029 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54030 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44d94, 0 },
54032 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54033 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44d98, 0 },
54035 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54036 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x44d9c, 0 },
54038 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54039 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x44da0, 0 },
54041 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54042 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x44da4, 0 },
54044 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54045 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x44da8, 0 },
54047 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54048 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x44dac, 0 },
54050 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54051 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44c28, 0 },
54053 		{ "MAX_DQS_DRIFT", 0, 6 },
54054 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44c38, 0 },
54055 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x44c3c, 0 },
54057 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44c40, 0 },
54058 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44c44, 0 },
54060 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x44c4c, 0 },
54064 		{ "DQS_GATE_DELAY_N3", 0, 3 },
54065 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44c50, 0 },
54081 		{ "MIN_EYE", 0, 1 },
54082 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44c54, 0 },
54098 		{ "MIN_EYE_MASK", 0, 1 },
54099 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x44c5c, 0 },
54108 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44c60, 0 },
54116 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44c64, 0 },
54118 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44c68, 0 },
54120 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x44c6c, 0 },
54132 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44c70, 0 },
54146 		{ "ADVANCE_PR_VALUE", 0, 1 },
54147 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x44dd8, 0 },
54152 		{ "PLL_PLLXTR_0_1", 0, 2 },
54153 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x44ddc, 0 },
54164 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x44de0, 0 },
54167 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x44de8, 0 },
54170 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x44de4, 0 },
54173 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x44dec, 0 },
54176 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x44dd4, 0 },
54180 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44c74, 0 },
54184 		{ "DP18_DFT_ERROR", 0, 6 },
54185 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44c20, 0 },
54191 		{ "DIGITAL_EYE_VALUE", 0, 8 },
54192 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x44cc8, 0 },
54200 		{ "MEMINTD07_POS", 0, 2 },
54201 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x44ccc, 0 },
54209 		{ "MEMINTD15_POS", 0, 2 },
54210 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x44cd0, 0 },
54218 		{ "MEMINTD23_POS", 0, 2 },
54219 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44c78, 0 },
54221 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
54222 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x44cd4, 0 },
54226 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
54227 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x44cd8, 0 },
54235 		{ "MAX_DQS_ITER", 0, 1 },
54236 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x44db4, 0 },
54238 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
54239 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x44db8, 0 },
54241 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x44cdc, 0 },
54243 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x44c2c, 0 },
54247 		{ "WR_DEBUG_SEL", 0, 3 },
54248 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x44dfc, 0 },
54259 		{ "VCC_REG_PD", 0, 1 },
54260 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44c48, 0 },
54263 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x44dbc, 0 },
54267 		{ "QUAD3_PWR_CTL", 0, 4 },
54268 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x44e00, 0 },
54269 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x44e04, 0 },
54278 		{ "MRS_CMD_DATA_N3", 0, 1 },
54279 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x44ff0, 0 },
54280 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x44ff4, 0 },
54282 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x44e08, 0 },
54283 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x44e0c, 0 },
54292 		{ "ATEST_MUX_CTL3", 0, 1 },
54293 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x44e10, 0 },
54308 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x44e14, 0 },
54324 		{ "QUAD3_CLK18_BIT15", 0, 1 },
54325 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x44ff8, 0 },
54329 		{ "DQ_WR_OFFSET_N3", 0, 4 },
54330 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x44e18, 0 },
54336 		{ "READ_CENTERING_MODE", 0, 2 },
54337 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x44e1c, 0 },
54346 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x44fcc, 0 },
54349 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x44f7c, 0 },
54351 		{ "PASS_FAIL_VALUE", 0, 8 },
54352 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x44f78, 0 },
54367 		{ "QUAD0_CAVEAT", 0, 1 },
54368 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x44e58, 0 },
54376 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x44e7c, 0 },
54377 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x44fd0, 0 },
54379 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x44ec0, 0 },
54381 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
54382 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x44ec4, 0 },
54384 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
54385 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x44e24, 0 },
54393 		{ "RDCLK_SELECT3", 0, 2 },
54394 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x44f70, 0 },
54396 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
54397 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x44f74, 0 },
54399 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
54400 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x44ee0, 0 },
54402 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x44ee4, 0 },
54404 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x44ee8, 0 },
54406 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x44eec, 0 },
54408 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x44ef0, 0 },
54410 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x44ef4, 0 },
54412 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x44ef8, 0 },
54414 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x44efc, 0 },
54416 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x44f00, 0 },
54418 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x44f04, 0 },
54420 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x44f08, 0 },
54422 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x44f0c, 0 },
54424 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x44f10, 0 },
54426 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x44f14, 0 },
54428 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x44f18, 0 },
54430 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x44f1c, 0 },
54432 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x44f20, 0 },
54434 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x44f24, 0 },
54436 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x44f28, 0 },
54438 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x44f2c, 0 },
54440 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x44f30, 0 },
54442 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x44f34, 0 },
54444 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x44f38, 0 },
54446 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x44f3c, 0 },
54448 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x44f40, 0 },
54451 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x44f44, 0 },
54454 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x44f48, 0 },
54457 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x44f4c, 0 },
54460 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x44f50, 0 },
54463 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x44f54, 0 },
54466 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x44f58, 0 },
54469 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x44f5c, 0 },
54472 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x44f60, 0 },
54475 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x44f64, 0 },
54478 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x44f68, 0 },
54481 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x44f6c, 0 },
54484 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x44e30, 0 },
54486 		{ "OFFSET_BITS9_15", 0, 7 },
54487 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x44e34, 0 },
54489 		{ "OFFSET_BITS9_15", 0, 7 },
54490 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x44fc0, 0 },
54492 		{ "REFERENCE_BITS9_15", 0, 7 },
54493 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x44fc4, 0 },
54495 		{ "REFERENCE_BITS9_15", 0, 7 },
54496 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x44fc8, 0 },
54498 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x44f80, 0 },
54500 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54501 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x44f84, 0 },
54503 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54504 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x44f88, 0 },
54506 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54507 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x44f8c, 0 },
54509 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54510 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x44f90, 0 },
54512 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54513 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x44f94, 0 },
54515 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54516 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x44f98, 0 },
54518 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54519 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x44f9c, 0 },
54521 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54522 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x44fa0, 0 },
54524 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54525 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x44fa4, 0 },
54527 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54528 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x44fa8, 0 },
54530 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54531 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x44fac, 0 },
54533 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54534 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x44e28, 0 },
54536 		{ "MAX_DQS_DRIFT", 0, 6 },
54537 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x44e38, 0 },
54538 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x44e3c, 0 },
54540 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x44e40, 0 },
54541 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x44e44, 0 },
54543 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x44e4c, 0 },
54547 		{ "DQS_GATE_DELAY_N3", 0, 3 },
54548 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x44e50, 0 },
54564 		{ "MIN_EYE", 0, 1 },
54565 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x44e54, 0 },
54581 		{ "MIN_EYE_MASK", 0, 1 },
54582 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x44e5c, 0 },
54591 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x44e60, 0 },
54599 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x44e64, 0 },
54601 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x44e68, 0 },
54603 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x44e6c, 0 },
54615 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x44e70, 0 },
54629 		{ "ADVANCE_PR_VALUE", 0, 1 },
54630 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x44fd8, 0 },
54635 		{ "PLL_PLLXTR_0_1", 0, 2 },
54636 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x44fdc, 0 },
54647 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x44fe0, 0 },
54650 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x44fe8, 0 },
54653 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x44fe4, 0 },
54656 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x44fec, 0 },
54659 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x44fd4, 0 },
54663 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x44e74, 0 },
54667 		{ "DP18_DFT_ERROR", 0, 6 },
54668 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x44e20, 0 },
54674 		{ "DIGITAL_EYE_VALUE", 0, 8 },
54675 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x44ec8, 0 },
54683 		{ "MEMINTD07_POS", 0, 2 },
54684 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x44ecc, 0 },
54692 		{ "MEMINTD15_POS", 0, 2 },
54693 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x44ed0, 0 },
54701 		{ "MEMINTD23_POS", 0, 2 },
54702 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x44e78, 0 },
54704 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
54705 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x44ed4, 0 },
54709 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
54710 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x44ed8, 0 },
54718 		{ "MAX_DQS_ITER", 0, 1 },
54719 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x44fb4, 0 },
54721 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
54722 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x44fb8, 0 },
54724 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x44edc, 0 },
54726 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x44e2c, 0 },
54730 		{ "WR_DEBUG_SEL", 0, 3 },
54731 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x44ffc, 0 },
54742 		{ "VCC_REG_PD", 0, 1 },
54743 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x44e48, 0 },
54746 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x44fbc, 0 },
54750 		{ "QUAD3_PWR_CTL", 0, 4 },
54751 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE0", 0x45000, 0 },
54752 	{ "MC_DDRPHY_DP18_DATA_BIT_ENABLE1", 0x45004, 0 },
54761 		{ "MRS_CMD_DATA_N3", 0, 1 },
54762 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE0_RP", 0x451f0, 0 },
54763 	{ "MC_DDRPHY_DP18_DATA_BIT_DISABLE1_RP", 0x451f4, 0 },
54765 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR0", 0x45008, 0 },
54766 	{ "MC_DDRPHY_DP18_DATA_BIT_DIR1", 0x4500c, 0 },
54775 		{ "ATEST_MUX_CTL3", 0, 1 },
54776 	{ "MC_DDRPHY_DP18_READ_CLOCK_RANK_PAIR", 0x45010, 0 },
54791 	{ "MC_DDRPHY_DP18_WRCLK_EN_RP", 0x45014, 0 },
54807 		{ "QUAD3_CLK18_BIT15", 0, 1 },
54808 	{ "MC_DDRPHY_DP18_DQ_WR_OFFSET_RP", 0x451f8, 0 },
54812 		{ "DQ_WR_OFFSET_N3", 0, 4 },
54813 	{ "MC_DDRPHY_DP18_RX_PEAK_AMP", 0x45018, 0 },
54819 		{ "READ_CENTERING_MODE", 0, 2 },
54820 	{ "MC_DDRPHY_DP18_SYSCLK_PR", 0x4501c, 0 },
54829 	{ "MC_DDRPHY_DP18_SYSCLK_PR_VALUE", 0x451cc, 0 },
54832 	{ "MC_DDRPHY_DP18_WRCLK_EDGE", 0x4517c, 0 },
54834 		{ "PASS_FAIL_VALUE", 0, 8 },
54835 	{ "MC_DDRPHY_DP18_WRCLK_STATUS", 0x45178, 0 },
54850 		{ "QUAD0_CAVEAT", 0, 1 },
54851 	{ "MC_DDRPHY_DP18_WRCLK_CNTL", 0x45058, 0 },
54859 	{ "MC_DDRPHY_DP18_WRCLK_AUX_CNTL", 0x4507c, 0 },
54860 	{ "MC_DDRPHY_DP18_WRCLK_PR", 0x451d0, 0 },
54862 	{ "MC_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR", 0x450c0, 0 },
54864 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
54865 	{ "MC_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR", 0x450c4, 0 },
54867 		{ "DQSCLK_ROT_CLK_N1_N3", 0, 7 },
54868 	{ "MC_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR", 0x45024, 0 },
54876 		{ "RDCLK_SELECT3", 0, 2 },
54877 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR", 0x45170, 0 },
54879 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
54880 	{ "MC_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR", 0x45174, 0 },
54882 		{ "INITIAL_DQS_ROT_N1_N3", 0, 7 },
54883 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_0_RP", 0x450e0, 0 },
54885 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_1_RP", 0x450e4, 0 },
54887 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_2_RP", 0x450e8, 0 },
54889 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_3_RP", 0x450ec, 0 },
54891 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_4_RP", 0x450f0, 0 },
54893 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_5_RP", 0x450f4, 0 },
54895 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_6_RP", 0x450f8, 0 },
54897 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_7_RP", 0x450fc, 0 },
54899 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_8_RP", 0x45100, 0 },
54901 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_9_RP", 0x45104, 0 },
54903 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_10_RP", 0x45108, 0 },
54905 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_11_RP", 0x4510c, 0 },
54907 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_12_RP", 0x45110, 0 },
54909 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_13_RP", 0x45114, 0 },
54911 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_14_RP", 0x45118, 0 },
54913 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_15_RP", 0x4511c, 0 },
54915 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_16_RP", 0x45120, 0 },
54917 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_17_RP", 0x45124, 0 },
54919 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_18_RP", 0x45128, 0 },
54921 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_19_RP", 0x4512c, 0 },
54923 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_20_RP", 0x45130, 0 },
54925 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_21_RP", 0x45134, 0 },
54927 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_22_RP", 0x45138, 0 },
54929 	{ "MC_DDRPHY_DP18_WR_DELAY_VALUE_23_RP", 0x4513c, 0 },
54931 	{ "MC_DDRPHY_DP18_READ_DELAY0_RANK_PAIR", 0x45140, 0 },
54934 	{ "MC_DDRPHY_DP18_READ_DELAY1_RANK_PAIR", 0x45144, 0 },
54937 	{ "MC_DDRPHY_DP18_READ_DELAY2_RANK_PAIR", 0x45148, 0 },
54940 	{ "MC_DDRPHY_DP18_READ_DELAY3_RANK_PAIR", 0x4514c, 0 },
54943 	{ "MC_DDRPHY_DP18_READ_DELAY4_RANK_PAIR", 0x45150, 0 },
54946 	{ "MC_DDRPHY_DP18_READ_DELAY5_RANK_PAIR", 0x45154, 0 },
54949 	{ "MC_DDRPHY_DP18_READ_DELAY6_RANK_PAIR", 0x45158, 0 },
54952 	{ "MC_DDRPHY_DP18_READ_DELAY7_RANK_PAIR", 0x4515c, 0 },
54955 	{ "MC_DDRPHY_DP18_READ_DELAY8_RANK_PAIR", 0x45160, 0 },
54958 	{ "MC_DDRPHY_DP18_READ_DELAY9_RANK_PAIR", 0x45164, 0 },
54961 	{ "MC_DDRPHY_DP18_READ_DELAY10_RANK_PAIR", 0x45168, 0 },
54964 	{ "MC_DDRPHY_DP18_READ_DELAY11_RANK_PAIR", 0x4516c, 0 },
54967 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR", 0x45030, 0 },
54969 		{ "OFFSET_BITS9_15", 0, 7 },
54970 	{ "MC_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR", 0x45034, 0 },
54972 		{ "OFFSET_BITS9_15", 0, 7 },
54973 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE0", 0x451c0, 0 },
54975 		{ "REFERENCE_BITS9_15", 0, 7 },
54976 	{ "MC_DDRPHY_DP18_READ_TIMING_REFERENCE1", 0x451c4, 0 },
54978 		{ "REFERENCE_BITS9_15", 0, 7 },
54979 	{ "MC_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE", 0x451c8, 0 },
54981 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR", 0x45180, 0 },
54983 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54984 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR", 0x45184, 0 },
54986 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54987 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR", 0x45188, 0 },
54989 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54990 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR", 0x4518c, 0 },
54992 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54993 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR", 0x45190, 0 },
54995 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54996 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR", 0x45194, 0 },
54998 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
54999 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR", 0x45198, 0 },
55001 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
55002 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR", 0x4519c, 0 },
55004 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
55005 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR", 0x451a0, 0 },
55007 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
55008 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR", 0x451a4, 0 },
55010 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
55011 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR", 0x451a8, 0 },
55013 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
55014 	{ "MC_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR", 0x451ac, 0 },
55016 		{ "RD_EYE_SIZE_BITS10_15", 0, 6 },
55017 	{ "MC_DDRPHY_DP18_DRIFT_LIMITS", 0x45028, 0 },
55019 		{ "MAX_DQS_DRIFT", 0, 6 },
55020 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS0", 0x45038, 0 },
55021 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS1", 0x4503c, 0 },
55023 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS2", 0x45040, 0 },
55024 	{ "MC_DDRPHY_DP18_RD_LVL_STATUS3", 0x45044, 0 },
55026 	{ "MC_DDRPHY_DP18_DQS_GATE_DELAY_RP", 0x4504c, 0 },
55030 		{ "DQS_GATE_DELAY_N3", 0, 3 },
55031 	{ "MC_DDRPHY_DP18_RD_STATUS0", 0x45050, 0 },
55047 		{ "MIN_EYE", 0, 1 },
55048 	{ "MC_DDRPHY_DP18_RD_ERROR_MASK0", 0x45054, 0 },
55064 		{ "MIN_EYE_MASK", 0, 1 },
55065 	{ "MC_DDRPHY_DP18_WR_LVL_STATUS0", 0x4505c, 0 },
55074 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS0", 0x45060, 0 },
55082 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS1", 0x45064, 0 },
55084 	{ "MC_DDRPHY_DP18_WR_CNTR_STATUS2", 0x45068, 0 },
55086 	{ "MC_DDRPHY_DP18_WR_ERROR0", 0x4506c, 0 },
55098 	{ "MC_DDRPHY_DP18_WR_ERROR_MASK0", 0x45070, 0 },
55112 		{ "ADVANCE_PR_VALUE", 0, 1 },
55113 	{ "MC_DDRPHY_DP18_PLL_CONFIG0", 0x451d8, 0 },
55118 		{ "PLL_PLLXTR_0_1", 0, 2 },
55119 	{ "MC_DDRPHY_DP18_PLL_CONFIG1", 0x451dc, 0 },
55130 	{ "MC_DDRPHY_DP18_IO_TX_NFET_SLICE", 0x451e0, 0 },
55133 	{ "MC_DDRPHY_DP18_IO_TX_NFET_TERM", 0x451e8, 0 },
55136 	{ "MC_DDRPHY_DP18_IO_TX_PFET_SLICE", 0x451e4, 0 },
55139 	{ "MC_DDRPHY_DP18_IO_TX_PFET_TERM", 0x451ec, 0 },
55142 	{ "MC_DDRPHY_DP18_IO_TX_CONFIG0", 0x451d4, 0 },
55146 	{ "MC_DDRPHY_DP18_DFT_WRAP_STATUS", 0x45074, 0 },
55150 		{ "DP18_DFT_ERROR", 0, 6 },
55151 	{ "MC_DDRPHY_DP18_DFT_DIG_EYE", 0x45020, 0 },
55157 		{ "DIGITAL_EYE_VALUE", 0, 8 },
55158 	{ "MC_DDRPHY_DP18_PATTERN_POS_0", 0x450c8, 0 },
55166 		{ "MEMINTD07_POS", 0, 2 },
55167 	{ "MC_DDRPHY_DP18_PATTERN_POS_1", 0x450cc, 0 },
55175 		{ "MEMINTD15_POS", 0, 2 },
55176 	{ "MC_DDRPHY_DP18_PATTERN_POS_2", 0x450d0, 0 },
55184 		{ "MEMINTD23_POS", 0, 2 },
55185 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG0", 0x45078, 0 },
55187 		{ "SYSCLK_RDCLK_OFFSET", 0, 7 },
55188 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG1", 0x450d4, 0 },
55192 		{ "DQS_ALIGN_ITER_CNTR", 0, 6 },
55193 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG2", 0x450d8, 0 },
55201 		{ "MAX_DQS_ITER", 0, 1 },
55202 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG3", 0x451b4, 0 },
55204 		{ "DESIRED_EDGE_CNTR_TARGET_LOW", 0, 8 },
55205 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG4", 0x451b8, 0 },
55207 	{ "MC_DDRPHY_DP18_DQSCLK_OFFSET", 0x450dc, 0 },
55209 	{ "MC_DDRPHY_DP18_DEBUG_SEL", 0x4502c, 0 },
55213 		{ "WR_DEBUG_SEL", 0, 3 },
55214 	{ "MC_DDRPHY_DP18_POWERDOWN_1", 0x451fc, 0 },
55225 		{ "VCC_REG_PD", 0, 1 },
55226 	{ "MC_DDRPHY_DP18_RD_DIA_CONFIG5", 0x45048, 0 },
55229 	{ "MC_DDRPHY_DP18_DELAY_LINE_PWR_CTL", 0x451bc, 0 },
55233 		{ "QUAD3_PWR_CTL", 0, 4 },
55234 	{ "MC_DDRPHY_SEQ_RD_WR_DATA0", 0x47200, 0 },
55235 	{ "MC_DDRPHY_SEQ_RD_WR_DATA1", 0x47204, 0 },
55236 	{ "MC_DDRPHY_SEQ_CONFIG0", 0x47208, 0 },
55246 		{ "X16_DEVICE", 0, 1 },
55247 	{ "MC_DDRPHY_SEQ_RESERVED_ADDR0", 0x4720c, 0 },
55248 	{ "MC_DDRPHY_SEQ_RESERVED_ADDR1", 0x47210, 0 },
55249 	{ "MC_DDRPHY_SEQ_RESERVED_ADDR2", 0x47214, 0 },
55250 	{ "MC_DDRPHY_SEQ_RESERVED_ADDR3", 0x47218, 0 },
55251 	{ "MC_DDRPHY_SEQ_RESERVED_ADDR4", 0x4721c, 0 },
55252 	{ "MC_DDRPHY_SEQ_ERROR_STATUS0", 0x47220, 0 },
55259 		{ "EARLY_REQ_SOURCE", 0, 3 },
55260 	{ "MC_DDRPHY_SEQ_ERROR_MASK0", 0x47224, 0 },
55264 	{ "MC_DDRPHY_SEQ_ODT_WR_CONFIG0", 0x47228, 0 },
55266 		{ "ODT_WR_VALUES_BITS8_15", 0, 8 },
55267 	{ "MC_DDRPHY_SEQ_ODT_WR_CONFIG1", 0x4722c, 0 },
55269 		{ "ODT_WR_VALUES_BITS8_15", 0, 8 },
55270 	{ "MC_DDRPHY_SEQ_ODT_WR_CONFIG2", 0x47230, 0 },
55272 		{ "ODT_WR_VALUES_BITS8_15", 0, 8 },
55273 	{ "MC_DDRPHY_SEQ_ODT_WR_CONFIG3", 0x47234, 0 },
55275 		{ "ODT_WR_VALUES_BITS8_15", 0, 8 },
55276 	{ "MC_DDRPHY_SEQ_ODT_RD_CONFIG0", 0x47238, 0 },
55278 		{ "ODT_RD_VALUES_x2plus1", 0, 8 },
55279 	{ "MC_DDRPHY_SEQ_ODT_RD_CONFIG1", 0x4723c, 0 },
55281 		{ "ODT_RD_VALUES_x2plus1", 0, 8 },
55282 	{ "MC_DDRPHY_SEQ_ODT_RD_CONFIG2", 0x47240, 0 },
55284 		{ "ODT_RD_VALUES_x2plus1", 0, 8 },
55285 	{ "MC_DDRPHY_SEQ_ODT_RD_CONFIG3", 0x47244, 0 },
55287 		{ "ODT_RD_VALUES_x2plus1", 0, 8 },
55288 	{ "MC_DDRPHY_SEQ_MEM_TIMING_PARAM0", 0x47248, 0 },
55292 		{ "TRFC_CYCLES", 0, 4 },
55293 	{ "MC_DDRPHY_SEQ_MEM_TIMING_PARAM1", 0x4724c, 0 },
55297 		{ "TWRMRD_CYCLES", 0, 4 },
55298 	{ "MC_DDRPHY_SEQ_MEM_TIMING_PARAM2", 0x47250, 0 },
55302 		{ "MRS_CMD_SPACE", 0, 4 },
55303 	{ "MC_DDRPHY_WC_CONFIG0", 0x47600, 0 },
55307 		{ "CUSTOM_INIT_WRITE", 0, 1 },
55308 	{ "MC_DDRPHY_WC_CONFIG1", 0x47604, 0 },
55312 	{ "MC_DDRPHY_WC_CONFIG2", 0x47608, 0 },
55316 		{ "EN_RESET_WR_DELAY_WL", 0, 1 },
55317 	{ "MC_DDRPHY_WC_CONFIG3", 0x47614, 0 },
55321 	{ "MC_DDRPHY_WC_WRCLK_CNTL", 0x47618, 0 },
55324 	{ "MC_DDRPHY_WC_ERROR_STATUS0", 0x4760c, 0 },
55326 	{ "MC_DDRPHY_WC_ERROR_MASK0", 0x47610, 0 },
55328 	{ "MC_DDRPHY_RC_CONFIG0", 0x47400, 0 },
55338 		{ "STAGGERED_PATTERN", 0, 1 },
55339 	{ "MC_DDRPHY_RC_CONFIG1", 0x47404, 0 },
55341 	{ "MC_DDRPHY_RC_CONFIG2", 0x47408, 0 },
55346 	{ "MC_DDRPHY_RC_CONFIG3", 0x4741c, 0 },
55351 	{ "MC_DDRPHY_RC_PERIODIC", 0x47420, 0 },
55352 	{ "MC_DDRPHY_RC_ERROR_STATUS0", 0x47414, 0 },
55354 	{ "MC_DDRPHY_RC_ERROR_MASK0", 0x47418, 0 },
55356 	{ "MC_DDRPHY_APB_CONFIG0", 0x47800, 0 },
55362 	{ "MC_DDRPHY_APB_ERROR_STATUS0", 0x47804, 0 },
55365 	{ "MC_DDRPHY_APB_ERROR_MASK0", 0x47808, 0 },
55368 	{ "MC_DDRPHY_APB_DP18_POPULATION", 0x4780c, 0 },
55384 	{ "MC_DDRPHY_APB_ADR_POPULATION", 0x47810, 0 },
55393 	{ "MC_DDRPHY_APB_ATEST_MUX_SEL", 0x47814, 0 },
55395 	{ "MC_DDRPHY_APB_MTCTL_REG0", 0x47820, 0 },
55404 	{ "MC_DDRPHY_APB_MTCTL_REG1", 0x47824, 0 },
55408 	{ "MC_DDRPHY_APB_MTSTAT_REG0", 0x47828, 0 },
55409 	{ "MC_DDRPHY_APB_MTSTAT_REG1", 0x4782c, 0 },
55411 		{ "MT_DP18_PLL_LOCK_SUM", 0, 1 },
55412 	{ "MC_LMC_MCSTAT", 0x40040, 0 },
55418 	{ "MC_LMC_MCOPT1", 0x40080, 0 },
55440 		{ "CE_THRESHOLD", 0, 8 },
55441 	{ "MC_LMC_MCOPT2", 0x40084, 0 },
55456 	{ "MC_LMC_CFGR0", 0x40100, 0 },
55460 		{ "RANK_ENABLE", 0, 1 },
55461 	{ "MC_LMC_INITSEQ0", 0x40140, 0 },
55465 		{ "RANK", 0, 4 },
55466 	{ "MC_LMC_CMD0", 0x40144, 0 },
55471 		{ "ADDR", 0, 16 },
55472 	{ "MC_LMC_INITSEQ1", 0x40148, 0 },
55476 		{ "RANK", 0, 4 },
55477 	{ "MC_LMC_CMD1", 0x4014c, 0 },
55482 		{ "ADDR", 0, 16 },
55483 	{ "MC_LMC_INITSEQ2", 0x40150, 0 },
55487 		{ "RANK", 0, 4 },
55488 	{ "MC_LMC_CMD2", 0x40154, 0 },
55493 		{ "ADDR", 0, 16 },
55494 	{ "MC_LMC_INITSEQ3", 0x40158, 0 },
55498 		{ "RANK", 0, 4 },
55499 	{ "MC_LMC_CMD3", 0x4015c, 0 },
55504 		{ "ADDR", 0, 16 },
55505 	{ "MC_LMC_INITSEQ4", 0x40160, 0 },
55509 		{ "RANK", 0, 4 },
55510 	{ "MC_LMC_CMD4", 0x40164, 0 },
55515 		{ "ADDR", 0, 16 },
55516 	{ "MC_LMC_INITSEQ5", 0x40168, 0 },
55520 		{ "RANK", 0, 4 },
55521 	{ "MC_LMC_CMD5", 0x4016c, 0 },
55526 		{ "ADDR", 0, 16 },
55527 	{ "MC_LMC_INITSEQ6", 0x40170, 0 },
55531 		{ "RANK", 0, 4 },
55532 	{ "MC_LMC_CMD6", 0x40174, 0 },
55537 		{ "ADDR", 0, 16 },
55538 	{ "MC_LMC_INITSEQ7", 0x40178, 0 },
55542 		{ "RANK", 0, 4 },
55543 	{ "MC_LMC_CMD7", 0x4017c, 0 },
55548 		{ "ADDR", 0, 16 },
55549 	{ "MC_LMC_INITSEQ8", 0x40180, 0 },
55553 		{ "RANK", 0, 4 },
55554 	{ "MC_LMC_CMD8", 0x40184, 0 },
55559 		{ "ADDR", 0, 16 },
55560 	{ "MC_LMC_INITSEQ9", 0x40188, 0 },
55564 		{ "RANK", 0, 4 },
55565 	{ "MC_LMC_CMD9", 0x4018c, 0 },
55570 		{ "ADDR", 0, 16 },
55571 	{ "MC_LMC_INITSEQ10", 0x40190, 0 },
55575 		{ "RANK", 0, 4 },
55576 	{ "MC_LMC_CMD10", 0x40194, 0 },
55581 		{ "ADDR", 0, 16 },
55582 	{ "MC_LMC_INITSEQ11", 0x40198, 0 },
55586 		{ "RANK", 0, 4 },
55587 	{ "MC_LMC_CMD11", 0x4019c, 0 },
55592 		{ "ADDR", 0, 16 },
55593 	{ "MC_LMC_INITSEQ12", 0x401a0, 0 },
55597 		{ "RANK", 0, 4 },
55598 	{ "MC_LMC_CMD12", 0x401a4, 0 },
55603 		{ "ADDR", 0, 16 },
55604 	{ "MC_LMC_INITSEQ13", 0x401a8, 0 },
55608 		{ "RANK", 0, 4 },
55609 	{ "MC_LMC_CMD13", 0x401ac, 0 },
55614 		{ "ADDR", 0, 16 },
55615 	{ "MC_LMC_INITSEQ14", 0x401b0, 0 },
55619 		{ "RANK", 0, 4 },
55620 	{ "MC_LMC_CMD14", 0x401b4, 0 },
55625 		{ "ADDR", 0, 16 },
55626 	{ "MC_LMC_INITSEQ15", 0x401b8, 0 },
55630 		{ "RANK", 0, 4 },
55631 	{ "MC_LMC_CMD15", 0x401bc, 0 },
55636 		{ "ADDR", 0, 16 },
55637 	{ "MC_LMC_SDTR0", 0x40200, 0 },
55639 		{ "T_RFC_XPR", 0, 12 },
55640 	{ "MC_LMC_SDTR1", 0x40204, 0 },
55648 		{ "T_RTRO", 0, 4 },
55649 	{ "MC_LMC_SDTR2", 0x40208, 0 },
55657 		{ "T_RAS", 0, 6 },
55658 	{ "MC_LMC_SDTR3", 0x4020c, 0 },
55665 		{ "T_XSDLL", 0, 8 },
55666 	{ "MC_LMC_SDTR4", 0x40210, 0 },
55672 		{ "T_MOD", 0, 5 },
55673 	{ "MC_LMC_SDTR5", 0x40214, 0 },
55676 	{ "MC_LMC_DBG0", 0x40228, 0 },
55678 	{ "MC_LMC_SMR0", 0x40240, 0 },
55687 		{ "BL", 0, 2 },
55688 	{ "MC_LMC_SMR1", 0x40244, 0 },
55700 		{ "SMR1_DLL", 0, 1 },
55701 	{ "MC_LMC_SMR2", 0x40248, 0 },
55709 		{ "PASR", 0, 3 },
55710 	{ "MC_LMC_SMR3", 0x4024c, 0 },
55718 		{ "MPR_SEL", 0, 2 },
55719 	{ "MC_LMC_SMR4", 0x40250, 0 },
55730 		{ "SMR4_RFU", 0, 1 },
55731 	{ "MC_LMC_SMR5", 0x40254, 0 },
55739 		{ "PAR_LAT_MODE", 0, 3 },
55740 	{ "MC_LMC_SMR6", 0x40258, 0 },
55744 		{ "VREF_DQ_VALUE", 0, 6 },
55745 	{ "MC_LMC_ODTR0", 0x40280, 0 },
55748 	{ "MC_LMC_CALSTAT", 0x40304, 0 },
55751 	{ "MC_LMC_T_PHYUPD0", 0x40330, 0 },
55752 	{ "MC_LMC_T_PHYUPD1", 0x40334, 0 },
55753 	{ "MC_LMC_T_PHYUPD2", 0x40338, 0 },
55754 	{ "MC_LMC_T_PHYUPD3", 0x4033c, 0 },
55755 	{ "MC_P_DDRPHY_RST_CTRL", 0x41300, 0 },
55763 		{ "PHY_RST_N", 0, 1 },
55764 	{ "MC_P_PERFORMANCE_CTRL", 0x41304, 0 },
55774 		{ "RMW_PERF_CTRL", 0, 1 },
55775 	{ "MC_P_ECC_CTRL", 0x41308, 0 },
55777 		{ "ECC_DISABLE", 0, 1 },
55778 	{ "MC_P_PAR_ENABLE", 0x4130c, 0 },
55782 		{ "PERR_BLK_INT_ENABLE", 0, 1 },
55783 	{ "MC_P_PAR_CAUSE", 0x41310, 0 },
55787 		{ "RDATA_FIFOR_PAR_CAUSE", 0, 1 },
55788 	{ "MC_P_INT_ENABLE", 0x41314, 0 },
55791 		{ "PERR_INT_ENABLE", 0, 1 },
55792 	{ "MC_P_INT_CAUSE", 0x41318, 0 },
55795 		{ "PERR_INT_CAUSE", 0, 1 },
55796 	{ "MC_P_ECC_STATUS", 0x4131c, 0 },
55798 		{ "ECC_UECNT", 0, 16 },
55799 	{ "MC_P_PHY_CTRL", 0x41320, 0 },
55800 	{ "MC_P_STATIC_CFG_STATUS", 0x41324, 0 },
55815 		{ "STATIC_SLOW", 0, 1 },
55816 	{ "MC_P_CORE_PCTL_STAT", 0x41328, 0 },
55817 	{ "MC_P_DEBUG_CNT", 0x4132c, 0 },
55819 		{ "RDATA_OCNT", 0, 5 },
55820 	{ "MC_CE_ERR_DATA_RDATA", 0x41330, 0 },
55821 	{ "MC_CE_ERR_DATA_RDATA", 0x41334, 0 },
55822 	{ "MC_CE_ERR_DATA_RDATA", 0x41338, 0 },
55823 	{ "MC_CE_ERR_DATA_RDATA", 0x4133c, 0 },
55824 	{ "MC_CE_ERR_DATA_RDATA", 0x41340, 0 },
55825 	{ "MC_CE_ERR_DATA_RDATA", 0x41344, 0 },
55826 	{ "MC_CE_ERR_DATA_RDATA", 0x41348, 0 },
55827 	{ "MC_CE_ERR_DATA_RDATA", 0x4134c, 0 },
55828 	{ "MC_CE_ERR_DATA_RDATA", 0x41350, 0 },
55829 	{ "MC_CE_ERR_DATA_RDATA", 0x41354, 0 },
55830 	{ "MC_CE_ERR_DATA_RDATA", 0x41358, 0 },
55831 	{ "MC_CE_ERR_DATA_RDATA", 0x4135c, 0 },
55832 	{ "MC_CE_ERR_DATA_RDATA", 0x41360, 0 },
55833 	{ "MC_CE_ERR_DATA_RDATA", 0x41364, 0 },
55834 	{ "MC_CE_ERR_DATA_RDATA", 0x41368, 0 },
55835 	{ "MC_CE_ERR_DATA_RDATA", 0x4136c, 0 },
55836 	{ "MC_UE_ERR_DATA_RDATA", 0x41370, 0 },
55837 	{ "MC_UE_ERR_DATA_RDATA", 0x41374, 0 },
55838 	{ "MC_UE_ERR_DATA_RDATA", 0x41378, 0 },
55839 	{ "MC_UE_ERR_DATA_RDATA", 0x4137c, 0 },
55840 	{ "MC_UE_ERR_DATA_RDATA", 0x41380, 0 },
55841 	{ "MC_UE_ERR_DATA_RDATA", 0x41384, 0 },
55842 	{ "MC_UE_ERR_DATA_RDATA", 0x41388, 0 },
55843 	{ "MC_UE_ERR_DATA_RDATA", 0x4138c, 0 },
55844 	{ "MC_UE_ERR_DATA_RDATA", 0x41390, 0 },
55845 	{ "MC_UE_ERR_DATA_RDATA", 0x41394, 0 },
55846 	{ "MC_UE_ERR_DATA_RDATA", 0x41398, 0 },
55847 	{ "MC_UE_ERR_DATA_RDATA", 0x4139c, 0 },
55848 	{ "MC_UE_ERR_DATA_RDATA", 0x413a0, 0 },
55849 	{ "MC_UE_ERR_DATA_RDATA", 0x413a4, 0 },
55850 	{ "MC_UE_ERR_DATA_RDATA", 0x413a8, 0 },
55851 	{ "MC_UE_ERR_DATA_RDATA", 0x413ac, 0 },
55852 	{ "MC_CE_ADDR", 0x413b0, 0 },
55853 	{ "MC_UE_ADDR", 0x413b4, 0 },
55854 	{ "MC_P_DEEP_SLEEP", 0x413b8, 0 },
55856 		{ "SleepReq", 0, 1 },
55857 	{ "MC_P_FPGA_BONUS", 0x413bc, 0 },
55858 	{ "MC_P_DEBUG_CFG", 0x413c0, 0 },
55864 		{ "DEBUGSELL", 0, 5 },
55865 	{ "MC_P_DEBUG_RPT", 0x413c4, 0 },
55866 	{ "MC_P_PHY_ADR_CK_EN", 0x413c8, 0 },
55867 	{ "MC_CE_ERR_ECC_DATA0", 0x413d0, 0 },
55868 	{ "MC_CE_ERR_ECC_DATA1", 0x413d4, 0 },
55869 	{ "MC_UE_ERR_ECC_DATA0", 0x413d8, 0 },
55870 	{ "MC_UE_ERR_ECC_DATA1", 0x413dc, 0 },
55871 	{ "MC_P_RMW_PRIO", 0x413f0, 0 },
55875 		{ "RD_MID_TH", 0, 8 },
55876 	{ "MC_P_BIST_CMD", 0x41400, 0 },
55880 		{ "BIST_OPCODE", 0, 2 },
55881 	{ "MC_P_BIST_CMD_ADDR", 0x41404, 0 },
55882 	{ "MC_P_BIST_CMD_LEN", 0x41408, 0 },
55883 	{ "MC_P_BIST_DATA_PATTERN", 0x4140c, 0 },
55884 	{ "MC_P_BIST_USER_WMASK0", 0x41414, 0 },
55885 	{ "MC_P_BIST_USER_WMASK1", 0x41418, 0 },
55886 	{ "MC_P_BIST_USER_WMASK2", 0x4141c, 0 },
55889 		{ "USER_MASK_ECC", 0, 8 },
55890 	{ "MC_P_BIST_NUM_ERR", 0x41480, 0 },
55891 	{ "MC_P_BIST_ERR_FIRST_ADDR", 0x41484, 0 },
55892 	{ "MC_P_BIST_STATUS_RDATA", 0x41488, 0 },
55893 	{ "MC_P_BIST_STATUS_RDATA", 0x4148c, 0 },
55894 	{ "MC_P_BIST_STATUS_RDATA", 0x41490, 0 },
55895 	{ "MC_P_BIST_STATUS_RDATA", 0x41494, 0 },
55896 	{ "MC_P_BIST_STATUS_RDATA", 0x41498, 0 },
55897 	{ "MC_P_BIST_STATUS_RDATA", 0x4149c, 0 },
55898 	{ "MC_P_BIST_STATUS_RDATA", 0x414a0, 0 },
55899 	{ "MC_P_BIST_STATUS_RDATA", 0x414a4, 0 },
55900 	{ "MC_P_BIST_STATUS_RDATA", 0x414a8, 0 },
55901 	{ "MC_P_BIST_STATUS_RDATA", 0x414ac, 0 },
55902 	{ "MC_P_BIST_STATUS_RDATA", 0x414b0, 0 },
55903 	{ "MC_P_BIST_STATUS_RDATA", 0x414b4, 0 },
55904 	{ "MC_P_BIST_STATUS_RDATA", 0x414b8, 0 },
55905 	{ "MC_P_BIST_STATUS_RDATA", 0x414bc, 0 },
55906 	{ "MC_P_BIST_STATUS_RDATA", 0x414c0, 0 },
55907 	{ "MC_P_BIST_STATUS_RDATA", 0x414c4, 0 },
55908 	{ "MC_P_BIST_STATUS_RDATA", 0x414c8, 0 },
55909 	{ "MC_P_BIST_STATUS_RDATA", 0x414cc, 0 },
55910 	{ "MC_P_BIST_CRC_SEED", 0x414d0, 0 },
55915 	{ "EDC_H_REF", 0x50000, 0 },
55925 		{ "RefFreq", 0, 16 },
55926 	{ "EDC_H_BIST_CMD", 0x50004, 0 },
55930 		{ "BIST_OPCODE", 0, 2 },
55931 	{ "EDC_H_BIST_CMD_ADDR", 0x50008, 0 },
55932 	{ "EDC_H_BIST_CMD_LEN", 0x5000c, 0 },
55933 	{ "EDC_H_BIST_DATA_PATTERN", 0x50010, 0 },
55934 	{ "EDC_H_BIST_USER_WDATA0", 0x50014, 0 },
55935 	{ "EDC_H_BIST_USER_WDATA1", 0x50018, 0 },
55936 	{ "EDC_H_BIST_USER_WDATA2", 0x5001c, 0 },
55938 		{ "USER_DATA2", 0, 8 },
55939 	{ "EDC_H_BIST_NUM_ERR", 0x50020, 0 },
55940 	{ "EDC_H_BIST_ERR_FIRST_ADDR", 0x50024, 0 },
55941 	{ "EDC_H_BIST_STATUS_RDATA", 0x50028, 0 },
55942 	{ "EDC_H_BIST_STATUS_RDATA", 0x5002c, 0 },
55943 	{ "EDC_H_BIST_STATUS_RDATA", 0x50030, 0 },
55944 	{ "EDC_H_BIST_STATUS_RDATA", 0x50034, 0 },
55945 	{ "EDC_H_BIST_STATUS_RDATA", 0x50038, 0 },
55946 	{ "EDC_H_BIST_STATUS_RDATA", 0x5003c, 0 },
55947 	{ "EDC_H_BIST_STATUS_RDATA", 0x50040, 0 },
55948 	{ "EDC_H_BIST_STATUS_RDATA", 0x50044, 0 },
55949 	{ "EDC_H_BIST_STATUS_RDATA", 0x50048, 0 },
55950 	{ "EDC_H_BIST_STATUS_RDATA", 0x5004c, 0 },
55951 	{ "EDC_H_BIST_STATUS_RDATA", 0x50050, 0 },
55952 	{ "EDC_H_BIST_STATUS_RDATA", 0x50054, 0 },
55953 	{ "EDC_H_BIST_STATUS_RDATA", 0x50058, 0 },
55954 	{ "EDC_H_BIST_STATUS_RDATA", 0x5005c, 0 },
55955 	{ "EDC_H_BIST_STATUS_RDATA", 0x50060, 0 },
55956 	{ "EDC_H_BIST_STATUS_RDATA", 0x50064, 0 },
55957 	{ "EDC_H_BIST_STATUS_RDATA", 0x50068, 0 },
55958 	{ "EDC_H_BIST_STATUS_RDATA", 0x5006c, 0 },
55959 	{ "EDC_H_PAR_ENABLE", 0x50070, 0 },
55962 		{ "PERR_PAR_ENABLE", 0, 1 },
55963 	{ "EDC_H_INT_ENABLE", 0x50074, 0 },
55966 		{ "PERR_INT_ENABLE", 0, 1 },
55967 	{ "EDC_H_INT_CAUSE", 0x50078, 0 },
55973 		{ "PERR_INT_CAUSE", 0, 1 },
55974 	{ "EDC_H_ECC_STATUS", 0x5007c, 0 },
55976 		{ "ECC_UECNT", 0, 16 },
55977 	{ "EDC_H_ECC_ERR_SEL", 0x50080, 0 },
55978 	{ "EDC_H_ECC_ERR_ADDR", 0x50084, 0 },
55979 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50090, 0 },
55980 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50094, 0 },
55981 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50098, 0 },
55982 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x5009c, 0 },
55983 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500a0, 0 },
55984 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500a4, 0 },
55985 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500a8, 0 },
55986 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500ac, 0 },
55987 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500b0, 0 },
55988 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500b4, 0 },
55989 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500b8, 0 },
55990 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500bc, 0 },
55991 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500c0, 0 },
55992 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500c4, 0 },
55993 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500c8, 0 },
55994 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x500cc, 0 },
55995 	{ "EDC_H_DBG_MA_CMD_INTF", 0x50300, 0 },
56002 		{ "MCmdVld", 0, 1 },
56003 	{ "EDC_H_DBG_MA_WDATA_INTF", 0x50304, 0 },
56006 		{ "MWData", 0, 30 },
56007 	{ "EDC_H_DBG_MA_RDATA_INTF", 0x50308, 0 },
56010 		{ "MRspData", 0, 30 },
56011 	{ "EDC_H_DBG_BIST_CMD_INTF", 0x5030c, 0 },
56016 		{ "BCmdVld", 0, 1 },
56017 	{ "EDC_H_DBG_BIST_WDATA_INTF", 0x50310, 0 },
56020 		{ "BWData", 0, 30 },
56021 	{ "EDC_H_DBG_BIST_RDATA_INTF", 0x50314, 0 },
56024 		{ "BRspData", 0, 30 },
56025 	{ "EDC_H_DBG_EDRAM_CMD_INTF", 0x50318, 0 },
56033 		{ "Edram0RdEnLo", 0, 1 },
56034 	{ "EDC_H_DBG_EDRAM_WDATA_INTF", 0x5031c, 0 },
56036 		{ "EdramWByteEn", 0, 9 },
56037 	{ "EDC_H_DBG_EDRAM0_RDATA_INTF", 0x50320, 0 },
56038 	{ "EDC_H_DBG_EDRAM1_RDATA_INTF", 0x50324, 0 },
56039 	{ "EDC_H_DBG_MA_WR_REQ_CNT", 0x50328, 0 },
56040 	{ "EDC_H_DBG_MA_WR_EXP_DAT_CYC_CNT", 0x5032c, 0 },
56041 	{ "EDC_H_DBG_MA_WR_DAT_CYC_CNT", 0x50330, 0 },
56042 	{ "EDC_H_DBG_MA_RD_REQ_CNT", 0x50334, 0 },
56043 	{ "EDC_H_DBG_MA_RD_EXP_DAT_CYC_CNT", 0x50338, 0 },
56044 	{ "EDC_H_DBG_MA_RD_DAT_CYC_CNT", 0x5033c, 0 },
56045 	{ "EDC_H_DBG_BIST_WR_REQ_CNT", 0x50340, 0 },
56046 	{ "EDC_H_DBG_BIST_WR_EXP_DAT_CYC_CNT", 0x50344, 0 },
56047 	{ "EDC_H_DBG_BIST_WR_DAT_CYC_CNT", 0x50348, 0 },
56048 	{ "EDC_H_DBG_BIST_RD_REQ_CNT", 0x5034c, 0 },
56049 	{ "EDC_H_DBG_BIST_RD_EXP_DAT_CYC_CNT", 0x50350, 0 },
56050 	{ "EDC_H_DBG_BIST_RD_DAT_CYC_CNT", 0x50354, 0 },
56051 	{ "EDC_H_DBG_EDRAM0_WR_REQ_CNT", 0x50358, 0 },
56052 	{ "EDC_H_DBG_EDRAM0_RD_REQ_CNT", 0x5035c, 0 },
56053 	{ "EDC_H_DBG_EDRAM0_RMW_CNT", 0x50360, 0 },
56054 	{ "EDC_H_DBG_EDRAM1_WR_REQ_CNT", 0x50364, 0 },
56055 	{ "EDC_H_DBG_EDRAM1_RD_REQ_CNT", 0x50368, 0 },
56056 	{ "EDC_H_DBG_EDRAM1_RMW_CNT", 0x5036c, 0 },
56057 	{ "EDC_H_DBG_EDRAM_REF_BURST_CNT", 0x50370, 0 },
56058 	{ "EDC_H_DBG_FIFO_STATUS", 0x50374, 0 },
56072 		{ "stg_wrdq_notempty", 0, 1 },
56073 	{ "EDC_H_DBG_FSM_STATE", 0x50378, 0 },
56075 		{ "CmdFsm", 0, 3 },
56076 	{ "EDC_H_DBG_STALL_CYCLES", 0x5037c, 0 },
56096 		{ "dead_cycle1_post_ref_rmw", 0, 1 },
56097 	{ "EDC_H_DBG_CMD_QUEUE", 0x50380, 0 },
56102 		{ "ECmdAddr", 0, 22 },
56103 	{ "EDC_H_DBG_REFRESH", 0x50384, 0 },
56107 		{ "RefCnt", 0, 8 },
56108 	{ "EDC_H_BIST_CRC_SEED", 0x50400, 0 },
56113 	{ "EDC_H_REF", 0x50800, 0 },
56123 		{ "RefFreq", 0, 16 },
56124 	{ "EDC_H_BIST_CMD", 0x50804, 0 },
56128 		{ "BIST_OPCODE", 0, 2 },
56129 	{ "EDC_H_BIST_CMD_ADDR", 0x50808, 0 },
56130 	{ "EDC_H_BIST_CMD_LEN", 0x5080c, 0 },
56131 	{ "EDC_H_BIST_DATA_PATTERN", 0x50810, 0 },
56132 	{ "EDC_H_BIST_USER_WDATA0", 0x50814, 0 },
56133 	{ "EDC_H_BIST_USER_WDATA1", 0x50818, 0 },
56134 	{ "EDC_H_BIST_USER_WDATA2", 0x5081c, 0 },
56136 		{ "USER_DATA2", 0, 8 },
56137 	{ "EDC_H_BIST_NUM_ERR", 0x50820, 0 },
56138 	{ "EDC_H_BIST_ERR_FIRST_ADDR", 0x50824, 0 },
56139 	{ "EDC_H_BIST_STATUS_RDATA", 0x50828, 0 },
56140 	{ "EDC_H_BIST_STATUS_RDATA", 0x5082c, 0 },
56141 	{ "EDC_H_BIST_STATUS_RDATA", 0x50830, 0 },
56142 	{ "EDC_H_BIST_STATUS_RDATA", 0x50834, 0 },
56143 	{ "EDC_H_BIST_STATUS_RDATA", 0x50838, 0 },
56144 	{ "EDC_H_BIST_STATUS_RDATA", 0x5083c, 0 },
56145 	{ "EDC_H_BIST_STATUS_RDATA", 0x50840, 0 },
56146 	{ "EDC_H_BIST_STATUS_RDATA", 0x50844, 0 },
56147 	{ "EDC_H_BIST_STATUS_RDATA", 0x50848, 0 },
56148 	{ "EDC_H_BIST_STATUS_RDATA", 0x5084c, 0 },
56149 	{ "EDC_H_BIST_STATUS_RDATA", 0x50850, 0 },
56150 	{ "EDC_H_BIST_STATUS_RDATA", 0x50854, 0 },
56151 	{ "EDC_H_BIST_STATUS_RDATA", 0x50858, 0 },
56152 	{ "EDC_H_BIST_STATUS_RDATA", 0x5085c, 0 },
56153 	{ "EDC_H_BIST_STATUS_RDATA", 0x50860, 0 },
56154 	{ "EDC_H_BIST_STATUS_RDATA", 0x50864, 0 },
56155 	{ "EDC_H_BIST_STATUS_RDATA", 0x50868, 0 },
56156 	{ "EDC_H_BIST_STATUS_RDATA", 0x5086c, 0 },
56157 	{ "EDC_H_PAR_ENABLE", 0x50870, 0 },
56160 		{ "PERR_PAR_ENABLE", 0, 1 },
56161 	{ "EDC_H_INT_ENABLE", 0x50874, 0 },
56164 		{ "PERR_INT_ENABLE", 0, 1 },
56165 	{ "EDC_H_INT_CAUSE", 0x50878, 0 },
56171 		{ "PERR_INT_CAUSE", 0, 1 },
56172 	{ "EDC_H_ECC_STATUS", 0x5087c, 0 },
56174 		{ "ECC_UECNT", 0, 16 },
56175 	{ "EDC_H_ECC_ERR_SEL", 0x50880, 0 },
56176 	{ "EDC_H_ECC_ERR_ADDR", 0x50884, 0 },
56177 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50890, 0 },
56178 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50894, 0 },
56179 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x50898, 0 },
56180 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x5089c, 0 },
56181 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508a0, 0 },
56182 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508a4, 0 },
56183 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508a8, 0 },
56184 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508ac, 0 },
56185 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508b0, 0 },
56186 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508b4, 0 },
56187 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508b8, 0 },
56188 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508bc, 0 },
56189 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508c0, 0 },
56190 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508c4, 0 },
56191 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508c8, 0 },
56192 	{ "EDC_H_ECC_ERR_DATA_RDATA", 0x508cc, 0 },
56193 	{ "EDC_H_DBG_MA_CMD_INTF", 0x50b00, 0 },
56200 		{ "MCmdVld", 0, 1 },
56201 	{ "EDC_H_DBG_MA_WDATA_INTF", 0x50b04, 0 },
56204 		{ "MWData", 0, 30 },
56205 	{ "EDC_H_DBG_MA_RDATA_INTF", 0x50b08, 0 },
56208 		{ "MRspData", 0, 30 },
56209 	{ "EDC_H_DBG_BIST_CMD_INTF", 0x50b0c, 0 },
56214 		{ "BCmdVld", 0, 1 },
56215 	{ "EDC_H_DBG_BIST_WDATA_INTF", 0x50b10, 0 },
56218 		{ "BWData", 0, 30 },
56219 	{ "EDC_H_DBG_BIST_RDATA_INTF", 0x50b14, 0 },
56222 		{ "BRspData", 0, 30 },
56223 	{ "EDC_H_DBG_EDRAM_CMD_INTF", 0x50b18, 0 },
56231 		{ "Edram0RdEnLo", 0, 1 },
56232 	{ "EDC_H_DBG_EDRAM_WDATA_INTF", 0x50b1c, 0 },
56234 		{ "EdramWByteEn", 0, 9 },
56235 	{ "EDC_H_DBG_EDRAM0_RDATA_INTF", 0x50b20, 0 },
56236 	{ "EDC_H_DBG_EDRAM1_RDATA_INTF", 0x50b24, 0 },
56237 	{ "EDC_H_DBG_MA_WR_REQ_CNT", 0x50b28, 0 },
56238 	{ "EDC_H_DBG_MA_WR_EXP_DAT_CYC_CNT", 0x50b2c, 0 },
56239 	{ "EDC_H_DBG_MA_WR_DAT_CYC_CNT", 0x50b30, 0 },
56240 	{ "EDC_H_DBG_MA_RD_REQ_CNT", 0x50b34, 0 },
56241 	{ "EDC_H_DBG_MA_RD_EXP_DAT_CYC_CNT", 0x50b38, 0 },
56242 	{ "EDC_H_DBG_MA_RD_DAT_CYC_CNT", 0x50b3c, 0 },
56243 	{ "EDC_H_DBG_BIST_WR_REQ_CNT", 0x50b40, 0 },
56244 	{ "EDC_H_DBG_BIST_WR_EXP_DAT_CYC_CNT", 0x50b44, 0 },
56245 	{ "EDC_H_DBG_BIST_WR_DAT_CYC_CNT", 0x50b48, 0 },
56246 	{ "EDC_H_DBG_BIST_RD_REQ_CNT", 0x50b4c, 0 },
56247 	{ "EDC_H_DBG_BIST_RD_EXP_DAT_CYC_CNT", 0x50b50, 0 },
56248 	{ "EDC_H_DBG_BIST_RD_DAT_CYC_CNT", 0x50b54, 0 },
56249 	{ "EDC_H_DBG_EDRAM0_WR_REQ_CNT", 0x50b58, 0 },
56250 	{ "EDC_H_DBG_EDRAM0_RD_REQ_CNT", 0x50b5c, 0 },
56251 	{ "EDC_H_DBG_EDRAM0_RMW_CNT", 0x50b60, 0 },
56252 	{ "EDC_H_DBG_EDRAM1_WR_REQ_CNT", 0x50b64, 0 },
56253 	{ "EDC_H_DBG_EDRAM1_RD_REQ_CNT", 0x50b68, 0 },
56254 	{ "EDC_H_DBG_EDRAM1_RMW_CNT", 0x50b6c, 0 },
56255 	{ "EDC_H_DBG_EDRAM_REF_BURST_CNT", 0x50b70, 0 },
56256 	{ "EDC_H_DBG_FIFO_STATUS", 0x50b74, 0 },
56270 		{ "stg_wrdq_notempty", 0, 1 },
56271 	{ "EDC_H_DBG_FSM_STATE", 0x50b78, 0 },
56273 		{ "CmdFsm", 0, 3 },
56274 	{ "EDC_H_DBG_STALL_CYCLES", 0x50b7c, 0 },
56294 		{ "dead_cycle1_post_ref_rmw", 0, 1 },
56295 	{ "EDC_H_DBG_CMD_QUEUE", 0x50b80, 0 },
56300 		{ "ECmdAddr", 0, 22 },
56301 	{ "EDC_H_DBG_REFRESH", 0x50b84, 0 },
56305 		{ "RefCnt", 0, 8 },
56306 	{ "EDC_H_BIST_CRC_SEED", 0x50c00, 0 },
56311 	{ "HMA_TABLE_ACCESS", 0x51000, 0 },
56314 		{ "L_SEL", 0, 4 },
56315 	{ "HMA_TABLE_LINE0", 0x51004, 0 },
56316 	{ "HMA_TABLE_LINE1", 0x51008, 0 },
56317 	{ "HMA_TABLE_LINE2", 0x5100c, 0 },
56318 	{ "HMA_TABLE_LINE3", 0x51010, 0 },
56319 	{ "HMA_TABLE_LINE4", 0x51014, 0 },
56320 	{ "HMA_TABLE_LINE5", 0x51018, 0 },
56326 		{ "DCA", 0, 11 },
56327 	{ "HMA_COOKIE", 0x5101c, 0 },
56331 		{ "C_SEL", 0, 4 },
56332 	{ "HMA_CFG", 0x51020, 0 },
56334 	{ "HMA_TLB_ACCESS", 0x51028, 0 },
56339 		{ "E_SEL", 0, 5 },
56340 	{ "HMA_TLB_BITS", 0x5102c, 0 },
56345 		{ "REGION", 0, 2 },
56346 	{ "HMA_TLB_DESC_0_H", 0x51030, 0 },
56347 	{ "HMA_TLB_DESC_0_L", 0x51034, 0 },
56348 	{ "HMA_TLB_DESC_1_H", 0x51038, 0 },
56349 	{ "HMA_TLB_DESC_1_L", 0x5103c, 0 },
56350 	{ "HMA_TLB_DESC_2_H", 0x51040, 0 },
56351 	{ "HMA_TLB_DESC_2_L", 0x51044, 0 },
56352 	{ "HMA_TLB_DESC_3_H", 0x51048, 0 },
56353 	{ "HMA_TLB_DESC_3_L", 0x5104c, 0 },
56354 	{ "HMA_TLB_DESC_4_H", 0x51050, 0 },
56355 	{ "HMA_TLB_DESC_4_L", 0x51054, 0 },
56356 	{ "HMA_TLB_DESC_5_H", 0x51058, 0 },
56357 	{ "HMA_TLB_DESC_5_L", 0x5105c, 0 },
56358 	{ "HMA_TLB_DESC_6_H", 0x51060, 0 },
56359 	{ "HMA_TLB_DESC_6_L", 0x51064, 0 },
56360 	{ "HMA_TLB_DESC_7_H", 0x51068, 0 },
56361 	{ "HMA_TLB_DESC_7_L", 0x5106c, 0 },
56362 	{ "HMA_REG0_MIN", 0x51070, 0 },
56364 	{ "HMA_REG0_MAX", 0x51074, 0 },
56366 	{ "HMA_REG0_MASK", 0x51078, 0 },
56368 	{ "HMA_REG0_BASE", 0x5107c, 0 },
56369 	{ "HMA_REG1_MIN", 0x51080, 0 },
56371 	{ "HMA_REG1_MAX", 0x51084, 0 },
56373 	{ "HMA_REG1_MASK", 0x51088, 0 },
56375 	{ "HMA_REG1_BASE", 0x5108c, 0 },
56376 	{ "HMA_REG2_MIN", 0x51090, 0 },
56378 	{ "HMA_REG2_MAX", 0x51094, 0 },
56380 	{ "HMA_REG2_MASK", 0x51098, 0 },
56382 	{ "HMA_REG2_BASE", 0x5109c, 0 },
56383 	{ "HMA_REG3_MIN", 0x510a0, 0 },
56385 	{ "HMA_REG3_MAX", 0x510a4, 0 },
56387 	{ "HMA_REG3_MASK", 0x510a8, 0 },
56389 	{ "HMA_REG3_BASE", 0x510ac, 0 },
56390 	{ "HMA_SW_SYNC", 0x510b0, 0 },
56393 	{ "HMA_PAR_ENABLE", 0x51300, 0 },
56394 	{ "HMA_INT_ENABLE", 0x51304, 0 },
56400 		{ "PERR_INT_ENABLE", 0, 1 },
56401 	{ "HMA_INT_CAUSE", 0x51308, 0 },
56407 		{ "PERR_INT_CAUSE", 0, 1 },
56408 	{ "HMA_MA_MST_ERR", 0x5130c, 0 },
56409 	{ "HMA_RTF_ERR", 0x51310, 0 },
56410 	{ "HMA_OTF_ERR", 0x51314, 0 },
56411 	{ "HMA_IDTF_ERR", 0x51318, 0 },
56412 	{ "HMA_EXIT_TF", 0x5131c, 0 },
56417 	{ "HMA_LOCAL_DEBUG_CFG", 0x51320, 0 },
56423 		{ "DEBUGSELL", 0, 5 },
56424 	{ "HMA_LOCAL_DEBUG_RPT", 0x51324, 0 },