Home
last modified time | relevance | path

Searched +full:0 +full:x186 (Results 1 – 25 of 47) sorted by relevance

12

/linux/Documentation/devicetree/bindings/nvmem/
H A Dmediatek,efuse.yaml23 pattern: "^efuse@[0-9a-f]+$"
71 reg = <0x11c10000 0x1000>;
76 reg = <0x184 0x1>;
77 bits = <0 5>;
80 reg = <0x184 0x2>;
84 reg = <0x185 0x1>;
88 reg = <0x186 0x1>;
89 bits = <0 5>;
92 reg = <0x186 0x2>;
96 reg = <0x187 0x1>;
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_d.h27 #define ixTHM_TCON_CSR_CONFIG 0xd82014a4
28 #define ixTHM_TCON_CSR_DATA 0xd82014a8
29 #define ixTHM_TCON_HTC 0xd8200c64
30 #define ixTHM_TCON_CUR_TMP 0xd8200ca4
31 #define ixTHM_TCON_THERM_TRIP 0xd8200ce4
32 #define ixTHM_GPIO_PROCHOT_CTRL 0xd8200d00
33 #define ixTHM_GPIO_THERMTRIP_CTRL 0xd8200d04
34 #define ixTHM_THERMAL_INT_ENA 0xd8200d10
35 #define ixTHM_THERMAL_INT_CTRL 0xd8200d14
36 #define ixTHM_THERMAL_INT_STATUS 0xd8200d18
[all …]
H A Dsmu_7_1_1_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_1_2_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_1_3_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_1_0_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_0_1_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
/linux/drivers/hwmon/
H A Dsch5627.c27 #define SCH5627_HWMON_ID 0xa5
28 #define SCH5627_COMPANY_ID 0x5c
29 #define SCH5627_PRIMARY_ID 0xa0
31 #define SCH5627_REG_BUILD_CODE 0x39
32 #define SCH5627_REG_BUILD_ID 0x3a
33 #define SCH5627_REG_HWMON_ID 0x3c
34 #define SCH5627_REG_HWMON_REV 0x3d
35 #define SCH5627_REG_COMPANY_ID 0x3e
36 #define SCH5627_REG_PRIMARY_ID 0x3f
37 #define SCH5627_REG_CTRL 0x40
[all …]
/linux/drivers/media/pci/tw686x/
H A Dtw686x-regs.h6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe})
7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \
8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \
9 a0 + 0x38})
10 #define INT_STATUS 0x00
11 #define PB_STATUS 0x01
12 #define DMA_CMD 0x02
13 #define VIDEO_FIFO_STATUS 0x03
14 #define VIDEO_CHANNEL_ID 0x04
15 #define VIDEO_PARSER_STATUS 0x05
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dother.json4 "EventCode": "0x139",
10 "EventCode": "0x180",
16 "EventCode": "0x181",
22 "EventCode": "0x182",
28 "EventCode": "0x183",
34 "EventCode": "0x184",
40 "EventCode": "0x185",
46 "EventCode": "0x186",
52 "EventCode": "0x187",
58 "EventCode": "0x188",
[all …]
/linux/drivers/leds/rgb/
H A Dleds-mt6370-rgb.c27 MT6370_LED_ISNK1 = 0,
35 MT6370_LED_PWM_MODE = 0,
42 F_RGB_EN = 0,
64 R_LED123_CURR = 0,
72 P_LED_TR1 = 0,
81 #define MT6370_REG_DEV_INFO 0x100
82 #define MT6370_REG_RGB1_DIM 0x182
83 #define MT6370_REG_RGB2_DIM 0x183
84 #define MT6370_REG_RGB3_DIM 0x184
85 #define MT6370_REG_RGB_EN 0x185
[all …]
/linux/drivers/net/wireless/marvell/mwifiex/
H A D11ac.c18 {0x124, 0x15F, 0x186}, /* NSS = 1 */
19 {0x249, 0x2BE, 0x30C}, /* NSS = 2 */
20 {0x36D, 0x41D, 0x492}, /* NSS = 3 */
21 {0x492, 0x57C, 0x618}, /* NSS = 4 */
22 {0x5B6, 0x6DB, 0x79E}, /* NSS = 5 */
23 {0x6DB, 0x83A, 0x0}, /* NSS = 6 */
24 {0x7FF, 0x999, 0xAAA}, /* NSS = 7 */
25 {0x924, 0xAF8, 0xC30} /* NSS = 8 */
29 {0x249, 0x2BE, 0x30C}, /* NSS = 1 */
30 {0x492, 0x57C, 0x618}, /* NSS = 2 */
[all …]
/linux/include/linux/mfd/mt6331/
H A Dregisters.h10 #define MT6331_STRUP_CON0 0x0
11 #define MT6331_STRUP_CON2 0x2
12 #define MT6331_STRUP_CON3 0x4
13 #define MT6331_STRUP_CON4 0x6
14 #define MT6331_STRUP_CON5 0x8
15 #define MT6331_STRUP_CON6 0xA
16 #define MT6331_STRUP_CON7 0xC
17 #define MT6331_STRUP_CON8 0xE
18 #define MT6331_STRUP_CON9 0x10
19 #define MT6331_STRUP_CON10 0x12
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7_ppsmc.h30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305)
32 #define PPSMC_SWSTATE_FLAG_DC 0x01
33 #define PPSMC_SWSTATE_FLAG_UVD 0x02
34 #define PPSMC_SWSTATE_FLAG_VCE 0x04
36 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
37 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
38 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
40 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
41 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
42 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
H A Dtonga_ppsmc.h29 #define PPSMC_SWSTATE_FLAG_DC 0x01
30 #define PPSMC_SWSTATE_FLAG_UVD 0x02
31 #define PPSMC_SWSTATE_FLAG_VCE 0x04
32 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
H A Dfiji_ppsmc.h30 #define PPSMC_SWSTATE_FLAG_DC 0x01
31 #define PPSMC_SWSTATE_FLAG_UVD 0x02
32 #define PPSMC_SWSTATE_FLAG_VCE 0x04
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
42 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
[all …]
/linux/arch/x86/include/asm/
H A Dperf_event.h17 #define MSR_ARCH_PERFMON_PERFCTR0 0xc1
18 #define MSR_ARCH_PERFMON_PERFCTR1 0xc2
20 #define MSR_ARCH_PERFMON_EVENTSEL0 0x186
21 #define MSR_ARCH_PERFMON_EVENTSEL1 0x187
23 #define ARCH_PERFMON_EVENTSEL_EVENT 0x000000FFULL
24 #define ARCH_PERFMON_EVENTSEL_UMASK 0x0000FF00ULL
33 #define ARCH_PERFMON_EVENTSEL_CMASK 0xFF000000ULL
36 #define ARCH_PERFMON_EVENTSEL_UMASK2 (0xFFULL << 40)
39 #define INTEL_FIXED_0_KERNEL (1ULL << 0)
64 (0xFULL << AMD64_EVENTSEL_INT_CORE_SEL_SHIFT)
[all …]
/linux/drivers/media/usb/gspca/
H A Dstk1135.c51 if (gspca_dev->usb_err < 0) in reg_r()
52 return 0; in reg_r()
53 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), in reg_r()
54 0x00, in reg_r()
56 0x00, in reg_r()
61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
63 if (ret < 0) { in reg_r()
64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r()
66 return 0; in reg_r()
[all …]
/linux/include/dt-bindings/input/
H A Dlinux-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
30 #define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */
32 #define INPUT_PROP_MAX 0x1f
39 #define EV_SYN 0x0
[all...]
/linux/include/uapi/linux/
H A Dinput-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
30 #define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */
32 #define INPUT_PROP_MAX 0x1f
39 #define EV_SYN 0x00
[all …]
/linux/include/sound/
H A Dsdca_function.h4 * https://www.mipi.org/mipi-sdca-v1-0-download
68 * SDCA Function Types from SDCA specification v1.0a Section 5.1.2
76 SDCA_FUNCTION_TYPE_SMART_AMP = 0x01,
77 SDCA_FUNCTION_TYPE_SIMPLE_AMP = 0x02,
78 SDCA_FUNCTION_TYPE_SMART_MIC = 0x03,
79 SDCA_FUNCTION_TYPE_SIMPLE_MIC = 0x04,
80 SDCA_FUNCTION_TYPE_SPEAKER_MIC = 0x05,
81 SDCA_FUNCTION_TYPE_UAJ = 0x06,
82 SDCA_FUNCTION_TYPE_RJ = 0x07,
83 SDCA_FUNCTION_TYPE_SIMPLE_JACK = 0x08,
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_AGE_CNTL 0x9bf
29 #define mmMC_ARB_RET_CREDITS2 0x9c0
30 #define mmMC_ARB_FED_CNTL 0x9c1
31 #define mmMC_ARB_GECC2_STATUS 0x9c2
32 #define mmMC_ARB_GECC2_MISC 0x9c3
33 #define mmMC_ARB_GECC2_DEBUG 0x9c4
34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
35 #define mmMC_ARB_PERF_CID 0x9c6
36 #define mmMC_ARB_GECC2 0x9c9
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.c64 N_RF_CTL_OVER_CMD_RXRF_PU = 0,
72 N_INTC_OVERRIDE_OFF = 0,
80 N_RSSI_W1 = 0,
90 N_RAIL_I = 0,
132 for (i = 0; i < 200; i++) { in b43_nphy_force_rf_sequence()
157 { 0x0E7, 0x0EC }, { 0x342, 0x343 }, { 0x346, 0x347 } in b43_nphy_rf_ctl_override_rev7()
172 for (i = 0; i < 2; i++) { in b43_nphy_rf_ctl_override_rev7()
180 val_addr = (i == 0) ? e->val_addr_core0 : e->val_addr_core1; in b43_nphy_rf_ctl_override_rev7()
208 b43_nphy_rf_ctl_override_rev7(dev, 0x20, value, core, off, 1); in b43_nphy_rf_ctl_override_one_to_many()
209 b43_nphy_rf_ctl_override_rev7(dev, 0x10, value, core, off, 1); in b43_nphy_rf_ctl_override_one_to_many()
[all …]

12